A system and method for judging the oscillation of a PID closed-loop controller

Abstract

The present invention provides a system for judging the oscillation of a PID closed-loop controller, including: a control deviation DEV input, a digital input module I, a digital input module II, a digital input module III, a high-low comparator I, a high-low comparator II, an SR flip-flop I, and an SR flip-flop II; the control deviation DEV input is connected to the input end of the high-low comparator I, the output end of the high-low comparator I is connected to the set S of the SR flip-flop I, and the output end of the SR flip-flop I is connected to the input end of the digital input module I; the control deviation DEV input is also connected to the input end of the high-low comparator II; the low-value output end of the high-low comparator II is connected to the S set of the SR flip-flop II; the output end of the SR flip-flop II is connected to the input end of the digital input module II; the high-address output end of the high-low comparator I is connected to the reset R of the SR flip-flop I, and the high-value output end of the high-low comparator II is connected to the reset R of the SR flip-flop II.

Description

Technical Field

[0001] The present invention relates to the technical field of PID control, and more particularly, to a system and method for determining oscillation of a PID closed-loop controller. Background Art

[0002] In thermal power plants, for some important control systems, such as the feed water system, fuel system, steam temperature control system, etc., if the automatic control cannot meet the requirements of stable operation, it will not only increase the operation intensity of the operators, but also may cause the risk of tripping, or even damage to the equipment. Therefore, when the PID closed-loop controller has adjustment oscillation, that is, the system control is unstable, a warning should be issued immediately to remind the operation and maintenance personnel to pay attention and take effective measures in time to prevent more serious consequences. Summary of the Invention

[0003] In view of the technical problems mentioned in the above background art, a system and method for determining oscillation of a PID closed-loop controller are provided. The present invention mainly utilizes that when the PID closed-loop controller has adjustment oscillation, an alarm can be given immediately to enable the operation and maintenance personnel to discover and intervene in time, and take effective measures to prevent more serious consequences.

[0004] The technical means adopted by the present invention are as follows:

[0005] A system for determining oscillation of a PID closed-loop controller includes: a control deviation DEV input, a switch quantity module I, a switch quantity module II, a switch quantity module III, a high-low comparator I, a high-low comparator II, an SR flip-flop I, and an SR flip-flop II; the control deviation DEV input is connected to the input end of the high-low comparator I, the output end of the high-low comparator I is connected to the set S of the SR flip-flop I, and the output end of the SR flip-flop I is connected to the input end of the switch quantity module I; the control deviation DEV input is also connected to the input end of the high-low comparator II; the low-value output end of the high-low comparator II is connected to the S set of the SR flip-flop II; the output end of the SR flip-flop II is connected to the input end of the switch quantity module II; the high-value output end of the high-low comparator I is connected to the reset R of the SR flip-flop I, and the high-value output end of the high-low comparator II is connected to the reset R of the SR flip-flop II.

[0006] Furthermore, the present invention also includes a method for determining oscillation of a PID closed-loop controller, including the following steps:

[0007] Step 1: Set H of the high-low comparator I 6 、L 6 , and H 6 >L 6 ; Set H of the high-low comparator II7 、L 7 and H 7 > L 7 ; Set the delay time T of the delay-on module I; Set the delay time T of the delay-on module II, and the setting principle is that the oscillation period time = 2T;

[0008] Step 2: When the system is in non-automatic control, the control deviation DEV outputs a as 0; The SR flip-flop I outputs the positive deviation A as 0, and the SR flip-flop II outputs the negative deviation B as 0; The up-down pulse counting module I outputs b as 0; The absolute value module outputs c as 0; The delay-on module II outputs f as 1; The switch quantity module III outputs 1; The up-down pulse counting module II outputs Fx as 0;

[0009] Step 3: When the system is in automatic control, the control deviation DEV changes in real time; Determine the size of the control deviation DEV and the H 6 set by the high-low comparator I within the delay time T;

[0010] When the control deviation DEV is greater than the H 6 set by the high-low comparator I, then the positive deviation A is 1, and the up-down pulse counting module I outputs b as 1; The absolute value module outputs c as 1; After the delay time T, the high value output d of the high-low comparator III is 0, the delay-on module I outputs e as 0, the delay-on module II outputs f as 0, the three-input switch quantity AND module outputs g as 0, and the input c of the switch quantity module III is 0;

[0011] Step 4: Determine the size of the control deviation DEV and the L 7 set by the high-low comparator II within the delay time T; If the control deviation DEV is less than the L 7 set by the high-low comparator II, then the load deviation B is 1, the positive deviation A is 0, and the output b of the up-down pulse counting module I decreases to 0. In the next delay time T, the high value output d of the high-low comparator III is 0, the delay-on module I outputs e as 0, the delay-on module II outputs f as 0, the three-input switch quantity AND module outputs g as 0, and the input c of the switch quantity module III is 0;

[0012] Step 5: Within the delay time T, if the control deviation DEV is greater than the H 6 set by the high-low comparator I again, within the next delay time T, the input c of the switch quantity module III is 0; At this time, it is considered that the PID closed-loop regulator oscillates, and an alarm signal is output to prompt the user to intervene.

[0013] Compared with the prior art, the present invention has the following advantages:

[0014] 1. Through the system and method of the present invention, when the PID closed-loop controller oscillates, an alarm signal can be immediately sent out, which is convenient for operation and maintenance personnel to intervene in a timely manner and prevent more serious and adverse consequences from occurring.

[0015] 2. The system and method of the present invention can be implemented in the DCS system of a thermal power plant without the need to add additional equipment and costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0017] Figure 1 It is the structural schematic diagram I of the present invention;

[0018] Figure 2 It is the structural schematic diagram II of the present invention;

[0019] Figure 3 It is the structural schematic diagram III of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] In order to enable those skilled in the art to better understand the solution of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0021] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above drawings are used to distinguish similar objects and do not necessarily need to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily need to be limited to those clearly listed steps or units, but may include other steps or units that are not clearly listed or are inherent to these processes, methods, products or devices.

[0022] Such as Figures 1-3As shown, the present invention provides a system for judging the oscillation of a PID closed-loop controller, including: a control deviation DEV input 1, a digital input module I 2, a digital input module II 3, a digital input module III 4, a high-low comparator I 6, a high-low comparator II 7, an SR flip-flop I 8, and an SR flip-flop II 9; the control deviation DEV input 1 is connected to the input end of the high-low comparator I 6, the output end of the high-low comparator I 6 is connected to the set S of the SR flip-flop I 8, and the output end of the SR flip-flop I 8 is connected to the input end of the digital input module I 2; the control deviation DEV input 1 is also connected to the input end of the high-low comparator II 7; the low-value output end of the high-low comparator II 7 is connected to the S set of the SR flip-flop II 9; the output end of the SR flip-flop II 9 is connected to the input end of the digital input module II 3; the high-value output end of the high-low comparator I 6 is connected to the reset R of the SR flip-flop I 8, and the high-value output end of the high-low comparator II 7 is connected to the reset R of the SR flip-flop II 9.

[0023] As a preferred embodiment, in the present application, the system further includes: an increment and decrement pulse counting module I10, an absolute value module 11, a high and low comparator III12, a high and low comparator IV13, a delay-on module I14, a delay-on module II15, a four-input switch quantity OR module 16, a switch quantity NOT module 17, and a three-input switch quantity AND module 18; the output end of the switch quantity module I2 is connected to the increment input end of the increment and decrement pulse counting module I10; the output end of the switch quantity module II3 is connected to the decrement output end of the increment and decrement pulse counting module I10; the output end of the increment and decrement pulse counting module 10 is connected to the input end of the absolute value module 11, and the output end of the absolute value module 11 is connected to the input end of the high and low comparator III12; the high-value output end of the high and low comparator III12 is connected to the input end of the four-input switch quantity OR module 16, and the output end of the four-input switch quantity OR module 16 is connected to the input end of the switch quantity module III4; the output end of the absolute value module 11 is further connected to the input end of the high and low comparator IV13; the high-value output end of the high and low comparator IV13 is connected to the input end of the delay-on module I14; the output end of the delay-on module I14 is connected to the input end of the four-input switch quantity OR module 16; the low-value output end of the high and low comparator IV13 is connected to the input end of the delay-on module II15, and the output end of the delay-on module II15 is connected to the input end of the four-input switch quantity OR module 16; the output of the delay-on module II15 is further connected to the input end of the switch quantity NOT module 17; the output end of the switch quantity NOT module 17 is connected to the input end of the three-input switch quantity AND module 18; the input end of the three-input switch quantity AND module 18 is further connected to the low-value output end of the high and low comparator IV13; the output end of the switch quantity module III4 is connected to the input end of the three-input switch quantity AND module 18; the output end of the three-input switch quantity AND module 18 is further connected to the input end of the four-input switch quantity OR module 16; the output end of the switch quantity module III4 is further connected to the reset input end of the increment and decrement pulse counting module I10.

[0024] Preferably, the output end of the digital quantity module I2 is further connected to the input end of the two-input digital quantity OR module 20; the output end of the digital quantity module II3 is further connected to the input end of the two-input digital quantity AND module 21; the output end of the digital quantity module III4 is further connected to the input end of the two-input digital quantity NOT module 22. At the same time, the output end of the two-input digital quantity OR module 20 is connected to the input end of the two-input digital quantity AND module 21; the output end of the two-input digital quantity NOT module 22 is connected to the input end of the two-input digital quantity AND module 21. The output end of the two-input digital quantity AND module 21 is connected to the increment end of the increment and decrement pulse counting module II23; the output end of the increment and decrement pulse counting module II23 is connected to the input Fx of the analog quantity module 5; the output end of the digital quantity module III4 is further connected to the reset input end of the increment and decrement pulse counting module II23.

[0025] In this application, there is also a method for judging the oscillation of a PID closed-loop controller, including the following steps:

[0026] Step 1: Set the H 6 , L 6 of the high and low comparator I6, and H 6 > L 6 ; Set the H 7 , L 7 of the high and low comparator II7, and H 7 > L 7 ; Set the delay time T of the delay-on module I14; Set the delay time T of the delay-on module II15, and the setting principle is that the oscillation period time = 2T;

[0027] Step 2: When the system is in non-automatic control, the control deviation DEV outputs a as 0; the SR flip-flop I8 outputs the positive deviation A as 0, and the SR flip-flop II9 outputs the negative deviation B as 0; the increment and decrement pulse counting module I10 outputs b as 0; the absolute value module 11 outputs c as 0; the delay-on module II15 outputs f as 1; the digital quantity module III4 outputs 1; the increment and decrement pulse counting module II23 outputs Fx as 0;

[0028] Step 3: When the system is in automatic control, the control deviation DEV changes in real time; judge the magnitude of the control deviation DEV and the H 6 set by the high and low comparator I6 within the delay time T;

[0029] When the control deviation DEV is greater than the H 6 set by the high and low comparator I6, the positive deviation A is 1. When the control deviation DEV is less than the L 6 set by the high and low comparator I(6),When it is, the positive deviation A is 0; when the control deviation DEV varies between L 6 and H 6 set by the high-low comparator I(6), the positive deviation A remains unchanged at the previous moment value;

[0030] When the positive deviation A is 1, the output b of the increment-decrement pulse counting module I10 is 1; the output c of the absolute value module 11 is 1; after the delay time T, the high-value output d of the high-low comparator III12 is 0, the output e of the delay-on module I14 is 0, the output f of the delay-on module II15 is 0, the output g of the three-input switch quantity AND module 18 is 0, and the input c of the switch quantity module III4 is 0;

[0031] Step 4: Judge the magnitude of the control deviation DEV and L 7 set by the high-low comparator II7 within the delay time T; when the control deviation DEV is less than L 7 set by the high-low comparator II(7), the negative deviation B is 1; when the control deviation DEV is greater than H 7 set by the high-low comparator II(7), the negative deviation B is 0; when the control deviation DEV varies between L 7 and H 7 set by the high-low comparator II(7), the negative deviation B remains unchanged at the previous moment value;

[0032] Within the delay time T, if the negative deviation B is 1, the positive deviation A changes from 1 to 0, the output b of the increment-decrement pulse counting module I(10) decreases to 0, the high-value output d of the high-low comparator III(12) is 0, the low-value output of the high-low comparator IV(13) is 1, the output e of the delay-on module I(14) is 0, the output f of the delay-on module II(15) is 0, the output g of the three-input switch quantity AND module (18) is 0, the input C of the switch quantity module III(4) is 0, and the input Fx of the analog quantity module (5) becomes 2; after the delay time T, the output f of the delay-on module II(15) becomes 1, the input C of the switch quantity module III(4) becomes 1, and the input Fx of the analog quantity module (5) becomes 0;

[0033] Step 5: Within the delay time T, in this embodiment, the delay time T is a continuous and fixed time, that is, every T time is a cycle and remains unchanged continuously. If the control deviation DEV is greater than H 6When, within the next delay time T, the input c of the digital input module III 4 is 0; at this time, it is considered that the PID closed-loop regulator oscillates, and an alarm signal is output to prompt the user to intervene. When the value of C is 1, the delay time T is the same T in Step 3 and Step 4. When the value of C changes from 0, a new delay cycle T starts again.

[0034] When the system is not in automatic operation, the values of A and B are always 0, the value of C is always 1, and the value of Fx is always 0. After the system is put into automatic operation, the values of A and B are judged. If either A or B changes to 1, then the value of C immediately becomes 1. Then, within the delay cycle T, the number of times A and B alternate is judged. When the number of times (Fx) ≥ 3, it is considered that the system oscillates; if Fx does not reach 3 within the delay cycle T, then after the delay cycle T, the value of C becomes 1, and a new cycle starts again.

[0035] The delay time T described in Step 3, Step 4, and Step 5 is the same cycle.

[0036] As a preferred embodiment, in Step 3, Step 4, and Step 5, the input c of the digital input module III 4 is 0, the output i of the two-input digital inverter module 22 is 1, according to the alternating change of the positive deviation A and the negative deviation B, the output j of the two-input digital OR module 20 changes at intervals of 1, and the output of the up-down pulse counting module II 23 accumulatively increases, then the value of the input Fx of the analog module 5 is greater than or equal to 3, that is, it is considered that the PID closed-loop regulator oscillates.

[0037] At the same time, in Step 3, Step 4, and Step 5, if the time when a positive deviation A or a negative deviation B is 1 is greater than the delay time T at one time, or both the positive deviation A or the negative deviation B continuously appear, then the input C of the digital input module III 4 is 1, that is, the PID closed-loop regulator does not oscillate, and the up-down pulse counting module I (10) and the up-down pulse counting module II (23) are reset, and the judgment is made again.

[0038] Embodiment 1

[0039] In a thermal power generating unit, the stable control of the high-pressure heater water level is very important. When the high-pressure heater water level is not properly controlled, it may cause the high-pressure heater system to trip, affect the power generation efficiency of the unit, and even cause serious accidents such as steam turbine water ingress and equipment damage in severe cases. In the DCS control system, when the method of the present invention is applied, when the PID closed-loop controller of the high-pressure heater water level oscillates, an alarm signal will be sent in time to remind the operator to pay attention and make adjustments in time.

[0040] The control deviation DEV between the actual value and the set value of the high-pressure heater water level is collected and calculated in real time through the DCS control system, and the H 6 value of the high-low comparator I (6) is set to 80, and the L 6The value is -80, and set the H of the high and low comparator II (7). 7 The value is 80, L 7 The value is -80, and set the oscillation period time to 20 seconds, then the delay time T = 10 seconds. When the high pressure heater water level control deviation DEV is greater than 80, the input Fx of the analog module (5) changes from 0 to 1. If within 10 seconds, the high pressure heater water level control deviation DEV is less than -80, the input Fx of the analog module (5) changes from 1 to 2. If within 10 seconds, the high pressure heater water level control deviation DEV is greater than 80 again, the input Fx of the analog module (5) changes from 2 to 3. At this time, it is determined that the high pressure heater water level PID closed-loop controller oscillates.

[0041] Within the delay time T, if the control system deviation alternates between positive, negative, and positive three times continuously, it is determined that the PID closed-loop controller of the system oscillates. Similarly, within the delay time T, if the control system deviation alternates between negative, positive, and negative three times continuously, it is also determined that the PID closed-loop controller of the system oscillates.

[0042] The serial numbers of the embodiments of the present invention above are only for description and do not represent the superiority or inferiority of the embodiments.

[0043] In the above embodiments of the present invention, the descriptions of each embodiment have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0044] In the several embodiments provided by the present application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only illustrative. For example, the division of the units can be a logical function division. In actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of the units or modules can be in an electrical or other form.

[0045] The units described as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place or distributed to multiple units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0046] In addition, in each embodiment of the present invention, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated units can be implemented in the form of hardware or in the form of software functional units.

[0047] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, read-only memories (ROMs), random access memories (RAMs), mobile hard disks, magnetic disks, or optical discs that can store program codes.

[0048] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for judging the oscillation of a PID closed-loop controller, characterized in that, it includes the following steps: Step 1: Set the H of the high-low comparator I (6) 6 , L 6 , and H 6 > L 6 ; Set the H of the high-low comparator II (7) 7 , L 7 , and H 7 > L 7 ; The setting principle is that H 6 = H 7 , L 6 = L 7 ; Set the delay time T of the delay-on module I (14); Set the delay time T of the delay-on module II (15), and the setting principle is that the oscillation period time = 2T; Step 2: When the system is not under automatic control, the output a of the control deviation DEV is 0; the positive deviation A output by the SR flip-flop I (8) is 0, and the negative deviation B output by the SR flip-flop II (9) is 0; the increment and decrement pulse counting module I (10) outputs b as 0; the absolute value module (11) outputs c as 0; the delay-on module II (15) outputs f as 1; the switch quantity module III (4) outputs C as 1; the increment and decrement pulse counting module II (23) outputs Fx as 0; Step 3: When the system is under automatic control, the control deviation DEV changes in real time; it is judged whether, within the delay time T, the control deviation DEV is greater than or equal to the value of H set by the high-low comparator I(6). 6 in magnitude; When the control deviation DEV is greater than H set by the high-low comparator I(6) 6 , the positive deviation A is 1; when the control deviation DEV is less than L set by the high-low comparator I(6) 6 , the positive deviation A is 0; when the control deviation DEV varies between L 6 and H 6 set by the high-low comparator I(6), the positive deviation A remains unchanged at the previous moment value; When the positive deviation A is 1, within the delay time T, the increment and decrement pulse counting module I (10) outputs b as 1, the absolute value module (11) outputs c as 1, the high-value output of the high-low comparator IV (13) is 1, the output f of the delay-on module II (15) becomes 0, the output g of the three-input switch quantity AND module (18) becomes 0, the output C of the switch quantity module III (4) becomes 0, and the input Fx of the analog quantity module (5) becomes 1; after the delay time T, the output e of the delay-on module I (14) is 1, the input C of the switch quantity module III (4) becomes 1, the output b of the increment and decrement pulse counting module I (10) becomes 0, and the input Fx of the analog quantity module (5) becomes 0; Step 4: Determine the magnitude of the control deviation DEV and L set by the high-low comparator II (7) within the delay time T 7 during that period; When the control deviation DEV is less than L set by the high-low comparator II (7) 7 , the negative deviation B is 1; when the control deviation DEV is greater than H set by the high-low comparator II (7) 7 , the negative deviation B is 0; when the control deviation DEV varies between L 7 and H 7 set by the high-low comparator II (7), the negative deviation B remains unchanged at the value of the previous moment; Within the delay time T, if the negative deviation B is 1, then the positive deviation A changes from 1 to 0, the output b of the increment and decrement pulse counting module I (10) decreases to 0, the high-value output d of the high-low comparator III (12) is 0, the low-value output of the high-low comparator IV (13) is 1, the output e of the delay-on module I (14) is 0, the output f of the delay-on module II (15) is 0, the output g of the three-input switch quantity AND module (18) is 0, the input C of the switch quantity module III (4) is 0, and the input Fx of the analog quantity module (5) becomes 2; after the delay time T, the output f of the delay-on module II (15) becomes 1, the input C of the switch quantity module III (4) becomes 1, and the input Fx of the analog quantity module (5) becomes 0; Step 5: Within the delay time T, if the control deviation DEV is greater than H set by the high-low comparator I (6) again 6 the input Fx of the analog quantity module (5) becomes 3; at this time, it is considered that the PID closed-loop regulator oscillates, and an alarm signal is output to prompt the user to intervene; after the delay time T, the input C of the switch quantity module III (4) becomes 1, and the input Fx of the analog quantity module (5) becomes 0.

2. The method for judging the oscillation of a PID closed-loop controller according to claim 1, characterized in that, In the said step 3, step 4 and step 5, the input C of the switch quantity module III (4) is 0, the output i of the two-input switch quantity NOT module (22) is 1, according to the alternating change of the positive deviation A and the negative deviation B, the output j of the two-input switch quantity OR module (20) changes at intervals to 1, and the output of the increment and decrement pulse counting module II (23) accumulatively increases, then the value of the input Fx of the analog quantity module (5) is greater than or equal to 3, that is, it is considered that the PID closed-loop regulator oscillates.

3. The method for judging the oscillation of a PID closed-loop controller according to claim 1, characterized in that, In the said Step 3, Step 4 and Step 5, if the time when the positive deviation A or the negative deviation B is 1 is greater than the delay time T, or if the positive deviation A or the negative deviation B appears continuously, then the input C of the digital quantity module III (4) is 1, that is, the PID closed-loop regulator does not oscillate, and the increasing and decreasing pulse counting module I (10) and the increasing and decreasing pulse counting module II (23) are reset and the judgment is made again.

4. A system for judging the oscillation of a PID closed-loop controller, applying the method according to any one of claims 1-3, characterized in that, it includes: a control deviation DEV input (1), a digital quantity module I (2), a digital quantity module II (3), a digital quantity module III (4), a high-low comparator I (6), a high-low comparator II (7), an SR flip-flop I (8) and an SR flip-flop II (9); the control deviation DEV input (1) is connected to the input end of the high-low comparator I (6), the output end of the high-low comparator I (6) is connected to the set S of the SR flip-flop I (8), and the output end of the SR flip-flop I (8) is connected to the input end of the digital quantity module I (2); the control deviation DEV input (1) is also connected to the input end of the high-low comparator II (7); the low-value output end of the high-low comparator II (7) is connected to the S set of the SR flip-flop II (9); the output end of the SR flip-flop II (9) is connected to the input end of the digital quantity module II (3); the address output end of the high-low comparator I (6) is connected to the reset R of the SR flip-flop I (8), and the high-value output end of the high-low comparator II (7) is connected to the reset R of the SR flip-flop II (9).

5. A system for judging the oscillation of a PID closed-loop controller according to claim 4, characterized in that, the system further has: an increasing and decreasing pulse counting module I (10), an absolute value module (11), a high-low comparator III (12), a high-low comparator IV (13), a delay-on module I (14), a delay-on module II (15), a four-input digital quantity OR module (16), a digital quantity NOT module I (17) and a three-input digital quantity AND module (18); The output end of the digital quantity module I (2) is connected to the increasing input end of the increasing and decreasing pulse counting module I (10); the output end of the digital quantity module II (3) is connected to the decreasing output end of the increasing and decreasing pulse counting module I (10); the output end of the increasing and decreasing pulse counting module (10) is connected to the input end of the absolute value module (11), and the output end of the absolute value module (11) is connected to the input end of the high and low comparator III (12); the high-value output end of the high and low comparator III (12) is connected to the input end of the four-input digital quantity OR module (16), and the output end of the four-input digital quantity OR module (16) is connected to the input end of the digital quantity module III (4); the output end of the absolute value module (11) is also connected to the input end of the high and low comparator IV (13); the high-value output end of the high and low comparator IV (13) is connected to the input end of the delay on module I (14); the output end of the delay on module I (14) is connected to the input end of the four-input digital quantity OR module (16); the low-value output end of the high and low comparator IV (13) is connected to the input end of the delay on module II (15), and the output end of the delay on module II (15) is connected to the input end of the four-input digital quantity OR module (16); the output of the delay on module II (15) is also connected to the input end of the digital quantity NOT module (17); the output end of the digital quantity NOT module (17) is connected to the input end of the three-input digital quantity AND module (18); the input end of the three-input digital quantity AND module (18) is also connected to the low-value output end of the high and low comparator IV (13); the output end of the digital quantity module III (4) is connected to the input end of the three-input digital quantity AND module (18); the output end of the three-input digital quantity AND module (18) is also connected to the input end of the four-input digital quantity OR module (16); the output end of the digital quantity module III (4) is also connected to the reset input end of the increasing and decreasing pulse counting module I (10).

6. A system for judging the oscillation of a PID closed-loop controller according to claim 4, characterized in that, the output end of the digital quantity module I (2) is also connected to the input end of the two-input digital quantity OR module (20); the output end of the digital quantity module II (3) is also connected to the input end of the two-input digital quantity AND module (21); the output end of the digital quantity module III (4) is also connected to the input end of the two-input digital quantity NOT module (22).

7. A system for judging the oscillation of a PID closed-loop controller according to claim 6, characterized in that, the output end of the two-input digital quantity OR module (20) is connected to the input end of the two-input digital quantity AND module (21); the output end of the two-input digital quantity NOT module (22) is connected to the input end of the two-input digital quantity AND module (21).

8. A system for judging the oscillation of a PID closed-loop controller according to claim 6, characterized in that, The output end of the two-input digital quantity AND module (21) is connected to the increment end of the increment / decrement pulse counting module II (23); the output end of the increment / decrement pulse counting module II (23) is connected to the input Fx of the analog quantity module (5). The output end of the digital quantity module III (4) is also connected to the reset input end of the increment / decrement pulse counting module II (23).

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