A high-performance bandgap reference circuit

Abstract

The present invention discloses a high-performance bandgap reference circuit. This circuit is started by a start-up circuit, and then the reference voltage with reduced temperature drift coefficient is output through the core circuit module after passing through the curvature compensation circuit. The reference voltage is output through the primary and secondary buffers. In the primary buffer, ordinary gain amplification is performed to improve the load capacity. In the secondary buffer, the single-ended output is changed to differential output to improve the applicability of the circuit. In addition, an adjustment circuit unit is added. Under the control of the resistor array in the adjustment circuit unit, the circuit can still maintain a relatively stable output structure in the face of errors generated during the manufacturing process. Under the operation of the buffer, the entire reference voltage module finally provides a stable differential reference voltage and outputs four stable current sources as bias currents. This circuit belongs to a low-power circuit. While improving the circuit accuracy, it can also reduce the overall power consumption of the circuit and can be applied to various fields.

Description

Technical Field

[0001] The present invention belongs to the field of analog circuit design, and particularly relates to a high-performance bandgap reference circuit. Background Art

[0002] The bandgap reference voltage source is used to provide a stable voltage source for other circuits, which is not easily affected by power supply voltage and temperature changes, and is the basis for the design of analog circuits and digital circuits. Due to factors such as high operating voltage, large temperature drift coefficient, non-adjustability, and errors generated during the manufacturing process of traditional bandgap reference sources, they can no longer be applied to various high-performance systems with high requirements for reference sources.

[0003] Therefore, it is necessary to develop a high-performance bandgap reference circuit that can reduce the temperature drift coefficient of the circuit, reduce the influence of temperature drift on the circuit, improve the accuracy of the circuit, and improve the load capacity of the present circuit. Summary of the Invention

[0004] To solve the above technical problems, the present invention adopts the following technical solutions:

[0005] A high-performance bandgap reference circuit includes a bandgap reference core module and a buffer module. The bandgap reference core module is connected to a preset power supply voltage and outputs a preset reference voltage; the preset reference voltage is output as a preset differential reference voltage through the buffer module.

[0006] Preferably, the bandgap reference core module includes a bandgap reference core circuit unit and a curvature correction circuit unit. The bandgap reference core circuit unit is connected to the curvature correction circuit unit, and the preset power supply voltage outputs a preset reference voltage through the bandgap reference core circuit unit and the curvature correction circuit unit.

[0007] Preferably, the bandgap reference core module further includes a startup circuit unit. The input end of the startup circuit unit is connected to the output end of the bandgap reference core module, and the output end of the startup circuit unit is connected to the bandgap reference core circuit unit. The startup circuit unit is used to provide a startup signal for the bandgap reference core circuit unit.

[0008] Preferably, the startup circuit includes an inverter and a MOS transistor M4. The output end of the bandgap reference core module is connected to the input end of the inverter, the output end of the inverter is connected to the gate of the MOS transistor M4, the source of the MOS transistor M4 is grounded, and the drain of the MOS transistor M4 is connected to the bandgap reference core circuit unit.

[0009] Preferably, the bandgap reference core module further includes an adjustment circuit unit connected to the output end of the bandgap reference core module to adjust the output preset reference voltage.

[0010] Preferably, the adjustment circuit unit includes a preset number of resistors arranged in series, and each resistor is respectively connected in parallel with a MOS transistor.

[0011] Preferably, the buffer module includes a first-level buffer unit and a second-level buffer unit. The preset reference voltage is amplified by the first-level buffer unit and then output as a preset differential reference voltage by the second-level buffer unit.

[0012] Preferably, the bandgap reference core circuit unit includes a first amplifier, MOS transistor M1, MOS transistor M2, MOS transistor M3, transistor Q1, transistor Q2, transistor Q3, resistor RCL1, resistor RCL2, resistor R1, and resistor R2. The sources of MOS transistors M1, M2, and M3 are connected to the preset power supply voltage. The gates of MOS transistors M1, M2, and M3 are connected together and connected to the output terminal of the first amplifier. The drain of MOS transistor M1 is connected to the non-inverting input terminal of the first amplifier and one end of resistor R1 through resistor RCL1. The other end of resistor R1 is connected to the emitter of transistor Q1. The drain of MOS transistor M2 is connected to the inverting input terminal of the first amplifier and the emitter of transistor Q2 through resistor RCL2. The bases and collectors of transistors Q1, Q2, and Q3 are all connected to GND. The drain of MOS transistor M3 is connected to the emitter of transistor Q3 through resistor R2, and the drain of MOS transistor M3 serves as the output terminal of the bandgap reference core module to output the preset reference voltage.

[0013] Preferably, the curvature correction circuit unit includes a second amplifier, MOS transistor M5, MOS transistor M6, resistor R3, resistor R4, and transistor Q4. The sources of MOS transistors M5 and M6 are connected together and connected to the preset power supply voltage. The gates of MOS transistors M5 and M6 are connected together and connected to the output terminal of the second amplifier. The inverting input terminal of the second amplifier is connected to the drain of MOS transistor M3. The non-inverting input terminal of the second amplifier is respectively connected to the drain of MOS transistor M5 and one end of resistor R3. The drain of MOS transistor M6 is respectively connected to one end of resistor R4 and the emitter of transistor Q4. The base and collector of transistor Q4 and the other end of resistor R3 are connected to GND. The other end of resistor R4 is connected to the emitter of transistor Q3.

[0014] Preferably, both the first amplifier and the second amplifier adopt single-stage operational amplifiers.

[0015] The beneficial effects of the present invention are as follows: The present invention provides a high-performance bandgap reference circuit. By setting a high-order curvature compensation correction circuit module, the temperature drift coefficient of the circuit can be reduced, the influence of temperature drift on the circuit can be reduced, and thus the accuracy of the circuit can be improved. A first-stage and a second-stage buffer are also provided to improve the load capacity of the present circuit. The first-stage buffer uses a chopper amplifier to improve the output load capacity of the reference source. The second-stage buffer uses a fully differential amplifier as the buffer to change the single-ended output to a differential output. In addition, a Trim adjustment unit is added, which is mainly used to improve the errors generated due to the manufacturing process during circuit manufacturing, determine the resistance value and accuracy required for circuit trimming, and reduce errors. The bandgap reference circuit provided by the present invention can, under the control of adjusting the resistor array, maintain a relatively stable output structure in the face of errors generated during the manufacturing process. In addition, under the operation of the buffer, the entire reference voltage module finally provides a stable differential reference voltage and outputs four stable current sources as bias currents. This circuit belongs to a low-power circuit. While improving the circuit accuracy, it can also reduce the overall power consumption of the circuit and can be applied to various fields. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is the circuit diagram of the bandgap reference core module in the embodiment of the present invention;

[0017] Figure 2 It is the circuit diagram of the bandgap reference core circuit unit in the embodiment of the present invention;

[0018] Figure 3 It is the circuit diagram of the curvature correction circuit unit in the embodiment of the present invention;

[0019] Figure 4 It is the circuit diagram of the first-stage buffer unit in the embodiment of the present invention;

[0020] Figure 5 It is the circuit diagram of the second-stage buffer unit in the embodiment of the present invention;

[0021] Figure 6 It is the circuit diagram of the startup circuit unit in the embodiment of the present invention;

[0022] Figure 7 It is the equivalent circuit diagram of the Trim adjustment unit in the embodiment of the present invention;

[0023] Figure 8 It is the circuit diagram of the single-stage operational amplifier circuit in the embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0024] The present invention will be further described below with reference to the drawings. The following embodiments can enable those skilled in the art to understand the present invention more comprehensively, but do not limit the present invention in any way.

[0025] A high-performance bandgap reference circuit includes a bandgap reference core module and a buffer module. The bandgap reference core module is connected to a preset power supply voltage and outputs a preset reference voltage. The preset reference voltage is output as a preset differential reference voltage through the buffer module, which changes the single-ended reference source into a differential reference source while improving the load function of the reference source.

[0026] As Figure 1 shown, the bandgap reference core module includes a bandgap reference core circuit unit and a curvature correction circuit unit. The bandgap reference core circuit unit is connected to the curvature correction circuit unit, and the preset power supply voltage outputs the preset reference voltage through the bandgap reference core circuit unit and the curvature correction circuit unit.

[0027] Specifically, the design used in the bandgap reference core circuit unit adopts a summation mode of the negative temperature coefficient voltage of a first-order positive temperature coefficient voltage compensation bipolar transistor. By utilizing the voltage clamping effect at the input terminal of the operational amplifier, the base voltage of the bipolar transistor is accurately replicated to the I PTAT current generation branch of the bandgap reference core circuit unit, forming a voltage difference ∆V BE that is linearly positively correlated with temperature on R1, and obtaining the I PTAT current. Through the replication of the current mirror, a positive temperature coefficient voltage is finally formed on the output path R2, and the sum of the emitter-base voltage of the bipolar transistor on the path is used to obtain the output reference voltage. As Figure 2 shown, the bandgap reference core circuit unit includes a first amplifier, MOS transistor M1, MOS transistor M2, MOS transistor M3, transistor Q1, transistor Q2, transistor Q3, resistor RCL1, resistor RCL2, resistor R1, and resistor R2. The sources of MOS transistors M1, M2, and M3 are connected to the preset power supply voltage. The gates of MOS transistors M1, M2, and M3 are connected to the output terminal of the first amplifier. The drain of MOS transistor M1 is connected to the positive input terminal of the first amplifier and one end of resistor R1 through resistor RCL1. The other end of resistor R1 is connected to the emitter of transistor Q1. The drain of MOS transistor M2 is connected to the negative input terminal of the first amplifier and the emitter of transistor Q2 through resistor RCL2. The bases and collectors of transistors Q1, Q2, and Q3 are all connected to GND. The drain of MOS transistor M3 is connected to the emitter of transistor Q3 through resistor R2, and the drain of MOS transistor M3 is used as the output terminal of the bandgap reference core module to output the preset reference voltage.

[0028] In the core circuit, three PMOS transistors M1 - M3 act as a current mirror, and their aspect ratios are the same. The values of RCL1 and RCL2 are the same as that of R2. Their function is to reduce the channel length modulation effect of the PMOS current mirror and make the three transistors in the same environment as much as possible. The three transistors Q1, Q2, and Q3 are all selected as PNP transistors because, compared with NPN transistors, the standard CMOS process generally uses P - type semiconductors as the substrate, and PNP is a parasitic device in the standard CMOS process, which is easier to manufacture and has stable performance. The number of BJTs contained in Q1 and Q2 is set to 8:1, which is for good matching during the subsequent layout design. The input end of the amplifier is used to clamp the voltage so that the voltages at point X and point Y are equal.

[0029] The curvature correction circuit unit mentioned above uses high - order curvature compensation to reduce the temperature drift coefficient of the bandgap reference source and further reduce the temperature drift coefficient. Since the reference core circuit uses a classic first - order temperature drift compensation circuit, the PTAT current generation circuit in it already has an effective cancellation for the first - order part of the reference voltage source. Therefore, the proposed curvature correction circuit is mainly used to adjust the high - order part of the temperature drift function. Similarly, by using the clamping effect of the amplifier, the reference voltage is copied to point A, and a theoretically temperature - independent current is generated through resistor R1 and copied to the path where Q4 is located through the current mirror.

[0030] As Figure 3 shown, the curvature correction circuit unit includes a second amplifier, MOS transistor M5, MOS transistor M6, resistor R3, resistor R4, and transistor Q4. The sources of MOS transistor M5 and MOS transistor M6 are connected and connected to a preset power supply voltage. The gates of MOS transistor M5 and MOS transistor M6 are connected and connected to the output end of the second amplifier. The inverting input end of the second amplifier is connected to the drain of MOS transistor M3. The non - inverting input end of the second amplifier is respectively connected to the drain of MOS transistor M5 and one end of resistor R3. The drain of MOS transistor M6 is respectively connected to one end of resistor R4 and the emitter of transistor Q4. The base and collector of transistor Q4 and the other end of resistor R3 are connected to GND. The other end of resistor R4 is connected to the emitter of transistor Q3.

[0031] To measure the performance of an operational amplifier, it is generally judged by the following several indicators.

[0032] Open - loop gain: The open - loop gain refers to the ratio of the output voltage to the input voltage obtained by the operational amplifier without a feedback loop. The higher the open - loop gain, the higher the negative - feedback accuracy. To obtain better results, it is required that the open - loop gain be as large as possible.

[0033] Bandwidth: The bandwidth of an operational amplifier is a quantity used to measure the range of signals processed by the amplifier. The level of the bandwidth indicates the frequency range of signals that the operational amplifier can process. The frequency at which the open-loop gain of the op-amp drops from the maximum value Av to 0.707Av is called the 3dB bandwidth, and the frequency at which Av drops to 0dB is called the unity bandwidth.

[0034] Phase margin: The phase margin is a quantity that describes the stability of a negative feedback system. Its calculation method is the difference between the phase of the amplifier output signal and 180° when the gain is 0dB. Generally, the phase margin of the designed operational amplifier needs to be above 60° to ensure the stability of the entire circuit.

[0035] Furthermore, the first amplifier and the second amplifier adopt single-stage operational amplifiers. The operational amplifier used is a single-stage operational amplifier. The advantage of a single-stage op-amp is that it can increase the op-amp gain while reducing the number of MOS transistors to ensure power consumption. The operational amplifiers of the first amplifier and the second amplifier include 9 MOS transistors, namely M7 - M15. As Figure 8 shown, the sources of M10, M11, and M12 are connected to each other and then connected to Vdd. The gates of M11 and M12 are connected to each other and then connected to the drain of M13. The gate and drain of M11 are connected. The drain of M12 is connected to the gate of M10 and the drain of M14 and then used as the amplifier output terminal Vout. The drain of M10 is connected to the drains of M7, M8, the gates of M9 and M15. The gate of M13 is connected to the gates of M7 and Vi+ voltage input terminal, which serves as the non-inverting input terminal of the amplifier. The sources of M13 and M14 are connected to each other and then connected to the drain of M15. The gate of M14 is connected to the gate of M8 and then connected to the Vi- voltage input terminal, which serves as the inverting input terminal of the amplifier. The sources of M9 and M5 are connected to GND. The NMOS transistors M7, M8 and M13, M14 are almost in the same environment, which makes their drain voltages almost the same as those of M13, M14. This makes the drain voltages of the PMOS transistors M10, M11, and M12 approximate, reducing the mismatch problems caused by channel length modulation effect, short-channel effect, etc.

[0036] In addition, the bandgap reference core module further includes a startup circuit unit. The input terminal of the startup circuit unit is connected to the output terminal of the bandgap reference core module, and the output terminal of the startup circuit unit is connected to the bandgap reference core circuit unit. The startup circuit unit is used to provide a startup signal for the bandgap reference core circuit unit. As Figure 6As shown, the startup circuit includes an inverter and an MOS transistor M4. The output terminal of the bandgap reference core module is connected to the input terminal of the inverter. The output terminal of the inverter is connected to the gate of the MOS transistor M4. The source of the MOS transistor M4 is grounded, and the drain of the MOS transistor M4 is connected to the bandgap reference core circuit unit, that is, the drain of the MOS transistor M4 is connected to the output terminal of the first amplifier.

[0037] In the startup circuit described above, since there may be one or more static operating points in the bandgap reference circuit during operation, and the circuit is stable at any degenerate point, but there is usually only one degenerate point required for the operation of the reference source circuit. Therefore, in order to make the circuit get rid of the non-operating degenerate point, a startup circuit needs to be designed, and after the circuit starts to work normally, the startup circuit can be automatically turned off. When the circuit output is at a low potential, the inverter controls M4 to conduct, pulling down the gate voltages of M1, M2, and M3 transistors, enabling the PMOS transistors to conduct and generate current, so that the circuit gets rid of the degenerate point and starts to work normally. At the same time, the output bandgap reference voltage during normal operation can also turn off the M4 transistor through the inverter, so that it will not affect the normal operation of the circuit.

[0038] The reference source of the bandgap reference circuit described above adds a Trim adjustment unit to the traditional reference to improve the error generated in the manufacturing process of the reference source, and at the same time adds a curvature compensation circuit to improve the temperature drift performance of the reference source; therefore, the bandgap reference core module also includes an adjustment circuit unit connected to the output terminal of the bandgap reference core module, that is, located between R2 and the drain of M3, to adjust the preset reference voltage output. The adjustment circuit unit includes a preset number of resistors arranged in series, and each resistor is respectively connected in parallel with an MOS transistor. The adjustment circuit unit, that is, the Trim adjustment unit, is located between R2 and the drain of M3. The Trim adjustment unit measures the bandgap reference source without adding a trimming circuit, determines the output accuracy offset caused by the error, and determines the resistance value and accuracy required for the trimming circuit.

[0039] Specifically, in this embodiment, as Figure 7 shown, the resistor string uses a binary coding form, and the total resistance value connected to the reference circuit is controlled by a switch circuit made of MOS transistors, thereby changing the resistance size; there are 6 resistors, which are arranged in series in the order of R, 2R, 4R, 8R, 16R, 32R; there is a switch circuit made of an MOS transistor connected in parallel above each resistor, and both ends of each resistor are connected to the source and drain of the mos, and the switch circuits are connected in series with each other.

[0040] Since the switches of the resistor string are also composed of MOS transistors, NMOS transistors are used in this embodiment. Current will also be generated in the switches. To reduce the impact of the leakage current in the trimming circuit (Trim) on the output resistance, the trimming resistor string should be placed on the output stage branch. In this embodiment, the control bits are directly used to control the adjustment circuit unit. T1~T6 are equivalent to the switch control pin feet of the trimming control circuit, that is, the gates of each MOS transistor are the pin feet. When the pin foot is "1", it means that R is short-circuited. When it is "0", it means that R is connected to the circuit to adjust the resistance value of the output stage. By controlling the pin feet, the resistance value can be changed, so as to improve the accuracy of the bandgap reference output voltage. Therefore, by adding the trimming circuit (Trim), the accuracy of the bandgap reference output voltage can be effectively improved. At the same time, according to the required application scenarios, the required output can be trimmed, increasing the application scenarios of the chip.

[0041] The internal loop of the bandgap voltage and the trimming circuit form the core circuit unit of the bandgap reference. The start-up circuit and the core circuit of the bandgap reference adopt an integrated design.

[0042] The buffer module includes a first-stage buffer unit and a second-stage buffer unit. The preset reference voltage is amplified by the first-stage buffer unit and then the preset differential reference voltage is output by the second-stage buffer unit.

[0043] Specifically, as Figure 4 shown, the first-stage buffer unit uses a chopper amplifier. The chopper technique first modulates the signal that has not yet been input to the amplifier to a high frequency through a modulator. When it is input to the amplifier, it will be superimposed with errors such as offset voltage. After the amplifier works, it passes through a demodulator to demodulate the high-frequency signal back to a low frequency. At the same time, the low-frequency error is modulated to a high frequency by the demodulator, using a two-stage amplifier structure. The operating principle of the chopper amplifier is to utilize the chopper modulation technique. Through modulation and demodulation, the chopper technique can well modulate the input error to a high frequency, so that the input error can be well controlled. The chopper technique first modulates the signal that has not yet been input to the amplifier to a high frequency through a modulator. When it is input to the amplifier, it will be superimposed with errors such as offset voltage. After the amplifier works, it passes through a demodulator to demodulate the high-frequency signal back to a low frequency. At the same time, the low-frequency error is modulated to a high frequency by the demodulator; fc in the figure represents the FC method assembly method.

[0044] As Figure 5As shown, the secondary buffer unit converts single-ended to differential. The amplifier used in the secondary buffer unit is a fully differential amplifier, and by adding an external resistor to the fully differential amplifier, the gain can be set. Additionally, since the positive and negative outputs of the fully differential amplifier are differential outputs, compared to single-ended outputs, it has a larger swing, is not affected by mirror poles, and its closed-loop speed is significantly faster. These are all its advantages compared to single-ended output amplifiers. Based on the four pins corresponding to the input and output of the fully differential amplifier, four stable current sources are output as bias currents, namely the four pins corresponding to the positive and negative inputs and positive and negative outputs of the fully differential amplifier. In one embodiment, a differential voltage with Vp = 2.6V and Vn = 0.6V is finally output, which can provide a stable reference source for the quantization of the subsequent ADC.

[0045] The high-performance bandgap reference circuit described above includes a bandgap reference core module and a buffer module. The bandgap reference core module includes a bandgap reference core circuit module, an operational amplifier, a curvature correction circuit module, and a startup circuit. The buffer module consists of two stages, namely a primary buffer and a secondary buffer, which converts the single-ended reference source to a differential reference source while improving the load function of the reference source. In one embodiment, the output voltage of the bandgap reference voltage source is 1.2V, its temperature drift coefficient is controlled within 10 ppm / °C in the range of -40 to 125°C, the power consumption is less than 500 μW, and under the control of an adjustable resistor array, it can still maintain a relatively stable output structure in the face of errors generated during the manufacturing process. With the operation of the buffer, the entire reference voltage module finally provides a stable differential reference voltage for the ADC and outputs four stable current sources as bias currents.

[0046] The present invention designs a high-performance bandgap reference circuit. The present invention discloses a high-performance bandgap reference circuit. This circuit is started by a startup circuit, and then the reference voltage with a reduced temperature drift coefficient is output through the core circuit module after passing through the curvature compensation circuit. The reference voltage is output through the first- and second-stage buffers. In the first-stage buffer, ordinary gain amplification is performed to improve the load capacity. In the second-stage buffer, the single-ended output is changed to a differential output to improve the applicability of the circuit. By setting a high-order curvature compensation correction circuit module, the present invention can reduce the temperature drift coefficient of the circuit, reduce the influence of temperature drift on the circuit, and thus improve the accuracy of the circuit. First- and second-stage buffers are also provided to improve the load capacity of this circuit. The first-stage buffer uses a chopper amplifier to improve the output load capacity of the reference source. The second-stage buffer uses a fully differential amplifier as a buffer to change the single-ended output to a differential output. In addition, a Trim adjustment unit is added, which is mainly used to improve the errors generated due to the manufacturing process during circuit fabrication, determine the resistance value and accuracy required for circuit trimming, and reduce errors, so that a relatively stable output structure can still be maintained in the face of errors generated during the manufacturing process. In addition, under the operation of the buffer, the entire reference voltage module finally provides a stable differential reference voltage and outputs four stable current sources as bias currents. This circuit belongs to a low-power circuit, and while improving the accuracy of the circuit, it can also reduce the overall power consumption of the circuit and can be applied to various fields.

[0047] The above are only the preferred embodiments of the present invention, but do not limit the patent scope of the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions described in the foregoing specific embodiments, or perform equivalent replacements for some of the technical features. Any equivalent structure made by using the content of the specification and drawings of the present invention, directly or indirectly applied in other related technical fields, is similarly within the scope of the patent protection of the present invention.

Claims

1. A high-performance bandgap reference circuit, characterized in that: It includes a bandgap reference core module and a buffer module. The bandgap reference core module is connected to a preset power supply voltage and outputs a preset reference voltage. The preset reference voltage is output as a preset differential reference voltage through the buffer module. The bandgap reference core module includes a bandgap reference core circuit unit and a curvature correction circuit unit. The bandgap reference core circuit unit is connected to the curvature correction circuit unit. The preset power supply voltage outputs the preset reference voltage through the bandgap reference core circuit unit and the curvature correction circuit unit. The bandgap reference core circuit unit includes a first amplifier, MOS transistor M1, MOS transistor M2, MOS transistor M3, transistor Q1, transistor Q2, transistor Q3, resistor RCL1, resistor RCL2, resistor R1, and resistor R2. The sources of MOS transistors M1, M2, and M3 are connected to the preset power supply voltage. The gates of MOS transistors M1, M2, and M3 are connected together and connected to the output terminal of the first amplifier. The drain of MOS transistor M1 is connected to the positive input terminal of the first amplifier and one end of resistor R1 through resistor RCL1. The other end of resistor R1 is connected to the emitter of transistor Q1. The drain of MOS transistor M2 is connected to the negative input terminal of the first amplifier and the emitter of transistor Q2 through resistor RCL2. The bases and collectors of transistors Q1, Q2, and Q3 are all connected to GND. The drain of MOS transistor M3 is connected to the emitter of transistor Q3 through resistor R2, and the drain of MOS transistor M3 is used as the output terminal of the bandgap reference core module to output the preset reference voltage. The curvature correction circuit unit includes a second amplifier, MOS transistor M5, MOS transistor M6, resistor R3, resistor R4, and transistor Q4. The sources of MOS transistors M5 and M6 are connected and connected to the preset power supply voltage. The gates of MOS transistors M5 and M6 are connected together and connected to the output terminal of the second amplifier. The negative input terminal of the second amplifier is connected to the drain of MOS transistor M3. The positive input terminal of the second amplifier is respectively connected to the drain of MOS transistor M5 and one end of resistor R3. The drain of MOS transistor M6 is respectively connected to one end of resistor R4 and the emitter of transistor Q4. The base and collector of transistor Q4 and the other end of resistor R3 are connected to GND. The other end of resistor R4 is connected to the emitter of transistor Q3.

2. The high-performance bandgap reference circuit according to claim 1, wherein: The bandgap reference core module further includes a startup circuit unit. The input terminal of the startup circuit unit is connected to the output terminal of the bandgap reference core module, and the output terminal of the startup circuit unit is connected to the bandgap reference core circuit unit. The startup circuit unit is used to provide a startup signal for the bandgap reference core circuit unit.

3. The high-performance bandgap reference circuit according to claim 2, characterized in that: The startup circuit includes an inverter and MOS transistor M4. The output terminal of the bandgap reference core module is connected to the input terminal of the inverter. The output terminal of the inverter is connected to the gate of MOS transistor M4. The source of MOS transistor M4 is grounded, and the drain of MOS transistor M4 is connected to the bandgap reference core circuit unit.

4. The high-performance bandgap reference circuit according to claim 1, wherein: The bandgap reference core module further includes an adjustment circuit unit connected to the output terminal of the bandgap reference core module to adjust the output preset reference voltage.

5. The high-performance bandgap reference circuit according to claim 4, characterized in that: The adjustment circuit unit includes a preset number of resistors arranged in series, and each resistor is respectively connected in parallel with a MOS transistor.

6. The high-performance bandgap reference circuit according to claim 1, wherein: The buffer module includes a first-level buffer unit and a second-level buffer unit. The preset reference voltage is amplified by the first-level buffer unit, and then the preset differential reference voltage is output through the second-level buffer unit.

7. The high-performance bandgap reference circuit according to claim 1, wherein: Both the first amplifier and the second amplifier adopt single-stage operational amplifiers.

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