Signal transmission method, controller, source driver and electronic device

Abstract

The present disclosure relates to a signal transmission method, a controller, a source driver and an electronic device. The signal transmission method is used for transmitting a display signal from the controller to the source driver. The signal transmission method comprises: in a frame display period, performing a transmission operation through a low-voltage differential signal interface to provide the display signal to the source driver, the display signal comprising a power consumption flag signal, the power consumption flag signal being used to instruct the source driver to enter a first working state during a vertical blanking period, the power consumption of the first working state being less than the power consumption of a second working state, the second working state being a working state of the source driver during the vertical blanking period when the power consumption flag signal is not received. The method can reduce the power consumption of the source driver during the vertical blanking period, thereby reducing the overall power consumption of the source driver.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to a signal transmission method, a controller, a source driver and an electronic device. BACKGROUND

[0002] In the field of display technology, a pixel array of a display panel such as a liquid crystal display panel or an organic light emitting diode (OLED) display panel usually includes a plurality of rows of gate lines and a plurality of columns of data lines arranged in cross with the gate lines. A timing controller (T-con) of the display panel needs to provide gate signals and data signals to the plurality of rows of gate lines and the plurality of columns of data lines respectively through a gate driving circuit and a source driving circuit, so as to form a gray voltage required by each gray scale of a display image in each row of pixel units in a row-by-row scanning manner, and then display a frame of image. SUMMARY

[0003] At least one embodiment of the present disclosure provides a signal transmission method for a controller to transmit a display signal to a source driver, the method comprising: in a frame display period, performing a transmission operation through a low voltage differential signal interface to provide the display signal to the source driver, wherein the display signal includes a power consumption flag signal, the power consumption flag signal is used to instruct the source driver to enter a first working state during a vertical blanking period, the power consumption of the first working state is less than the power consumption of a second working state, and the second working state is a working state of the source driver during the vertical blanking period when the power consumption flag signal is not received.

[0004] Another embodiment of the present disclosure provides another signal transmission method for a source driver to obtain a display signal provided by a controller, the source driver includes a low voltage differential signal interface, the method comprising: in a frame display period, performing a transmission operation through the low voltage differential signal interface to receive the display signal provided by the controller; in response to the display signal including a power consumption flag signal, entering a first working state during a vertical blanking period, the power consumption of the first working state is less than the power consumption of a second working state, and the second working state is a working state of the source driver during the vertical blanking period when the power consumption flag signal is not received.

[0005] At least one embodiment of this disclosure provides a controller for transmitting a display signal to a source driver. The controller includes a low-voltage differential signaling interface configured to perform a transmission operation within a display frame period to provide the display signal to the source driver. The display signal includes a power consumption flag signal indicating that the source driver enters a first operating state during vertical blanking, the power consumption of the first operating state being less than the power consumption of a second operating state, the second operating state being the operating state of the source driver during vertical blanking without receiving the power consumption flag signal.

[0006] At least one embodiment of this disclosure provides a source driver for receiving a display signal provided by a controller. The source driver includes: a low-voltage differential signal interface configured to perform a transmission operation to receive the display signal provided by the controller within a display frame period; and a processing unit configured to enter a first operating state during vertical blanking in response to the display signal including a power consumption flag signal, wherein the power consumption of the first operating state is less than the power consumption of a second operating state, the second operating state being the operating state of the source driver during vertical blanking when the power consumption flag signal is not received.

[0007] At least one embodiment of this disclosure provides an electronic device including a controller, the controller including a low-voltage differential signaling interface configured to perform a transmission operation within a display frame period to provide a display signal to a source driver, the display signal including a power consumption flag signal for indicating that the source driver enters a first operating state during vertical blanking; a source driver of the controller provided in at least one embodiment of this disclosure, the source driver being connected to the controller via the low-voltage differential signaling interface to perform the transmission operation; and a display panel connected to the source driver to receive a drive signal provided by the source driver, wherein the drive signal is generated based on the display signal. Attached Figure Description

[0008] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0009] Figure 1A A schematic diagram of a circuit driving system architecture for a display panel is shown.

[0010] Figure 1A This diagram illustrates a system architecture diagram showing the connection between the timing controller TCON and the source driver;

[0011] Figure 2A flowchart of a signal transmission method provided in at least one embodiment of this disclosure is shown;

[0012] Figure 3A A schematic diagram is shown illustrating the signal format of a display sub-signal provided in a row configuration mode according to at least one embodiment of the present disclosure;

[0013] Figure 3B This diagram illustrates the signal format of a display sub-signal provided in a frame configuration mode according to at least one embodiment of the present disclosure;

[0014] Figure 3C This diagram illustrates the signal format of a display sub-signal provided by a calibration configuration mode according to at least one embodiment of the present disclosure;

[0015] Figure 4A and 4B This diagram illustrates a signal format of a display signal provided by a controller to a source driver according to at least one embodiment of the present disclosure;

[0016] Figure 5A A timing diagram of a trigger signal PSI provided in at least one embodiment of the present disclosure is shown;

[0017] Figure 5B A timing diagram of a single-mode indication signal provided in at least one embodiment of the present disclosure is shown;

[0018] Figure 6A A timing diagram of a signal transmission method provided in at least one embodiment of the present disclosure is shown;

[0019] Figure 6B A timing diagram of various signals in a correction configuration mode provided by at least one embodiment of the present disclosure is shown;

[0020] Figure 7 A flowchart of another signal transmission method provided by at least one embodiment of the present disclosure is shown;

[0021] Figure 8 A schematic block diagram of a controller provided in at least one embodiment of the present disclosure is shown;

[0022] Figure 9 A schematic block diagram of a source driver provided in at least one embodiment of this disclosure is shown; and

[0023] Figure 10 A schematic block diagram of an electronic device provided in at least one embodiment of the present disclosure is shown. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0025] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0026] The various driving circuits used in display panels typically include scan driver integrated circuits (also known as gate drivers or G-ICs), data driver integrated circuits (also known as source drivers or SD-ICs), and controllers. The controller is mainly used to convert data signals, control signals, and clock signals received from external sources (such as storage devices, network modems, etc.) into data signals, gate signals, control signals, and clock signals suitable for the source drivers and gate drivers, for driving the image display of the display panel. For example, the controller can be a timing controller (TCON). The source drivers are mainly used to receive digital signals (display signals or image signals) and control signals provided by the aforementioned controller, converting the digital signals into corresponding analog grayscale voltage signals through digital-to-analog conversion, and inputting them into the pixel units of each column of the pixel array of the display panel. The gate drivers are mainly used to enable each row of pixel units in the pixel array, for example, row by row (or every other row), and, under the action of control signals, cooperate with the source drivers to input the required data signals to the corresponding pixel units for the enabled pixel units, so that the pixel units can display according to the data signals.

[0027] Figure 1A A schematic diagram of a circuit driving system architecture for a display panel is shown.Figure 1A As shown, the circuit-driven system architecture includes a timing controller (TCON), a gate driver (G-IC), a source driver (SD-IC), and a display panel. The circuit-driven system architecture also includes a power management integrated circuit (PMIC), a gamma circuit, and a common electrode voltage (Vcom) circuit.

[0028] The input voltage Vin of the power management integrated circuit is, for example, 5V or 12V, while the output voltage includes the digital operating voltage DVDD provided to each IC, the analog voltage AVDD provided to the Gamma and Vcom circuits, the gate turn-on voltage VGH provided to the gate driver G-IC, and the turn-off voltage VGL, etc. The common electrode voltage (Vcom) circuit is used to provide a common voltage for the pixel array.

[0029] The timing controller TCON outputs control signals including those provided to the gate driver G-IC and the source driver SD-IC. For example, the control signals provided to the source driver SD-IC include the start horizontal (STH) signal for the start of horizontal data transmission, the clock pulse horizontal (CPH) signal, the data transmission control signal Load, and the data polarity inversion signal POL. Similarly, the control signals provided to the gate driver G-IC include the start vertical (STV) signal representing the start of a frame scan, the clock pulse vertical (CPV) signal, and the enable signal.

[0030] For example, the digital interface type of the input terminals of the timing controller TCON can be, for example, Low-Voltage Differential Signaling (LVDS), Embedded Display Port (eDP) interface, and V-by-One (Vx1) interface. The digital interface type of the output terminals of the timing controller TCON can be, for example, mini-LVDS, used for communication with the source driver SD-IC.

[0031] LVDS interfaces transmit signals in wire pairs, including a clock pair and several signal pairs. For example, an LVDS signal pair includes three control signals: a vertical sync signal, a horizontal sync signal, and an enable signal. The mini-LVDS interface is similar to the LVDS interface, also transmitting signals using differential signal pairs; however, unlike LVDS signal pairs, the mini-LVDS signal pairs do not transmit control signals. These control signals are transmitted through separate signal lines or differential signal pairs.

[0032] This disclosure uses the example of a source driver and controller communicating via a mini-LVDS interface to illustrate an embodiment.

[0033] Figure 1B A system architecture diagram showing the connection between the timing controller TCON and the source driver is illustrated.

[0034] like Figure 1B As shown, the system architecture includes a timing controller (TCON) and multiple source drivers. These source drivers include, for example, source driver SD#1, source driver SD#2, etc. The number of source drivers depends on the physical resolution of the display panel; for a single display panel, this may require dozens or even hundreds. For example, each source driver is connected via clock signal pairs for transmitting clock signals, mini-LVDS signal pairs for transmitting image data signals, and control signal lines for transmitting multiple control signals. The mini-LVDS signal pairs can be 3 or 6 pairs. The control signal lines can be differential pairs or not. The mini-LVDS signal lines and the multiple control signal lines are independent of each other.

[0035] For example, the timing controller TCON and each source driver (e.g., source driver SD#1, source driver SD#2, etc.) are connected not only through mini-LVDS signal pairs, but also through the LOAD control signal line for transmitting data transmission control signal LOAD, the POL control signal line for transmitting control signal POL, the POL2 control signal line for transmitting control signal POL2, etc.

[0036] Other control signal lines may also be included between each source driver and TCON, such as horizontal dot inversion (H2DOT) control signal lines, bias voltage (PWRC) control signal lines, POLC control signal lines, etc.

[0037] During the display process, video and animation are composed of numerous frames displayed sequentially in chronological order (e.g., frame rate of 60Hz or 120Hz). Each frame is a complete image displayed on the display panel. During the display of a frame, the gate driver sequentially activates each row of pixel units in the pixel array from the first row to the last row for scanning. During this scanning process, the source driver inputs the necessary data signals for each row of pixel units into the activated pixel units, thus completing the scanning and display of one frame. For example, due to the manufacturing process of the pixel units in the display panel, the display screen needs to be continuously refreshed to achieve a clear, complete, and high-quality display effect. Each refresh requires displaying one frame, and multiple consecutively displayed frames visually constitute a static or dynamic image. After the gate driver completes scanning one frame, it needs to return to the first row to begin scanning a new frame. The time period from the end of scanning the last row to returning to the first row is called the vertical blanking period. During the vertical blanking period, preparation is made for the display of the next frame; the display panel does not display any image during this period.

[0038] Currently, the source driver consumes a significant amount of power during vertical blanking, resulting in wasted resources.

[0039] Therefore, embodiments of this disclosure provide a signal transmission method for a controller to transmit display signals to a source driver. The signal transmission method includes performing a transmission operation via a low-voltage differential signaling interface within a display frame period to provide a display signal to the source driver. The display signal includes a power consumption flag signal indicating that the source driver enters a first operating state during vertical blanking, where the power consumption of the first operating state is less than that of a second operating state, which is the operating state of the source driver during vertical blanking if the power consumption flag signal is not received. This signal transmission method can multiplex the low-voltage differential signaling interface, enabling it to both provide image data to the source driver and provide the power consumption flag signal, allowing the source driver to enter a low-power state during vertical blanking. This reduces the power consumption of the source driver during vertical blanking without altering the interface between the source driver and the controller.

[0040] Figure 2 A flowchart illustrating a signal transmission method provided by at least one embodiment of this disclosure is shown. For example, the signal transmission method provided by the embodiments of this disclosure is applicable to both LVDS interfaces and mini-LVDS interfaces.

[0041] like Figure 2 As shown, the signal transmission method includes steps S10 and S20. Figure 2 The signal transmission method described herein is, for example, derived from...Figure 1B The timing controller TCON executes this. For example, this signal transmission method is used by the timing controller TCON to transmit display signals to source drivers SD#1, SD#2, etc.

[0042] Step S10: Obtain the display signal.

[0043] Step S20: During a display frame cycle, a transmission operation is performed through the low-voltage differential signal interface to provide a display signal to the source driver.

[0044] The display signal includes a power consumption flag signal. The power consumption flag signal is used to indicate that the source driver enters a first operating state during vertical blanking, where the power consumption is less than that of a second operating state, which is the operating state of the source driver during vertical blanking when the power consumption flag signal is not received.

[0045] The signal transmission method in this embodiment can not only utilize, such as Figure 1A The timing controller TCON shown transmits image data signals via its low-voltage differential signal interface. It can also transmit power consumption flag signals via the low-voltage differential signal interface, thereby multiplexing the low-voltage differential signal interface and low-voltage differential signal pairs (e.g., mini-LVDS signal pairs). Furthermore, it can reduce the power consumption of the source driver during vertical blanking and alleviate energy waste.

[0046] For step S10, the display signal may include, for example, image data and configuration data, and the configuration data may include, for example, a power consumption flag signal.

[0047] In embodiments of this disclosure, the low-voltage differential signal interface is multiplexed, which is used not only to transmit power consumption flag signals but also to transmit other configuration data.

[0048] For example, in embodiments of this disclosure, configuration data may be generated by a timing control module in a timing controller. The configuration data is used to configure the source driver so that the source driver processes image data according to the configuration data. For example, the source driver outputs image data to the pixel array according to the timing provided by the configuration data.

[0049] In some embodiments of this disclosure, the configuration data includes control signals required during the display of RGB data by the pixel array. For example, if the display panel is a liquid crystal display panel, then the polarity of the liquid crystal molecules needs to be controlled during the display of RGB data by the liquid crystal display panel. The control signals may include data polarity inversion control signals (e.g., POL control signals, POL2 control signals, and POLC control signals). As another example, a row data start signal is needed during the display of RGB data by the pixel array. The control signals may include a row data start signal STH. Furthermore, in embodiments of this disclosure, the display panel may also be an OLED display panel, etc., and the embodiments of this disclosure are not limited thereto.

[0050] For example, the configuration data can be set by those skilled in the art according to actual needs. This disclosure does not limit the configuration data. The above-mentioned data polarity reversal control signal, frame scan start signal and row data start signal are only examples.

[0051] like Figure 1B As shown, the mini-LVDS signal pairs are only used to transmit image data signals and not to transmit control signals such as polarity inversion configuration information or data transmission control information. Therefore, there are multiple signal lines and multiple signal line interfaces between the timing controller and the source drivers, resulting in a large amount of signal routing space occupied in the display panel, especially when the number of source drivers is large. If the available signal routing space in the display panel is insufficient to accommodate these multiple data lines, then some commonly used control functions cannot be flexibly embedded into the source drivers.

[0052] In other embodiments of this disclosure, the timing controller TCON and the source driver can be connected solely via mini-LVDS signal pairs, clock signal pairs, LOAD control signal lines, and POL control signal lines. In these embodiments, the mini-LVDS transmits configuration data for controlling the source driver, in addition to image data signals, such as the aforementioned control signal POL2, level dot inversion control signal, and bias voltage control signal. This allows for the reuse of the low-voltage differential signal interface, enabling it to provide both image data and configuration data to the source driver, thereby reducing the number of interfaces used for signal transmission, saving costs, and ensuring that various control functions can be flexibly embedded into the source driver. The image data signals are signals used for image display, such as RGB (red, green, blue) data. The configuration data is used to configure the source driver.

[0053] For step S20, in embodiments of this disclosure, the low-voltage differential signal interface includes multiple pairs of transmission lines, each pair of transmission lines including two complementary differential signals, through which image data and configuration data are transmitted. For example, the low-voltage differential signal interface can be a mini-LVDS interface or an LVDS interface, etc.

[0054] A display cycle includes, for example, an active frame and a vertical blanking period (VBP). During the active frame, for example, pixels in the pixel array display image data line by line, while during the vertical blanking period, preparation is made for the display of the next frame of image data.

[0055] In some embodiments of this disclosure, within a single display frame, transmission operations are performed in at least two modes via a low-voltage differential signaling interface. For example, display signals are sequentially provided to the source driver in at least two modes via a low-voltage differential signaling interface.

[0056] For example, the display signal includes multiple display sub-signals, with at least two modes each providing at least one display sub-signal. The at least two modes include a frame configuration mode, where the display sub-signals provided in frame configuration mode include frame configuration data for displaying a frame of image, and the frame configuration data includes a power consumption flag signal.

[0057] In some embodiments of this disclosure, the above-mentioned at least two modes include not only frame configuration mode but also line configuration mode, the configuration data includes line configuration data, and the display sub-signals provided by the line configuration mode include line configuration data and line image data.

[0058] The row configuration mode provides display sub-signals for displaying image data for a row of pixels. Row image data, for example, is the RGB data corresponding to that row in the pixel array. Row configuration data is used to configure the source driver, causing the source driver to respond to the row configuration data by outputting the row image data and timing control signals to the pixels in that row.

[0059] Please refer to the following text for information on the display sub-signals provided by frame configuration mode and line configuration mode. Figure 3A and 3B The description.

[0060] In some embodiments of this disclosure, for example, the controller sequentially provides a plurality of display sub-signals to the source driver, and for each display sub-signal, if the display sub-signal is provided to the source driver in frame configuration mode, the display sub-signal includes a power consumption flag signal.

[0061] The source driver sequentially receives multiple display sub-signals provided by the controller. If the source driver obtains a power consumption flag signal from the display sub-signals provided in frame configuration mode, the source driver enters the first operating state during vertical blanking. If the source driver does not obtain a power consumption flag signal from the display sub-signals provided in frame configuration mode, the source driver enters the second operating state during vertical blanking.

[0062] The first operating state is, for example, a low-power state. In some embodiments of this disclosure, the power consumption of the source driver during vertical blanking is reduced, for example, by turning off the power supply to the circuit module in the source driver during vertical blanking. Therefore, a low-power state can be a state in which the power supply to the circuit module in the source driver is turned off, so that the power supply no longer supplies power to the circuit module, thereby the circuit module does not operate and does not generate power consumption.

[0063] The second operating state is, for example, not turning off the power supply to any circuit modules in the source driver.

[0064] In some other embodiments of this disclosure, for example, the number of circuit modules whose power supply is turned off in the first operating state is greater than the number of circuit modules whose power supply is turned off in the second operating state.

[0065] For example, the circuit modules with power supply turned off and those with power supply not turned off in the first operating state, as well as the circuit modules with power supply turned off and those with power supply not turned off in the second operating state, can be preset.

[0066] In other embodiments of this disclosure, the frame configuration data included in the display sub-signal provided in frame configuration mode includes power-down module information. The power-down module information may include, for example, an identifier of the circuit module whose power supply is turned off in the first operating state; this identifier may be, for example, the name or number of the circuit module. This embodiment enables the setting of circuit modules whose power supply is turned off during vertical blanking according to actual needs, making the source driver settings more flexible and adaptable to various requirements.

[0067] Figure 3A A schematic diagram is shown of the signal format of a display sub-signal provided in a row configuration mode according to at least one embodiment of the present disclosure.

[0068] exist Figure 3AThe example illustrates a first and second display sub-signal provided to the source driver in row configuration mode. It is important to understand that the first and second display sub-signals are merely illustrative of the signal format for display sub-signals provided in row configuration mode and do not imply that only two display sub-signals are provided to the source driver in row configuration mode. In practice, the number of display sub-signals provided to the source driver in row configuration mode can be the same as the number of rows in the pixel array; that is, display sub-signals are provided to each row of pixels separately in row configuration mode.

[0069] like Figure 3A As shown, the display sub-signals provided by the row configuration mode include row configuration data and row image data (e.g., RGB data of a row of pixels). In the following embodiments, RGB (red, green, blue) data is used as an example of image data; however, it should be noted that this disclosure is not limited to this. For example, some display devices may also use image data in forms such as RGBW (red, green, blue, white). For example, the first display sub-signal includes first row configuration data and first row RGB data, and the second display sub-signal includes second row configuration data and second row RGB data.

[0070] It should be noted that in the embodiments of this disclosure, "first" and "second" do not indicate a specific order, but are merely used to distinguish different configuration data or RGB data. The first row of RGB data refers to the RGB data of any randomly selected row of sub-pixels in the pixel array, and the first row of configuration data always corresponds to the configuration data of the RGB data of that row of sub-pixels.

[0071] In some embodiments of this disclosure, such as Figure 3A As shown, the display sub-signals provided by the row configuration mode include combined data, which combines the row configuration data of each row with the row image data of each row in the image data. For example, the first display sub-signal is composed of the first row configuration data and the first row RGB data, and the second display sub-signal is composed of the second row configuration data and the second row RGB data. That is, the controller sequentially provides the display sub-signals corresponding to each row of pixels to the source driver. In this embodiment, the configuration data and image data of a row are combined and transmitted through a low-voltage differential signal interface, which not only realizes the multiplexing of the low-voltage differential signal interface, but also facilitates the source driver to process the image data of each row in a timely manner according to the configuration data of each row for image display.

[0072] exist Figure 3AIn the signal format example shown, for each display sub-signal, the row configuration data precedes the RGB data. That is, for each display sub-signal, the controller first provides the row configuration data to the source driver, and then provides the RGB data for that row to the source driver. Providing the row configuration data to the source driver first, and then providing the RGB data for that row to the source driver, makes it easier for the source driver to process the RGB data of that row in a timely manner according to the row configuration data.

[0073] Figure 3B A schematic diagram of the signal format of a display sub-signal provided by a frame configuration mode according to at least one embodiment of the present disclosure is shown.

[0074] like Figure 3B As shown, the display sub-signals provided by the frame configuration mode include frame configuration data and invalid data.

[0075] Frame configuration data, for example, is used to configure the source driver so that the source driver outputs control signals for the frame image.

[0076] In some embodiments of this disclosure, the frame configuration data may be, for example, a 256-bit frame data packet, such as a frame data packet including bit 0 (FPC[0]), bit 1 (FPC[1]), ..., bit 255 (FPC

[255] ). For example, bit 0 (FPC[0]) of the frame configuration data is a vertical blanking state bit. For example, if bit 0 (FPC[0]) of the frame configuration data is 1, then bit 0 of the frame configuration data is a power consumption flag signal, and the source driver enters a first operating state during vertical blanking in response to bit 0 of the frame configuration data being 1. If bit 0 (FPC[0]) of the frame configuration data is 0, then the source driver enters a second operating state during vertical blanking in response to bit 0 of the frame configuration data being 0.

[0077] Frame configuration data may also include, for example, a gamma setting signal, an amplification offset control signal, a shift direction selection signal, etc.

[0078] In some embodiments of this disclosure, for example, a frame configuration mode is applied during vertical blanking. For instance, the controller provides frame configuration data to the source driver in frame configuration mode during vertical blanking. During vertical blanking, the pixel array does not display image data, therefore the display sub-signals provided in frame configuration mode may include invalid data.

[0079] In other embodiments of this disclosure, if the data length of the frame configuration data is the same as the data length of the combined data provided by the row configuration mode, the display sub-signals provided by the frame configuration mode may also not include invalid data. In embodiments of this disclosure, invalid data may, for example, refer to data signals that are at a low level, such as those not used for display operations.

[0080] exist Figure 3B In the signal format example shown, for each display sub-signal, the frame configuration data is placed before the invalid data. That is, for each display sub-signal, the controller first provides the frame configuration data to the source driver, and then provides the invalid data to the source driver.

[0081] In some embodiments of this disclosure, at least one of the above-described at least two modes includes a calibration configuration mode, wherein the calibration configuration mode provides a display sub-signal for calibrating the timing of the clock signal of the source driver and the display signal. The configuration data includes a calibration signal, and the display sub-signal provided by the calibration configuration mode includes a calibration signal, for example, a calibration signal used to calibrate the timing of the clock signal of the source driver and the display signal.

[0082] In some embodiments of this disclosure, the controller provides a correction signal to the source driver in a correction configuration mode during vertical blanking.

[0083] For example, the transmission of display signals depends on clock signals. Ideally, the rising edge of the clock signal should be aligned with the midpoint of the effective logic level of the display signal. However, in practice, delays in the clock or display signals can cause misalignment between the rising edge of the clock signal and the midpoint of the effective logic level of the display signal. Therefore, correction is required for the clock or display signal. For example, a correction signal might be used to align the rising edge of the clock signal with the midpoint of the effective logic level of the display signal.

[0084] In embodiments of this disclosure, a valid logic level represents, for example, a digital signal "1"; an invalid logic level represents, for example, a digital signal "0". In some embodiments of this disclosure, for example, a low-level signal is an invalid logic level, and a high-level signal is a valid logic level.

[0085] The frame configuration mode and the correction configuration mode enable the source driver to perform frame configuration and timing correction during vertical blanking to prepare for the display of the next image frame. Since frame configuration and timing correction are performed during vertical blanking, time is saved and display efficiency is improved.

[0086] Figure 3C A schematic diagram of the signal format of a display sub-signal provided by a correction configuration mode according to at least one embodiment of the present disclosure is shown.

[0087] like Figure 3C As shown, the display sub-signal provided by the calibration configuration mode includes a calibration signal. For example, in at least one example, the calibration signal may include the delay time length of a clock signal or a data signal used to calculate the delay time length of the clock signal. Those skilled in the art can set the calibration signal according to relevant calibration methods.

[0088] In some embodiments of this disclosure, each display sub-signal may further include a pattern recognition signal. The pattern recognition signal is used to indicate to the source driver the mode to which the display sub-signal belongs, so that the source driver can parse the display sub-signal according to the mode to which the display sub-signal belongs to obtain configuration data or image data.

[0089] like Figures 3A-3C As shown, the display sub-signals provided by the line configuration mode include a pattern recognition signal A to indicate that the display sub-signal belongs to the line configuration mode; the display sub-signals provided by the frame configuration mode include a pattern recognition signal B to indicate that the display sub-signal belongs to the frame configuration mode; and the display sub-signals provided by the correction configuration mode include a pattern recognition signal C to indicate that the display sub-signal belongs to the correction configuration mode.

[0090] like Figures 3A-3C As shown, the pattern recognition signal of the display sub-signal provided in each mode can be located before the configuration data. That is, the controller first provides the pattern recognition signal of each display sub-signal to the source driver, and then provides the configuration data of that display sub-signal to the source driver. For example, for the row configuration mode, the controller first provides the pattern recognition signal A to the source driver, then provides the row configuration data to the source driver, and then provides the row image data to the source driver. As another example, for the frame configuration mode, the controller first provides the pattern recognition signal B to the source driver, then provides the frame configuration data to the source driver, and then provides invalid data to the source driver. As yet another example, for the correction configuration mode, the controller first provides the pattern recognition signal C to the source driver, and then provides the correction signal to the source driver. In embodiments of this disclosure, invalid data can be, for example, a logic invalid level signal, such as a low-level signal.

[0091] Each display sub-signal includes a pattern recognition signal, which enables the source driver to correctly parse and process subsequently received data according to the pattern to which the display sub-signal belongs, in order to obtain line configuration data, frame configuration data, or correction signals, etc.

[0092] In some embodiments of this disclosure, since RGB image data needs to be transmitted during image display but not during vertical blanking, display sub-signals are transmitted in different modes during image display and vertical blanking.

[0093] For example, at least two modes include a line configuration mode and a frame configuration mode. During image display, the display sub-signals required for displaying image data per line of pixels are transmitted to the source driver according to the line configuration mode, while during vertical blanking, the display sub-signals required during vertical blanking are transmitted to the source driver according to the frame configuration mode. For example, the frame configuration mode and the correction configuration mode during vertical blanking within a frame display cycle.

[0094] Figure 4Aand 4B A schematic diagram of a display signal format provided by a controller to a source driver according to at least one embodiment of the present disclosure is shown.

[0095] like Figure 4A As shown, in a frame display cycle (including the image display period and the vertical blanking period), the display signals include multiple display sub-signals 301 provided in row configuration mode, display sub-signals 302 provided in frame configuration mode, and display sub-signals 303 provided in correction configuration mode.

[0096] For example, during image display, multiple display sub-signals 301 are provided in a line configuration mode, during vertical blanking, display sub-signals 302 are provided in a frame configuration mode, and display sub-signals 303 are provided in a correction configuration mode.

[0097] like Figure 4A As shown, within one frame display period, providing display signals to the source driver in at least two modes via a low-voltage differential signal interface includes: within one frame display period, providing display signals to the source driver sequentially in at least two modes using a low-voltage differential signal interface, and for each mode, providing one or more display sub-signals to the source driver sequentially using a low-voltage differential signal interface.

[0098] For example, in Figure 4A In the example, multiple display sub-signals 301 are first provided to the source driver in row configuration mode using a low-voltage differential signal interface, then display sub-signals 302 are provided to the source driver in frame configuration mode, and finally display sub-signals 303 are provided to the source driver in calibration configuration mode. For example, in the row configuration mode including multiple display sub-signals 301, multiple display sub-signals 301 are provided to the source driver sequentially using a low-voltage differential signal interface. That is, in Figure 4A In the example, multiple display sub-signals 301 are first provided to the source driver using the low-voltage differential signal interface, then display sub-signals 302 are provided to the source driver using the low-voltage differential signal interface, and then display sub-signals 303 are provided to the source driver using the low-voltage differential signal interface.

[0099] like Figure 4A As shown, each display sub-signal 301 provided in row configuration mode includes row data (LPC) and image data (e.g., RGB data). Figure 4B As shown, the row data LPC includes a pattern recognition signal A and row configuration data. For example, the pattern recognition signal A includes a reset signal RESET and a row mode start signal LPC Start. For example, the row mode start signal can be a logic invalid level, such as "000 000".

[0100] In some embodiments of this disclosure, the row configuration data may be, for example, a row data packet including 16 bits, such as the row data packet including the 0th bit data LPC[0], the 1st bit data LPC[1], and the 15th bit data LPC

[15] .

[0101] Table 1 below illustrates the definition of an exemplary row data packet provided in at least one embodiment of this disclosure.

[0102] Table 1

[0103]

[0104]

[0105] As shown in Table 1, in one type of row configuration data provided in this disclosure, the row configuration data includes a frame start indication signal. For example, the 0th bit LPC[0] of the row data packet is the frame start indication signal. In the row configuration data of the first display row of each frame, LPC[0] is, for example, high.

[0106] As shown in Table 1, in a row configuration data provided in this disclosure, the row configuration data includes a data polarity inversion control signal. For example, the first bit of the row data packet LPC[1] is the data polarity inversion control signal POL; the second bit of the row data packet LPC[2] is the data polarity inversion control signal POLC; and the third bit of the row data packet LPC[3] is the data polarity inversion control signal POL2.

[0107] As shown in Table 1, in a row configuration data provided in this disclosure, the row configuration data includes charge sharing function control signals. For example, bits 4 to 7 of the row data packet, i.e., LPC[4:7], are charge sharing control bits used to control charge sharing.

[0108] As shown in Table 1, the row configuration data provided in this disclosure also includes reserved bits, which are used to flexibly add some row configurations and improve configuration flexibility. For example, bits 8 to 15, namely LPC[8:15], are reserved bits.

[0109] It should be noted that Table 1 is merely an example of a row data packet definition and is not intended to limit the embodiments of this disclosure. Those skilled in the art can design other row data packet definitions. For example, row data packets can also be 8-bit, 32-bit, 64-bit, etc.

[0110] like Figure 4AAs shown, each display sub-signal 302 provided in frame configuration mode includes frame data FPC, invalid data IDLE0, and invalid data IDLE1. Invalid data IDLE0 and invalid data IDLE1 can be the same signal, such as a low-level signal; they are distinguished here because IDLE1 represents a signal transmitted by the source driver during low-power operation, while IDLE0 represents a signal transmitted during periods when the source driver is not in a low-power operating state. In embodiments of this disclosure, invalid data can be, for example, a low-level signal, or other forms of signal.

[0111] While the source driver is in a low-power operating state, the controller provides a logic invalid level to the source driver to reduce power consumption during vertical blanking. For example... Figure 3B As shown, the Frame Data Programming (FPC) includes a pattern recognition signal B and frame configuration data. For example, the pattern recognition signal B of the Frame Data Programming (FPC) is a reset signal RESET and a frame mode start signal FPC Start. For example, the frame mode start signal is different from the line mode start signal to distinguish between frame configuration mode and line configuration mode. The frame mode start signal can be a logic active level, such as "111 111".

[0112] Table 2 below shows the definition of an exemplary frame data packet provided by at least one embodiment of this disclosure.

[0113] Table 2

[0114]

[0115] As shown in Table 2, this frame data packet includes 28 bits. The 0th bit of the frame configuration data, FPC[0], is the vertical blanking state bit. For example, if the 0th bit of the frame configuration data, FPC[0], is 1 (i.e., high level), the source driver enables the first operating state.

[0116] The FPC[1:25] bits in the frame configuration data are user-defined bits that can be defined by those skilled in the art according to their configuration requirements. The FPC[26:27] bits in the frame configuration data are low-power configuration information that defines the circuit modules whose power supply is turned off during vertical blanking. For example, if FPC[26:27] = 00, the receiver is powered down, meaning the power supply to the receiver in the source driver is turned off. If FPC[26:27] = 01, both the receiver and the output are powered down, meaning the power supply to both the receiver and the output in the source driver is turned off simultaneously.

[0117] In some embodiments of this disclosure, during a transmission operation performed in frame configuration mode, a trigger signal is provided to the source driver, causing the source driver to respond to the trigger signal and begin entering a first operating state.

[0118] In some embodiments of this disclosure, the display sub-signal provided in frame configuration mode includes the data signal 312 provided in power control sub-mode.

[0119] The data signal provided in the power control sub-mode may include, for example, invalid data IDLE1.

[0120] like Figure 4A As shown, before providing invalid data IDLE1 to the source driver in power configuration sub-mode, the controller provides a trigger signal PSI to the source driver again to indicate that the source driver enters the first operating state.

[0121] During the period when the controller provides invalid data IDLE1 to the source driver in power configuration sub-mode, at least some circuit modules in the source driver are in a power-down state to save power.

[0122] like Figure 4A As shown, each display sub-signal 303 provided in the calibration configuration mode includes calibration data ASC. (As...) Figure 4B As shown, the correction data ASC includes a pattern recognition signal C and a correction signal. The pattern recognition signal C can be, for example, a logic invalid level. Please refer to the description above for information about the correction signal.

[0123] like Figure 4A As shown, after transmitting the display signal for one display cycle to the source driver, the display signal for the next display cycle continues to be transmitted to the source driver.

[0124] like Figure 4A As shown, before providing each display sub-signal to the source driver, a trigger signal PSI is provided to the source driver. The trigger signal PSI is used to notify the source driver to perform a transfer operation for at least two modes.

[0125] In some embodiments of this disclosure, the controller can transmit display signals to the source driver in a single mode, in addition to transmitting display signals to the source driver in at least two modes.

[0126] In this embodiment, the trigger signal PSI notifies the source driver of at least two modes of transmission operations, which facilitates compatibility between the source driver and the controller with other transmission operations besides the at least two modes. For example, in addition to at least two modes of transmission operations, the controller and the source driver can also compatiblely perform single-mode transmission operations. For example, a display signal that can be transmitted in at least two modes conforms to a first signal transmission protocol, and a display signal that can be transmitted to the source driver in a single mode conforms to a second signal transmission protocol. If the controller and the source driver perform at least two modes of transmission operations, the controller first provides the source driver with the trigger signal PSI as an indication signal for at least two modes of transmission operations; if the controller and the source driver perform a single-mode transmission operation, the controller first provides the source driver with a single-mode indication signal different from the trigger signal PSI. The second signal transmission protocol can be a protocol different from the first signal transmission protocol, such as some transmission protocols in related technologies. By setting the trigger signal, signal line multiplexing can be achieved, enabling the chip to have multiple functions, thereby reducing the difficulty of promoting the first signal transmission protocol.

[0127] In some embodiments of this disclosure, providing a trigger signal to the source driver includes: providing a data transmission control signal and a data polarity inversion control signal to the source driver, and obtaining the trigger signal based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. The first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

[0128] For example, the data polarity inversion control signal controls the polarity reversal of the source driver's output data signal by switching between high and low levels to achieve AC driving of the LCD. The data transmission control signal is used to latch the data input to the source driver and the data polarity inversion signal on the rising edge, and to control the release of the data to the panel on the falling edge.

[0129] In this example, the controller and source driver can be connected via mini-LVDS, POL, and LOAD signal lines. Therefore, other control signal lines such as POL2 and POLC, H2DOT (Horizontal Dot Inversion) and PWRC (Bias Voltage Control) lines can be omitted, either wholly or partially. Thus, this example not only reduces the number of signal lines between the controller and source driver but also informs the source driver which transmission operation to perform to ensure compatibility with single-mode transmission operations.

[0130] Figure 5AA timing diagram of a trigger signal PSI provided in at least one embodiment of the present disclosure is shown.

[0131] like Figure 5A As shown, the trigger signal PSI includes a data transmission control signal LOAD and a data polarity inversion control signal POL. The first transition edge (e.g., rising edge) of the data polarity inversion control signal POL is later than the second transition edge (e.g., rising edge) of the data transmission control signal LOAD. The first transition state (e.g., high level state) of the data polarity inversion control signal POL after the first transition edge coincides with the second transition state (e.g., high level state) of the data transmission control signal LOAD after the second transition edge for at least a portion of the time.

[0132] In some embodiments of this disclosure, for example, the driver in the controller can be adjusted such that, within the same cycle of the data transmission control signal LOAD and the data polarity inversion control signal POL, the data polarity inversion control signal POL occurs later than the data transmission control signal LOAD by a time length tS2, thereby causing the rising edge of the data polarity inversion control signal POL to occur later than the rising edge of the data transmission control signal LOAD. The data polarity inversion control signal POL and the data transmission control signal LOAD are simultaneously at a high level for a time length tH2 after their rising edges.

[0133] Figure 5B A timing diagram of a single-mode indication signal provided in at least one embodiment of the present disclosure is shown.

[0134] like Figure 5B As shown, the single-mode indication signal includes a data transmission control signal LOAD' and a data polarity inversion control signal POL', and the first transition edge (e.g., rising edge) of the data polarity inversion control signal POL' precedes the second transition edge (e.g., rising edge) of the data transmission control signal LOAD', and the first transition state (e.g., high level state) of the data polarity inversion control signal POL' after the first transition edge coincides with the second transition state (e.g., high level state) of the data transmission control signal LOAD' after the second transition edge at least for a portion of the time.

[0135] In some embodiments of this disclosure, for example, the driver in the controller can be adjusted such that, within the same cycle of the data transmission control signal LOAD' and the data polarity inversion control signal POL', the data polarity inversion control signal POL' precedes the data transmission control signal LOAD' by a time length tS1, thereby causing the rising edge of the data polarity inversion control signal POL' to precede the rising edge of the data transmission control signal LOAD'.

[0136] Figure 5A and Figure 5BThe embodiments can distinguish between single-mode transmission operations and transmission operations with at least two modes through data transmission control signals and data polarity reversal control signals, without requiring modifications to the interface hardware circuitry, making them easy to implement. Thus, the same set of controllers and source drivers can select to implement either the first or second signal transmission protocol as needed, without requiring separate sets of controllers and source drivers for the first and second signal transmission protocols. Therefore, this reduces design, development, manufacturing, and management costs for suppliers.

[0137] In some embodiments of this disclosure, the signal transmission method further includes providing a trigger signal to the source driver again in response to the completion of the transmission operation in frame configuration mode, to instruct the source driver to perform the transmission operation in row configuration mode or correction configuration mode.

[0138] Figure 6A A timing diagram of a signal transmission method provided in at least one embodiment of the present disclosure is shown.

[0139] like Figure 6A As shown, for example, the controller first provides row configuration data and row image data to the source driver in row configuration mode. After the controller provides the last row of row image data (RGB data) to the source driver, it provides a display sub-signal to the source driver in frame configuration mode. This display sub-signal includes a trigger signal PSI and frame configuration data. The frame configuration mode includes a power configuration sub-mode. During the provision of the display sub-signal to the source driver,

[0140] If the frame configuration data includes a power consumption flag signal, the frame configuration mode includes a power consumption configuration sub-mode. The controller again provides a trigger signal PSI to the source driver in the power consumption configuration sub-mode, causing the source driver to enter the first operating state, i.e., the low-power operating state, during vertical blanking in response to the trigger signal. During the power consumption configuration sub-mode, the controller provides invalid data IDLE1 to the source driver.

[0141] like Figure 6A As shown, after the transmission operation in frame configuration mode ends, a trigger signal PSI is provided to the source driver again to instruct the source driver to perform the transmission operation in correction configuration mode. In some embodiments of this disclosure, such as Figure 5A As shown, after the transmission operation in frame configuration mode is completed, the source driver, in response to receiving the trigger signal PSI again, wakes up the power-down module, for example, by re-energizing the power-down module. The power-down module is the circuit module whose power supply is turned off during vertical blanking.

[0142] Figure 6B A timing diagram of various signals in a calibration configuration mode provided by at least one embodiment of the present disclosure is shown.

[0143] likeFigure 6B As shown, signal LV0 represents a low-voltage differential signal line pair, through which the controller provides the display sub-signal to the source driver.

[0144] like Figure 6B As shown, after the controller finishes providing invalid data IDLE1 to the source driver in frame configuration mode, a trigger signal PSI is provided to the source driver. That is, the first transition edge (e.g., rising edge) of the data polarity inversion control signal POL is later than the second transition edge (e.g., rising edge) of the data transmission control signal LOAD, and the first transition state (e.g., high level state) of the data polarity inversion control signal POL after the first transition edge coincides with the second transition state (e.g., high level state) of the data transmission control signal LOAD after the second transition edge at least for a portion of the time.

[0145] After providing the trigger signal PSI to the source driver, a correction configuration mode pattern recognition signal tPSI_ASC is provided to the source driver. This pattern recognition signal tPSI_ASC is, for example, a logic invalid level, so that the source driver determines the subsequently received signal as the correction signal tASC based on the pattern recognition signal C, so as to use the correction signal tASC to correct the timing of the clock signal and the display signal.

[0146] like Figure 6B As shown, after the display sub-signal is provided in the calibration configuration mode, a trigger signal PSI is provided to the source driver again to indicate the entry into the process of providing the display sub-signal in another mode of at least two modes. The other mode is, for example, the row configuration mode, whose mode identification signal includes a reset signal RESET and a logic invalid level, such as "000 000".

[0147] In some embodiments of this disclosure, the controller provides display signals to the source driver sequentially in line configuration mode, frame configuration mode, and correction configuration mode via a low-voltage differential signal interface.

[0148] In some embodiments of this disclosure, the signal transmission method is applied, for example, to a display device. After the display device enters an operational state, the controller sequentially provides multiple display sub-signals to the source driver according to a row configuration mode, a frame configuration mode, and a calibration configuration mode. During the power-on process of the display device, the controller sequentially provides display sub-signals according to the calibration configuration mode and the display sub-signals provided in the frame configuration mode.

[0149] During the power-on process of the display device, the controller first provides a calibration signal to the source driver to determine the number of delay units in the clock path, and then provides frame configuration data to the source driver, enabling the controller to prepare for image display in advance. No image display occurs during the power-on process, therefore, it is not necessary to provide display sub-signals to the source driver in row configuration mode. After the source driver is configured according to the calibration parameters and the frame configuration data, the display device enters the working state.

[0150] For example, in the operating state of the display device, the controller first provides the source driver with row configuration data and row image data in row configuration mode, causing the display device to sequentially display the image data of each row, thus displaying a complete frame of image. After the display device displays a complete frame of image, it enters the vertical blanking period. During the vertical blanking period, the controller first provides the source driver with frame configuration data in frame configuration mode, causing the source driver to perform frame configuration. For example, the source driver enters a low-power state based on the frame configuration data. Afterwards, the controller provides the display sub-signal to the source driver in correction configuration mode.

[0151] Figure 7 A flowchart of another signal transmission method provided by at least one embodiment of the present disclosure is shown.

[0152] like Figure 7 As shown, the signal transmission method includes steps S710 to S720. Figure 7 The signal transmission method shown is performed, for example, by a source driver. For instance, this signal transmission method is used for the source driver to receive display signals from a timing controller.

[0153] Step S710: During a display frame cycle, a transmission operation is performed via a low-voltage differential signal interface to receive the display signal provided by the controller.

[0154] Step S720: In response to the display signal including the power consumption flag signal, enter the first operating state during vertical blanking.

[0155] The power consumption of the first operating state is less than that of the second operating state, which is the operating state of the source driver during vertical blanking when no power consumption flag signal is received.

[0156] This signal transmission method can reduce the power consumption of the source driver during vertical blanking, thereby reducing the overall power consumption of the source driver.

[0157] For step S710, for example in Figure 1BIn the example, the controller TCON sends the display signal for one display cycle to the source drivers SD#1, SD#2, etc., via its own low-voltage differential signal interface. The source drivers SD#1, SD#2, etc., receive the display signal from the controller TCON via their own low-voltage differential signal interfaces. Please refer to the description above for at least two modes and one display cycle.

[0158] For step S720, for example, the source driver enters a first operating state during vertical blanking in response to receiving a power consumption flag signal. Please refer to the description above for the first and second operating states.

[0159] In some embodiments of this disclosure, transmission operations are performed in at least two modes via a low-voltage differential signal interface. The display signal includes a plurality of display sub-signals, each of the at least two modes providing at least one display sub-signal. The at least two modes include a frame configuration mode. The display sub-signals provided in the frame configuration mode include frame configuration data for displaying a frame of image. In response to the display signal including a power consumption flag signal, entering a first operating state during vertical blanking includes: entering the first operating state during vertical blanking in response to obtaining the power consumption flag signal from the frame configuration data.

[0160] For example, the source driver sequentially receives the display sub-signals provided by the controller. If the display sub-signal is determined to belong to the frame mode signal based on the pattern recognition signal B in the display sub-signal, then it is determined whether FPC[0] in the configuration data is equal to 1. If FPC[0] = 1, then the first working state, i.e., the low-power working state, is entered during the vertical blanking period.

[0161] For example, in response to obtaining a power consumption flag signal from the frame configuration data, entering the first operating state during vertical blanking includes: obtaining power-down module information from the frame configuration data, and turning off the power supply to the power-down module during vertical blanking to enter the first operating state.

[0162] In some embodiments of this disclosure, entering a first operating state during vertical blanking in response to obtaining a power consumption flag signal from frame configuration data includes: in response to obtaining a power consumption flag signal from frame configuration data, starting to enter the first operating state after receiving a trigger signal.

[0163] In some embodiments of this disclosure, the trigger signal is obtained based on the relative timing relationship between the data transmission control signal and the data polarity inversion control signal provided by the source driver. The first transition edge of the data polarity inversion control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity inversion control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

[0164] The trigger signal may be, for example, the trigger signal PSI described in the foregoing embodiments. For embodiments of the trigger signal, please refer to the description above.

[0165] The signal transmission method executed by the source driver corresponds to the signal transmission method executed by the controller, and will not be described in detail here.

[0166] Figure 8 A schematic block diagram of a controller 800 provided in at least one embodiment of the present disclosure is shown. The controller 800 can be used to transmit display signals to a source driver in a display device.

[0167] For example, such as Figure 8 As shown, the controller 800 includes a display signal acquisition unit 810 and a low-voltage differential signal interface 820.

[0168] The display signal acquisition unit 810 is configured to acquire display signals. For example, the display signal acquisition unit 810 generates display signals that are provided to the source driver in at least two modes.

[0169] The display signal acquisition unit 810 can, for example, perform... Figure 2 Step S10 is described.

[0170] A low-voltage differential signaling interface 820 is configured to perform a transmission operation within a display frame period to provide the display signal to the source driver, wherein the display signal includes a power consumption flag signal indicating that the source driver enters a first operating state during vertical blanking. The power consumption of the first operating state is less than the power consumption of a second operating state, which is the operating state of the source driver during vertical blanking in the absence of the power consumption flag signal.

[0171] The low-voltage differential signal interface 820 can, for example, perform... Figure 2 Step S20 is described.

[0172] The controller 800 can reduce the power consumption of the source driver during vertical blanking, thereby reducing the overall power consumption of the source driver.

[0173] Figure 9 A schematic block diagram of a source driver 900 provided in at least one embodiment of the present disclosure is shown. The source driver 900 is used to acquire display signals from a controller.

[0174] For example, such as Figure 9 As shown, the source driver 900 includes a low-voltage differential signal interface 910 and a processing unit 920.

[0175] The low-voltage differential signal interface 910 is configured to perform a transmission operation to receive the display signal provided by the controller within a display frame period.

[0176] The low-voltage differential signal interface 910 can, for example, perform... Figure 7 Step S710 is described.

[0177] The processing unit 920 is configured to enter a first operating state during vertical blanking in response to the display signal including a power consumption flag signal, the power consumption of the first operating state being less than the power consumption of a second operating state, the second operating state being the operating state of the source driver during vertical blanking when the power consumption flag signal is not received.

[0178] Processing unit 920 can, for example, execute Figure 7 Step S720 is described.

[0179] The source driver 900 can reduce the power consumption of the source driver during vertical blanking, thereby reducing the overall power consumption of the source driver.

[0180] For example, the display signal acquisition unit 810, the low-voltage differential signal interface 820, the low-voltage differential signal interface 910, and the processing unit 920 can be hardware, software, firmware, or any feasible combination thereof. For example, the display signal acquisition unit 810, the low-voltage differential signal interface 820, the low-voltage differential signal interface 910, and the processing unit 920 can be dedicated or general-purpose circuits, chips, or devices, or they can be a combination of a processor and memory. The embodiments of this disclosure do not limit the specific implementation of the above-mentioned units.

[0181] It should be noted that in the embodiments of this disclosure, each unit of the controller 800 and the source driver 900 corresponds to each step of the aforementioned signal transmission method. For the specific functions of the controller 800 and the source driver 900, please refer to the relevant description of the signal transmission method, which will not be repeated here. Figure 8 The controller 800 shown and Figure 9 The components and structure of the source driver 900 shown are merely exemplary and not limiting. The controller 800 and the source driver 900 may also include other components and structures as needed.

[0182] Figure 10 A schematic block diagram of an electronic device 1000 provided in at least one embodiment of this disclosure is shown. For example... Figure 10 As shown, the electronic device 1000 includes a controller 1010, a source driver 1020, and a display panel 1030.

[0183] Controller 1010 executes the above. Figure 2The described signal transmission method. The source driver 1020, for example, executes the above... Figure 7 The described signal transmission method. The display panel 1030 is, for example, a liquid crystal display panel, used to receive drive signals (i.e., grayscale voltage signals) provided by the source driver 1020 and display images.

[0184] The electronic device 1000 can be any electronic device with image display capabilities, including but not limited to smartphones, tablets, laptops, monitors, televisions, etc.

[0185] This electronic device can reduce the power consumption of the source driver during vertical blanking, thereby reducing the overall power consumption of the source driver.

[0186] Although the above points have been made, the following points still need to be clarified:

[0187] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0188] (2) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0189] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure should be determined by the scope of protection of the claims.

Claims

1. A signal transmission method for a controller to transmit a display signal to a source driver, the method comprising: During one display frame cycle, a transmission operation is performed via a low-voltage differential signaling interface to provide the display signal to the source driver, wherein the display signal includes a power consumption flag signal. The power consumption flag signal is used to indicate that the source driver enters a first operating state during vertical blanking. Wherein, the power consumption of the first operating state is less than the power consumption of the second operating state, and the second operating state is the operating state of the source driver during the vertical blanking when it does not receive the power consumption flag signal. The transmission operation is performed in at least two modes via the low-voltage differential signal interface, and the display signal includes a plurality of display sub-signals, with each of the at least two modes providing at least one display sub-signal. The at least two modes include a frame configuration mode, wherein the display sub-signal provided in the frame configuration mode includes frame configuration data for displaying a frame of image, and the frame configuration data includes the power consumption flag signal; During the transmission operation performed in the frame configuration mode, a trigger signal is provided to the source driver, causing the source driver to respond to the trigger signal and enter the first operating state. The trigger signal includes a data transmission control signal and a data polarity reversal control signal. The first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

2. The method according to claim 1, wherein, The display signal includes image data and configuration data. The configuration data is used to configure the source driver, so that the source driver processes the image data according to the configuration data. The configuration data includes the power consumption flag signal.

3. The method according to claim 1, wherein, The controller provides the frame configuration data to the source driver in the frame configuration mode during the vertical blanking.

4. The method according to claim 1, wherein, The frame configuration data includes power-down module information. In the first working state, the power supply to the power-down module indicated by the power-down module information is turned off.

5. The method according to claim 1, wherein, The at least two modes also include: row configuration mode or correction configuration mode. The display sub-signal provided in the row configuration mode is used to configure the source driver for displaying one row of pixels. The display sub-signal provided by the calibration configuration mode is used to calibrate the timing of the clock signal of the source driver and the display signal.

6. The method according to claim 5, further comprising: In response to the completion of the transmission operation performed in the frame configuration mode, a trigger signal is provided to the source driver again to instruct the source driver to perform the transmission operation in the row configuration mode or the correction configuration mode.

7. The method according to claim 6, wherein, The display sub-signals provided by the row configuration mode include row configuration data and row image data. The row configuration data is used to configure the source driver to display the row image data. The calibration configuration mode provides a display sub-signal including a calibration signal for calibrating the timing of the source driver's clock signal and the display signal.

8. The method according to claim 5, wherein, The transmission operation performed via the low-voltage differential signal interface in at least two modes includes: The transmission operation is performed sequentially via the low-voltage differential signal interface in the row configuration mode, the frame configuration mode, and the correction configuration mode to provide the display signal to the source driver.

9. A signal transmission method for a source driver to acquire a display signal provided by a controller, the source driver including a low-voltage differential signal interface, the method comprising: Within one frame display cycle, a transmission operation is performed through the low-voltage differential signal interface to receive the display signal provided by the controller; In response to the display signal including the power consumption flag signal, the system enters a first operating state during vertical blanking. Wherein, the power consumption of the first operating state is less than the power consumption of the second operating state, and the second operating state is the operating state of the source driver during the vertical blanking when it does not receive the power consumption flag signal. The transmission operation is performed in at least two modes via the low-voltage differential signal interface, and the display signal includes a plurality of display sub-signals, with each of the at least two modes providing at least one display sub-signal. The at least two modes include a frame configuration mode, wherein the display sub-signals provided in the frame configuration mode include frame configuration data for displaying a frame of image, and the frame configuration data includes the power consumption flag signal. During the transmission operation performed in the frame configuration mode, the system enters the first working state in response to a trigger signal provided by the controller. The trigger signal includes a data transmission control signal and a data polarity reversal control signal. The first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

10. The method according to claim 9, wherein, In response to the display signal including the power consumption flag signal, entering a first operating state during vertical blanking includes: In response to obtaining the power consumption flag signal from the frame configuration data, the device enters a first operating state during vertical blanking.

11. The method according to claim 9, wherein, In response to obtaining the power consumption flag signal from the frame configuration data, entering the first operating state during vertical blanking includes: The power-down module information is obtained from the frame configuration data, and the power supply to the power-down module is turned off during vertical blanking to enter the first working state.

12. The method according to claim 9, wherein, In response to obtaining a power consumption flag signal from the frame configuration data, the system enters a first operating state during vertical blanking, including: In response to obtaining a power consumption flag signal from the frame configuration data, the device enters the first working state after receiving a trigger signal.

13. A controller for transmitting display signals to a source driver, the controller comprising: A low-voltage differential signaling interface is configured to perform a transmission operation within a display frame cycle to provide the display signal to the source driver, wherein the display signal includes a power consumption flag signal. The power consumption flag signal is used to indicate that the source driver enters a first operating state during vertical blanking. Wherein, the power consumption of the first operating state is less than the power consumption of the second operating state, and the second operating state is the operating state of the source driver during the vertical blanking when it does not receive the power consumption flag signal. The transmission operation is performed in at least two modes via the low-voltage differential signal interface, and the display signal includes a plurality of display sub-signals, with each of the at least two modes providing at least one display sub-signal. The at least two modes include a frame configuration mode, wherein the display sub-signal provided in the frame configuration mode includes frame configuration data for displaying a frame of image, and the frame configuration data includes the power consumption flag signal; During the transmission operation performed in the frame configuration mode, a trigger signal is provided to the source driver, causing the source driver to respond to the trigger signal and enter the first operating state. The trigger signal includes a data transmission control signal and a data polarity reversal control signal. The first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

14. A source driver for receiving a display signal provided by a controller, the source driver comprising: A low-voltage differential signal interface is configured to perform a transmission operation to receive the display signal provided by the controller within one frame display period; as well as The processing unit is configured to enter a first operating state during vertical blanking in response to the display signal, including a power consumption flag signal. Wherein, the power consumption of the first operating state is less than the power consumption of the second operating state, and the second operating state is the operating state of the source driver during the vertical blanking when it does not receive the power consumption flag signal. The transmission operation is performed in at least two modes via the low-voltage differential signal interface, and the display signal includes a plurality of display sub-signals, with each of the at least two modes providing at least one display sub-signal. The at least two modes include a frame configuration mode, wherein the display sub-signals provided in the frame configuration mode include frame configuration data for displaying a frame of image, and the frame configuration data includes the power consumption flag signal. During the transmission operation performed in the frame configuration mode, the system enters the first working state in response to a trigger signal provided by the controller. The trigger signal includes a data transmission control signal and a data polarity reversal control signal. The first transition edge of the data polarity reversal control signal is later than the second transition edge of the data transmission control signal, and the first transition state of the data polarity reversal control signal after the first transition edge coincides with the second transition state of the data transmission control signal after the second transition edge for at least a portion of the time.

15. An electronic device comprising: A controller, wherein the controller includes a low-voltage differential signaling interface configured to perform a transmission operation within a frame display period to provide the display signal to the source driver, the display signal including a power consumption flag signal for indicating that the source driver enters a first operating state during vertical blanking; The source driver of claim 14, wherein the source driver is connected to the controller via the low-voltage differential signal interface to perform the transmission operation; and The display panel is connected to the source driver to receive drive signals provided by the source driver, wherein... The drive signal is generated based on the display signal.

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