System and method for reducing the effects of leakage inductance in flyback DC-DC converters

Abstract

This application relates to systems and methods for reducing the impact of leakage inductance in a flyback DC-DC converter. The converter includes: a transformer having a primary winding and a secondary winding; a first switch and a second switch; and a capacitor coupled between the second switch and the primary winding, wherein the second switch is arranged to operate such that the sum of a first time period and a second time period equals the sum of a third time period and a fourth time period, wherein the first time period is a delay time period from the time the first switch is turned off to the time the second switch is turned on, the second time period is the time period during which the second switch is on, the third time period is the resonant time period of a resonator formed by the leakage inductance of the transformer and the capacitance of the capacitor, and the fourth time period is the time period during which the leakage inductance of the transformer is discharged into the capacitor.

Description

[0001] Cross-references to related applications

[0002] This application claims Chinese Patent Application No. 202111116824.1 (Attorney's Case No. 096868-1269320-006600CNP), filed on September 23, 2021, entitled "A method for absorbing leakage inductance energy of flyback DC-DC converters," and Chinese Patent Application No. 202111116824.1 (Attorney's Case No. 096868-1269320-006600CNP), filed on November 16, 2021, entitled "Systems and methods for reducing effects of leakage inductance in flyback DC-DC converters." The priority of U.S. Provisional Patent Application No. 63 / 264,143 (Attorney’s Case No. 096868-1269314-006600USP) “CONVERTERS” is hereby claimed, and the contents of all patent applications are incorporated herein by reference in their entirety for all purposes. Technical Field

[0003] The described embodiments generally relate to transformers used in converters, and more specifically, this embodiment relates to systems and methods for reducing the effects of leakage inductance in flyback DC-DC converters. Background Technology

[0004] Electronic devices such as computers, servers, and televisions use one or more power conversion circuits to convert one form of electrical energy into another. Some power conversion circuits use a circuit topology called a half-bridge converter to convert high DC voltage to lower DC voltage. Because many electronic devices are sensitive to the size and efficiency of power conversion circuits, new power converters can provide relatively higher efficiency and smaller size for newer electronic devices. Summary of the Invention

[0005] In some embodiments, a circuit is disclosed. The circuit includes a flyback DC-DC converter comprising: a transformer having a primary winding and a secondary winding, the primary winding extending from a first terminal to a second terminal; a first switch having a first gate terminal, a first source terminal, and a first drain terminal, the first drain terminal coupled to the first terminal of the primary winding; a second switch having a second gate terminal, a second source terminal, and a second drain terminal, the second source terminal coupled to the first terminal of the primary winding; and a capacitor coupled between the second drain terminal and the second terminal of the primary winding, wherein the second switch is arranged to transition between an on state and an off state such that the sum of a first time period and a second time period equals the sum of a third time period and a fourth time period, wherein: the first time period is a delay time period from the time the first switch is off to the time the second switch is on; the second time period is the time period during which the second switch is on; the third time period is the resonant time period of a resonator formed by the leakage inductance of the transformer and the capacitance of the capacitor; and the fourth time period is the time period during which the leakage inductance of the transformer is discharged into the capacitor.

[0006] In some embodiments, the circuit further includes a resistor coupled between the capacitor and the second drain terminal.

[0007] In some embodiments, the resistance of the resistor is equal to or greater than twice the square root of the ratio of leakage inductance to capacitance of the capacitor.

[0008] In some embodiments, the circuit further includes a diode having an anode and a cathode, the anode being coupled to a second source terminal and the cathode being coupled to a second drain terminal.

[0009] In some embodiments, the first switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0010] In some embodiments, the first switch is a gallium nitride (GaN) based transistor.

[0011] In some embodiments, the second switch is a GaN-based transistor, and the first and second switches are integrated on a single GaN-based die.

[0012] In some embodiments, a method for controlling a circuit is disclosed. The method includes providing a flyback DC-DC converter comprising: a transformer having a primary winding and a secondary winding, the primary winding extending from a first terminal to a second terminal; a first switch having a first gate terminal, a first source terminal, and a first drain terminal, the first drain terminal coupled to the first terminal of the primary winding; a second switch having a second gate terminal, a second source terminal, and a second drain terminal, the second source terminal coupled to the first terminal of the primary winding; and a capacitor coupled between the second drain terminal and the second terminal of the primary winding; and controlling the operation of the second switch such that the sum of a first time period and a second time period is equal to or greater than the sum of a third time period and a fourth time period, wherein: the first time period is a delay time period from the time the first switch is turned off to the time the second switch is turned on; the second time period is the time period during which the second switch is on; the third time period is the resonant time period of a resonator formed by the leakage inductance of the transformer and the capacitance of the capacitor; and the fourth time period is the time period during which the leakage inductance of the transformer is discharged into the capacitor.

[0013] In some embodiments, the method further includes providing a resistor coupled between the capacitor and the second drain terminal.

[0014] In some embodiments, in the method, the resistance of the resistor is equal to or greater than twice the square root of the ratio of leakage inductance to capacitance of the capacitor.

[0015] In some embodiments, the method further includes providing a diode having an anode and a cathode, the anode being coupled to a second source terminal and the cathode being coupled to a second drain terminal.

[0016] In some embodiments of the method, the first switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0017] In some embodiments of the method, the first switch is a gallium nitride (GaN) based transistor.

[0018] In some embodiments, the second switch is a GaN-based transistor, and the first and second switches are integrated on a single GaN-based die. Attached Figure Description

[0019] Figure 1 A flyback DC-DC converter circuit with a clamping switch and a damping resistor according to an embodiment of the present disclosure is shown.

[0020] Figures 2A-2F It shows Figure 1 Various timing diagrams for the operation of a flyback DC-DC converter circuit;

[0021] Figure 3 A flyback DC-DC converter circuit according to an embodiment of the present disclosure is shown, which is similar to... Figure 1 The circuit was modified, and diodes were added.

[0022] Figure 4 A flyback DC-DC converter circuit according to an embodiment of the present disclosure is shown, which is similar to... Figure 1 The circuit in which damping resistors have been placed in different arrangements;

[0023] Figure 5 A flyback DC-DC converter circuit according to an embodiment of the present disclosure is shown, which is similar to... Figure 3 The circuit, in which blocking diodes were added; and

[0024] Figure 6 A flyback DC-DC converter circuit 600 according to an embodiment of the present disclosure is shown, which is similar to... Figure 5 The circuit, in which damping resistors have been placed in different arrangements. Detailed Implementation

[0025] The circuits, apparatuses, and related techniques disclosed herein generally relate to converters. More specifically, the circuits, apparatuses, and related techniques disclosed herein relate to systems and methods for reducing the impact of leakage inductance energy in flyback DC-DC converters. In some embodiments, the flyback DC-DC converter may include clamping switches and damping resistors arranged to reduce the impact of leakage inductance energy. By reducing the impact of leakage inductance energy, power losses in the flyback DC-DC converter can be reduced, thereby improving the overall efficiency of the converter. Furthermore, reducing the impact of leakage inductance energy in the converter can significantly reduce the amplitude of voltage spikes at internal nodes and cause a decrease in dV / dt at the internal nodes of the converter, thereby reducing voltage stress on the internal components of the converter. Therefore, the maximum rated voltage of the internal components of the converter can be reduced, thereby saving system costs. In addition, the reduction in dV / dt in the converter can improve the electromagnetic interference (EMI) performance of the converter.

[0026] In various embodiments, adaptive control techniques for the on-time of the clamping switch can be employed to control the start time and duration of the clamping switch's on-time, thereby reducing oscillations and voltage spikes. In some embodiments, in a flyback DC-DC converter, the clamping switch is arranged to operate such that the sum of a first time period and a second time period equals the sum of a third time period and a fourth time period, wherein the first time period is the delay period from the time the main switch is turned off to the time the clamping switch is turned on, the second time period is the period from when the clamping switch enters its on state to the time the clamping switch is turned off, the third time period is the resonant period of the resonator formed by the transformer leakage inductance and the capacitance of the first capacitor, and the fourth time period is the period during which the transformer leakage inductance is discharged into the first capacitor. Embodiments of this disclosure further enable improvements in efficiency during light-load operation. Various inventive embodiments, including methods, processes, systems, apparatuses, etc., are described herein.

[0027] Several illustrative embodiments will now be described with reference to the accompanying drawings, which form part of the embodiments. The following description is merely illustrative and is not intended to limit the scope, applicability, or configuration of this disclosure. In fact, the following description of the embodiments will provide an enlightening description for those skilled in the art to implement one or more embodiments. It should be understood that various changes can be made to the function and arrangement of elements without departing from the spirit and scope of this disclosure. In the following description, specific details are set forth for illustrative purposes to provide a thorough understanding of certain inventive embodiments. However, it will be apparent that various embodiments can be practiced without these specific details. The drawings and descriptions are not intended to be limiting. The terms “example” or “exemplary” are used herein to mean “serving as an example, illustration, or description.” Any embodiment or design described herein as “exemplary” or “example” should not be construed as preferred or advantageous relative to other embodiments or designs.

[0028] Figure 1 A flyback DC-DC converter circuit 100 with clamping switches and damping resistors according to an embodiment of the present disclosure is shown. Figure 1 As shown, the flyback DC-DC converter circuit 100 may include an input circuit 102 and an output circuit 104. The flyback DC-DC converter circuit 100 may include a transformer 134 having a primary-side winding 128, a magnetic core 129, and a secondary-side winding 130. The transformer 134 may be arranged to provide isolation between the input circuit 102 and the output circuit 104.

[0029] The flyback DC-DC converter circuit 100 may include a main switch 122 (Q1) having a drain 140, a source 142, and a gate 144. In some embodiments, the main switch 122 may include a body diode 126 and an output capacitor 124 that may be connected between the source and drain terminals of the main switch 122. The main switch 122 may be controlled by a pulse width modulation (PWM) controller circuit 106. The PWM controller circuit 106 may turn on the main switch 122, thereby closing the primary-side loop. In this way, energy accumulates in the primary-side winding 128. When the main switch 122 is turned off, the energy accumulated in the primary-side winding 128 can be transferred to the secondary side, thereby causing the output circuit 104 to supply energy to the output load.

[0030] One non-ideal characteristic of a flyback transformer is its leakage inductance. An ideal transformer would have perfect coupling between the primary and secondary windings without losses. However, in practice, the coupling may be less than 100%, leaving an inductance that is effectively in series with the primary coil. The leakage inductance of the transformer can be represented by an inductor 114 with a leakage inductance Lk. Therefore, a relatively high voltage spike may occur across the inductor 114 when the main switch 122 is turned off. The combination of inductor 114 and any capacitance in the circuit can cause ringing at the drain 140. The resulting ringing frequency can also degrade the EMI spectrum of the flyback DC-DC converter. Embodiments of this disclosure can reduce the effects of leakage inductance, thereby reducing EMI radiation.

[0031] In the flyback DC-DC converter circuit 100, inductor 114 represents the leakage inductance (Lk) of the flyback DC-DC converter, and inductor 132 represents the magnetizing inductance (Lm) of the flyback DC-DC converter. The flyback DC-DC converter circuit 100 may include a clamping switch 120 and a damping resistor 112. In some embodiments, switch 120 may include a body diode 118 connected between the source and drain terminals of switch 120. Output capacitor 116 is the output capacitance of switch 120 and may be connected between the source and drain terminals of switch 120. Resistor 110 and storage capacitor 108 with capacitance Cs may be coupled to damping resistor 112 at node 150. In some embodiments, storage capacitor 108 may include a plurality of capacitors connected in parallel, while in alternative or additional embodiments, storage capacitor 108 may include a plurality of capacitors connected in series. PWM controller circuit 106 may be coupled to the gate 146 of clamping switch 120. The leakage inductance Lk current iLk can flow through the clamping switch 120 and / or the body diode 118. In various embodiments, the clamping switch 120 can be, for example, a silicon MOSFET or a compound semiconductor switch, such as a GaN-based HEMT.

[0032] When the main switch 122 is open, the leakage inductance energy of Lk can be stored in the storage capacitor 108 through the switch 120 and / or the diode 118. During the charging period of the storage capacitor 108, the leakage inductance current iLkcan can flow clockwise through the body diode 118 and the damping resistor 112 to the storage capacitor 108. The resistor 110 can dampen some of the stored energy in the storage capacitor 108. The charging of the storage capacitor 108 allows leakage inductance energy to be absorbed into the storage capacitor 108. The remaining energy stored in the storage capacitor 108 can then be released by the current iLk flowing counterclockwise through the damping resistor 112 and the clamping switch 120 to the primary winding 128. The energy released into the primary winding 128 can then be transferred to the secondary winding 130 through the resonance of the storage capacitor 108 and the leakage inductance Lk. This may cause oscillations and voltage spikes at various nodes of the circuit 100. Embodiments of this disclosure can mitigate these effects by precisely controlling the on-time of the clamp switch 120. The clamp switch 120 can be turned on after a delay T following the deactivation of the main switch 122. The delay T can be controlled by the PWM controller circuit 106.

[0033] This is Figure 2A , 2B And the timing diagram for 2C is shown. Figure 2A As shown, during the first time period 206, gate 144 is in a high state and main switch 122 is on. At the end of the first time period 206, main switch 122 is off, and the voltage (Vg1) at gate 144 goes low. PWM controller circuit 106 can provide a delay time T_delay 202. The gate voltage (Vga) at gate 146 can go high, thereby turning on clamp switch 120. The delay time T_delay can be controlled to not exceed time period TS 204, where TS is the time required for current iLk to charge storage capacitor 108. The relationship between T_delay and TS can be expressed as T_delay ≤ T_s. Figure 2B The drain-source voltage (Vds) of the main switch 122 is shown. As can be seen, during time period 214, embodiments of this disclosure can eliminate voltage spikes on Vds and eliminate ringing and / or oscillation of Vds. Figure 2C The leakage inductance current iLk varies with time. As can be seen, the leakage inductance current iLk increases during the first time period 206 (flowing clockwise) and reverses direction (flowing counterclockwise) during the second time period 208.

[0034] After the main switch 122 is opened, the clamping switch 120 may not be immediately turned on, but may be turned on after a delay T. The on-time of the clamping switch 120 is represented by the duration (Tc) 210. To reduce oscillations caused by the release of leakage inductance current, the delay T can be set to be less than or equal to the time period Ts (the time required for the current iLk to charge the storage capacitor 108), i.e., T delay ≤ Ts. During the second time period 208, the clamping switch 120 may be on, and the energy stored in the storage capacitor 108 can be transferred to the secondary winding 130 through the resonance formed by the capacitance of the storage capacitor 108 and the leakage inductance Lk of the transformer.

[0035] Figure 2D The leakage inductance current iLk varies with time for various turn-on delay times of clamp switch 120. Waveform 224 shows iLk when T delay > Ts, compared to waveform 226 when T delay ≤ Ts. As can be seen, by setting T delay ≤ Ts, embodiments of this disclosure can eliminate high-frequency oscillations, such as the oscillation shown at 228. By turning on clamp switch 120 during the charging of storage capacitor 108, i.e., T delay ≤ Ts, high-frequency oscillations can be eliminated, thereby improving the electromagnetic compatibility (EMC) performance of the converter. The high-frequency oscillation at 228 may be caused by resonance formed by output capacitor 116 of clamp switch 120 and leakage inductance Lk. This resonance can be eliminated by timely disconnection of clamp switch 120.

[0036] In some embodiments, to reduce ringing and / or oscillation of the current during the absorption of leakage inductance energy into the storage capacitor 108 and the release of energy stored in the storage capacitor 108, the sum of the delay T and the on-time duration Tc 210 can be set to be equal to or slightly greater than the sum of the time Ts for absorbing leakage inductance energy and the resonant period TR, where the resonant period TR is the period during which the leakage inductance Lk and the capacitor Cs resonate. Therefore,

[0037]

[0038] Where Lk is the leakage inductance of transformer 134, Cs is the capacitance of storage capacitor 108, and Ts is the time required to absorb leakage inductance energy into storage capacitor 108. In some embodiments, the clamping switch 120 may be smaller than the main switch 122, meaning the on-resistance (Rdson) of the clamping switch 120 may be higher than that of the main switch 122. For example, for a 650V rated device, the Rdson of the clamping switch may be 3 to 5 ohms, while for a 650V rated device, the Rdson of the main switch may be 0.150 ohms. However, other suitable on-resistance and voltage ratings may be used. In various embodiments, the clamping switch may be a silicon MOSFET or a gallium nitride (GaN) based switch. In some embodiments, the GaN-based clamping switch may be integrated into the same die as the main switch. In various embodiments, the GaN-based clamping switch may allow improved reverse recovery characteristics compared to those of silicon MOSFETs.

[0039] Figure 2E The waveform 230 shows the leakage inductance current iLk as a function of time for various turn-on delay times of the clamping switch 120. Waveform 230 shows iLk when the clamping switch 120 is turned off prematurely. It can be seen that the leakage inductance current may exhibit high-frequency oscillations at 234, which could be caused by resonance between the output capacitor 116 of the clamping switch 120 and the leakage inductance Lk. Waveform 232 shows iLk when the turn-on time Tc satisfies equation (1) according to an embodiment of this disclosure, thereby eliminating high-frequency oscillations and improving the EMC performance of the converter.

[0040] like Figure 1 As shown, damping resistor 112 can be used in the path of leakage inductance current iLk to reduce oscillation peaks during the charging and discharging of storage capacitor 108. By reducing current oscillation peaks on the primary side, the current stress on the output rectifier diode on the secondary side can also be reduced. To determine the value of the resistance Rdamped of damping resistor 112, the current generated during the absorption and release of leakage inductance energy can be critically damped or over-damped. Critically damped or over-damped conditions can suppress oscillation peaks and can set boundary values ​​for the value of the damping resistor. The value of the resistance Rdamped of the damping resistor can be expressed as:

[0041]

[0042] Where Lk is the leakage inductance, and Cs is the capacitance of storage capacitor 108.

[0043] Figure 2FA comparison is shown with the addition of a damping resistor 112R to the secondary-side output current 149. Waveform 222 shows that, compared to waveform 220 without the damping resistor 112 in circuit 100, the output current 149 can reach a peak value at a relatively low level when the damping resistor 112 is implemented in circuit 100.

[0044] Figure 3 A flyback DC-DC converter circuit 300 according to an embodiment of the present disclosure is shown, which is similar to circuit 100 and includes the addition of diode 302. In circuit 300, diode 302 is added between nodes 304 and 306, i.e., diode 302 can be connected in parallel with clamping switch 120. The body diode 118 of the clamping switch may have a relatively high voltage drop during conduction, so some power loss may occur when the leakage inductance current iLk flows through the body diode 118 to the storage capacitor 108, which may reduce the efficiency of the converter. Diode 302 can be connected in parallel with the clamping switch to provide a low-dropout path for the leakage inductance current iLk, thus reducing power loss during the clockwise conduction of the leakage inductance current iLk.

[0045] Figure 4 A flyback DC-DC converter circuit 400 according to an embodiment of the present disclosure is shown, similar to circuit 100, wherein a damping resistor 112 is placed between the cathode of diode 302 and clamping switch 120. In circuit 400, the damping resistor 112 may be connected between nodes 404 and 406. In this embodiment, during the absorption of leakage inductance energy through storage capacitor 108, current iLk does not flow through damping resistor 112 because it flows through diode 302. This can reduce power loss and improve converter efficiency. Therefore, circuit 400 can provide improved efficiency for the converter.

[0046] Figure 5 A flyback DC-DC converter circuit 500 according to an embodiment of the present disclosure is shown, which is similar to circuit 300, wherein a blocking diode 502 is added. In circuit 500, the blocking diode 502 is added between nodes 504 and 506. The connection direction of the blocking diode 502 is opposite to that of diode 302. The addition of the blocking diode 502 can eliminate the reverse recovery current of the clamping switch 120, wherein the timing of absorbing and releasing leakage inductance energy through the clamping switch 120 is improved. This embodiment can be used when a silicon MOSFET is used for the clamping switch 120, because silicon MOSFETs can have relatively long reverse recovery characteristics.

[0047] Figure 6A flyback DC-DC converter circuit 600 according to an embodiment of the present disclosure is shown, similar to circuit 500, wherein a damping resistor 112 has been connected between nodes 602 and 604. By connecting the damping resistor 112 between nodes 602 and 604, during the absorption of leakage inductance energy through the storage capacitor 108, the current iLk does not flow through the damping resistor 112, as it flows through the diode 302. This reduces power loss and improves converter efficiency. Therefore, circuit 600 can provide improved efficiency for the converter.

[0048] In some embodiments, combinations of the circuits and methods disclosed herein can be used to absorb and release leakage inductance energy from a transformer and reduce the impact of leakage inductance energy on internal nodes of the power converter, such as oscillations, ringing, and voltage spikes. While the circuits and methods described and illustrated herein are specific to one configuration of a flyback DC-DC converter, embodiments of this disclosure are applicable to reducing the impact of transformer leakage inductance energy in other power converter configurations, such as, but not limited to, active clamp forward converters and push-pull converters.

[0049] In the foregoing description, embodiments of this disclosure have been described with reference to numerous specific details that may vary with particular implementation. Therefore, the description and drawings are to be considered illustrative rather than restrictive. The unique and exclusive reference to the scope of this disclosure, and what the applicant intends to be the scope of this disclosure, is the literal and equivalent scope of the set of claims published in this application, including any subsequent amendments in the specific form of such claims. Specific details of particular embodiments may be combined in any suitable manner without departing from the spirit and scope of the embodiments of this disclosure.

[0050] Additionally, spatially relative terms such as “bottom” or “top” may be used to describe the relationship of an element and / or feature to another element and / or feature, for example, as shown in the figures. It will be understood that, in addition to the orientation depicted in the figures, spatially relative terms are intended to cover different orientations of the device in use and / or operation. For example, if the device in the figures is flipped, an element described as the “bottom” surface may be oriented “above” other elements or features. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations) and the spatially relative descriptors used herein shall be interpreted accordingly.

[0051] As used herein, the terms “and,” “or,” and “and / or” can have a variety of meanings, which are expected to depend at least in part on the context in which such terms are used. Generally, when used in relation to a list such as A, B, or C, “or” is intended to mean A, B, and C, used herein in an inclusive sense; and A, B, or C, used herein in an exclusive sense. Additionally, the term “one or more” as used herein can be used to describe any feature, structure, or characteristic in the singular, or to describe a combination of features, structures, or characteristics. However, it should be noted that this is merely an illustrative example, and the claimed subject matter is not limited to this example. Furthermore, when used in relation to a list such as A, B, or C, the term “at least one of…” can be interpreted as meaning any combination of A, B, and / or C, such as A, B, C, AB, AC, BC, AA, AAB, ABC, AABBCCC, etc.

[0052] Throughout this specification, references to “an example,” “an instance,” “some instances,” or “exemplary embodiments” mean that a particular feature, structure, or characteristic described in connection with a feature and / or instance may be included in at least one feature and / or instance of the claimed subject matter. Therefore, the appearance of the phrases “in an example,” “an instance,” “in some instances,” or “in some embodiments,” or other similar phrases throughout this specification does not necessarily refer to the same feature, instance, and / or limitation. Furthermore, a particular feature, structure, or characteristic may be combined in one or more instances and / or features.

[0053] In the foregoing detailed description, numerous specific details have been set forth to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods and apparatus known to those of ordinary skill have not been described in detail to avoid obscuring the claimed subject matter. Therefore, it is intended that the claimed subject matter be limited to the specific examples disclosed, but rather that it may also include all aspects falling within the scope of the appended claims and their equivalents.

Claims

1. A circuit comprising: A flyback DC-DC converter, comprising: A transformer having a primary winding and a secondary winding, the primary winding extending from a first terminal to a second terminal; A first switch has a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal being coupled to the first terminal of the primary winding; A second switch has a second gate terminal, a second source terminal, and a second drain terminal, the second source terminal being coupled to the first terminal of the primary winding; and A capacitor coupled between the second drain terminal and the second terminal of the primary winding; The second switch is arranged to switch between an on state and an off state such that the sum of the first time period and the second time period equals the sum of the third time period and the fourth time period. in: The first time period is the delay period from the time the first switch is turned off to the time the second switch is turned on; The second time period is the period during which the second switch is in the ON position; The third time period is the resonant time period of the resonator, which is formed by the leakage inductance of the transformer and the capacitance of the capacitor; and The fourth time period is the time period during which the leakage inductance energy of the transformer is transferred to the capacitor.

2. The circuit of claim 1, further comprising a resistor coupled between the capacitor and the second drain terminal.

3. The circuit according to claim 2, wherein the resistance of the resistor is equal to or greater than twice the square root of the ratio of the leakage inductance to the capacitance of the capacitor.

4. The circuit of claim 1, further comprising a diode having an anode and a cathode, the anode being coupled to the second source terminal and the cathode being coupled to the second drain terminal.

5. The circuit of claim 1, wherein the first switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).

6. The circuit of claim 1, wherein the first switch is a gallium nitride (GaN) based transistor.

7. The circuit of claim 6, wherein the second switch is a GaN-based transistor, and wherein the first switch and the second switch are integrated on a single GaN-based die.

8. A method for controlling a circuit, the method comprising: A flyback DC-DC converter is provided, the flyback DC-DC converter comprising: A transformer having a primary winding and a secondary winding, the primary winding extending from a first terminal to a second terminal; A first switch has a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal being coupled to the first terminal of the primary winding; A second switch has a second gate terminal, a second source terminal, and a second drain terminal, the second source terminal being coupled to the first terminal of the primary winding; and A capacitor coupled between the second drain terminal and the second terminal of the primary winding; as well as Control the operation of the second switch so that the sum of the first and second time periods equals the sum of the third and fourth time periods. in: The first time period is the delay period from the time the first switch is turned off to the time the second switch is turned on; The second time period is the period during which the second switch is in the ON position; The third time period is the resonant time period of the resonator, which is formed by the leakage inductance of the transformer and the capacitance of the capacitor; and The fourth time period is the time period during which the leakage inductance energy of the transformer is transferred to the capacitor.

9. The method of claim 8, further comprising providing a resistor coupled between the capacitor and the second drain terminal.

10. The method of claim 9, wherein the resistance of the resistor is equal to or greater than twice the square root of the ratio of the leakage inductance to the capacitance of the capacitor.

11. The method of claim 9, further comprising providing a diode having an anode and a cathode, the anode being coupled to the second source terminal and the cathode being coupled to the second drain terminal.

12. The method of claim 8, wherein the first switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).

13. The method of claim 8, wherein the first switch is a gallium nitride (GaN) based transistor.

14. The method of claim 8, wherein the second switch is a GaN-based transistor, and wherein the first switch and the second switch are integrated on a single GaN-based die.

15. A method for controlling a circuit, the method comprising: A flyback DC-DC converter is provided, the flyback DC-DC converter comprising: A transformer having a primary winding and a secondary winding, the primary winding extending from a first terminal to a second terminal; A first switch has a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal being coupled to the first terminal of the primary winding; A second switch has a second gate terminal, a second source terminal, and a second drain terminal, the second source terminal being coupled to the first terminal of the primary winding; and A capacitor coupled between the second drain terminal and the second terminal of the primary winding; as well as The operation of the second switch is controlled such that the sum of the first and second time periods is equal to or greater than the sum of the third and fourth time periods. in: The first time period is the delay period from the time the first switch is turned off to the time the second switch is turned on; The second time period is the period during which the second switch is in the ON position; The third time period is the resonant time period of the resonator, which is formed by the leakage inductance of the transformer and the capacitance of the capacitor; and The fourth time period is the time period during which the leakage inductance energy of the transformer is transferred to the capacitor.

16. The method of claim 15, further comprising providing a resistor coupled between the capacitor and the second drain terminal.

17. The method of claim 16, wherein the resistance of the resistor is equal to or greater than twice the square root of the ratio of the leakage inductance to the capacitance of the capacitor.

18. The method of claim 16, further comprising providing a diode having an anode and a cathode, the anode being coupled to the second source terminal and the cathode being coupled to the second drain terminal.

19. The method of claim 15, wherein the first switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).

20. The method of claim 15, wherein the second switch is a GaN-based transistor, and wherein the first switch and the second switch are integrated on a single GaN-based die.

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