Inductive device

Abstract

An inductance device includes a first inductance, a second inductance, and at least one switching circuit. The second inductance is used to enclose the first inductance and uses the topmost metal layer to shield the first inductance from external interference. The at least one switching circuit is coupled to the second inductance and is used to receive at least one control voltage, wherein the at least one control voltage is used to adjust the on degree of the at least one switching circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to inductance design, and more particularly to an inductance device capable of resisting external interference and adjusting inductance value and quality factor (Q) of inductance. BACKGROUND

[0002] Generally speaking, in the prior art, an inductance device has a main inductance and a secondary inductance, and a switch circuit is connected in series with the secondary inductance. The secondary inductance is disposed on a pattern ground shield of the main inductance. The characteristics of the secondary inductance are adjusted by adjusting the on-off degree of the switch circuit through adjusting the voltage of the switch circuit. The inductance value and the quality factor of the main inductance are adjusted through mutual induction. However, the inductance device cannot resist external interference (e.g. magnetic field interference and signal coupling).

[0003] On the other hand, in the prior art, an inductance device capable of resisting external interference has a floating closed loop surrounded by the uppermost metal, such as the redistribution layer (RDL) metal, around the inductance. The closed loop can resist external interference due to the law of Lenz. However, the inductance value and the quality factor of the inductance cannot be adjusted, which greatly reduces the degree of freedom of circuit design. Therefore, there is a need for an inductance device capable of resisting external interference and adjusting the inductance value and the quality factor of inductance, so as to increase the degree of freedom of circuit design and improve the problem of being unable to resist external interference. SUMMARY

[0004] Therefore, an object of the present application is to provide an inductance device capable of resisting external interference and adjusting the inductance value and the quality factor of inductance, so as to solve the above problems.

[0005] At least one embodiment of the present application provides an inductance device, which can include a first inductance, a second inductance, and at least one switch circuit. The second inductance is used to wrap the first inductance therein, and the uppermost metal is used to resist external interference for the first inductance. The at least one switch circuit is coupled to the second inductance and is used to receive at least one control voltage, wherein the at least one control voltage is used to adjust the on-off degree of the at least one switch circuit.

[0006] One of the advantages of the present application is that the first inductor is protected from external interference because the second inductor is formed using the top metal layer. In addition, the inductance value and quality factor of the first inductor can be adjusted by adjusting the conduction degree of the at least one switching circuit, and the anti-interference ability of the inductance device can be improved, which greatly increases the degree of freedom of circuit design. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 A schematic diagram of an inductance device according to an embodiment of the present application.

[0008] Figure 2 A schematic diagram of an inductance device according to another embodiment of the present application.

[0009] Figure 3 A schematic diagram of an inductance device according to still another embodiment of the present application.

[0010] Figure 4 A schematic diagram of an inductance device according to an embodiment of the present application, in which the conduction degree is adaptively adjusted using the inductive voltage provided by a power detector.

[0011] Figure 5 A schematic diagram of a transceiver system using the inductance device shown in Figure 1 .

[0012] Figure 6 A schematic diagram of a transceiver system using the inductance device shown in Figure 4 . DETAILED DESCRIPTION

[0013] Figure 1 A schematic diagram of an inductance device 100 according to an embodiment of the present application. As shown in Figure 1 , the inductance device 100 includes a main inductor 10, a secondary inductor 12, and an N-type metal-oxide-semiconductor field-effect transistor (MOSFET; referred to as a transistor for simplicity) 14, in which the N-type transistor 14 is used as a switching circuit of the inductance device 100. In practice, the switching circuit can be replaced by other types of switching circuits (such as a P-type transistor), and the use of the N-type transistor is only for illustration, and the present application is not limited thereto. In addition, the switching circuit is not limited to being coupled to the secondary inductor 12 in a single manner, and the switching circuit can be coupled to the secondary inductor 12 in a multiple-parallel-to-ground manner, which also achieves the effect of the present application.

[0014] In Figure 1In the inductor 10, the main inductor can be any number of turns (i.e., single or multiple turns) or any width. Figure 1 Taking a single-turn circuit as an example, the secondary inductor 12 encloses the primary inductor 10, and uses an uppermost metal layer, such as a redistribution layer metal, to resist external interference (e.g., magnetic field interference, signal coupling) to the primary inductor 10. Whether the secondary inductor 12 is floating or grounded does not affect its effectiveness in resisting external interference to the primary inductor 10. Furthermore, the secondary inductor 12 can be of any width and any number of layers (i.e., single-layer or multi-layer). Figure 1 Taking a single layer as an example, it should be noted that the distance between the traces of the main inductor 10 and the secondary inductor 12 can be arbitrary, and whether there is a patterned grounding protective layer under the main inductor 10 and the secondary inductor 12 does not affect the effect of the present invention.

[0015] exist Figure 1 In this embodiment, the N-type transistor 14 is coupled to the secondary inductor 12 and receives a control voltage Vctrl at its gate. The control voltage Vctrl is used to adjust the conduction level of the N-type transistor 14. In some embodiments, the N-type transistor 14 may also have a power detector coupled to its gate to detect an induced voltage, thereby adaptively controlling and adjusting the conduction level of the N-type transistor 14. However, this invention is not limited thereto. Furthermore, the degree to which the secondary inductor 12 resists external interference from the primary inductor 10, as well as the inductance value and quality factor of the primary inductor 10, can be adjusted according to the conduction level of the N-type transistor 14. Two cases (Situation 1 and Situation 2) are described below.

[0016] In scenario 1, when the inductor device 100 does not require external interference to resist the main inductor 10 or to adjust the inductance value and quality factor of the main inductor 10 (i.e., the main inductor 10 is operated as a general inductor), the control voltage Vctrl is set to 0V (or a voltage value less than the critical voltage). Since the control voltage Vctrl is less than the critical voltage of the N-type transistor 14 (approximately equal to 0.45V), the N-type transistor 14 will not conduct and the secondary inductor 12 will not form a circuit. At this time, the secondary inductor 12 is like a dummy inductor and will not affect the inductance value and quality factor of the main inductor 10. In other words, when the N-type transistor 14 is not conducting, although the main inductor 10 is surrounded by a secondary inductor 12, it does not affect the operation of the main inductor 10 except for increasing the layout area in the manufacturing process.

[0017] On the other hand, in situation 2, when the inductor 100 needs to protect the main inductor 10 from external interference, the inductor 100 sets the control voltage Vctrl to be greater than the critical voltage of the N-type transistor 14 (approximately equal to 0.45V) to turn on the N-type transistor 14. At this time, the secondary inductor 12 will form a closed loop to protect the main inductor 10 from external interference. Furthermore, the higher the control voltage Vctrl, the more the N-type transistor 14 conducts; that is, the smaller the equivalent resistance of the N-type transistor 14. Due to Lenz's law, the loop current of the secondary inductor 12 will also be larger. The greater the degree to which the main inductor 10 within the inductor 12 is unaffected by external interference, the more effective the inductor device 100 becomes. Furthermore, when the inductor device 100 needs to adjust the inductance value and quality factor of the main inductor 10, it adjusts the control voltage Vctrl. The larger the control voltage Vctrl, the smaller the inductance value and quality factor of the main inductor 10, and the lower the gain of the matching circuit of the inductor device 100. Therefore, the inductor device 100 can achieve the effect of adjusting the impedance of the matching circuit or reducing its gain, greatly increasing the freedom of circuit design.

[0018] Figure 2 This is a schematic diagram of an inductor device 200 according to another embodiment of the present invention. Figure 2 As shown, the inductor device 200 includes a main inductor 20, a secondary inductor 22, and an N-type transistor 24. The secondary inductor 22 encloses the main inductor 20 and uses an uppermost metal layer, such as a redistribution layer metal, to protect the main inductor 20 from external interference (e.g., magnetic field interference, signal coupling). The N-type transistor 24 is coupled to the secondary inductor 22 and receives a control voltage Vctrl to adjust the conduction level of the N-type transistor 24. The inductor device 200 and... Figure 1 The difference between the inductor device 100 shown is that the secondary inductor 22 has two layers ( Figure 1 Even if the secondary inductor 22 is multi-layered, the inductor device 200 can still resist external interference for the main inductor 20 or adjust the inductance value and quality factor of the main inductor 20 according to the conduction degree of the N-type transistor 24. For the sake of brevity, similar contents described in the above embodiments will not be described in detail again here.

[0019] Figure 3 This is a schematic diagram of an inductor device 300 according to another embodiment of the present invention. Figure 3As shown, the inductor device 300 comprises a main inductor 30, a sub inductor 32, and two N-type transistors 34 and 36, wherein the sub inductor 32 is used to enclose the main inductor 30, and the uppermost metal such as the heavy wiring layer metal is used to shield the main inductor 30 from external interference (e.g. magnetic field interference, signal coupling), and the N-type transistors 34 and 36 are coupled to the sub inductor 32 in a manner of being connected in parallel to ground, and are respectively used to receive two control voltages Vctrl1 and Vctrl2 to adjust the conduction degree of the N-type transistors 34 and 36. The inductor device 300 and Figure 1 The difference between the inductor device 100 and the inductor device 300 is that the inductor device 300 has multiple control circuits (i.e. the N-type transistors 34 and 36), even if the number of control circuits coupled to the sub inductor 32 of the inductor device 300 is multiple, the inductor device 300 can shield the main inductor 30 from external interference or adjust the inductance value and the quality factor of the main inductor 30 according to the conduction degree of the multiple control circuits, for the sake of brevity, similar contents described in the above embodiments will not be described in detail herein.

[0020] Figure 4 A schematic diagram of an inductor device 400 according to an embodiment of the present application for adaptively adjusting the conduction degree using the sensing voltage provided by the power detector. As shown, Figure 4 The inductor device 400 comprises a main inductor 40, a sub inductor 42, an N-type transistor 44, and a power detector 46, wherein the sub inductor 42 is used to enclose the main inductor 40, and the uppermost metal such as the heavy wiring layer metal is used to shield the main inductor 40 from external interference (e.g. magnetic field interference, signal coupling), and the N-type transistor 44 is coupled to the sub inductor 42, and is used to receive a sensing voltage Vsense provided by the power detector 46 as a gate voltage to adjust the conduction degree of the N-type transistor 44, wherein the sensing voltage Vsense can be sensed according to the voltage at any place in the matching circuit using the inductor device 400 according to design requirements, without the need for a voltage generating circuit such as a voltage stabilizing circuit to generate and input an additional voltage (e.g. the control voltage Vctrl) to the gate of the N-type transistor 44, thereby greatly improving the convenience of circuit design, and thus the inductor device 400 can shield the main inductor 40 from external interference or adjust the inductance value and the quality factor of the main inductor 40 according to the conduction degree of the N-type transistor 44, for the sake of brevity, similar contents described in the above embodiments will not be described in detail herein. Figure 1

[0021] Figure 5 A schematic diagram of a transceiver system 500 using the inductor device 100 shown in Figure 1 As shown, the inductor device 100 comprises a main inductor 10, a sub inductor 12, and an N-type transistor 14, wherein the sub inductor 12 is used to enclose the main inductor 10, and the uppermost metal such as the heavy wiring layer metal is used to shield the main inductor 10 from external interference (e.g. magnetic field interference, signal coupling), and the N-type transistor 14 is coupled to the sub inductor 12, and is used to receive a control voltage Vctrl to adjust the conduction degree of the N-type transistor 14.​Figure 5 As shown, the transceiver system 500 is configured to receive a radio frequency (RF) input signal RF IN, and includes a transmitting end 58 and a receiving end 59. The transmitting end 58 includes a balun 55 and a power amplifier (PA; for simplicity, labeled as "PA") 56, and the receiving end 59 includes a low noise amplifier (LNA; for simplicity, labeled as "LNA") 57 and an inductive device 501. The inductive device 501 includes a main inductor 50, a sub inductor 52, and an N-type transistor 54, and can be implemented by the inductive device 100. For simplicity, similar contents about the inductive device 501 will not be described in detail herein. Due to the limitation of layout size, the balun 55 in the transmitting end 58 can be close to the main inductor 50 in the receiving end 59, and thus an interference signal COUPLE TX TO RX can be coupled from the balun 55 in the transmitting end 58 to the receiving end 59, which makes the signal received by the receiving end 59 too large. To solve this problem, the transceiver system 500 can use the inductive device 501 disclosed herein to replace the general inductor in the receiving end 59. The high gain mode and the low gain mode of the receiving end 59 of the transceiver system 500 will be described below.

[0022] In the high gain mode of the receiving end 59, since the RF input signal RF IN is small, the interference signal COUPLE TX TO RX coupled from the balun 55 in the transmitting end 58 to the receiving end 59 can be ignored. Therefore, the control voltage Vctrl received by the gate of the N-type transistor 54 can be set to a voltage (e.g., 0V) less than the threshold voltage of the N-type transistor 54, so that the N-type transistor 54 is not turned on and the sub inductor 52 does not form a loop. At this time, the sub inductor 52 is like a virtual inductor, and does not affect the inductance value and the quality factor of the main inductor 50. Thus, the inductance value and the quality factor (i.e., high inductance value and high quality factor) of the main inductor 50 required in the high gain mode can be maintained.

[0023] In the low-gain mode of the receiver 59, due to the large RF input signal RF_IN, the transceiver system 500 must reduce the gain of the low-noise amplifier 57. Furthermore, the interference signal COUPLE_TX_TO_RX coupled from the switch 55 in the transmitter 58 to the receiver 59 will severely affect the characteristics of the transceiver system 500. In this case, the control voltage Vctrl received by the gate of the N-type transistor 54 can be set to a voltage (e.g., 1V) greater than the critical voltage of the N-type transistor 54. This allows the N-type transistor 54 to conduct and the secondary inductor 52 to form a closed loop to resist external interference (i.e., interference signal COUPLE_TX_TO_RX) for the primary inductor 50. It should be noted that when the control voltage Vctrl is set higher, the secondary inductor 52 will be more capable of resisting external interference for the primary inductor 50. However, when the control voltage Vctrl is set higher, the inductance value and quality factor of the primary inductor 50 will be lower. Therefore, the gain of the low-noise amplifier 57 can be reduced.

[0024] Figure 6 According to an embodiment of the present invention, the receiving end utilizes... Figure 4 A schematic diagram of the transceiver system 600 of the inductor device 400 is shown. Figure 6 As shown, the transceiver system 600 is used to receive an RF input signal RF_IN and includes a transmitter 69 and a receiver 70. The transmitter 69 includes a transducer 66 and a power amplifier (labeled "PA" for simplicity) 67, and the receiver 70 includes a low-noise amplifier (labeled "LNA" for simplicity) 68 and an inductor 601. The inductor 601 includes a main inductor 60, a secondary inductor 62, an N-type transistor 64, and a power detector 65, and can be implemented using the inductor 400. For simplicity, similar details about the inductor 601 will not be described again here. Note that one end of the power detector 65 is coupled to the gate of the N-type transistor 64, and the other end is coupled to any node in the transmitter 69. It generates and provides an induced voltage V by detecting the voltage of any node in the transmitter 69. A To the gate of the N-type transistor 64, so as to adjust according to the induced voltage V A This automatically adjusts the conduction level of the N-type transistor 64.

[0025] In this embodiment, when the RF input signal RF IN is too large, due to the limitation of the layout size, the balun 66 in the transmitting end 69 can be too close to the main inductor 60 in the receiving end 70, and thus a coupling signal COUPLE TX TO RX from the balun 66 in the transmitting end 69 to the receiving end 70 can cause the signal received by the receiving end 70 to be too large, which can cause some non-linear problems. To solve the above problems, the transceiver system 600 can use the inductive device 601 disclosed in the present application to replace the general inductor in the receiving end 70. The following will use the high gain mode and the low gain mode of the receiving end 70 of the transceiver system 600 to illustrate.

[0026] In the high gain mode of the receiving end 70, since the RF input signal RF IN is small, the power detector 65 detects that the voltage of any node in the transmitting end 69 is also small, and thus the induced voltage V A will also be small (for example, less than the threshold voltage of the N-type transistor 64), so that the N-type transistor 64 is not turned on and the secondary inductor 62 does not form a loop. At this time, the secondary inductor 62 is like a virtual inductor and does not affect the inductance value and the quality factor of the main inductor 60, thereby maintaining the inductance value and the quality factor (i.e., high inductance value and high quality factor) of the main inductor 60 required in the high gain mode.

[0027] In the low gain mode of the receiving end 70, since the RF input signal RF IN is large, the transceiver system 600 must reduce the gain of the low noise amplifier 68, and the coupling signal COUPLE TX TO RX from the balun 66 in the transmitting end 69 to the receiving end 70 can seriously affect the characteristics of the transceiver system 600. At this time, the induced voltage V A will rise with the RF input signal RF IN (greater than the threshold voltage of the N-type transistor 64), so that the N-type transistor 64 is turned on and the secondary inductor 62 forms a closed loop to resist external interference (i.e., the coupling signal COUPLE TX TO RX) for the main inductor 60. In addition, it should be noted that the induced voltage V A will be larger and the N-type transistor 64 will be more turned on as the RF input signal RF IN is larger, and the ability of the secondary inductor 62 to resist external interference for the main inductor 60 will be stronger. However, the inductance value and the quality factor of the main inductor 60 will be lower, so that the gain of the low noise amplifier 68 can be reduced.

[0028] In summary, compared with the transceiver system 500 shown in Figure 5 , the transceiver system 600 shown in Figure 6 can detect the induced voltage V A by the power detector 65, and according to the induced voltage V AThe N-type transistor 64 is automatically adjusted to determine whether the main inductor 60 is disturbed or the inductance and quality factor of the main inductor 60 are adjusted without setting an additional voltage (for example, a control voltage Vctrl) to control the N-type transistor 64 by a voltage generating circuit such as a voltage stabilizing circuit. Figure 5 The N-type transistor 64 is automatically adjusted to determine whether the main inductor 60 is disturbed or the inductance and quality factor of the main inductor 60 are adjusted without setting an additional voltage (for example, a control voltage Vctrl) to control the N-type transistor 64 by a voltage generating circuit such as a voltage stabilizing circuit.

[0029] The above description is only the preferred embodiment of the present application, and any equivalent changes and modifications made within the scope of the present application should be included in the scope of the present application.

[0030] SYMBOL DESCRIPTION

[0031] 100, 200, 300, 400, 501, 601: Inductor device

[0032] 10, 20, 30, 40, 50, 60: Main inductor

[0033] 12, 22, 32, 42, 52, 62: Sub inductor

[0034] 14, 24, 34, 36, 44, 54, 64: N-type transistor

[0035] 46, 65: Power detector

[0036] 500, 600: Transceiver system

[0037] 55, 66: Balun

[0038] 56, 67: Power amplifier

[0039] 57, 68: Low noise amplifier

[0040] 58, 69: Transmit end

[0041] 59, 70: Receive end

[0042] Vctrl, Vctrl1, Vctrl2: Control voltage

[0043] Vsense, V A : Induced voltage

[0044] RF_IN: Radio frequency input signal

[0045] COUPLE_TX_TO_RX: Disturbance signal

[0046] PA: Power amplifier

[0047] LNA: Low noise amplifier

Claims

1. An inductor device, comprising: First inductor; A second inductor, used to enclose the first inductor, and using an outermost metal layer to protect the first inductor from external interference; and At least one switching circuit is coupled to the second inductor and is used to receive at least one control voltage, wherein the at least one control voltage is used to adjust the conduction level of the at least one switching circuit. in, In response to turning on the at least one switching circuit, the magnitude of the at least one control voltage is adjusted to be greater than the threshold voltage of the at least one switching circuit, and the at least one control voltage is further regulated to adjust the quality factor or the inductance value of the first inductor.

2. The inductor device according to claim 1, wherein the first inductor has one or more turns.

3. The inductor device according to claim 1, wherein the second inductor has a single layer or multiple layers.

4. The inductor according to claim 1, wherein when the inductor does not need to resist external interference, the at least one switching circuit is de-conducted.

5. The inductor device according to claim 1, wherein when the inductor device needs to resist external interference or adjust an inductance value or a quality factor of the first inductor, the conduction degree of the at least one switching circuit is adjusted.

6. The inductor device according to claim 5, wherein the greater the conduction degree of the at least one switching circuit, the stronger the resistance of the second inductor to external interference.

7. The inductor device according to claim 5, wherein the greater the conduction degree of the at least one switching circuit, the smaller the inductance value and the quality factor of the first inductor.

8. The inductor device according to claim 1, further comprising: A power detector is coupled to the at least one switching circuit and is used to provide the at least one control voltage to the at least one switching circuit.

Images