Channel Equalization Method, Device and Storage Medium

Abstract

An embodiment of the present invention provides a channel equalization method, device, and storage medium, belonging to the field of communication technologies. The channel equalization method includes: receiving a signal sent by a sender; attempting to perform scrambling synchronization on the signal through a scrambling synchronization module, and determining whether a receiver can lock the scrambling according to a predetermined decision criterion; if the determination result is yes, performing time-domain equalization using a training sequence output by the scrambling synchronization module; if the determination result is no, first performing blind equalization on the signal to obtain a pre-equalized signal, and then performing scrambling synchronization on the pre-equalized signal to complete time-domain equalization. The method of the present invention is used in an environment with low signal-to-noise ratio and / or poor channels, and can avoid the situation where the receiver is deadlocked in the scrambling synchronization stage and fails to complete channel equalization.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a channel equalization method, device, and storage medium. Background Art

[0002] In the prior art, a time-domain equalizer is generally used to implement channel equalization at the physical layer in wired communication. Implementing channel equalization through a time-domain equalizer includes: first obtaining a training sequence through scrambling synchronization, and then using the training sequence to train the coefficients of the time-domain equalizer. During the scrambling synchronization process, the local scramble code output by the scramble code generator is compared with the received sequence, and when the consistency between the two meets the requirements, it is determined that the scramble synchronization is successful. However, in an environment with low signal-to-noise ratio and a severe channel, the success rate of scramble synchronization is very low, which will cause the entire receiver to be deadlocked in the scramble synchronization stage, thus unable to complete channel equalization. Summary of the Invention

[0003] An object of an embodiment of the present invention is to provide a method that, in a situation where scramble synchronization cannot be achieved due to a severe channel, first weakens the channel impact in a dual equalization mode and then performs time-domain equalization to increase the success rate of scramble synchronization, thereby achieving channel equalization.

[0004] To achieve the above object, an embodiment of the present invention provides a channel equalization method, including:

[0005] Receiving a signal sent by a sender;

[0006] Attempting to perform scramble synchronization on the signal through a scramble synchronization module, and determining whether the receiver can lock the scramble code according to a predetermined decision criterion;

[0007] If the determination result is yes, performing time-domain equalization using the training sequence output by the scramble synchronization module;

[0008] If the determination result is no, first performing blind equalization on the signal to obtain a pre-equalized signal, and then performing scramble synchronization on the pre-equalized signal to complete time-domain equalization.

[0009] Preferably, the first performing blind equalization on the signal to obtain a pre-equalized signal, and then performing scramble synchronization on the pre-equalized signal to complete time-domain equalization includes:

[0010] Performing blind equalization on the signal to obtain a pre-equalized signal; inputting the pre-equalized signal into the scramble synchronization module to obtain a scramble signal; calculating the time delay between the pre-equalized signal and the signal sent by the sender; and performing time-domain equalization according to the time delay and the scramble signal.

[0011] Preferably, the predetermined decision criterion is one of the following conditions: the time staying in scramble synchronization, the number of decisions.

[0012] Preferably, determining whether the receiver can lock the scrambling code according to the above judgment criterion includes: when the time staying in the scrambling code synchronization reaches a predetermined time threshold, or when the number of judgments reaches a predetermined number, the judgment result is no, otherwise the judgment result is yes.

[0013] Optionally, the blind equalization method is one of the following: Bussgang algorithm, constant modulus blind equalization CMA algorithm, subspace-based channel blind estimation algorithm.

[0014] Optionally, the signal form sent by the sender is a signal with a constant envelope characteristic.

[0015] Optionally, time domain equalization is performed through a DFE filter.

[0016] Optionally, calculating the time delay between the pre-equalized signal and the signal sent by the sender includes:

[0017] Obtain the pre-equalized signal with a fixed window length of N, denoted as Sig CMA (n);

[0018] Obtain the signal sent by the sender with a sliding window length of N, denoted as Sig Rx (n);

[0019] Calculate the correlation value between the Sig Rx (n) and the Sig CMA (n), denoted as V cor (p);

[0020] V cor (p) The p value corresponding to the maximum value is the required time delay.

[0021] Preferably, the correlation value is calculated by the following formula:

[0022]

[0023] In the formula, p is the sliding distance, and Sig Rx (p + n) is the signal obtained after Sig Rx (n) slides by a distance of p.

[0024] Optionally, calculating the time delay between the pre-equalized signal and the signal sent by the sender includes:

[0025] Obtain the pre-equalized signal with a fixed window length of N, denoted as Sig CMA (n);

[0026] Obtain the signal sent by the sender with a sliding window length of N, denoted as Sig Rx (n);

[0027] Calculate the number of values of the Sig Rx (n) that have the same polarity as the Sig CMA (n), and denote it as N count (p);

[0028] N count (p) value corresponding to the maximum p value is the time delay to be obtained.

[0029] Preferably, calculate the number of values through the following formula:

[0030]

[0031] In the formula, p is the sliding distance, and Sig Rx (p + n) is the signal obtained after Sig Rx (n) slides a distance of p.

[0032] Preferably, the time domain equalization according to the time delay and the scrambling signal includes: adding the time delay to the signal sent by the sender and inputting it together with the scrambling signal into a time domain equalization module for time domain equalization.

[0033] Preferably, receive the signal sent by the sender by wire.

[0034] On the other hand, the present invention provides a channel equalization device, which includes: a memory and a processor; the processor is configured to execute the channel equalization method of the present application.

[0035] On the other hand, the present invention provides a machine-readable storage medium, on which instructions are stored, and the instructions are used to cause a machine to execute the channel equalization method of the present application.

[0036] Through the above technical solutions, in the channel equalization stage, first adopt a single equalization mode to try to achieve scrambling synchronization and then perform time domain equalization. When the channel environment is poor and scrambling synchronization cannot be completed all the time, try to use a double equalization mode. First perform blind equalization to obtain a pre-equalized signal to weaken the influence of the channel, and then perform scrambling synchronization on the pre-equalized signal, and finally complete time domain equalization. Blind equalization can weaken the influence of the channel and increase the success rate of scrambling synchronization.

[0037] Other features and advantages of the embodiments of the present invention will be described in detail in the subsequent specific implementation part. Description of the Drawings

[0038] The accompanying drawings are used to provide a further understanding of the embodiments of the present invention, and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the embodiments of the present invention, but do not limit the embodiments of the present invention. In the accompanying drawings:

[0039] Figure 1 is a schematic diagram of time domain equalization by a time domain equalizer in the prior art;

[0040] Figure 2 is a flowchart of time domain equalization by a time domain equalizer in the prior art;

[0041] Figure 3 is a flowchart of an embodiment of the channel equalization method of the present invention;

[0042] Figure 4 is a flowchart of another embodiment of the channel equalization method of the present invention;

[0043] Figure 5 is Figure 4 a flowchart of the equalization process of the dual equalization mode in the embodiment of; and

[0044] Figure 6 is a flowchart of another embodiment of the channel equalization method of the present invention. Specific Embodiments

[0045] The following details the specific embodiments of the embodiments of the present invention with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining and illustrating the embodiments of the present invention, and do not limit the embodiments of the present invention.

[0046] In wired communication, a time domain equalizer is generally used to implement channel equalization at the physical layer. The time domain equalizer is an adaptive filter. As Figure 1 shown, the process of time domain equalization by a time domain equalizer in the prior art includes: first, switch to switch 1, and use the training sequence to train the coefficients of the adaptive filter so that the coefficients of the adaptive filter match the channel environment. Then, switch to switch 2. At this time, the training sequence is no longer needed, and the adaptive filter self-loops to adjust the coefficients.

[0047] The process of implementing channel equalization through a time domain equalizer is as Figure 2 shown: First, obtain the training sequence through scrambling synchronization, and then use the training sequence to train the coefficients of the time domain equalizer. During the scrambling synchronization process, the local scrambling code output by the scrambling generator is compared with the received sequence. When the consistency of the two meets the requirements, it is determined that the scrambling synchronization is successful. However, in an environment with low signal-to-noise ratio and poor channels, the success rate of scrambling synchronization is very low, which will cause the entire receiver to deadlock at the scrambling synchronization stage, thus unable to complete channel equalization.

[0048] When it is uncertain whether the channel is interfered, the channel equalization method of the present invention can be adopted. First, conventional channel equalization is performed. When it is determined that the scrambling synchronization cannot be locked, that is, when the channel is interfered, a dual equalization mode is adopted for time-domain equalization. The flowchart of an embodiment of the present invention is as Figure 3 shown. Specifically, the implementation steps of this embodiment include:

[0049] Step 1: Receive the signal sent by the sender;

[0050] In this embodiment, wired communication is carried out between the sender and the receiver, and the signal sent by the sender is a PAM3 or PAM2 signal;

[0051] In some embodiments, those skilled in the art can select other forms of signals according to actual needs. The blind equalization in the present invention is based on the known statistical characteristics of the transmitted signal. For example, the value range of the PAM3 signal is (-1, 0, 1), and the value range of the PAM2 signal is (-1, 1), and the signal amplitude envelope is 1. Or like QPSK and QAM signals, their constellations are symmetric. When the probabilities of different constellation points appearing are the same, the statistical characteristics of the signals can also be used to complete the blind equalization algorithm. Therefore, the present invention is not limited to the above signal forms, and any signal form with statistical characteristics can be applicable.

[0052] Step 2: Try to perform scrambling synchronization on the received signal through the scrambling synchronization module;

[0053] In this embodiment, the received PAM2 / PAM3 signal is used to initialize the phase of the scrambler generator. After the initialization is completed, the scrambler generator generates its own local scrambling code, maps the local scrambling code to the local PAM2 / PAM3 signal, and then determines whether the scrambling synchronization is successful by comparing the received PAM2 / PAM3 signal with the local PAM2 / PAM3 signal.

[0054] In some embodiments, the received signal can be any real or complex signal, as long as the mapping relationship between the scrambling code and the signal symbol is agreed.

[0055] Step 3: According to the predetermined decision criterion, determine whether the receiver locks the scrambling code. If the judgment result is yes, perform time-domain equalization using the training sequence output by the scrambling synchronization module. If the judgment result is no, then execute Step 4;

[0056] In this embodiment, the predetermined decision criterion is as follows: when the time staying in scrambling synchronization reaches a predetermined time threshold, or when the number of decisions reaches a predetermined number, it is determined that the receiver may be locked in the scrambling synchronization stage. Among them, the predetermined time threshold and the predetermined number can be set according to empirical values or the actual situation of the current communication. For example, it can be set that when the number of equalization times is greater than 20 and the time-domain equalizer still does not converge, it is considered that the receiver may be locked in the scrambling synchronization stage in the current communication environment.

[0057] In some embodiments, the decision criterion can be set according to actual needs, and the present invention is not limited to the above decision criterion.

[0058] Step 4: First perform blind equalization on the signal received in Step 1 to obtain a pre-equalized signal, and then perform scrambling synchronization on the pre-equalized signal to complete time-domain equalization.

[0059] In this embodiment, the purpose of Step 4 is to perform time-domain equalization through a dual equalization mode. Specifically, first weaken the influence of the channel through blind equalization to increase the success rate of scrambling synchronization, and then perform scrambling synchronization on the pre-equalized signal that weakens the channel interference to complete time-domain equalization. The above "dual equalization mode" is a concept proposed in this application to distinguish from the time-domain equalization method of the prior art, and at the same time, the time-domain equalization method of the prior art is called "single equalization mode" in this application.

[0060] In this embodiment, first, perform time-domain equalization according to the single equalization mode of the prior art as shown in Figure 1 and 2 and, in the case of determining that the scrambling code cannot be locked through the single equalization mode, that is to say, in the case of determining that the time-domain equalization cannot be completed through Steps 1-3, adopt the dual equalization mode of Step 4, first perform blind equalization on the signal received in Step 1 to obtain a pre-equalized signal, and then perform scrambling synchronization on the pre-equalized signal to complete time-domain equalization. Specifically, in combination with Figure 3 and Figure 4 , where the single equalization mode corresponds to the process executed when the result of determining whether the scrambling code can be locked is "yes"; the dual equalization mode corresponds to the process executed when the result of determining whether the scrambling code can be locked is "no".

[0061] Compared with the prior art, the technical advantage of this embodiment is that when the channel environment is poor and the scrambling synchronization cannot be completed all the time, first perform blind equalization to obtain a pre-equalized signal to weaken the influence of the channel, and then perform scrambling synchronization on the pre-equalized signal to finally complete time-domain equalization.

[0062] Based on the above embodiment, another embodiment of the present invention is as follows Figure 4As shown, the implementation method of the dual equilibrium mode is described. In this embodiment, steps 1-3 are the same as those in the previous embodiment and will not be elaborated here.

[0063] Its implementation steps are as follows:

[0064] Step 1: Receive the signal sent by the sender;

[0065] Step 2: Try to perform scrambling synchronization on the received signal through the scrambling synchronization module;

[0066] Step 3: According to the predetermined decision criterion, determine whether the receiver locks the scrambling code. If the judgment result is yes, perform time-domain equalization using the training sequence output by the scrambling synchronization module. If the judgment result is no, then execute Step 4;

[0067] Step 4: Perform blind equalization on the signal received in Step 1 to obtain a pre-equalized signal;

[0068] In this embodiment, the purpose of Step 4 is to weaken the influence of the channel through blind equalization and increase the success rate of scrambling synchronization. In this embodiment, the constant modulus blind equalization CMA algorithm is used as the blind equalization method. The constant modulus blind equalization CMA algorithm can also be used for blind equalization methods of signal types with constant envelope characteristics such as QPSK and BPSK signals.

[0069] In some embodiments, the corresponding blind equalization algorithm can also be selected according to the signal types transmitted by both the transmitter and the receiver. The selection basis is the applied communication scenario and the statistical characteristics of the transmitted signal. For example, it can be the Bussgang algorithm or the subspace-based channel blind estimation algorithm.

[0070] Step 5: Input the pre-equalized signal obtained in Step 4 into the scrambling synchronization module to obtain a scrambled signal;

[0071] In this embodiment, the pre-equalized signal is used to initialize the phase of the scrambler generator. After initialization, the scrambler generator generates its own local scrambling code, maps the local scrambling code to the local PAM2 / PAM3 signal, and then determines whether the scrambling synchronization is successful by comparing the pre-equalized signal with the local PAM2 / PAM3 signal.

[0072] Step 6: Calculate the time delay between the pre-equalized signal obtained in Step 4 and the signal received from the sender in Step 1;

[0073] In this embodiment, the time delay is obtained by calculating the correlation value between the pre-equalized signal and the signal sent by the sender. The specific method is as follows:

[0074] Perform correlation on the pre-equalized signal with a fixed window length of N and the signal received from the sender with a sliding window length of N, that is, multiply point by point and then accumulate;

[0075] Record the relevant value V corresponding to the sliding distance p cor (p), V cor The p value corresponding to the maximum value of V(p) is the required time delay;

[0076] V cor The calculation formula of V(p) is as follows:

[0077]

[0078] In the above formula, Sig Rx (p + n) is the signal obtained after the signal sent by the sender with a sliding window length of N slides a distance of p, and Sig CMA (n) is the pre - equalization signal with a fixed window length of N.

[0079] In some embodiments, the time delay between the pre - equalization signal and the signal sent by the receiving sender is calculated by comparing the number, and the specific method is as follows:

[0080] Take the pre - equalization signal with a fixed window length of N and the signal sent by the receiving sender with a sliding window length of N to make a polarity judgment and accumulate. Among them, the polarity is judged point - to - point, and if the polarities are the same, it is 1;

[0081] Record the number value N corresponding to the sliding distance p count (p), N count The p value corresponding to the maximum value of N(p) is the required time delay,

[0082] N count The calculation formula of N(p) is as follows:

[0083]

[0084] In the above formula, Sig Rx (p + n) is the signal obtained after the signal sent by the sender with a sliding window length of N slides a distance of p, and Sig CMA (n) is the pre - equalization signal with a fixed window length of N.

[0085] Step 7: Perform time - domain equalization according to the time delay obtained in Step 6 and the scrambling signal obtained in Step 5.

[0086] In this embodiment, the signal sent by the sender is delayed according to the time delay obtained in Step 6 and used as the input of the time - domain equalizer, and the scrambling signal obtained in Step 5 is used to perform time - domain equalization training to complete time - domain equalization.

[0087] All in all, in this embodiment, first, as in Figure 1 and 2Time domain equalization is performed in the manner of the prior art shown. To distinguish it from the blind equalization method proposed in the present invention, we refer to the method in the prior art as the single equalization mode. After the time domain equalization method of the present invention determines that the scrambling code cannot be locked by the prior art receiver, it adopts the equalization mode of steps 4-7. That is to say, steps 4-7 after the judgment result of step 3 in the above process are what we call the double equalization mode. The core steps of the double equalization mode are as Figure 5 shown. First, perform blind equalization on the received signal to obtain a pre-equalized signal, then perform scrambling code synchronization on the pre-equalized signal to obtain a scrambling code signal, then calculate the time delay between the pre-equalized signal and the received signal, and finally perform time domain equalization based on the time delay and the scrambling code signal.

[0088] To further illustrate how the time domain equalization method of the present invention selects the single equalization mode and the double equalization mode, the following introduces another embodiment of this application. The flowchart of this embodiment is as Figure 6 shown.

[0089] In this embodiment, a time domain equalizer as Figure 1 shown is adopted, but the present invention is not limited thereto.

[0090] As Figure 6 shown, there are two modes for the channel equalization method of this embodiment: the single equalization mode and the double equalization mode. Among them, the implementation process of the single equalization mode is as Figure 2 shown. First, perform scrambling code synchronization. After the scrambling code synchronization is completed, the training sequence is output by the scrambling code synchronization module, and the training sequence is used for time domain equalization. The implementation process of the double equalization mode is as Figure 5 shown. First, perform blind equalization, then perform scrambling code synchronization on the pre-equalized signal, then calculate the time delay between the received signal and the local scrambling code, and then perform time domain equalization.

[0091] The channel equalization method of this embodiment is as follows: First, adopt the single equalization mode for scrambling code synchronization. When the number of attempts for scrambling code synchronization is greater than 20 times or the time staying in scrambling code synchronization reaches a predetermined time threshold, switch to the double equalization mode. In the double equalization mode, the CMA blind equalization method is used for scrambling code synchronization, and the time delay between the received signal and the local scrambling code is obtained by calculating the correlation value. After the scrambling code is successfully synchronized, the DFE filter is used for the time domain equalizer. The method for calculating the correlation value can be the method used when calculating the time delay between the pre-equalized signal and the signal sent by the sender as described above, which will not be repeated here.

[0092] The embodiment of the present invention provides a machine-readable storage medium, on which instructions are stored, and these instructions are used to make the machine execute the channel equalization method of this application.

[0093] An embodiment of the present invention provides a channel equalization device, which includes a memory and a processor, and the processor is configured to execute the channel equalization method of the present application.

[0094] It should also be noted that the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, commodity or device including the element.

[0095] The above are only embodiments of the present application and are not used to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims

1. A channel equalization method, comprising: Receiving a signal sent by a sender; Attempting to synchronize the scrambling of the signal through a scrambling synchronization module, and determining whether the receiver can lock the scrambling code according to a predetermined decision criterion; If the determination result is yes, performing time-domain equalization using the training sequence output by the scrambling synchronization module; If the determination result is no, first performing blind equalization on the signal to obtain a pre-equalized signal, and then performing scrambling synchronization on the pre-equalized signal to complete time-domain equalization, wherein, determining whether the receiver can lock the scrambling code according to a predetermined decision criterion includes: when the time staying in scrambling synchronization reaches a predetermined time threshold, or when the number of determinations reaches a predetermined number, the determination result is no, otherwise the determination result is yes.

2. The method according to claim 1, wherein The step of first performing blind equalization on the signal to obtain a pre-equalized signal, and then performing scrambling synchronization on the pre-equalized signal to complete time-domain equalization includes: Performing blind equalization on the signal to obtain a pre-equalized signal; Inputting the pre-equalized signal into the scrambling synchronization module to obtain a scrambled signal; Calculating the time delay between the pre-equalized signal and the signal sent by the sender; and Performing time-domain equalization according to the time delay and the scrambled signal.

3. The method according to claim 1, wherein The predetermined decision criterion is one of the following conditions: the time staying in scrambling synchronization, the number of determinations.

4. The method according to claim 3, wherein When the time staying in scrambling synchronization reaches a predetermined time threshold, or when the number of determinations reaches a predetermined number, the determination result is no, otherwise the determination result is yes.

5. The method according to claim 1, characterized in that, The signal form sent by the sender is a signal with a constant envelope characteristic.

6. The method according to claim 1, wherein Performing time-domain equalization through a DFE filter.

7. The method according to claim 2, wherein Calculating the time delay between the pre-equalized signal and the signal sent by the sender includes: Obtain the pre - equalized signal with a fixed window length of N, denoted as Sig CMa (n); Obtain the signal sent by the sender with a sliding window length of N, denoted as Sig RX (n); Calculate the correlation value of the Sig Rx (n) and the Sig CMA (n), denoted as V cor (p); V cor (p) The p-value corresponding to the maximum (p) value is the required delay time.

8. The method according to claim 7, wherein Calculating the correlation value through the following formula: Where p is the sliding distance, Sig Rx (p + n) is Sig Rx (n) the signal obtained after the sliding distance is p.

9. The method according to claim 2, wherein Calculating the time delay between the pre-equalized signal and the signal sent by the sender includes: Obtain the pre-equalized signal with a fixed window length of N, denoted as Sig CMa (n); Obtain the signal sent by the sender with a sliding window length of N, denoted as Sig RX (n); Calculate the number of values of the Sig Rx (n) that have the same polarity as the Sig CMA (n), denoted as N count (p); N count (p) The p-value corresponding to the maximum (p) value is the required delay time.

10. The method according to claim 9, wherein Calculating the individual value through the following formula: Where p is the sliding distance, Sig Rx (p + n) is Sig Rx (n) The signal obtained after the sliding distance is p.

11. The method according to claim 2, characterized in that The step of performing time-domain equalization according to the time delay and the scrambled signal includes: Adding the time delay to the signal sent by the sender and jointly inputting the result and the scrambled signal into a time-domain equalization module for time-domain equalization.

12. A channel equalization device, the device comprising: A memory; And A processor configured to execute the channel equalization method according to any one of claims 1-11.

13. A machine-readable storage medium, on which instructions are stored, and the instructions are used to cause a machine to execute the channel equalization method according to any one of claims 1-11.

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