Phase sequence fault judgment method and judgment device

Abstract

This application discloses a phase sequence fault diagnosis method and device. The method determines the positive and negative sequence phase-locked states of a phase-locked loop (PLL). Based on these states, the method determines whether a phase sequence fault exists in a three-phase power grid. When a phase sequence fault occurs in a power grid, the grid voltage will contain both positive and negative sequence components, making it difficult for the PLL to lock into place. Therefore, phase sequence fault diagnosis in a three-phase power grid is performed based on the positive and negative sequence phase-locked states of the PLL. This method eliminates the need for additional hardware circuits and algorithms, incurs no additional costs, and is simple to implement.

Description

Technical Field

[0001] The present application relates to the technical field of safety detection of power electronic equipment, and in particular to a phase sequence fault judgment method and judgment device. Background Art

[0002] A three-phase power system consists of phases A, B, and C, which are 120 degrees out of phase with each other. In a normally operating power system, the three-phase voltages and currents should all be in a generally positive phase sequence. However, when a system fault occurs, the three phases (ABC) become symmetrical. For ease of analysis, the voltage and current can be decomposed into positive-sequence, negative-sequence, and zero-sequence components. Phase sequence faults can occur due to incorrect line connections or abnormal power equipment. For example, when the positive phase sequence is ABC, the phase sequence will be BAC in the event of a phase sequence fault.

[0003] In related technologies, it is possible to determine whether a phase sequence fault occurs by capturing the level. Figure 1 As shown, a zero-crossing comparison is performed on the three-phase voltages A, B, and C to generate a three-phase voltage square wave signal, which is then fed into the CAP pin of the digital signal processing (DSP) chip. The three-phase sequence is determined by determining whether the square wave signal of phase B is high and whether the square wave signal of phase C is low when a rising edge event occurs on phase A. Alternatively, the phase can be directly determined by reading the difference in the signal values ​​in the capture register. However, if a ground fault or phase loss occurs in the three-phase system, a negative sequence component will appear in the system. The three phases may become asymmetrical, no longer strictly offset by 120 degrees, making it impossible to accurately determine whether a phase sequence fault has occurred using the above method.

[0004] Therefore, how to accurately determine whether a phase sequence fault occurs in the power system when an asymmetric fault occurs in the three-phase phase of the power grid is a technical problem that needs to be solved. Summary of the Invention

[0005] The main purpose of this application is to provide a phase sequence fault judgment method and judgment device, which aims to solve the technical problem that the phase sequence fault cannot be accurately judged when the three-phase phase is asymmetric.

[0006] In a first aspect, the present application provides a phase sequence fault judgment method, the method comprising the following steps:

[0007] Determine the positive sequence phase locked state and negative sequence phase locked state of the phase locked loop;

[0008] It is determined whether a phase sequence fault exists in the three-phase power grid according to the positive sequence phase-locked state and the negative sequence phase-locked state of the phase-locked loop.

[0009] In some embodiments, determining the positive-sequence phase-locked state and the negative-sequence phase-locked state of the phase-locked loop includes:

[0010] Determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid;

[0011] The negative-sequence phase-locked state is determined according to a negative-sequence coordinate component of a voltage of the three-phase power grid.

[0012] In some embodiments, the voltage positive sequence component includes a voltage positive sequence d-axis component and a voltage positive sequence q-axis component;

[0013] The voltage negative sequence component includes a voltage negative sequence d-axis component and a voltage negative sequence q-axis component.

[0014] In some embodiments, determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid includes:

[0015] If the voltage positive sequence d-axis component is less than a preset d-axis component threshold and / or the voltage positive sequence q-axis component is greater than a preset q-axis component threshold, and the holding time is greater than a preset time threshold, it is determined that the positive sequence phase locking of the phase locked loop has failed;

[0016] If the voltage positive sequence d-axis component is greater than the d-axis component threshold, the voltage positive sequence q-axis component is less than the q-axis component threshold, and the holding time is greater than the time threshold, it is determined that the positive sequence phase locking of the phase locked loop is successful.

[0017] In some embodiments, determining the negative-sequence phase-locked state according to the negative-sequence coordinate component of the voltage of the three-phase power grid includes:

[0018] If the voltage negative-sequence d-axis component is less than the d-axis component threshold and / or the voltage negative-sequence q-axis component is greater than the q-axis component, determining that the negative-sequence phase locking of the phase-locked loop has failed;

[0019] If the voltage negative-sequence d-axis component is greater than the d-axis component threshold, the voltage negative-sequence q-axis component is less than the q-axis component, and the holding time is greater than the time threshold, it is determined that the phase-locked loop negative-sequence phase locking has failed.

[0020] In some embodiments, the method further comprises:

[0021] The voltage positive sequence coordinate component and the voltage negative sequence coordinate component of the three-phase power grid are determined by performing double dq coordinate transformation through a phase-locked loop.

[0022] In some embodiments, determining whether a phase sequence fault exists in a three-phase power grid according to a positive-sequence phase-locked state and a negative-sequence phase-locked state of the phase-locked loop includes:

[0023] If the positive sequence phase locking of the phase locked loop fails and the negative sequence phase locking of the phase locked loop succeeds, it is determined that a phase sequence fault exists in the three-phase power grid; otherwise, it is determined that no phase locking fault exists in the three-phase power grid.

[0024] In a second aspect, the present application further provides a phase sequence fault judgment device, the device comprising:

[0025] A calculation module, which is used to determine the positive sequence phase-locked state and the negative sequence phase-locked state of the phase-locked loop;

[0026] The judgment module is used to determine whether there is a phase sequence fault in the three-phase power grid according to the positive sequence phase locked state and the negative sequence phase locked state of the phase locked loop.

[0027] In some embodiments, the calculation module is further configured to:

[0028] Determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid;

[0029] The negative-sequence phase-locked state is determined according to a negative-sequence coordinate component of a voltage of the three-phase power grid.

[0030] In some embodiments, the voltage positive sequence component includes a voltage positive sequence d-axis component and a voltage positive sequence q-axis component;

[0031] The voltage negative sequence component includes a voltage negative sequence d-axis component and a voltage negative sequence q-axis component.

[0032] In some embodiments, the calculation module is further configured to:

[0033] If the voltage positive sequence d-axis component is less than a preset d-axis component threshold and / or the voltage positive sequence q-axis component is greater than a preset q-axis component threshold, and the holding time is greater than a preset time threshold, it is determined that the positive sequence phase locking of the phase locked loop has failed;

[0034] If the voltage positive sequence d-axis component is greater than the d-axis component threshold, the voltage positive sequence q-axis component is less than the q-axis component threshold, and the holding time is greater than the time threshold, it is determined that the positive sequence phase locking of the phase locked loop is successful.

[0035] In some embodiments, the calculation module is further configured to:

[0036] If the voltage negative-sequence d-axis component is less than the d-axis component threshold and / or the voltage negative-sequence q-axis component is greater than the q-axis component, determining that the negative-sequence phase locking of the phase-locked loop has failed;

[0037] If the voltage negative-sequence d-axis component is greater than the d-axis component threshold, the voltage negative-sequence q-axis component is less than the q-axis component, and the holding time is greater than the time threshold, it is determined that the phase-locked loop negative-sequence phase locking has failed.

[0038] In some embodiments, the calculation module is further configured to:

[0039] The voltage positive sequence coordinate component and the voltage negative sequence coordinate component of the three-phase power grid are determined by performing double dq coordinate transformation through a phase-locked loop.

[0040] In some embodiments, the judgment module is further configured to:

[0041] If the positive sequence phase locking of the phase locked loop fails and the negative sequence phase locking of the phase locked loop succeeds, it is determined that a phase sequence fault exists in the three-phase power grid; otherwise, it is determined that no phase locking fault exists in the three-phase power grid.

[0042] The present application provides a phase sequence fault determination method and device. These methods determine whether a phase sequence fault exists in a three-phase power grid based on the positive-sequence phase-locked state and negative-sequence phase-locked state of a phase-locked loop (PLL). When a phase sequence fault occurs in a power grid, the presence of both positive-sequence and negative-sequence components in the grid voltage makes it difficult for the PLL to lock into place. Therefore, a phase sequence fault determination method and device can be implemented based on the positive-sequence and negative-sequence phase-locked states of the PLL. This method eliminates the need for additional hardware circuits and algorithms, incurs no additional costs, and is simple to implement. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0044] Figure 1 It is a schematic diagram of a three-phase voltage square wave signal;

[0045] Figure 2 A flow chart of a phase sequence fault determination method provided in an embodiment of the present application;

[0046] Figure 3 It is a structural diagram of a phase-locked loop based on double dq coordinate transformation;

[0047] Figure 4 A flow chart of a method for determining a positive sequence phase-locked state;

[0048] Figure 5 Flowchart of the method for determining the negative sequence phase-locked state

[0049] Figure 6 Schematic diagram of the specific process of the phase sequence fault judgment method;

[0050] Figure 7 This is a schematic block diagram of the structure of a phase sequence fault judgment device provided in an embodiment of the present application.

[0051] The realization of the objectives, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0053] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, combined, or partially merged, so the actual execution order may vary depending on the actual situation.

[0054] The embodiments of the present application provide a phase sequence fault judgment method and judgment device.

[0055] The following describes some embodiments of the present application in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0056] Please refer to Figure 2 , Figure 2 A flow chart of a phase sequence fault judgment method provided in an embodiment of the present application.

[0057] like Figure 2 As shown, the method includes steps S101 to S102.

[0058] Step S101: Determine the positive-sequence phase-locked state and the negative-sequence phase-locked state of a phase-locked loop.

[0059] Step S102: determining whether a phase sequence fault exists in the three-phase power grid according to the positive-sequence phase-locked state and the negative-sequence phase-locked state of the phase-locked loop.

[0060] It's worth noting that the phase-locked loop (PLL) can be the one in a grid-connected inverter. It can quickly and accurately acquire the grid's fundamental positive phase sequence. When a phase sequence fault occurs in a three-phase grid, both positive and negative sequence components will coexist in the grid's voltage, making it difficult for the PLL to lock onto the phase. Therefore, the presence of a phase sequence fault in all three phases can be determined based on the positive and negative sequence phase-locked states of the PLL.

[0061] Specifically, determining the positive-sequence phase-locked state and the negative-sequence phase-locked state of the phase-locked loop includes: determining the positive-sequence phase-locked state based on the positive-sequence coordinate component of the voltage of the three-phase power grid; and determining the negative-sequence phase-locked state based on the negative-sequence coordinate component of the voltage of the three-phase power grid. The positive-sequence voltage component includes a positive-sequence d-axis component and a positive-sequence q-axis component; and the negative-sequence voltage component includes a negative-sequence d-axis component and a negative-sequence q-axis component.

[0062] It is worth noting that the voltage positive sequence coordinate component and the voltage negative sequence coordinate component of the three-phase power grid can be determined by performing double dq coordinate transformation through a phase-locked loop.

[0063] Specifically, such as Figure 3 As shown, Figure 3 The structure of a phase-locked loop based on dual dq coordinate transformation is shown in Figure 2. The inputs to the dual dq coordinate transformation are the three-phase voltages Usa, Usb, and Usc, as well as the vector angle θ. The outputs are the positive-sequence coordinate components Usd+ and Usq+, and the negative-sequence coordinate components Usd- and Usq-. The positive-sequence and negative-sequence coordinate components are obtained by transforming the C32 matrix, the Cdq+ matrix, and the Cdq- ​​matrix. The C32 matrix is ​​used for the stationary three-phase to two-phase conversion, while the Cdq+ and Cdq- ​​matrices are used for the rotational transformation.

[0064] Among them, the C32 matrix is:

[0065] The Cdq+ matrix is:

[0066] The Cdq-matrix is:

[0067] The specific operations of obtaining the voltage positive-sequence d-axis component and the voltage positive-sequence q-axis component, as well as the voltage negative-sequence d-axis component and the voltage negative-sequence q-axis component through double dq coordinate transformation are well known to those skilled in the art and will not be elaborated on here.

[0068] In some embodiments, the positive-sequence phase-locked state is determined based on the positive-sequence coordinate component of the voltage of the three-phase power grid, including: if the voltage positive-sequence d-axis component is less than a preset d-axis component threshold and / or the voltage positive-sequence q-axis component is greater than a preset q-axis component threshold, and the holding time is greater than a preset time threshold, then it is determined that the positive-sequence phase-locked of the phase-locked loop has failed; if the voltage positive-sequence d-axis component is greater than the d-axis component threshold, the voltage positive-sequence q-axis component is less than the q-axis component threshold, and the holding time is greater than the time threshold, then it is determined that the positive-sequence phase-locked of the phase-locked loop has succeeded.

[0069] Furthermore, the determining of the negative-sequence phase-locked state based on the negative-sequence coordinate component of the voltage of the three-phase power grid includes: if the voltage negative-sequence d-axis component is less than the d-axis component threshold and / or the voltage negative-sequence q-axis component is greater than the q-axis component, determining that the negative-sequence phase-locked loop has failed; if the voltage negative-sequence d-axis component is greater than the d-axis component threshold, the voltage negative-sequence q-axis component is less than the q-axis component, and the holding time is greater than the time threshold, determining that the negative-sequence phase-locked loop has failed.

[0070] In this embodiment, the time threshold can be set to 200ms. The d-axis component threshold and the q-axis component threshold can be set to components that enable the phase-locked loop to successfully lock into phase. For example, in a three-phase AC 380V system, the d-axis component can be set to 5V and the q-axis component can be set to 2V.

[0071] Exemplarily, Udpos is set as the voltage positive sequence d-axis component, Uqpos is set as the voltage positive sequence q-axis component, Udneg is set as the voltage negative sequence d-axis component, and Uqneg is set as the voltage negative sequence q-axis component. UdLimit is set as the d-axis component threshold, and UqLimit is set as the q-axis component threshold.

[0072] like Figure 4 As shown, determining the positive-sequence phase-locked state according to the voltage positive-sequence coordinate component of the three-phase power grid includes:

[0073] Step S201: Determine whether Udpos is less than UdLimit or whether Uqpos is greater than UqLimit; if so, proceed to step S202; otherwise, proceed to step S205. Wherein, "otherwise" means that Udpos is greater than UdLimit and Uqpos is less than UqLimit.

[0074] Step S202: Determine whether the positive sequence phase lock flag PLL_P_OK = 0. The positive sequence phase lock flag PLL_P_OK = 0 indicates that the positive sequence phase lock is unsuccessful.

[0075] Step S203 , determine whether the duration of PLL_P_OK=0 is greater than the time threshold; if so, proceed to step S204 ; otherwise, return to step S203 .

[0076] Step S204: determine that the positive sequence phase lock flag POS_PLL_Fault=1, that is, determine that the forward phase lock fails.

[0077] Step S205 , determine whether the time during which Udpos is greater than UdLimit and Uqpos is less than UqLimit is greater than the time threshold; if so, proceed to step S206 ; otherwise, return to step S205 .

[0078] Step S206 , determining that the positive sequence phase lock flag POS_PLL_Fault=0, that is, determining that the positive sequence phase lock failure flag is cleared, indicating that the positive sequence phase lock is successful.

[0079] like Figure 5 As shown, determining the negative-sequence phase-locked state according to the negative-sequence coordinate component of the voltage of the three-phase power grid includes:

[0080] Step S301: Determine whether Udneg is less than UdLimit or whether Uqneg is greater than UqLimit; if so, proceed to step S302; otherwise, proceed to step S303, where "otherwise" means that Udneg is greater than UdLimit and Uqneg is less than UqLimit.

[0081] Step S302: Determine that the negative sequence phase lock flag PLL_N_OK=0, ie, determine that the negative sequence phase lock fails.

[0082] Step S303 , determine whether the time during which Udneg is greater than UdLimit and Uqneg is less than UqLimit is greater than a time threshold; if so, proceed to step S304 ; otherwise, return to step S303 .

[0083] Step S304: Determine that the negative sequence phase lock flag PLL_N_OK=1, ie, determine that the negative sequence phase lock is successful.

[0084] Furthermore, whether there is a phase sequence fault in the three-phase power grid is determined based on the positive-sequence phase-locked state and the negative-sequence phase-locked state of the phase-locked loop, including: if the positive-sequence phase-locked state of the phase-locked loop fails and the negative-sequence phase-locked state of the phase-locked loop is successful, then it is determined that there is a phase sequence fault in the three-phase power grid; otherwise, it is determined that there is no phase-locked fault in the three-phase power grid.

[0085] Exemplary, such as Figure 6 As shown, determining whether there is a phase sequence fault in a three-phase power grid includes:

[0086] Step S401 , determine whether POS_PLL_Fault=1 and PLL_N_OK=1 are true; if so, proceed to step S402 ; otherwise, proceed to step S403 .

[0087] Step S402: Determine whether a phase sequence fault exists in the three-phase power grid;

[0088] Step S403: Determine whether there is a phase sequence fault in the three-phase power grid.

[0089] The present application provides a phase sequence fault diagnosis method. The method determines the positive-sequence phase-locked state and negative-sequence phase-locked state of a phase-locked loop (PLL). The method then determines whether a phase sequence fault exists in a three-phase power grid based on the positive-sequence phase-locked state and negative-sequence phase-locked state of the PLL. When a phase sequence fault occurs in a power grid, the grid voltage will contain both positive-sequence and negative-sequence components, making it difficult for the PLL to lock into phase. Therefore, phase sequence fault diagnosis in a three-phase power grid can be implemented based on the positive-sequence and negative-sequence phase-locked states of the PLL. This method eliminates the need for additional hardware circuits and algorithms, incurs no additional costs, and is simple to implement.

[0090] Please refer to Figure 7 , Figure 7 A schematic block diagram of a phase sequence fault judgment device provided in an embodiment of the present application.

[0091] like Figure 7 As shown, the device includes: a calculation module and a judgment module;

[0092] A calculation module, which is used to determine the positive sequence phase-locked state and the negative sequence phase-locked state of the phase-locked loop;

[0093] The judgment module is used to determine whether there is a phase sequence fault in the three-phase power grid according to the positive sequence phase locked state and the negative sequence phase locked state of the phase locked loop.

[0094] Wherein, the calculation module is further used for:

[0095] Determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid;

[0096] The negative-sequence phase-locked state is determined according to a negative-sequence coordinate component of a voltage of the three-phase power grid.

[0097] Wherein, the voltage positive sequence component includes a voltage positive sequence d-axis component and a voltage positive sequence q-axis component;

[0098] The voltage negative sequence component includes a voltage negative sequence d-axis component and a voltage negative sequence q-axis component.

[0099] Wherein, the calculation module is further used for:

[0100] If the voltage positive sequence d-axis component is less than a preset d-axis component threshold and / or the voltage positive sequence q-axis component is greater than a preset q-axis component threshold, and the holding time is greater than a preset time threshold, it is determined that the positive sequence phase locking of the phase locked loop has failed;

[0101] If the voltage positive sequence d-axis component is greater than the d-axis component threshold, the voltage positive sequence q-axis component is less than the q-axis component threshold, and the holding time is greater than the time threshold, it is determined that the positive sequence phase locking of the phase locked loop is successful.

[0102] Wherein, the calculation module is further used for:

[0103] If the voltage negative-sequence d-axis component is less than the d-axis component threshold and / or the voltage negative-sequence q-axis component is greater than the q-axis component, determining that the negative-sequence phase locking of the phase-locked loop has failed;

[0104] If the voltage negative-sequence d-axis component is greater than the d-axis component threshold, the voltage negative-sequence q-axis component is less than the q-axis component, and the holding time is greater than the time threshold, it is determined that the phase-locked loop negative-sequence phase locking has failed.

[0105] Wherein, the calculation module is further used for:

[0106] The voltage positive sequence coordinate component and the voltage negative sequence coordinate component of the three-phase power grid are determined by performing double dq coordinate transformation through a phase-locked loop.

[0107] Wherein, the judgment module is further used for:

[0108] If the positive sequence phase locking of the phase locked loop fails and the negative sequence phase locking of the phase locked loop succeeds, it is determined that a phase sequence fault exists in the three-phase power grid; otherwise, it is determined that no phase locking fault exists in the three-phase power grid.

[0109] It should be noted that those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and modules and units can refer to the corresponding processes in the aforementioned embodiments and will not be repeated here.

[0110] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or system comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or system. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or system comprising the element.

[0111] The serial numbers of the embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments. The above description is only a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A phase sequence fault judgment method, characterized in that: include: Determine the positive sequence phase locked state and negative sequence phase locked state of the phase locked loop; determining whether a phase sequence fault exists in the three-phase power grid according to the positive sequence phase-locked state and the negative sequence phase-locked state of the phase-locked loop; The determining of the positive-sequence phase-locked state and the negative-sequence phase-locked state of the phase-locked loop includes: Determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid; Determining the negative-sequence phase-locked state according to the negative-sequence coordinate component of the voltage of the three-phase power grid; Wherein, the voltage positive sequence component includes a voltage positive sequence d-axis component and a voltage positive sequence q-axis component; The voltage negative sequence component includes a voltage negative sequence d-axis component and a voltage negative sequence q-axis component; Among them, the voltage positive sequence d-axis component and the voltage positive sequence q-axis component, as well as the voltage negative sequence d-axis component and the voltage negative sequence q-axis component are obtained through double dq coordinate transformation; The input of the double dq coordinate transformation is the three-phase voltages Usa, Usb and Usc, and the vector angle θ. The output is the positive sequence coordinate components Usd+ and Usq+, and the negative sequence coordinate components Usd- and Usq-. The positive sequence coordinate components and the negative sequence coordinate components are obtained by transforming through the C32 matrix, Cdq+ matrix and Cdq- ​​matrix. The C32 matrix is ​​used for stationary three-phase to two-phase transformation, and Cdq+ and Cdq- ​​are used for rotational transformation. Wherein, determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid includes: If the voltage positive sequence d-axis component is less than a preset d-axis component threshold and / or the voltage positive sequence q-axis component is greater than a preset q-axis component threshold, and the holding time is greater than a preset time threshold, it is determined that the positive sequence phase locking of the phase locked loop has failed; If the voltage positive sequence d-axis component is greater than the d-axis component threshold, the voltage positive sequence q-axis component is less than the q-axis component threshold, and the holding time is greater than the time threshold, it is determined that the positive sequence phase locking of the phase locked loop is successful.

2. The phase sequence fault judgment method according to claim 1, characterized in that: Determining the negative-sequence phase-locked state according to the negative-sequence coordinate component of the voltage of the three-phase power grid includes: If the voltage negative-sequence d-axis component is less than the d-axis component threshold and / or the voltage negative-sequence q-axis component is greater than the q-axis component, determining that the negative-sequence phase locking of the phase-locked loop has failed; If the voltage negative-sequence d-axis component is greater than the d-axis component threshold, the voltage negative-sequence q-axis component is less than the q-axis component, and the holding time is greater than the time threshold, it is determined that the phase-locked loop negative-sequence phase locking has failed.

3. The phase sequence fault judgment method according to claim 1, characterized in that: Also includes: The voltage positive sequence coordinate component and the voltage negative sequence coordinate component of the three-phase power grid are determined by performing double dq coordinate transformation through a phase-locked loop.

4. The phase sequence fault judgment method according to claim 1, characterized in that: Determining whether a three-phase power grid has a phase sequence fault according to a positive-sequence phase-locked state and a negative-sequence phase-locked state of the phase-locked loop includes: If the positive sequence phase locking of the phase locked loop fails and the negative sequence phase locking of the phase locked loop succeeds, it is determined that a phase sequence fault exists in the three-phase power grid; otherwise, it is determined that no phase locking fault exists in the three-phase power grid.

5. A phase sequence fault judgment device, characterized in that: include: A calculation module, which is used to determine the positive sequence phase-locked state and the negative sequence phase-locked state of the phase-locked loop; a judgment module, which is used to determine whether there is a phase sequence fault in the three-phase power grid according to the positive sequence phase locked state and the negative sequence phase locked state of the phase locked loop; Wherein, the calculation module is further used for: Determining the positive-sequence phase-locked state according to the positive-sequence coordinate component of the voltage of the three-phase power grid; Determining the negative-sequence phase-locked state according to the negative-sequence coordinate component of the voltage of the three-phase power grid; Wherein, it is characterized in that: The voltage positive sequence component includes a voltage positive sequence d-axis component and a voltage positive sequence q-axis component; The voltage negative sequence component includes a voltage negative sequence d-axis component and a voltage negative sequence q-axis component; Among them, the voltage positive sequence d-axis component and the voltage positive sequence q-axis component, as well as the voltage negative sequence d-axis component and the voltage negative sequence q-axis component are obtained through double dq coordinate transformation; The input of the double dq coordinate transformation is the three-phase voltages Usa, Usb and Usc, and the vector angle θ. The output is the positive sequence coordinate components Usd+ and Usq+, and the negative sequence coordinate components Usd- and Usq-. The positive sequence coordinate components and the negative sequence coordinate components are obtained by transforming through the C32 matrix, Cdq+ matrix and Cdq- ​​matrix. The C32 matrix is ​​used for stationary three-phase to two-phase transformation, and Cdq+ and Cdq- ​​are used for rotational transformation. Wherein, the calculation module is further used for: If the voltage positive sequence d-axis component is less than a preset d-axis component threshold and / or the voltage positive sequence q-axis component is greater than a preset q-axis component threshold, and the holding time is greater than a preset time threshold, it is determined that the positive sequence phase locking of the phase locked loop has failed; If the voltage positive sequence d-axis component is greater than the d-axis component threshold, the voltage positive sequence q-axis component is less than the q-axis component threshold, and the holding time is greater than the time threshold, it is determined that the positive sequence phase locking of the phase locked loop is successful.

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