Latch-up test structure

Abstract

The present invention relates to a latch-up test structure, comprising: a substrate of a first conductivity type; a first well region of a second conductivity type, located within the substrate of the first conductivity type; a first doped region of the first conductivity type, located within the first well region of the second conductivity type; a first doped region of the second conductivity type, located within the first well region of the second conductivity type; and a second doped region of the first conductivity type, a second doped region of the second conductivity type, a third doped region of the first conductivity type, and a third doped region of the second conductivity type, spaced apart within the substrate of the first conductivity type, wherein the second doped region of the first conductivity type, the second doped region of the second conductivity type, the third doped region of the first conductivity type, and the third doped region of the second conductivity type are all located on a side of the first doped region of the first conductivity type away from the first doped region of the second conductivity type. The latch-up test structure can trigger latch-up under certain external conditions to extract electrical parameters and improve semiconductor structure design.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a latch test structure. Background Art

[0002] Latch-up is a self-destructive phenomenon caused by pulsed current or voltage fluctuations that cause the parasitic PNP and NPN bipolar junction transistors (BJTs) in complementary metal oxide semiconductors (CMOS) to interact with each other, creating positive feedback and leading to avalanche current amplification. Latch-up creates a low-resistance path between the power supply (Vdd) and the ground terminal (Vss), allowing high current to flow through the parasitic circuits, causing the circuit to stop functioning properly or even self-destruct.

[0003] With the advancement of integrated circuit manufacturing processes, chip packaging density and integration are increasing, increasing the likelihood of latch-up. Therefore, evaluating latch-up in semiconductor devices is a key aspect of semiconductor product reliability testing. However, due to the various latch-up paths that can exist in semiconductor devices, it is difficult to effectively and comprehensively evaluate latch-up in semiconductor structures. Summary of the Invention

[0004] Based on this, it is necessary to provide a latch-up test structure to address the problem that there are many types of latch-up paths in semiconductor devices and it is difficult to effectively evaluate the latch-up effect.

[0005] The present application provides a latch test structure, which includes: a substrate of a first conductive type; a first well region of a second conductive type, located in the substrate of the first conductive type; a first doped region of the first conductive type, located in the first well region of the second conductive type; a first doped region of the second conductive type, located in the first well region of the second conductive type, and having a spacing with the first doped region of the first conductive type; a second doped region of the first conductive type, a second doped region of the second conductive type, a third doped region of the first conductive type, and a third doped region of the second conductive type arranged at intervals in the substrate of the first conductive type, the second doped region of the first conductive type, the second doped region of the second conductive type, the third doped region of the first conductive type, and the third doped region of the second conductive type are all located on the side of the first doped region of the first conductive type away from the first doped region of the second conductive type, and are all spaced apart from the first well region of the second conductive type.

[0006] In one embodiment, the latch test structure further includes: a well region of a first conductivity type, located in a substrate of the first conductivity type and having a spacing with the first well region of the second conductivity type; a second doped region of the first conductivity type and a second doped region of the second conductivity type are both located in the well region of the first conductivity type, and the second doped region of the first conductivity type is located between the second doped region of the second conductivity type and the first well region of the second conductivity type; a second well region of a second conductivity type, located in a substrate of the first conductivity type and located on a side of the well region of the first conductivity type away from the first well region of the second conductivity type, and adjacent to the well region of the first conductivity type; a third doped region of the first conductivity type and a third doped region of the second conductivity type are both located in the second well region of the second conductivity type, and the third doped region of the first conductivity type is located between the third doped region of the second conductivity type and the second doped region of the second conductivity type.

[0007] In one embodiment, the latch test structure further includes a shallow trench isolation structure, wherein the shallow trench isolation structure is located between the first doping region of the first conductivity type and the first doping region of the second conductivity type, between the second doping region of the first conductivity type and the second doping region of the second conductivity type, and between the third doping region of the first conductivity type and the third doping region of the second conductivity type.

[0008] In one embodiment, the latch test structure further includes: a second well region of the second conductivity type, located in the substrate of the first conductivity type; a third doped region of the first conductivity type and a third doped region of the second conductivity type are both located in the second well region of the second conductivity type, and the third doped region of the first conductivity type is located between the third doped region of the second conductivity type and the first well region of the second conductivity type; a second doped region of the first conductivity type is located between the second well region of the second conductivity type and the first well region of the second conductivity type, and has a spacing with both the second well region of the second conductivity type and the first well region of the second conductivity type; a third well region of the second conductivity type is located in the substrate of the first conductivity type, and is located between the second well region of the second conductivity type and the second doped region of the first conductivity type, and has a spacing with both the second well region of the second conductivity type and the second doped region of the first conductivity type; and a second doped region of the second conductivity type is located in the third well region of the second conductivity type.

[0009] In one embodiment, the latch test structure further includes: a second well region of the second conductivity type, located in the substrate of the first conductivity type; a third doped region of the first conductivity type and a third doped region of the second conductivity type are both located in the second well region of the second conductivity type, and the third doped region of the first conductivity type is located between the third doped region of the second conductivity type and the first well region of the second conductivity type; a second doped region of the first conductivity type is located between the second well region of the second conductivity type and the first well region of the second conductivity type, and has a spacing with both the second well region of the second conductivity type and the first well region of the second conductivity type; a deep well region of the second conductivity type is located in the substrate of the first conductivity type, between the second well region of the second conductivity type and the second doped region of the first conductivity type, and has a spacing with both the second well region of the second conductivity type and the second doped region of the first conductivity type; the second doped region of the second conductivity type is located in the deep well region of the second conductivity type; the third well region of the second conductivity type is located outside the deep well region of the second conductivity type, and has a spacing with both the second well region of the second conductivity type and the second doped region of the first conductivity type.

[0010] In one embodiment, the third well region of the second conductivity type is partially located in the deep well region of the second conductivity type.

[0011] In one embodiment, the latch test structure further includes: a deep well region of the second conductivity type, located in the substrate of the first conductivity type and having a spacing with the first well region of the second conductivity type; the second doped region of the second conductivity type and the second doped region of the first conductivity type are both located in the deep well region of the second conductivity type, and the second doped region of the second conductivity type is located between the second doped region of the first conductivity type and the first well region of the second conductivity type; a well region of the first conductivity type is located in the deep well region of the second conductivity type and is located on the side of the second doped region of the first conductivity type away from the second doped region of the second conductivity type, and has a spacing with the second doped region of the first conductivity type; the third doped region of the first conductivity type and the third doped region of the second conductivity type are both located in the well region of the first conductivity type, and the third doped region of the second conductivity type is located between the third doped region of the first conductivity type and the second doped region of the first conductivity type; the second well region of the second conductivity type is located at the periphery of the deep well region of the second conductivity type and has a spacing with the first well region of the second conductivity type.

[0012] In one embodiment, the latch test structure further includes: a deep well region of the second conductivity type, located in the substrate of the first conductivity type; a well region of the first conductivity type, located in the deep well region of the second conductivity type, and a second doped region of the first conductivity type located in the well region of the first conductivity type; a second well region of the second conductivity type, located outside the deep well region of the second conductivity type; a second doped region of the second conductivity type is located in the second well region of the second conductivity type and between the well region of the first conductivity type and the first well region of the second conductivity type; a third doped region of the second conductivity type is located on a side of the deep well region of the second conductivity type away from the first well region of the second conductivity type and has a spacing with the second well region of the second conductivity type; and a third doped region of the first conductivity type is located on a side of the third doped region of the second conductivity type away from the deep well region of the second conductivity type.

[0013] In one embodiment, the latch test structure further includes: a deep well region of the second conductivity type, located in the substrate of the first conductivity type; a well region of the first conductivity type, located in the deep well region of the second conductivity type, and a second doped region of the first conductivity type located in the well region of the first conductivity type; a second well region of the second conductivity type, located outside the deep well region of the second conductivity type; a second doped region of the second conductivity type located in the second well region of the second conductivity type, and located between the well region of the first conductivity type and the first well region of the second conductivity type; a third well region of the second conductivity type, located on a side of the deep well region of the second conductivity type away from the first well region of the second conductivity type, and having a spacing with the second well region of the second conductivity type; a third doped region of the second conductivity type located in the third well region of the second conductivity type; and a third doped region of the first conductivity type located on a side of the third well region of the second conductivity type away from the deep well region of the second conductivity type, and having a spacing with the third well region of the second conductivity type.

[0014] In one embodiment, the latch test structure further includes: a first deep well region of the second conductivity type, located in the substrate of the first conductivity type; a well region of the first conductivity type, located in the first deep well region of the second conductivity type, and a second doped region of the first conductivity type located in the well region of the first conductivity type; a second well region of the second conductivity type, located outside the first deep well region of the second conductivity type; a second doped region of the second conductivity type, located in the second well region of the second conductivity type, and located between the well region of the first conductivity type and the first well region of the second conductivity type; a second deep well region of the second conductivity type, located in the substrate of the first conductivity type, and located on a side of the first deep well region of the second conductivity type away from the first well region of the second conductivity type, and having a spacing with the second well region of the second conductivity type; a third doped region of the second conductivity type, located in the second deep well region of the second conductivity type; a third well region of the second conductivity type, located outside the second deep well region of the second conductivity type, and having a spacing with the second well region of the second conductivity type; a third doped region of the first conductivity type, located on a side of the second deep well region of the second conductivity type away from the first deep well region of the second conductivity type, and having a spacing with the third well region of the second conductivity type.

[0015] In one embodiment, the second well region of the second conductivity type is partially located in the first deep well region of the second conductivity type, and the third well region of the second conductivity type is partially located in the second deep well region of the second conductivity type.

[0016] In one embodiment, a shallow trench isolation structure is further included, wherein the shallow trench isolation structure is located between the first doping region of the first conductivity type and the first doping region of the second conductivity type, and between the second doping region of the first conductivity type, the second doping region of the second conductivity type, the third doping region of the first conductivity type and the third doping region of the second conductivity type.

[0017] In one embodiment, the first conductivity type includes P type, and the second conductivity type includes N type.

[0018] In one embodiment, the first well region of the second conductivity type is a lightly doped region, and the first doped region of the first conductivity type, the first doped region of the second conductivity type, the second doped region of the first conductivity type, the second doped region of the second conductivity type, the third doped region of the first conductivity type and the third doped region of the second conductivity type are all heavily doped regions.

[0019] The latch-up test structure utilizes well regions and doped regions of varying structural types within a substrate of the first conductivity type to simulate potential latch-up structures within an integrated circuit. These latch-up test structures can trigger latch-up under certain external conditions. By testing the relevant electrical parameters of various potential latch-up structures within an integrated circuit, the corresponding regular parameters can be extracted to improve integrated circuit design and enhance product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 FIG. 1 is a top view of a latch test structure in one embodiment of the present application.

[0021] Figure 2 for Figure 1 Schematic diagram of the cross-sectional structure of the latch test structure.

[0022] Figure 3 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0023] Figure 4 for Figure 3 Schematic diagram of the cross-sectional structure of the latch test structure.

[0024] Figure 5 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0025] Figure 6 for Figure 5 Schematic diagram of the cross-sectional structure of the latch test structure.

[0026] Figure 7 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0027] Figure 8 for Figure 7 Schematic diagram of the cross-sectional structure of the latch test structure.

[0028] Figure 9 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0029] Figure 10 for Figure 9 Schematic diagram of the cross-sectional structure of the latch test structure.

[0030] Figure 11 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0031] Figure 12 for Figure 11 Schematic diagram of the cross-sectional structure of the latch test structure.

[0032] Figure 13 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0033] Figure 14 for Figure 13 Schematic diagram of the cross-sectional structure of the latch test structure.

[0034] Figure 15 FIG. 1 is a top view of a latch test structure in another embodiment of the present application.

[0035] Figure 16 for Figure 15 Schematic diagram of the cross-sectional structure of the latch test structure.

[0036] Explanation of the reference numerals: 1. substrate of the first conductivity type; 2. first doping region of the first conductivity type; 3. first doping region of the second conductivity type; 4. second doping region of the first conductivity type; 5. second doping region of the second conductivity type; 6. third doping region of the first conductivity type; 7. third doping region of the second conductivity type; 81, 82, 83, 84, 85, well region of the first conductivity type; 9. first electrode; 10. second electrode; 11. shallow trench isolation structure; 15. first well region of the second conductivity type; 1 61, 162, 163, 164, 165, 166, 167, second well region of the second conductivity type; 171, 172, 173, 174, third well region of the second conductivity type; 181, 182, 183, 184, deep well region of the second conductivity type; 19, first deep well region of the second conductivity type; 20, second deep well region of the second conductivity type; Q1, first BJT; Q2, second BJT; Q3, third BJT; R1, first resistor; R2, second resistor; R3, third resistor. DETAILED DESCRIPTION

[0037] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the accompanying drawings. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0039] When describing positional relationships, unless otherwise specified, when an element, such as a layer, film, or substrate, is referred to as being "on" another layer, it can be directly on the other layer or intervening layers may also be present. Furthermore, when a layer is referred to as being "under" another layer, it can be directly under or one or more intervening layers may also be present. It will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present.

[0040] In the case of using “including,” “having,” and “comprising” described herein, another component may be added unless a clear limiting term such as “only,” “consisting of,” etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as having one number.

[0041] When performing latch-up testing on semiconductor devices, there are two test modes: positive current mode (PI mode) and negative current mode (NI mode). This application focuses on the design of a latch-up test structure in the positive current mode.

[0042] like Figure 1 and Figure 2 As shown, an embodiment of the present application provides a latch test structure, including: a substrate 1 of a first conductive type; a first well region 15 of a second conductive type, located in the substrate 1 of the first conductive type; a first doping region 2 of the first conductive type, located in the first well region 15 of the second conductive type; a first doping region 3 of the second conductive type, located in the first well region 15 of the second conductive type, and having a spacing with the first doping region 2 of the first conductive type; a second doping region 4 of the first conductive type, a second doping region 5 of the second conductive type, a third doping region 6 of the first conductive type, and a third doping region 7 of the second conductive type arranged at intervals in the substrate 1 of the first conductive type, the second doping region 4 of the first conductive type, the second doping region 5 of the second conductive type, the third doping region 6 of the first conductive type, and the third doping region 7 of the second conductive type are all located on the side of the first doping region 2 of the first conductive type away from the first doping region 3 of the second conductive type, and all have a spacing with the first well region 15 of the second conductive type.

[0043] Specifically, in this embodiment, the first conductivity type may be P type, and the second conductivity type may be N type. In other embodiments, the first conductivity type may also be N type, and the second conductivity type may be P type.

[0044] The first doping region 3 of the second conductivity type and the first doping region 2 of the first conductivity type are both located in the first well region 15 of the second conductivity type, and a shallow trench isolation structure 11 is provided between the first doping region 3 of the second conductivity type and the first doping region 2 of the first conductivity type. Figure 2 As shown. As an example, the second conductivity type first well region 15 is a lightly doped region, and the second conductivity type first doped region 3 and the first conductivity type first doped region 2 are heavily doped regions. The depth of the second conductivity type first well region 15 can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The depth of the shallow trench isolation structure 11 is less than 0.3 μm.

[0045] For further information, please refer to Figure 2 A shallow trench isolation structure 11 is provided between the second doping region 4 of the first conductivity type and the second doping region 5 of the second conductivity type. A shallow trench isolation structure 11 is provided between the third doping region 6 of the first conductivity type and the third doping region 7 of the second conductivity type. As an example, the second doping region 4 of the first conductivity type, the second doping region 5 of the second conductivity type, the third doping region 6 of the first conductivity type and the third doping region 7 of the second conductivity type are all heavily doped regions, and the depth of the shallow trench isolation structure 11 is less than 0.3μm. The distance between the adjacent side walls of the first well region 15 of the second conductivity type and the second doping region 5 of the second conductivity type is recorded as d. In addition, an electrode is provided on the upper surface of each doping region. The upper surface of the first doping region 3 of the second conductivity type is provided with a first electrode 9, and the upper surface of the first doping region 2 of the first conductivity type is provided with a second electrode 10.

[0046] In one embodiment, Figure 3 and Figure 4 As shown, the latch test structure also includes: a well region 81 of the first conductivity type, located in the substrate 1 of the first conductivity type, and having a spacing with the first well region 15 of the second conductivity type; the second doping region 4 of the first conductivity type and the second doping region 5 of the second conductivity type are both located in the well region 81 of the first conductivity type, and the second doping region 4 of the first conductivity type is located between the second doping region 5 of the second conductivity type and the first well region 15 of the second conductivity type; a second well region 161 of the second conductivity type, located in the substrate 1 of the first conductivity type, and located on the side of the well region 81 of the first conductivity type away from the first well region 15 of the second conductivity type, and adjacent to the well region 81 of the first conductivity type; the third doping region 6 of the first conductivity type and the third doping region 7 of the second conductivity type are both located in the second well region 161 of the second conductivity type, and the third doping region 6 of the first conductivity type is located between the third doping region 7 of the second conductivity type and the second doping region 5 of the second conductivity type.

[0047] As an example, the first conductivity type well region 81 and the second conductivity type second well region 161 are both lightly doped regions. The depth of the first conductivity type well region 81 and the second conductivity type second well region 161 can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The distance between the adjacent sidewalls of the second conductivity type first well region 15 and the second conductivity type second doped region 5 is denoted as d.

[0048] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuit diagram of some parasitic BJTs can be found in Figure 4 The first doping region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type collectively constitute a first BJT Q1; the second doping region 5 of the second conductivity type, the well region 81 of the first conductivity type, and the second well region 161 of the second conductivity type collectively constitute a second BJT Q2; the third doping region 6 of the first conductivity type, the second well region 161 of the second conductivity type, and the substrate 1 of the first conductivity type collectively constitute a third BJT Q3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the well region 81 of the first conductivity type, and the third resistor R3 is the equivalent resistance of the second well region 161 of the second conductivity type.

[0049] The latch-up test structure includes parasitic NPN and PNP BJTs, which, when the external voltage meets certain conditions, will trigger latch-up, resulting in a latch-up effect. When performing a latch-up characteristic test using the latch-up test structure in positive current mode (PI mode), the first electrode 9 can be connected to the common ground terminal VSS, and currents of varying magnitudes (for example, 1 μA, 10 μA, 100 μA, or 1 mA) can be input into the latch-up test structure through the second electrode 10. The latch-up test structure is then tested using a transmission line pulse generator (TLP) to obtain the corresponding electrical parameters of the latch-up characteristics of the current structure. Among them, the corresponding electrical parameters of the latch-up characteristics refer to the IV hysteresis characteristic curve of the above-mentioned latch-up test structure obtained by TLP testing. According to the hysteresis characteristic curve, the trigger voltage, holding voltage, trigger current and holding current of the above-mentioned latch-up test structure can be obtained. The larger the trigger voltage, the less likely it is to cause the latch-up effect, and the larger the holding voltage, the less likely it is to maintain the latch-up effect. If the normal operating voltage is 1.1V, if the trigger voltage is 1.2V, then the risk of causing the latch-up effect is very high. If the trigger voltage is 2V, then the risk of causing the latch-up effect is relatively small. Similarly, the holding voltage has the same principle. It should be noted that the holding voltage is generally smaller than the trigger voltage.

[0050] Furthermore, the electrical parameters corresponding to the latch-up test structure can be tested by adjusting the size of d, thereby preventing latch-up in integrated circuits with this latch-up test structure. Specifically, when d becomes smaller, the external noise received by the latch-up test structure increases, reducing the holding voltage and making latch-up more likely to occur. As an example, when the latch-up test structure receives an input current of 100 microamperes and d is less than 50nm, latch-up will occur. Therefore, when designing integrated circuits with this latch-up test structure, the design rule (DR) for d must be greater than 50nm to prevent latch-up.

[0051] The above-mentioned latch test structure designs a well region and doping regions of different doping types in the first conductive type substrate 1, which can trigger latching under certain external conditions. By testing the relevant electrical parameters of various possible latch structures in the integrated circuit, the regular parameters corresponding to various structures are extracted to carry out and improve the design of the integrated circuit, thereby better ensuring the reliability of the product.

[0052] In one embodiment, Figure 1 and Figure 2 Based on the embodiment shown, Figure 5 and Figure 6 As shown, the latch test structure also includes: a second well region 162 of the second conductivity type, located in the substrate 1 of the first conductivity type; the third doping region 6 of the first conductivity type and the third doping region 7 of the second conductivity type are both located in the second well region 162 of the second conductivity type, and the third doping region 6 of the first conductivity type is located between the third doping region 7 of the second conductivity type and the first well region 15 of the second conductivity type; the second doping region 4 of the first conductivity type is located between the second well region 162 of the second conductivity type and the first well region 15 of the second conductivity type, and has a spacing with both the second well region 162 of the second conductivity type and the first well region 15 of the second conductivity type; the third well region 171 of the second conductivity type is located in the substrate 1 of the first conductivity type, and is located between the second well region 162 of the second conductivity type and the second doping region 4 of the first conductivity type, and has a spacing with both the second well region 162 of the second conductivity type and the second doping region 4 of the first conductivity type; the second doping region 5 of the second conductivity type is located in the third well region 171 of the second conductivity type.

[0053] For further information, please refer to Figure 6, the first well region 15 of the second conductivity type, the second well region 162 of the second conductivity type, and the third well region 171 of the second conductivity type are all lightly doped regions. The depths of the first well region 15 of the second conductivity type, the second well region 162 of the second conductivity type, and the third well region 171 of the second conductivity type can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. A shallow trench isolation structure 11 is provided between the second doping region 5 of the second conductivity type and the third doping region 6 of the first conductivity type. The depth of the shallow trench isolation structure 11 is less than 0.3 μm. The distance between the adjacent side walls of the first well region 15 of the second conductivity type and the second doping region 5 of the second conductivity type is recorded as d.

[0054] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuit diagram of some parasitic BJTs can be found in Figure 6 The first doping region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a first BJTQ1; the third well region 171 of the second conductivity type, the substrate 1 of the first conductivity type, and the second well region 162 of the second conductivity type together constitute a second BJTQ2; the third doping region 6 of the first conductivity type, the second well region 162 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a third BJTQ3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the substrate 1 of the first conductivity type, and the third resistor R3 is the equivalent resistance of the second well region 162 of the second conductivity type.

[0055] In one embodiment, Figure 1 and Figure 2 Based on the embodiment shown, Figure 7 and Figure 8As shown, the latch test structure further includes: a second well region 163 of the second conductivity type, located in the substrate 1 of the first conductivity type; the third doping region 6 of the first conductivity type and the third doping region 7 of the second conductivity type are both located in the second well region 163 of the second conductivity type, and the third doping region 6 of the first conductivity type is located between the third doping region 7 of the second conductivity type and the first well region 15 of the second conductivity type; the second doping region 4 of the first conductivity type is located between the second well region 163 of the second conductivity type and the first well region 15 of the second conductivity type, and is connected to the second well region 163 of the second conductivity type and the first well region 15 of the second conductivity type. The well regions 15 all have spacing; the deep well region 181 of the second conductivity type is located in the substrate 1 of the first conductivity type, between the second well region 163 of the second conductivity type and the second doping region 4 of the first conductivity type, and has a spacing with the second well region 163 of the second conductivity type and the second doping region 4 of the first conductivity type; the second doping region 5 of the second conductivity type is located in the deep well region 181 of the second conductivity type; the third well region 172 of the second conductivity type is located outside the deep well region 181 of the second conductivity type, and has a spacing with the second well region 163 of the second conductivity type and the second doping region 4 of the first conductivity type.

[0056] Furthermore, the first well region 15 of the second conductivity type, the second well region 163 of the second conductivity type, the third well region 172 of the second conductivity type, and the deep well region 181 of the second conductivity type are all lightly doped regions. The depth of the first well region 15 of the second conductivity type, the second well region 163 of the second conductivity type, and the third well region 172 of the second conductivity type can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The depth of the deep well region 181 of the second conductivity type can be 0.5 μm to 1 μm, for example, 0.5 μm, 0.7 μm, or 1 μm. Figure 8 As shown, the second conductivity type third well region 172 is partially located within the second conductivity type deep well region 181. A shallow trench isolation structure 11 is provided between the second conductivity type second doping region 5 and the first conductivity type third doping region 6. The depth of the shallow trench isolation structure 11 is less than 0.3 μm. The distance between the adjacent sidewalls of the second conductivity type first well region 15 and the second conductivity type second doping region 5 is denoted as d.

[0057] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuits of some parasitic BJTs can be seen in Figure 8For example, the first doped region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute the first BJT Q1; the deep well region 181 of the second conductivity type, the substrate 1 of the first conductivity type, and the third well region 172 of the second conductivity type together constitute the second BJT Q2; the third doped region 6 of the first conductivity type, the second well region 163 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute the third BJT Q3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the substrate 1 of the first conductivity type, and the third resistor R3 is the equivalent resistance of the second well region 163 of the second conductivity type.

[0058] In one embodiment, Figure 1 and Figure 2 Based on the embodiment shown, Figure 9 and Figure 10 As shown, the latch test structure also includes: a deep well region 182 of the second conductivity type, located in the substrate 1 of the first conductivity type, and having a spacing with the first well region 15 of the second conductivity type; the second doping region 5 of the second conductivity type and the second doping region 4 of the first conductivity type are both located in the deep well region 182 of the second conductivity type, and the second doping region 5 of the second conductivity type is located between the second doping region 4 of the first conductivity type and the first well region 15 of the second conductivity type; the well region 82 of the first conductivity type is located in the deep well region 182 of the second conductivity type, and is located on the side of the second doping region 4 of the first conductivity type away from the second doping region 5 of the second conductivity type, and has a spacing with the second doping region 4 of the first conductivity type; the third doping region 6 of the first conductivity type and the third doping region 7 of the second conductivity type are both located in the well region 82 of the first conductivity type, and the third doping region 7 of the second conductivity type is located between the third doping region 6 of the first conductivity type and the second doping region of the first conductivity type; the second well region 164 of the second conductivity type is located on the periphery of the deep well region 182 of the second conductivity type, and has a spacing with the first well region 15 of the second conductivity type.

[0059] The second conductivity type second well region 164 is partially located within the second conductivity type deep well region 182. Furthermore, the second conductivity type first well region 15, the second conductivity type second well region 164, the first conductivity type well region 82, and the second conductivity type deep well region 182 are all lightly doped regions. The depths of the second conductivity type first well region 15, the second conductivity type second well region 164, and the first conductivity type well region 82 can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The depth of the second conductivity type deep well region 182 can be 0.5 μm to 1 μm, for example, 0.5 μm, 0.7 μm, or 1 μm. A shallow trench isolation structure 11 is provided between the first conductivity type second doping region 4 and the second conductivity type third doping region 7. The depth of the shallow trench isolation structure 11 is less than 0.3 μm. The distance between the adjacent sidewalls of the second conductivity type first well region 15 and the second conductivity type second doping region 5 is denoted as d.

[0060] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuit diagram of some parasitic BJTs can be found in Figure 10 For example, the first doping region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a first BJTQ1; the second doping region 4 of the first conductivity type, the deep well region 182 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a second BJTQ2; the deep well region 182 of the second conductivity type, the well region 82 of the first conductivity type, and the third doping region 7 of the second conductivity type together constitute a third BJTQ3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the deep well region 182 of the second conductivity type, and the third resistor R3 is the equivalent resistance of the well region 82 of the first conductivity type.

[0061] In one embodiment, Figure 1 and Figure 2 Based on the embodiment shown, Figure 11 and Figure 12As shown, the latch test structure also includes: a deep well region 183 of the second conductivity type, located in the substrate 1 of the first conductivity type; a well region 83 of the first conductivity type, located in the deep well region 183 of the second conductivity type, and a second doped region 4 of the first conductivity type is located in the well region 83 of the first conductivity type; a second well region 165 of the second conductivity type, located at the periphery of the deep well region 183 of the second conductivity type; a second doped region 5 of the second conductivity type is located in the second well region 165 of the second conductivity type, and is located between the well region 83 of the first conductivity type and the first well region 15 of the second conductivity type; a third doped region 7 of the second conductivity type is located on the side of the deep well region 183 of the second conductivity type away from the first well region 15 of the second conductivity type, and has a spacing with the second well region 165 of the second conductivity type; a third doped region 6 of the first conductivity type is located on the side of the third doped region 7 of the second conductivity type away from the deep well region 183 of the second conductivity type.

[0062] The second conductivity type second well region 165 is partially located within the second conductivity type deep well region 183. Furthermore, the second conductivity type first well region 15, the second conductivity type second well region 165, the second conductivity type deep well region 183, and the first conductivity type well region 83 are all lightly doped regions. The depths of the second conductivity type first well region 15, the second conductivity type second well region 165, and the first conductivity type well region 83 can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The depth of the second conductivity type deep well region 183 can be 0.5 μm to 1 μm, for example, 0.5 μm, 0.7 μm, or 1 μm. A shallow trench isolation structure 11 is provided between the first conductivity type second doping region 4 and the second conductivity type third doping region 7. The depth of the shallow trench isolation structure 11 is less than 0.3 μm. The distance between the adjacent sidewalls of the second conductivity type first well region 15 and the second conductivity type second doping region 5 is denoted as d.

[0063] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuit diagram of some parasitic BJTs can be found in Figure 12For example, the first doped region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a first BJTQ1; the well region 83 of the first conductivity type, the deep well region 183 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a second BJTQ2; the deep well region 183 of the second conductivity type, the substrate 1 of the first conductivity type, and the third doped region 7 of the second conductivity type together constitute a third BJTQ3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the deep well region 183 of the second conductivity type, and the third resistor R3 is the equivalent resistance of the substrate 1 of the first conductivity type.

[0064] In one embodiment, Figure 1 and Figure 2 Based on the embodiment shown, Figure 13 and Figure 14 As shown, the latch test structure also includes: a deep well region 184 of the second conductivity type, located in the substrate 1 of the first conductivity type; a well region 84 of the first conductivity type, located in the deep well region 184 of the second conductivity type, and a second doped region 4 of the first conductivity type is located in the well region 84 of the first conductivity type; a second well region 166 of the second conductivity type, located at the periphery of the deep well region 184 of the second conductivity type; a second doped region 5 of the second conductivity type is located in the second well region 166 of the second conductivity type, and is located between the well region 84 of the first conductivity type and the first well region 15 of the second conductivity type; a third well region 173 of the second conductivity type, located on a side of the deep well region 184 of the second conductivity type away from the first well region 15 of the second conductivity type, and having a spacing with the second well region 166 of the second conductivity type; a third doped region 7 of the second conductivity type is located in the third well region 173 of the second conductivity type; a third doped region 6 of the first conductivity type is located on a side of the third well region 173 of the second conductivity type away from the deep well region 184 of the second conductivity type, and having a spacing with the third well region 173 of the second conductivity type.

[0065] The second well region 166 of the second conductivity type is partially located within the deep well region 184 of the second conductivity type. Furthermore, the first well region 15 of the second conductivity type, the second well region 166 of the second conductivity type, the third well region 173 of the second conductivity type, the well region 84 of the first conductivity type, and the deep well region 184 of the second conductivity type are all lightly doped regions. The depths of the first well region 15 of the second conductivity type, the second well region 166 of the second conductivity type, the third well region 173 of the second conductivity type, and the well region 84 of the first conductivity type can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The depth of the deep well region 184 of the second conductivity type can be 0.5 μm to 1 μm, for example, 0.5 μm, 0.7 μm, or 1 μm. A shallow trench isolation structure 11 is provided between the second doped region 4 of the first conductivity type and the third doped region 7 of the second conductivity type. The depth of the shallow trench isolation structure 11 is less than 0.3 μm. The distance between adjacent side walls of the first well region 15 of the second conductivity type and the second doping region 5 of the second conductivity type is denoted as d.

[0066] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuit diagram of some parasitic BJTs can be found in Figure 14 For example, the first doped region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a first BJTQ1; the well region 84 of the first conductivity type, the deep well region 184 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a second BJTQ2; the deep well region 184 of the second conductivity type, the substrate 1 of the first conductivity type, and the third doped region 7 of the second conductivity type together constitute a third BJTQ3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the deep well region 184 of the second conductivity type, and the third resistor R3 is the equivalent resistance of the well region 84 of the first conductivity type.

[0067] In one embodiment, Figure 1 and Figure 2 Based on the embodiment shown, Figure 15 and Figure 16As shown, the latch test structure further includes: a first deep well region 19 of the second conductivity type, located in the substrate 1 of the first conductivity type; a well region 85 of the first conductivity type, located in the first deep well region 19 of the second conductivity type, and a second doped region 4 of the first conductivity type is located in the well region 85 of the first conductivity type; a second well region 167 of the second conductivity type, located outside the first deep well region 19 of the second conductivity type; a second doped region 5 of the second conductivity type is located in the second well region 167 of the second conductivity type, and is located between the well region 85 of the first conductivity type and the first well region 15 of the second conductivity type; a second deep well region 20 of the second conductivity type, located in the first conductivity type type substrate 1, and is located on the side of the first deep well region 19 of the second conductivity type away from the first well region 15 of the second conductivity type, and has a spacing with the second well region 167 of the second conductivity type; the third doped region 7 of the second conductivity type is located in the second deep well region 20 of the second conductivity type; the third well region 174 of the second conductivity type is located on the periphery of the second deep well region 20 of the second conductivity type, and has a spacing with the second well region 167 of the second conductivity type; the third doped region of the first conductivity type is located on the side of the second deep well region 20 of the second conductivity type away from the first deep well region 19 of the second conductivity type, and has a spacing with the third well region 174 of the second conductivity type.

[0068] The second conductivity type second well region 167 is partially located within the second conductivity type first deep well region 19, and the second conductivity type third well region 174 is partially located within the second conductivity type second deep well region 20. Furthermore, the second conductivity type first well region 15, the second conductivity type second well region 167, the second conductivity type third well region 174, the first conductivity type well region 85, the second conductivity type first deep well region 19, and the second conductivity type second deep well region 20 are all lightly doped regions. The depths of the second conductivity type first well region 15, the second conductivity type second well region 167, the second conductivity type third well region 174, and the first conductivity type well region 85 can be 0.3 μm to 0.5 μm, for example, 0.3 μm, 0.4 μm, or 0.5 μm. The depths of the second conductivity type first deep well region 19 and the second conductivity type second deep well region 20 can be 0.5 μm to 1 μm, for example, 0.5 μm, 0.7 μm, or 1 μm. A shallow trench isolation structure 11 is provided between the first conductivity type second doping region 4 and the second conductivity type third doping region 7. The depth of the shallow trench isolation structure 11 is less than 0.3 μm. The distance between the second conductivity type first well region 15 and the adjacent sidewalls of the second conductivity type second doping region 5 is denoted as d.

[0069] When the first conductivity type is P type and the second conductivity type is N type, a plurality of parasitic NPN type BJTs or PNP type BJTs are formed in the latch test structure. The equivalent circuit diagram of some parasitic BJTs can be found in Figure 16 For example, the first doped region 2 of the first conductivity type, the first well region 15 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a first BJTQ1; the well region 85 of the first conductivity type, the first deep well region 19 of the second conductivity type, and the substrate 1 of the first conductivity type together constitute a second BJTQ2; the first deep well region 19 of the second conductivity type, the well region 85 of the first conductivity type, and the second deep well region 20 of the second conductivity type together constitute a third BJTQ3. The first resistor R1 is the equivalent resistance of the first well region 15 of the second conductivity type, the second resistor R2 is the equivalent resistance of the first deep well region 19 of the second conductivity type, and the third resistor R3 is the equivalent resistance of the well region 85 of the first conductivity type.

[0070] Each of the latch-up test structures described above includes parasitic NPN and PNP BJTs, which, when an external voltage meets certain conditions, will trigger latch-up, generating a latch-up effect. When performing a latch-up characteristic test using the latch-up test structure in positive current mode (PI mode), the first electrode 9 can be connected to the common ground terminal VSS, and currents of varying magnitudes (for example, 1 μA, 10 μA, 100 μA, or 1 mA) can be input into the latch-up test structure through the second electrode 10. The latch-up test structure is then tested using a transmission line pulse generator (TLP) to obtain the corresponding electrical parameters of the latch-up characteristics of the current structure. Among them, the corresponding electrical parameters of the latch-up characteristics refer to the IV hysteresis characteristic curve of the above-mentioned latch-up test structure obtained by TLP testing. According to the hysteresis characteristic curve, the trigger voltage, holding voltage, trigger current and holding current of the above-mentioned latch-up test structure can be obtained. The larger the trigger voltage, the less likely it is to cause the latch-up effect, and the larger the holding voltage, the less likely it is to maintain the latch-up effect. If the normal operating voltage is 1.1V, if the trigger voltage is 1.2V, then the risk of causing the latch-up effect is very high. If the trigger voltage is 2V, then the risk of causing the latch-up effect is relatively small. Similarly, the holding voltage has the same principle. It should be noted that the holding voltage is generally smaller than the trigger voltage.

[0071] Furthermore, the electrical parameters corresponding to the latch-up test structure can be tested by adjusting the size of d, thereby preventing latch-up in integrated circuits with this latch-up test structure. Specifically, when d becomes smaller, the external noise received by the latch-up test structure increases, reducing the holding voltage and making latch-up more likely to occur. As an example, when the latch-up test structure receives an input current of 100 microamperes and d is less than 50nm, latch-up will occur. Therefore, when designing integrated circuits with this latch-up test structure, the design rule (DR) for d must be greater than 50nm to prevent latch-up.

[0072] The latch-up test structure utilizes well regions and doped regions of varying structural types within a substrate of the first conductivity type to simulate potential latch-up structures within an integrated circuit. These latch-up test structures can trigger latch-up under certain external conditions. By testing the relevant electrical parameters of various potential latch-up structures within an integrated circuit, the corresponding regular parameters can be extracted to improve integrated circuit design and enhance product reliability.

[0073] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0074] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A latch test structure, characterized in that: The latch test structure includes: a substrate of a first conductivity type; a first well region of a second conductivity type, located in a substrate of the first conductivity type; a first doped region of the first conductivity type, located in a first well region of the second conductivity type; A first doping region of the second conductivity type is located in the first well region of the second conductivity type and is spaced apart from the first doping region of the first conductivity type; a second doping region of the first conductivity type, a second doping region of the second conductivity type, a third doping region of the first conductivity type, and a third doping region of the second conductivity type arranged at intervals in the substrate of the first conductivity type, wherein the second doping region of the first conductivity type, the second doping region of the second conductivity type, the third doping region of the first conductivity type, and the third doping region of the second conductivity type are all located on a side of the first doping region of the first conductivity type away from the first doping region of the second conductivity type, and are all spaced apart from the first well region of the second conductivity type; A first electrode is provided on the upper surface of the first doped region of the second conductivity type, and a second electrode is provided on the upper surface of the first doped region of the first conductivity type; the first electrode is connected to the common ground terminal, and the latch test structure inputs current through the second electrode.

2. The latch test structure according to claim 1, wherein: Also includes: a well region of a first conductivity type, located in a substrate of the first conductivity type and spaced apart from a first well region of the second conductivity type; a second doped region of the first conductivity type and a second doped region of the second conductivity type are both located in the well region of the first conductivity type, and the second doped region of the first conductivity type is located between the second doped region of the second conductivity type and the first well region of the second conductivity type; The second well region of the second conductivity type is located in the substrate of the first conductivity type, and is located on the side of the well region of the first conductivity type away from the first well region of the second conductivity type, and is adjacent to the well region of the first conductivity type; the third doping region of the first conductivity type and the third doping region of the second conductivity type are both located in the second well region of the second conductivity type, and the third doping region of the first conductivity type is located between the third doping region of the second conductivity type and the second doping region of the second conductivity type.

3. The latch test structure according to claim 2, wherein: It also includes a shallow trench isolation structure, which is located between the first doping region of the first conductivity type and the first doping region of the second conductivity type, between the second doping region of the first conductivity type and the second doping region of the second conductivity type, and between the third doping region of the first conductivity type and the third doping region of the second conductivity type.

4. The latch test structure according to claim 1, wherein: Also includes: a second well region of a second conductivity type, located in the substrate of the first conductivity type; The third doping region of the first conductivity type and the third doping region of the second conductivity type are both located in the second well region of the second conductivity type, and the third doping region of the first conductivity type is located between the third doping region of the second conductivity type and the first well region of the second conductivity type; the second doping region of the first conductivity type is located between the second well region of the second conductivity type and the first well region of the second conductivity type, and is spaced apart from both the second well region of the second conductivity type and the first well region of the second conductivity type; The third well region of the second conductivity type is located in the substrate of the first conductivity type, and is located between the second well region of the second conductivity type and the second doped region of the first conductivity type, and has a distance from the second well region of the second conductivity type and the second doped region of the first conductivity type; the second doped region of the second conductivity type is located in the third well region of the second conductivity type.

5. The latch test structure according to claim 1, wherein: Also includes: a second well region of a second conductivity type, located in the substrate of the first conductivity type; The third doping region of the first conductivity type and the third doping region of the second conductivity type are both located in the second well region of the second conductivity type, and the third doping region of the first conductivity type is located between the third doping region of the second conductivity type and the first well region of the second conductivity type; the second doping region of the first conductivity type is located between the second well region of the second conductivity type and the first well region of the second conductivity type, and is spaced apart from both the second well region of the second conductivity type and the first well region of the second conductivity type; a deep well region of the second conductivity type located in the substrate of the first conductivity type, located between the second well region of the second conductivity type and the second doped region of the first conductivity type, and spaced apart from both the second well region of the second conductivity type and the second doped region of the first conductivity type; the second doped region of the second conductivity type located in the deep well region of the second conductivity type; The third well region of the second conductivity type is located at the periphery of the deep well region of the second conductivity type and has a distance from both the second well region of the second conductivity type and the second doped region of the first conductivity type.

6. The latch test structure according to claim 5, wherein: The third well region of the second conductivity type is partially located in the deep well region of the second conductivity type.

7. The latch test structure according to claim 1, wherein: Also includes: a deep well region of the second conductivity type, located in the substrate of the first conductivity type and spaced apart from the first well region of the second conductivity type; a second doped region of the second conductivity type and the second doped region of the first conductivity type are both located in the deep well region of the second conductivity type, and the second doped region of the second conductivity type is located between the second doped region of the first conductivity type and the first well region of the second conductivity type; a well region of the first conductivity type located in the deep well region of the second conductivity type and located on a side of the second doped region of the first conductivity type away from the second doped region of the second conductivity type, and having a distance therebetween from the second doped region of the first conductivity type; a third doped region of the first conductivity type and a third doped region of the second conductivity type are both located in the well region of the first conductivity type, and the third doped region of the second conductivity type is located between the third doped region of the first conductivity type and the second doped region of the first conductivity type; The second well region of the second conductivity type is located at the periphery of the deep well region of the second conductivity type and is spaced apart from the first well region of the second conductivity type.

8. The latch test structure according to claim 7, wherein: The second well region of the second conductivity type is partially located in the deep well region of the second conductivity type.

9. The latch test structure according to claim 1, wherein: Also includes: A deep well region of the second conductivity type is located in the substrate of the first conductivity type; A well region of the first conductivity type is located in the deep well region of the second conductivity type, and a second doped region of the first conductivity type is located in the well region of the first conductivity type; A second well region of the second conductivity type is located outside the deep well region of the second conductivity type; a second doped region of the second conductivity type is located within the second well region of the second conductivity type and between the well region of the first conductivity type and the first well region of the second conductivity type; a third doped region of the second conductivity type is located on a side of the deep well region of the second conductivity type away from the first well region of the second conductivity type and has a distance from the second well region of the second conductivity type; and a third doped region of the first conductivity type is located on a side of the third doped region of the second conductivity type away from the deep well region of the second conductivity type.

10. The latch test structure according to claim 9, wherein: The second well region of the second conductivity type is partially located in the deep well region of the second conductivity type.

11. The latch test structure according to claim 1, wherein: Also includes: A deep well region of the second conductivity type is located in the substrate of the first conductivity type; A well region of the first conductivity type is located in the deep well region of the second conductivity type, and a second doped region of the first conductivity type is located in the well region of the first conductivity type; a second well region of the second conductivity type, located outside the deep well region of the second conductivity type; a second doped region of the second conductivity type located within the second well region of the second conductivity type and between the well region of the first conductivity type and the first well region of the second conductivity type; The third well region of the second conductivity type is located on a side of the deep well region of the second conductivity type away from the first well region of the second conductivity type, and has a distance from the second well region of the second conductivity type; the third doped region of the second conductivity type is located in the third well region of the second conductivity type; the third doped region of the first conductivity type is located on a side of the third well region of the second conductivity type away from the deep well region of the second conductivity type, and has a distance from the third well region of the second conductivity type.

12. The latch test structure according to claim 11, wherein: The second well region of the second conductivity type is partially located in the deep well region of the second conductivity type.

13. The latch test structure according to claim 1, wherein: Also includes: a first deep well region of the second conductivity type, located in the substrate of the first conductivity type; A well region of the first conductivity type is located in a first deep well region of the second conductivity type, and a second doped region of the first conductivity type is located in the well region of the first conductivity type; a second well region of the second conductivity type, located outside the first deep well region of the second conductivity type; a second doped region of the second conductivity type located within the second well region of the second conductivity type and between the first well region of the first conductivity type and the first well region of the second conductivity type; a second deep well region of the second conductivity type, located in the substrate of the first conductivity type and located on a side of the first deep well region of the second conductivity type away from the first well region of the second conductivity type, and spaced apart from the second well region of the second conductivity type; and a third doped region of the second conductivity type located in the second deep well region of the second conductivity type; The third well region of the second conductivity type is located at the periphery of the second deep well region of the second conductivity type and is spaced apart from the second well region of the second conductivity type; the third doped region of the first conductivity type is located at a side of the second deep well region of the second conductivity type away from the first deep well region of the second conductivity type and is spaced apart from the third well region of the second conductivity type.

14. The latch test structure according to claim 13, wherein: The second well region of the second conductivity type is partially located in the first deep well region of the second conductivity type, and the third well region of the second conductivity type is partially located in the second deep well region of the second conductivity type.

15. The latch test structure according to any one of claims 4 to 14, characterized in that: It also includes a shallow trench isolation structure, which is located between the first doping region of the first conductivity type and the first doping region of the second conductivity type, and between the second doping region of the first conductivity type, the second doping region of the second conductivity type, the third doping region of the first conductivity type and the third doping region of the second conductivity type.

16. The latch-up test structure according to claim 1, wherein: The first conductivity type includes a P type, and the second conductivity type includes an N type.

17. The latch test structure according to claim 1, wherein: The first well region of the second conductivity type is a lightly doped region, and the first doped region of the first conductivity type, the first doped region of the second conductivity type, the second doped region of the first conductivity type, the second doped region of the second conductivity type, the third doped region of the first conductivity type and the third doped region of the second conductivity type are all heavily doped regions.

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