Display panel, display device, and method for manufacturing display panel

Abstract

This application discloses a display panel, a display device, and a method for manufacturing the display panel. The display panel includes a display area, which comprises a first region and a second region. The display panel includes: a substrate; a first electrode layer, at least a portion of which is located on one side of the substrate. The first electrode layer includes a first electrode and an opening, with the first electrode located in the first region and the opening located in the second region. The display panel is provided with a blocking structure to prevent the first electrode from extending into the second region. This design improves the problem of the first electrode warping upwards towards the second region, thereby enhancing the reliability of the packaging.

Description

[0001] Related applications

[0002] This application claims priority to Chinese patent application 202210654650.2, filed on June 10, 2022, entitled “Display Panel, Manufacturing Method and Display Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application belongs to the field of display technology, and in particular relates to a display panel, a display device, and a method for manufacturing the display panel. Background Technology

[0004] Electrode layer patterning is an important method to improve the transmittance of display panels, and it can be achieved through laser ashing. For example, after depositing the electrode layer, an infrared laser can be used to etch the electrode layer from the back side of the substrate, thereby achieving electrode layer patterning. However, after laser ashing, the electrodes included in the patterned electrode layer may experience edge warping, reducing the reliability of the packaging. Summary of the Invention

[0005] This application provides a display panel, a display device, and a method for manufacturing the display panel, which can improve the reliability of the packaging.

[0006] In a first aspect, embodiments of this application provide a display panel, including a display area, the display area including a first region and a second region, the display panel including: a substrate; a first electrode layer, at least a portion of the first electrode layer being located on one side of the substrate, the first electrode layer including a first electrode and an opening, the first electrode being located in the first region and the opening being located in the second region; wherein, the display panel is provided with a blocking structure, the blocking structure being used to block the first electrode from extending into the second region.

[0007] According to an embodiment of the first aspect of this application, the surface of the substrate facing the first electrode layer includes:

[0008] The first surface is located in the first region;

[0009] The second surface is located in the second region;

[0010] Along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form a blocking structure.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the first height difference is greater than the thickness of the first electrode in the thickness direction of the display panel.

[0012] According to any of the foregoing embodiments of the first aspect of this application, in the thickness direction of the display panel, the first surface is closer to the first electrode layer than the second surface.

[0013] According to any of the foregoing embodiments of the first aspect of this application, the first electrode is attached to the first surface of the substrate.

[0014] According to any of the foregoing embodiments of the first aspect of this application, the second surface includes a first sub-surface and a second sub-surface. In a horizontal direction perpendicular to the thickness direction of the display panel, the first sub-surface is located between the first surface and the second sub-surface, and the first sub-surface and the second sub-surface have a second height difference along the thickness direction of the display panel.

[0015] According to any of the foregoing embodiments of the first aspect of this application, in the thickness direction of the display panel, the second sub-surface is closer to the first electrode layer than the first surface.

[0016] According to any of the foregoing embodiments of the first aspect of this application, the second sub-surface is flush with the first surface in the horizontal direction.

[0017] According to any of the foregoing embodiments of the first aspect of this application, the substrate includes:

[0018] substrate;

[0019] A planarization layer is located on one side of the substrate;

[0020] The pixel-defining layer is located on the side of the planarization layer that faces away from the substrate;

[0021] The light-emitting layer, at least a portion of which is located on the side of the pixel-defining layer opposite to the planarization layer;

[0022] At least a portion of the first electrode layer is located on the side of the light-emitting layer opposite to the pixel-defining layer.

[0023] According to any of the foregoing embodiments of the first aspect of this application, the substrate includes at least one shielding layer, the at least one shielding layer is located in a first region, and the orthogonal projection of the at least one shielding layer on the substrate covers the orthogonal projection of the first electrode on the substrate.

[0024] According to any of the foregoing embodiments of the first aspect of this application, at least one shielding layer includes a first shielding layer and a second shielding layer. In the thickness direction of the display panel, the second shielding layer is closer to the first electrode layer than the first shielding layer; in the horizontal direction perpendicular to the thickness direction of the display panel, the second shielding layer is closer to the second region than the first shielding layer.

[0025] According to any of the foregoing embodiments of the first aspect of this application, the second shielding layer is located on the side of the planarization layer facing or away from the substrate, or the second shielding layer is located within the pixel defining layer.

[0026] According to any of the foregoing embodiments of the first aspect of this application, the substrate further includes a signal line layer and a second electrode layer. The signal line layer is located on the side of the planarization layer facing the substrate, and the second electrode layer is located on the side of the planarization layer away from the substrate. The signal line layer and the second electrode layer are located on opposite sides of the planarization layer and are connected through the planarization layer. The first electrode layer and the second electrode layer are located on opposite sides of the light-emitting layer. The second shielding layer is disposed in the same layer as the signal line layer or the second electrode layer, or at least a portion of the signal line layer is multiplexed as the second shielding layer.

[0027] According to any of the foregoing embodiments of the first aspect of this application, the substrate is provided with a second relief groove, the second relief groove being located in a second region; the first surface and the second surface are connected by a third surface at the junction of the first region and the second region, and the third surface and at least a portion of the second surface form the inner wall surface of the second relief groove.

[0028] According to any of the foregoing embodiments of the first aspect of this application, the third surface extends along the thickness direction of the display panel.

[0029] According to any of the foregoing embodiments of the first aspect of this application, the dimension of the third surface in the thickness direction of the display panel is greater than the thickness of the first electrode in the thickness direction of the display panel.

[0030] According to any of the foregoing embodiments of the first aspect of this application, the second clearance groove penetrates the pixel defining layer and at least a portion of the planarization layer, or the second clearance groove penetrates at least a portion of the pixel defining layer.

[0031] According to any of the foregoing embodiments of the first aspect of this application, the substrate is further provided with a first relief groove, the first relief groove is located in a first region, the first relief groove is adjacent to and connected to a second relief groove, and at least a portion of the first surface forms the inner wall surface of the first relief groove.

[0032] According to any of the foregoing embodiments of the first aspect of this application, the first clearance groove penetrates the pixel defining layer and at least a portion of the planarization layer, or the first clearance groove penetrates at least a portion of the pixel defining layer.

[0033] According to any of the foregoing embodiments of the first aspect of this application, the substrate includes a second shielding layer, the second shielding layer includes a second shielding portion for shielding laser and a second through hole for allowing laser to pass through, the second shielding portion is located in a first region, the second through hole is located in a second region, and at least a portion of the surface of the second shielding portion facing away from the substrate forms the inner wall surface of a first clearance groove.

[0034] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the opening on the substrate coincides with the orthographic projection of the second through hole on the substrate.

[0035] According to any of the foregoing embodiments of the first aspect of this application, in the direction from the pixel limiting layer to the substrate, the sidewall surface of the second shielding portion near the second through hole is inclined in a direction away from the second through hole; or, the second shielding portion is provided with a groove, the groove is provided with an opening, and the opening is provided facing the second through hole.

[0036] Secondly, embodiments of this application provide a display panel, including a display area, the display area including a first area and a second area, the display panel including:

[0037] Matrix;

[0038] A first electrode layer, at least a portion of which is located on one side of the substrate, the first electrode layer includes a first electrode and an opening, the first electrode being located in a first region and the opening being located in a second region;

[0039] The surface of the substrate facing the first electrode layer includes:

[0040] The first surface is located in the first region;

[0041] The second surface is located in the second region;

[0042] Along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form a blocking structure.

[0043] According to any of the foregoing embodiments of the second aspect of this application, the first height difference is greater than the thickness of the first electrode in the thickness direction of the display panel.

[0044] According to any of the foregoing embodiments of the second aspect of this application, the first electrode is attached to the first surface of the substrate.

[0045] Thirdly, embodiments of this application provide a display panel, including a display area, the display area including a first area and a second area, the display panel including:

[0046] Matrix;

[0047] A first electrode layer, at least a portion of which is located on one side of the substrate, the first electrode layer including a first electrode and an opening;

[0048] The first region is a first electrode material retention region, the second region is a first electrode material removal region, the first electrode is located in the first electrode material retention region, the opening is located in the first electrode material removal region, a portion of the first electrode material layer located in the first electrode material retention region is retained to form the first electrode, and a portion of the first electrode material layer located in the first electrode material removal region is removed to form the opening.

[0049] The display panel has a blocking structure configured to disconnect the retained portion of the first electrode material layer from the removed portion before the opening is formed.

[0050] According to any of the foregoing embodiments of the third aspect of this application, the surface of the substrate facing the first electrode layer includes:

[0051] The first surface is located in the first region;

[0052] The second surface is located in the second region;

[0053] Along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form a blocking structure.

[0054] According to any of the foregoing embodiments of the third aspect of this application, the first height difference is greater than the thickness of the first electrode in the thickness direction of the display panel.

[0055] According to any of the foregoing embodiments of the third aspect of this application, in the thickness direction of the display panel, the first surface is closer to the first electrode layer than the second surface.

[0056] According to any of the foregoing embodiments of the third aspect of this application, the first electrode is attached to the first surface of the substrate.

[0057] Fourthly, embodiments of this application provide a method for manufacturing a display panel. The display panel includes a display area, which includes a first area and a second area. The manufacturing method includes:

[0058] Provide a substrate, the substrate having a blocking structure;

[0059] A first electrode material layer is provided, the first electrode material layer is located on one side of the substrate, and the blocking structure causes the first electrode material layer to be broken at the junction of the first region and the second region;

[0060] A laser removes a portion of the first electrode material layer located in the second region to form an opening. The retained portion of the first electrode material layer forms the first electrode, and the first electrode and the opening form the first electrode layer.

[0061] According to any of the foregoing embodiments of the fourth aspect of this application, a substrate is provided, and the step of forming a blocking structure on the substrate includes:

[0062] A substrate layer structure is provided, and a portion of the substrate layer structure is removed to form a substrate; wherein the surface of the substrate facing the first electrode layer includes:

[0063] The first surface is located in the first region;

[0064] The second surface is located in the second region;

[0065] Along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form a blocking structure.

[0066] According to any of the foregoing embodiments of the fourth aspect of this application, the substrate layer structure includes:

[0067] substrate;

[0068] A shielding layer is located on one side of the substrate. The shielding layer includes a shielding portion located in a first region.

[0069] The planarization layer is located on the side of the shielding layer that faces away from the substrate;

[0070] The pixel-limiting layer is located on the side of the planarization layer that faces away from the occlusion layer.

[0071] The steps of providing a matrix layer structure and removing a portion of the matrix layer structure to form a matrix include:

[0072] The portion of the planarization layer and the pixel limiting layer located above the occluding portion is removed to form a first clearance groove, and the portion of the pixel limiting layer and the planarization layer located in the second region is removed to form a second clearance groove. The first clearance groove and the second clearance groove are adjacent to each other and connected. At least a portion of the first surface forms the inner wall surface of the first clearance groove, and at least a portion of the second surface forms the inner wall surface of the second clearance groove.

[0073] Fifthly, embodiments of this application provide a display device, including a display panel from any of the preceding embodiments of the first to third aspects.

[0074] In the display panel provided in this application embodiment, the display area of ​​the display panel includes a first region and a second region. The display panel includes a substrate and a first electrode layer. At least a portion of the first electrode layer is located on one side of the substrate. The first electrode layer includes a first electrode and an opening. The first electrode is located in the first region, and the opening is located in the second region. The display panel is provided with a blocking structure to prevent the first electrode from extending into the second region. The first electrode layer is close to the subsequent encapsulation layer, and the shape of the first electrode layer will affect the encapsulation effect. During the manufacturing process of the display panel, a first electrode material layer is first formed in a first region and a second region. Before laser ashing removes part of the first electrode material layer, a blocking structure can prevent the first electrode from extending into the second region. That is, the blocking structure is configured to disconnect the retained portion and the removed portion of the first electrode material layer before laser ashing removes part of the first electrode material layer. In other words, the blocking structure is configured to break the first electrode material layer used to form the first electrode layer at the junction of the first region and the second region, so that the portion of the first electrode material layer in the first region and the portion in the second region are separated from each other. When laser ashing removes the portion of the first electrode material layer in the second region, it can improve the problem of the edge of the portion in the first region being upturned due to the adhesion between the portion of the first electrode material layer in the second region and the portion in the first region. That is, it can improve the problem of the edge of the first electrode facing the second region being upturned, and prevent the upturned edge of the first electrode from scratching the encapsulation layer, thereby improving the reliability of the encapsulation. Attached Figure Description

[0075] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0076] Figure 1 A top view of an example display panel provided in an embodiment of this application;

[0077] Figures 2 to 14 For different embodiments Figure 1 Sectional view along the BB direction;

[0078] Figure 15 This is a schematic diagram of a method for manufacturing a display panel according to an embodiment of this application.

[0079] Explanation of reference numerals in the attached figures:

[0080] 10. Display panel; 11. First area; 12. Second area;

[0081] 100, Substrate; 101, First surface; 101a, Third sub-surface; 101b, Fourth sub-surface; 102, Second surface; 102a, First sub-surface; 102b, Second sub-surface; 103, Second clearance groove; 104, First clearance groove; 105, Third surface; 110, Substrate; 120, Planarization layer; 130, Pixel defining layer; 130a, First sub-layer; 130b, Second sub-layer; 140, Masking layer; 141, First masking layer; 142, Second masking layer; 142a, Second masking portion; 142b, Second through-hole; 142c, Sidewall surface; 142d, Groove; 150, Signal line layer; 160, Second electrode layer;

[0082] 200. Emissive layer;

[0083] 300, First electrode layer; 310, First electrode; 320, Opening;

[0084] AA, display area; NA, non-display area. Detailed Implementation

[0085] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0086] Patterning the cathode layer is an important method to improve the transmittance of display panels, and it can be achieved through laser ashing. For example, after depositing the cathode layer, an infrared laser can be used to etch the cathode layer from the side of the substrate away from the cathode layer, thus achieving laser etching and patterning of the cathode layer. However, after laser ashing, the edges of the retained cathode may curl upwards, which adversely affects subsequent packaging and reduces packaging reliability.

[0087] To address the aforementioned technical problems, this application is proposed. To better understand this application, the display panel and display device provided herein will be described below with reference to the accompanying drawings.

[0088] Please see Figure 1 , Figure 1 This is a top view of an example display panel 10 provided in an embodiment of this application. Figure 1As shown, the display panel 10 may include a display area AA and a non-display area NA. The display area AA may include a first region 11 and a second region 12. The first region 11 of the display panel 10 can be used to set pixel units, and the first region 11 may be arranged in an array. The second region 12 may be the region between two adjacent first regions 11. Optionally, the second region 12 may be arranged around the first region 11. In other embodiments, the display panel may also include only the display area AA and exclude the non-display area NA.

[0089] Please see Figure 1 and Figure 2 , Figure 2 It shows Figure 1 A cross-sectional view of an example along the BB direction.

[0090] like Figure 1 and Figure 2 As shown, an embodiment of the first aspect of this application provides a display panel 10. As described above, the display panel 10 includes a display area AA, which includes a first region 11 and a second region 12. The display panel 10 includes a substrate 100 and a first electrode layer 300. At least a portion of the first electrode layer 300 is located on one side of the substrate 100. The first electrode layer 300 includes a first electrode 310 and an opening 320. The first electrode 310 is located in the first region 11, and the opening 320 is located in the second region 12. The first region 11 is a first electrode material retention region, and the second region 12 is a first electrode material removal region. That is, the first electrode 310 is located in the first electrode material retention region, and the opening 320 is located in the first electrode material removal region. A portion of the first electrode material layer located in the first electrode material retention region is retained to form the first electrode 310, and a portion of the first electrode material layer located in the first electrode material removal region is removed to form the opening 320. The display panel 10 is provided with a blocking structure for preventing the first electrode 310 from extending into the second region 12. In other words, the display panel 10 is provided with a blocking structure, which is configured to disconnect the retained portion of the first electrode material layer from the removed portion before the opening 320 is formed.

[0091] In the display panel 10 provided in this embodiment, the display area AA of the display panel 10 includes a first region 11 and a second region 12. The display panel 10 includes a substrate 100 and a first electrode layer 300. The first electrode layer 300 includes a first electrode 310 and an opening 320. The substrate 100 is provided with a blocking structure that can prevent the first electrode 310 from extending into the second region 12. That is, the display panel 10 is provided with a blocking structure, which is configured to disconnect the retained portion and the removed portion of the first electrode material layer before the opening 320 is formed. The first electrode layer 300 is close to the subsequent encapsulation layer, and the shape of the first electrode layer 300 will affect the encapsulation effect. During the manufacturing process of the display panel 10, a first electrode material layer for forming the first electrode layer 300 is first formed in the first region 11 and the second region 12. Before laser ashing is performed to remove part of the first electrode material layer, the blocking structure can prevent the first electrode 310 from extending into the second region 12. That is, the blocking structure can cause the first electrode material layer for forming the first electrode layer 300 to break at the junction of the first region 11 and the second region 12, so that the part of the first electrode material layer in the first region 11 and the part in the second region 12 are separated from each other. When laser ashing is performed to remove the part of the first electrode material layer in the second region 12, the problem of the edge of the part in the first region 11 being raised due to the adhesion between the part of the first electrode material layer in the second region 12 and the part in the first region 11 can be improved. That is, the problem of the edge of the first electrode 310 being raised toward the second region 12 can be improved, and the raised edge of the first electrode 310 is prevented from scratching the encapsulation layer, thereby improving the reliability of the encapsulation.

[0092] There are various ways to configure the substrate 100, and the substrate 100 may also include a pixel driving circuit. For example, the substrate 100 may include a substrate 110 and a plurality of layer structures stacked on one side of the substrate 110. The substrate 100 includes a substrate 110; a planarization layer 120 located on one side of the substrate 110; a pixel defining layer 130 located on the side of the planarization layer 120 opposite to the substrate 110; and a light-emitting layer 200, at least a portion of which is located on the side of the pixel defining layer 130 opposite to the planarization layer 120; wherein at least a portion of the first electrode layer 300 is located on the side of the light-emitting layer 200 opposite to the pixel defining layer 130.

[0093] The substrate 100 further includes a signal line layer 150 and a second electrode layer 160. The signal line layer 150 is located on the side of the planarization layer 120 facing the substrate 110, and the second electrode layer 160 is located on the side of the planarization layer 120 away from the substrate 110. The second electrode layer 160 is located between the planarization layer 120 and the pixel defining layer 130. The signal line layer 150 and the second electrode layer 160 are located on both sides of the planarization layer 120 and are connected through the planarization layer 120. The first electrode layer 300 and the second electrode layer 160 are located on both sides of the light-emitting layer 200. Optionally, the second electrode layer 160 includes a plurality of pixel electrodes arranged in an array. The pixel defining layer 130 includes an isolation portion and a pixel opening formed by the isolation portion. Pixel electrodes are disposed corresponding to each pixel opening. A light-emitting structure is disposed within the pixel opening. The pixel electrodes of the second electrode layer 160 and the first electrode 310 of the first electrode layer 300 interact to drive the light-emitting structure to emit light.

[0094] Optionally, the light-emitting layer 200 includes a carrier layer, which comprises a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, etc. The light-emitting structure is located between the hole transport layer and the electron transport layer. In some embodiments, the carrier layer may further include an electron blocking layer and a hole blocking layer.

[0095] In other alternative embodiments, please continue to refer to Figure 1 and Figure 2 The surface of the substrate 100 facing the first electrode layer 300 includes a first surface 101 and a second surface 102. The first surface 101 is located in a first region 11, and the second surface 102 is located in a second region 12. Along the thickness direction Z of the display panel 10, the first surface 101 and the second surface 102 have a first height difference at the junction of the first region 11 and the second region 12 to form a blocking structure. In one embodiment, the first height difference is greater than the thickness of the first electrode 310 in the thickness direction Z of the display panel 10.

[0096] In these alternative embodiments, the surface of the substrate 100 includes a first surface 101 located in the first region 11 and a second surface 102 located in the second region 12. Because there is a first height difference between the first surface 101 and the second surface 102 at the boundary between the first region 11 and the second region 12, the first electrode material layer used to fabricate the first electrode layer 300 breaks at the boundary between the first region 11 and the second region 12 during the formation of the first electrode material layer. Therefore, the blocking structure formed by the first height difference can improve the problem of the first electrode 310 tilting upwards towards the edge of the second region 12, thereby improving the reliability of the package.

[0097] Furthermore, in this embodiment, the first surface 101 and the second surface 102 form a blocking structure by having a first height difference at the junction of the first region 11 and the second region 12. That is, the blocking structure is formed by utilizing the structure of the substrate 100 itself, which can reduce the manufacturing cost of the display panel 10.

[0098] In other embodiments, such as Figure 2 As shown, in the thickness direction Z of the display panel 10, the first surface 101 is closer to the first electrode layer 300 than the second surface 102. Optionally, the first electrode 310 is attached to the first surface 101 of the substrate 100. That is, the second surface 102 located in the second region 12 is located closer to the substrate 110 than the first surface 101 located in the first region 11. The pixel defining layer 130, planarization layer 120 and other structures can be patterned to form a blocking structure. For example, the pixel defining layer 130, planarization layer 120 and other structures in the second region 12 can be removed to form a second clearance groove 103 located in the second region 12.

[0099] In some alternative embodiments, such as Figure 3 As shown, the second surface 102 includes a first sub-surface 102a and a second sub-surface 102b. In a horizontal direction perpendicular to the thickness direction Z of the display panel 10, the first sub-surface 102a is located between the first surface 101 and the second sub-surface 102b. The first sub-surface 102a and the second sub-surface 102b have a second height difference along the thickness direction Z of the display panel 10; the horizontal direction is parallel to the display surface of the display panel 10. For example, the horizontal direction is... Figure 3 In the X direction. Optionally, the first height difference described above is formed between the first sub-surface 102a and the first surface 101. Optionally, the first height difference and the second height difference are equal.

[0100] In these alternative embodiments, in the horizontal direction X perpendicular to the thickness direction Z of the display panel 10, the first sub-surface 102a is located between the first surface 101 and the second sub-surface 102b, and the first sub-surface 102a and the first surface 101 have a first height difference along the thickness direction Z of the display panel 10 to form a blocking structure.

[0101] In other embodiments, such as Figure 3As shown, in the thickness direction Z of the display panel 10, the second sub-surface 102b and the first surface 101 are closer to the first electrode layer 300 than the first sub-surface 102a. That is, the first sub-surface 102a is disposed closer to the substrate 110 than the second sub-surface 102b and the first surface 101. The pixel limiting layer 130, the planarization layer 120 and other structures can be patterned to form a blocking structure. For example, part of the pixel limiting layer 130, part of the planarization layer 120 and other structures in the second region 12 can be removed to form a trench between the first surface 101 and the second sub-surface 102b. The bottom wall of the trench is the first sub-surface 102a.

[0102] Optional, such as Figure 3 As shown, the second sub-surface 102b and the first surface 101 are flush in the horizontal direction X. This allows the second sub-surface 102b and the first surface 101 to be formed in the same process step, simplifying the manufacturing process of the display panel 10.

[0103] As described above, in some embodiments, the substrate 100 includes a substrate 110, a planarization layer 120, a pixel defining layer 130, and a light-emitting layer 200; the planarization layer 120 is located on one side of the substrate 110; the pixel defining layer 130 is located on the side of the planarization layer 120 opposite to the substrate 110; at least a portion of the light-emitting layer 200 is located on the side of the pixel defining layer 130 opposite to the planarization layer 120. At least a portion of the first electrode layer 300 is disposed on the side of the light-emitting layer 200 opposite to the pixel defining layer 130.

[0104] In some embodiments, such as Figures 1 to 3 As shown, the substrate 100 includes at least one shielding layer 140, the at least one shielding layer 140 is located in the first region 11, and the orthogonal projection of the at least one shielding layer 140 on the substrate 110 covers the orthogonal projection of the first electrode 310 on the substrate 110.

[0105] In these alternative embodiments, at least one shielding layer 140 can shield the first electrode material layer located in the first region 11. The at least one shielding layer 140 can serve as a mask for laser ashing of the first electrode material layer. The at least one shielding layer 140 can shield the laser and prevent the laser from affecting the first electrode material layer located in the first region 11.

[0106] There are multiple ways to set at least one occlusion layer 140. At least one occlusion layer 140 may include only one occlusion layer, or at least one occlusion layer 140 may include two occlusion layers, or at least one occlusion layer 140 may include three occlusion layers, or at least one occlusion layer 140 may include more than one occlusion layer. No limitation is made here.

[0107] In some alternative embodiments, such as Figure 2 and Figure 3As shown, at least one shielding layer 140 includes a first shielding layer 141 and a second shielding layer 142. In the thickness direction Z of the display panel 10, the second shielding layer 142 is closer to the first electrode layer 300 than the first shielding layer 141. In the horizontal direction X perpendicular to the thickness direction Z of the display panel 10, the second shielding layer 142 is closer to the second region 12 than the first shielding layer 141.

[0108] In these alternative embodiments, in the horizontal direction X, the second shielding layer 142 is closer to the second region 12, that is, the second shielding layer 142 is closer to the edge of the first electrode 310 facing the second region 12. In the thickness direction Z, the distance between the second shielding layer 142 and the first electrode layer 300 is smaller. During laser ashing, this reduces the amount of laser light diffracted at the edge of the second shielding layer 142 and entering the first region 11, thereby better mitigating the problem of the first electrode 310's edge facing the second region 12 tending to curl upwards during laser ashing.

[0109] Optionally, the second shielding layer 142 is located on the side of the planarization layer 120 facing or away from the substrate 110, or the second shielding layer 142 is located within the pixel defining layer 130.

[0110] There are several ways to position the second shielding layer 142. For example... Figure 2 , Figure 3 and Figure 6 As shown, the second shielding layer 142 is located on the side of the planarization layer 120 opposite to the substrate 110. Figure 7 , Figure 8 , Figure 10 , Figure 11 , Figure 12 , Figure 13 and Figure 14 As shown, the second shielding layer 142 is located on the side of the planarization layer 120 facing the substrate 110. Figure 4 , Figure 5 and Figure 9 As shown, the second occlusion layer 142 is located within the pixel defining layer 130 to further reduce the distance between the second occlusion layer 142 and the first electrode layer 300 in the thickness direction Z; in these embodiments, the pixel defining layer 130 may include a first sub-layer 130a and a second sub-layer 130b, and the second occlusion layer 142 may be located between the first sub-layer 130a and the second sub-layer 130b.

[0111] In some other embodiments, optionally, the substrate 100 further includes a signal line layer 150 and a second electrode layer 160 located on the side of the signal line layer 150 facing away from the substrate 110. The second shielding layer 142 is disposed in the same layer as the signal line layer 150 or the second electrode layer 160, so that the second shielding layer 142 can be fabricated in the same process step as the signal line layer 150 or the second electrode layer 160, simplifying the fabrication process of the display panel 10. Figure 6 As shown, the second shielding layer 142 and the second electrode layer 160 are disposed on the same layer. Figure 7 As shown, the second shielding layer 142 is disposed on the same layer as the signal line layer 150.

[0112] In one embodiment, the signal line layer 150 includes at least one of a first conductive layer, a second conductive layer, and a third conductive layer. Optionally, the signal line layer 150 includes a first conductive layer and a second conductive layer, which are disposed in the same layer. The first conductive layer and the second electrode layer 160 are located on opposite sides of the planarization layer 120 and are connected through the planarization layer 120. The second conductive layer is multiplexed as a second shielding layer 142.

[0113] Optional, such as Figure 6 As shown, the second shielding layer 142 and the second electrode layer 160 are disposed in the same layer, so that the second shielding layer 142 can be formed in the same process step as the pixel electrode, which can simplify the manufacturing process of the display panel 10, and also reduce the distance between the second shielding layer 142 and the first electrode layer 300, thus improving the problem that the edge of the first electrode 310 facing the opening 320 is prone to curling up.

[0114] Optionally, the first shielding layer 141 is located on the side of the signal line layer 150 facing the substrate 110, so that the first shielding layer 141 can shield the laser and improve the influence of the laser on the components in other layer structures within the substrate 100.

[0115] In some alternative embodiments, such as Figures 2 to 14 As shown, the substrate 100 is provided with a second clearance groove 103, which is located in the second region 12. A first surface 101 and a second surface 102 are connected at the boundary between the first region 11 and the second region 12 by a third surface 105. The third surface 105 and at least a portion of the second surface 12 form the inner wall surface of the second clearance groove 103. Optionally, at least a portion of the second surface 102 can serve as the bottom wall surface of the second clearance groove 103, and the third surface 105 can serve as the inner side wall surface of the second clearance groove 103. In one embodiment, the third surface 105 extends along the thickness direction Z of the display panel 10. In one embodiment, the dimension of the third surface 105 in the thickness direction Z of the display panel 10 is greater than the thickness of the first electrode 310 in the thickness direction Z of the display panel 10.

[0116] The second clearance groove 103 extends through the pixel defining layer 130 and at least a portion of the planarization layer 120, or the second clearance groove 103 extends through at least a portion of the pixel defining layer 130.

[0117] By patterning the substrate 100 to form the second relief groove 103, the surface height of the portion of the substrate 100 located in the second region 12 is lower. When forming the first electrode material layer for preparing the first electrode layer 300, the first electrode material layer is prone to breakage at the upper edge of the inner wall (i.e., the third surface 105) of the second relief groove 103, thereby forming a portion of the first electrode material layer located in the first region 11 and a portion of the second electrode material layer located in the second region 12. This improves the problem of the first electrode 310 tending to curl upwards towards the edge of the second region 12, ensuring packaging performance.

[0118] There are multiple ways to set the second clearance groove 103. The second clearance groove 103 can be set through at least part of the pixel limiting layer 130. For example, the second clearance groove 103 can be set through part of the pixel limiting layer 130. The second clearance groove 103 is a recess set in the pixel limiting layer 130. The second clearance groove 103 is prepared while the pixel limiting layer 130 is patterned to form the pixel opening 320.

[0119] Alternatively, the second clearance groove 103 extends through the entire pixel limiting layer 130. The second clearance groove 103 is a through hole provided in the pixel limiting layer 130. The planarization layer 120 is exposed through the second clearance groove 103, and the second surface 102 is the surface of the planarization layer 120 exposed through the second clearance groove 103.

[0120] In some other embodiments, the second clearance groove 103 may also penetrate the pixel defining layer 130 and at least a portion of the planarization layer 120. That is, the second clearance groove 103 not only penetrates the pixel defining layer 130 but also penetrates at least a portion of the planarization layer 120. For example, the second clearance groove 103 may penetrate the entire pixel defining layer 130 and the portion of the planarization layer 120. The second clearance groove 103 includes a through-hole penetrating the pixel defining layer 130 and a recess penetrating the portion of the planarization layer 120. Alternatively, the second clearance groove 103 may penetrate the entire pixel defining layer 130 and the entire planarization layer 120, i.e., the second clearance groove 103 is a through-hole penetrating the pixel defining layer 130 and the planarization layer 120.

[0121] In some alternative embodiments, such as Figure 9 and Figure 10As shown, the substrate 100 also has a first clearance groove 104, which is located in the first region 11. The first clearance groove 104 is adjacent to and communicates with the second clearance groove 103, and at least a portion of the first surface 101 forms the inner wall surface of the first clearance groove 104. Optionally, at least a portion of the first surface 101 forms the bottom wall surface of the first clearance groove 104.

[0122] There are several ways to configure the first clearance slot 104. The first clearance slot 104 can penetrate the pixel defining layer 130 and at least a portion of the planarization layer 120, or the first clearance slot 104 can penetrate at least a portion of the pixel defining layer 130.

[0123] In these optional embodiments, the substrate 100 further includes a first clearance groove 104 located in the first region 11, the first clearance groove 104 communicating with a second clearance groove 103, i.e., a clearance groove extending from the second region 12 to the first region 11 is formed in the substrate 100. During laser ashing of the first electrode material layer, the portion of the first electrode material layer located in the second region 12 is removed to form an opening 320, while the portion of the first electrode material layer located in the first region 11 is retained to form the first electrode 310. A portion of the first electrode 310 is attached to the first surface 101 exposed by the first clearance groove 104. Even if the first electrode 310 attached to the first surface 101 is upturned towards the edge of the second region 12, the upturned portion is difficult to extend beyond the first clearance groove 104 due to the presence of the first clearance groove 104, further reducing the impact of the upturned edge of the first electrode 310 on the encapsulation effect of the encapsulation layer.

[0124] Optional, such as Figure 9 and Figure 10 As shown, the first surface 101 includes a third sub-surface 101a and a fourth sub-surface 101b. In the horizontal direction X, the third sub-surface 101a is located between the fourth sub-surface 101b and the second surface 102, for example, in combination with... Figure 3 As shown, the third sub-surface 101a is located between the fourth sub-surface 101b and the first sub-surface 102a of the second surface 102. Along the thickness direction Z, the third sub-surface 101a is positioned closer to the substrate 110 than the fourth sub-surface 101b. Optionally, the third sub-surface 101a can be the bottom wall of the first clearance groove 104. The third sub-surface 101a is farther from the encapsulation layer, so even if the first electrode 310 attached to the third sub-surface 101a is upturned towards the edge of the opening 320, the upturned portion is unlikely to protrude from the first clearance groove 104, which can further reduce the impact of the upturned edge of the first electrode 310 towards the opening 320 on the encapsulation effect of the encapsulation layer.

[0125] Optional, such as Figure 9 and Figure 10As shown, when the first surface 101 includes a third sub-surface 101a and a fourth sub-surface 101b, the second shielding layer 142 may be located within the pixel defining layer 130, or the second shielding layer 142 may be disposed on the same layer as the signal line layer 150. In other embodiments, when the first surface 101 includes a third sub-surface 101a and a fourth sub-surface 101b, the second shielding layer 142 may also be disposed on the same layer as the second electrode layer 160.

[0126] As above, similar to the second clearance groove 103, the first clearance groove 104 can penetrate the pixel limiting layer 130 and at least part of the planarization layer 120, or the first clearance groove 104 can penetrate at least part of the pixel limiting layer 130.

[0127] In some alternative embodiments, such as Figure 10 As shown, the second shielding layer 142 includes a second shielding portion 142a for shielding laser light and a second through-hole 142b for allowing laser light to pass through. The second shielding portion 142a is located in the first region 11, and the second through-hole 142b is located in the second region 12. At least a portion of the second shielding portion 142a is exposed by the first clearance groove 104. At least a portion of the surface of the second shielding portion 142a facing away from the substrate 110 forms the inner wall surface of the first clearance groove 104. Optionally, at least a portion of the surface of the second shielding portion 142a facing away from the substrate 110 forms the bottom wall surface of the first clearance groove 104.

[0128] In these optional embodiments, the second shielding layer 142 includes a second shielding portion 142a and a second through-hole 142b. The second through-hole 142b is located in the second region 12. The orthographic projection of the opening 320 on the substrate 110 coincides with the orthographic projection of the second through-hole 142b on the substrate 110, allowing the laser to pass through the second through-hole 142b to remove the portion of the first electrode material layer located in the second region 12 to form the opening 320. The portion of the first electrode material layer located in the first region 11 is retained to form the first electrode 310. At least a portion of the second shielding portion 142a is exposed by the first clearance groove 104. The surface of the second shielding portion 142a exposed by the first clearance groove 104 is at least a portion of the first surface 101. This configuration reduces the distance between the portion of the first electrode material layer located in the first clearance groove 104 and the second shielding portion 142a. During laser ashing, this improves the problem of the first electrode 310 tending to curl upwards towards the opening 320, thereby ensuring the encapsulation effect of the encapsulation layer.

[0129] Optional, such as Figure 11As shown, in the direction from the pixel defining layer 130 to the substrate 110, the sidewall 142c of the second shielding portion 142a near the second through hole 142b is inclined in a direction away from the second through hole 142b. In these embodiments, the sidewall 142c is at least a portion of the third surface 105. In these embodiments, when forming the first electrode material layer for fabricating the first electrode layer 300, since the sidewall 142c is inclined in the manner described above, the first electrode material layer is difficult to fall into the space below the sidewall 142c, making it easier for the first electrode material layer to break near the sidewall 142c, forming a portion of the first electrode material layer in the first region 11 and a portion of the first electrode material layer in the second region 12. This improves the problem of the first electrode 310 tending to curl upwards towards the opening 320, ensuring packaging performance.

[0130] In some other alternative embodiments, such as Figure 12 and Figure 13 As shown, the second shielding part 142a is provided with a groove 142d, the groove 142d is provided with an opening, and the opening is provided facing the second through hole 142b.

[0131] In these alternative embodiments, when forming the first electrode material layer for fabricating the first electrode layer 300, since the groove 142d is formed recessed from the sidewall 142c, the first electrode material layer is difficult to fall into the groove 142d, which makes it easier for the first electrode material layer to break near the sidewall 142c, forming a portion of the first electrode material layer located in the first region 11 and a portion of the first electrode material layer located in the second region 12, thereby improving the problem that the edge of the first electrode 310 facing the opening 320 is prone to warping upwards and ensuring encapsulation performance.

[0132] In some examples, to facilitate the formation of the aforementioned groove 142d, the second shielding layer 142 may include a first structural layer, a second structural layer, and a third structural layer along the thickness direction Z. The etching rate of the second structural layer is higher than that of the first and second structural layers. During the etching process to obtain the second shielding portion 142a, the second structural layer is etched faster than the first and third structural layers, thereby forming the aforementioned groove 142d. The etching rates of the first and third structural layers may be equal. The material of the first and third structural layers may be the same. For example, the second shielding layer 142 may be a titanium-aluminum-titanium (i.e., Ti-Al-Ti) structure, where the first structural layer is a titanium layer, the second structural layer is an aluminum layer, and the third structural layer is a titanium layer. The second shielding layer 142 may also be made of other materials, which are not limited here.

[0133] like Figure 13As shown, when the second blocking portion 142a is provided with a groove 142d, the first surface 101 may include a third sub-surface 101a and a fourth sub-surface 101b.

[0134] In some alternative embodiments, such as Figure 13 As shown, the first electrode layer 300 includes a first electrode 310 and an opening 320. The first electrode 310 is located in the first region 11, and the opening 320 is located in the second region 12. The orthographic projection of the opening 320 on the substrate 110 coincides with the orthographic projection of the second through hole 142b on the substrate 110.

[0135] In these optional embodiments, the first electrode layer 300 includes a first electrode 310 and an opening 320. The opening 320 located in the second region 12 can improve the light transmittance of the first electrode layer 300. The first electrode 310 located in the first region 11 can work together with the pixel electrode to drive the light-emitting layer 200 located in the first region 11 to emit light. The orthographic projection of the opening 320 on the substrate 110 coincides with the orthographic projection of the second via 142b on the substrate 110, so that the laser passes through the second via 142b to perform laser ashing treatment on the first electrode material layer to form the opening 320.

[0136] Optionally, there may be multiple first regions 11, which are spaced apart within the display area. Optionally, a second region 12 may be disposed around at least a portion of the first regions 11. Optionally, the second region 12 may be located between two adjacent pixel openings to avoid affecting the light emission effect of the display panel 10.

[0137] In some alternative embodiments, such as Figure 14 As shown, when the second clearance groove 103 penetrates at least a portion of the pixel defining layer 130, in the direction from the pixel defining layer 130 to the substrate 110, the sidewall of the pixel defining layer 130 facing the second clearance groove 103 is inclined away from the second clearance groove 103. This design makes it difficult for the first electrode material layer used to fabricate the first electrode layer 300 to fall below the sidewall of the pixel defining layer 130 facing the second clearance groove 103, allowing the first electrode material layer to break near the sidewall of the pixel defining layer 130 facing the second clearance groove 103. Optionally, when the second clearance groove 103 penetrates the pixel defining layer 130 and at least a portion of the planarization layer 120, in the direction from the pixel defining layer 130 to the substrate 110, the pixel defining layer 130 and the planarization layer 120 are inclined away from the sidewall of the second clearance groove 103. Optionally, the inclined sidewall may be located above the second shielding layer 142.

[0138] This application also provides a method for manufacturing a display panel, the display panel including a display area, the display area including a first area 11 and a second area 12, the manufacturing method including:

[0139] S1: Provide a substrate 100, wherein the substrate 100 is provided with a blocking structure.

[0140] S2: Provide a first electrode material layer, the first electrode material layer being located on one side of the substrate 100, the blocking structure causing the first electrode material layer to be disconnected at the junction of the first region 11 and the second region 12.

[0141] S3: The laser removes a portion of the first electrode material layer located in the second region 12 to form an opening 320. The retained portion of the first electrode material layer forms a first electrode 310. The first electrode 310 and the opening 320 form the first electrode layer 300.

[0142] In one embodiment, the surface of the substrate 100 facing the first electrode layer 300 includes: a first surface 101 located in the first region 11; and a second surface 102 located in the second region 12; wherein, along the thickness direction Z of the display panel 10, the first surface 101 and the second surface 102 have a first height difference at the junction of the first region 11 and the second region 12 to form the blocking structure. Step S1 includes: providing a substrate layer structure and removing a portion of the substrate layer structure to form the substrate 100.

[0143] In one embodiment, the substrate layer structure includes: a substrate 110; a shielding layer 140 located on one side of the substrate 110, the shielding layer 140 including a shielding portion located in the first region 11; a planarization layer 120 located on the side of the shielding layer 140 opposite to the substrate 110; and a pixel defining layer 130 located on the side of the planarization layer 120 opposite to the shielding layer 140. Step S1 includes:

[0144] The portion of the planarization layer 120 and the pixel limiting layer 130 located above the blocking portion is removed to form a first clearance groove 104. The portion of the pixel limiting layer 130 and the planarization layer 120 located in the second region 12 is removed to form a second clearance groove 103. The first clearance groove 104 and the second clearance groove 103 are adjacent to and connected to each other. At least a portion of the first surface 101 forms the bottom wall surface of the first clearance groove 104, and at least a portion of the second surface 102 forms the bottom wall surface of the second clearance groove 103.

[0145] This application also provides a display device, which may include the display panel in the above embodiments. For details regarding the display panel, please refer to the relevant descriptions in the above embodiments, which will not be repeated here. The display device may specifically be a mobile phone, computer, tablet computer, television, electronic paper, or other device with display functionality, and is not limited thereto.

[0146] It should be clarified that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. For the method embodiments and display device embodiments, relevant parts can be referred to the description section of the display panel embodiments. This application is not limited to the specific steps and structures described above and shown in the figures. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application. Furthermore, for the sake of brevity, detailed descriptions of known methods and techniques are omitted here.

[0147] Those skilled in the art will understand that the above embodiments are exemplary and not restrictive. Different technical features appearing in different embodiments can be combined to achieve beneficial effects. Based on a study of the drawings, specification, and claims, those skilled in the art should be able to understand and implement other variations of the disclosed embodiments. In the claims, the term "comprising" does not exclude other means or steps; the quantifier "a" does not exclude a plurality; the terms "first" and "second" are used to identify names and not to indicate any particular order. No reference numerals in the claims should be construed as limiting the scope of protection. The functionality of multiple parts appearing in the claims can be implemented by a single hardware or software module. The appearance of certain technical features in different dependent claims does not mean that these technical features cannot be combined to achieve beneficial effects.

Claims

1. A display panel, characterized in that, Includes a display area, which comprises a first area and a second area. The display panel includes: The substrate includes a substrate, a planarization layer, a pixel defining layer, and a light-emitting layer, wherein the planarization layer is located on one side of the substrate; the pixel defining layer is located on the side of the planarization layer opposite to the substrate; and at least a portion of the light-emitting layer is located on the side of the pixel defining layer opposite to the planarization layer. A first electrode layer, at least a portion of which is located on one side of the substrate, the first electrode layer including a first electrode and an opening, the first electrode being located in a first region, the opening being located in a second region, and at least a portion of which is located on the side of the light-emitting layer opposite to the pixel defining layer; The display panel is provided with a blocking structure to block the first electrode from extending into the second region. The surface of the substrate facing the first electrode layer includes a first surface and a second surface. The first surface is located in the first region, and the second surface is located in the second region. Along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form the blocking structure. The substrate includes at least one shielding layer located in the first region. The orthographic projection of the at least one shielding layer on the substrate covers the orthographic projection of the first electrode on the substrate. The at least one shielding layer includes a first shielding layer and a second shielding layer. In the thickness direction of the display panel, the second shielding layer is closer to the first electrode layer relative to the first shielding layer; in the horizontal direction perpendicular to the thickness direction of the display panel, the second shielding layer is closer to the second region relative to the first shielding layer. The substrate further includes a signal line layer and a second electrode layer. The second shielding layer is disposed in the same layer as the signal line layer or the second electrode layer, or at least a portion of the signal line layer is multiplexed as the second shielding layer.

2. The display panel according to claim 1, characterized in that, The first height difference is greater than the thickness of the first electrode in the thickness direction of the display panel.

3. The display panel according to claim 1, characterized in that, In the thickness direction of the display panel, the first surface is closer to the first electrode layer than the second surface.

4. The display panel according to claim 3, characterized in that, The first electrode is attached to the first surface of the substrate.

5. The display panel according to claim 3, characterized in that, The second surface includes a first sub-surface and a second sub-surface. In a horizontal direction perpendicular to the thickness direction of the display panel, the first sub-surface is located between the first surface and the second sub-surface. The first sub-surface and the second sub-surface have a second height difference along the thickness direction of the display panel.

6. The display panel according to claim 5, characterized in that, In the thickness direction of the display panel, the second sub-surface is closer to the first electrode layer than the first surface.

7. The display panel according to claim 6, characterized in that, The second sub-surface is flush with the first surface in the horizontal direction.

8. The display panel according to claim 1, characterized in that, The second masking layer is located on the side of the planarization layer facing or away from the substrate, or the second masking layer is located within the pixel defining layer.

9. The display panel according to claim 1, characterized in that, The signal line layer is located on the side of the planarization layer facing the substrate, the second electrode layer is located on the side of the planarization layer away from the substrate, the signal line layer and the second electrode layer are located on both sides of the planarization layer and are connected through the planarization layer, and the first electrode layer and the second electrode layer are located on both sides of the light-emitting layer.

10. The display panel according to claim 1, characterized in that, The substrate is provided with a second relief groove, which is located in the second region; the first surface and the second surface are connected by a third surface at the junction of the first region and the second region, and the third surface and at least a portion of the second surface form the inner wall surface of the second relief groove.

11. The display panel according to claim 10, characterized in that, The third surface extends along the thickness direction of the display panel.

12. The display panel according to claim 10, characterized in that, The dimension of the third surface in the thickness direction of the display panel is greater than the thickness of the first electrode in the thickness direction of the display panel.

13. The display panel according to claim 10, characterized in that, The second clearance groove extends through the pixel defining layer and at least a portion of the planarization layer, or the second clearance groove extends through at least a portion of the pixel defining layer.

14. The display panel according to claim 10, characterized in that, The substrate is further provided with a first relief groove, which is located in the first region. The first relief groove is adjacent to and connected to the second relief groove, and at least a portion of the first surface forms the inner wall surface of the first relief groove.

15. The display panel according to claim 14, characterized in that, The first clearance groove extends through the pixel defining layer and at least a portion of the planarization layer, or the first clearance groove extends through at least a portion of the pixel defining layer.

16. The display panel according to claim 14, characterized in that, The substrate includes a second shielding layer, which includes a second shielding portion for shielding the laser and a second through hole for allowing the laser to pass through. The second shielding portion is located in the first region, and the second through hole is located in the second region. At least a portion of the surface of the second shielding portion facing away from the substrate forms the inner wall surface of the first clearance groove.

17. The display panel according to claim 16, characterized in that, The orthographic projection of the opening on the substrate coincides with the orthographic projection of the second through hole on the substrate.

18. The display panel according to claim 16, characterized in that, In the direction from the pixel defining layer to the substrate, the sidewall of the second shielding portion near the second through hole is inclined in a direction away from the second through hole; or, the second shielding portion is provided with a groove, the groove is provided with an opening, and the opening is provided towards the second through hole.

19. A display panel, characterized in that, The display panel includes a display area, which comprises a first area and a second area, and includes: The substrate includes a substrate, a planarization layer, a pixel defining layer, and a light-emitting layer, wherein the planarization layer is located on one side of the substrate; the pixel defining layer is located on the side of the planarization layer opposite to the substrate; and at least a portion of the light-emitting layer is located on the side of the pixel defining layer opposite to the planarization layer. A first electrode layer, at least a portion of which is located on one side of the substrate, the first electrode layer including a first electrode and an opening, and at least a portion of which is located on the side of the light-emitting layer opposite to the pixel defining layer; Wherein, the first region is a first electrode material retention region, the second region is a first electrode material removal region, the first electrode is located in the first electrode material retention region, the opening is located in the first electrode material removal region, a portion of the first electrode material layer located in the first electrode material retention region is retained to form the first electrode, and a portion of the first electrode material layer located in the first electrode material removal region is removed to form the opening; The display panel has a blocking structure, which is configured to disconnect the retained portion and the removed portion of the first electrode material layer before the opening is formed. The surface of the substrate facing the first electrode layer includes a first surface and a second surface, the first surface being located in the first region and the second surface being located in the second region. Along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form the blocking structure. The substrate includes at least one shielding layer located in the first region. The orthographic projection of the at least one shielding layer on the substrate covers the orthographic projection of the first electrode on the substrate. The at least one shielding layer includes a first shielding layer and a second shielding layer. In the thickness direction of the display panel, the second shielding layer is closer to the first electrode layer than the first shielding layer. In the horizontal direction perpendicular to the thickness direction of the display panel, the second shielding layer is closer to the second region than the first shielding layer. The substrate further includes a signal line layer and a second electrode layer. The second shielding layer is disposed in the same layer as the signal line layer or the second electrode layer, or at least a portion of the signal line layer is multiplexed as the second shielding layer.

20. The display panel according to claim 19, characterized in that, The first height difference is greater than the thickness of the first electrode in the thickness direction of the display panel.

21. The display panel according to claim 19, characterized in that, In the thickness direction of the display panel, the first surface is closer to the first electrode layer than the second surface.

22. The display panel according to claim 19, characterized in that, The first electrode is attached to the first surface of the substrate.

23. A method for manufacturing a display panel, characterized in that, The display panel includes a display area, which includes a first area and a second area; the manufacturing method includes: A substrate is provided, the substrate having a blocking structure, the substrate including a substrate, a planarization layer, a pixel defining layer and a light-emitting layer, the planarization layer being located on one side of the substrate; the pixel defining layer being located on the side of the planarization layer opposite to the substrate, at least a portion of the light-emitting layer being located on the side of the pixel defining layer opposite to the planarization layer, the substrate including at least one shielding layer, the shielding layer including a shielding portion being located in a first region; A first electrode material layer is provided, the first electrode material layer being located on one side of the substrate, and the blocking structure causes the first electrode material layer to be broken at the junction of the first region and the second region; A laser removes a portion of the first electrode material layer located in the second region to form an opening. The retained portion of the first electrode material layer forms the first electrode, and the first electrode and the opening together form the first electrode layer. The substrate surface facing the first electrode layer includes a first surface and a second surface, the first surface being located in the first region; the second surface being located in the second region; along the thickness direction of the display panel, the first surface and the second surface have a first height difference at the junction of the first region and the second region to form the blocking structure; The step of providing a substrate, wherein the substrate forms a blocking structure, includes: The portion of the planarization layer and the pixel defining layer located above the occluding portion is removed to form a first clearance groove, and the portion of the pixel defining layer and the planarization layer located in the second region is removed to form a second clearance groove. The first clearance groove and the second clearance groove are adjacent to and connected to each other. At least a portion of the first surface forms the inner wall surface of the first clearance groove, and at least a portion of the second surface forms the inner wall surface of the second clearance groove.

24. A display device, characterized in that, Includes the display panel as described in any one of claims 1-22.

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