Current characteristic verification method, device, and medium

Abstract

Embodiments of the present application provide a current characteristic verification method, device and medium, relating to the technical field of testing, the method comprising: detecting current data and voltage change data of a power supply test point on a CPU in a test object under different load modes; in the case of replacing the CPU in the test object with a test board, adjusting the load of the test board; detecting the time length required for the voltage change data of the power supply test point on the test board to reach a set requirement in the matching degree with the voltage change data of the power supply test point on the CPU during the corresponding load mode change process; and calculating the current characteristic of the CPU based on the current data and the time length, thereby reliably implementing current characteristic verification.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of testing, in particular to a current characteristic verification method, device and medium. BACKGROUND

[0002] In many scenarios, it is necessary to test the working current of an IC chip (Integrated Circuit Chip). For small currents, the actual working current of the test IC chip can be directly tested by connecting a current probe in series. For large currents, the actual working current of the test IC chip can be observed by reading the test results of the VR (voltage regulator) or by converting the current into voltage by connecting a resistor in series in the current path. However, the existing test scheme cannot reliably verify the current variation of the test IC chip itself. SUMMARY

[0003] One of the purposes of the present application includes, for example, to provide a current characteristic verification method, device and medium to at least partially improve the reliability of the verification of the current variation of the chip itself.

[0004] Embodiments of the present application can be implemented as follows:

[0005] In a first aspect, the present application provides a current characteristic verification method, comprising:

[0006] detecting current data and voltage variation data of a power test point on a CPU in a test object under different load modes;

[0007] In the case of replacing the CPU in the test object with a test board, adjusting the load of the test board, detecting the time length required for the voltage variation data of the power test point on the test board to match the voltage variation data of the power test point on the CPU to reach a set requirement during the corresponding load mode change process; the packaging structure of the test board is consistent with the CPU, and the position and wiring of the power test point on the test board are consistent with the position and wiring of the power test point on the CPU;

[0008] Based on the current data and the time length, the current characteristic of the CPU is calculated.

[0009] In an optional implementation, the test object further includes an operating system and load software; the detection of the current data and the voltage variation data of the power test point on the CPU in the test object under different load modes comprises:

[0010] In the case of connecting the differential probe of the oscilloscope to the power test point on the CPU, starting the test object;

[0011] Running the load software under the operating system, and controlling the CPU to perform repeated changes between the first load mode and the second load mode according to a set time interval based on the load software;

[0012] Respectively detecting the current value of the power test point on the CPU in the first load mode and the current value of the power test point on the CPU in the second load mode;

[0013] Obtaining the voltage change waveform of the CPU from the first load mode to the second load mode based on the oscilloscope.

[0014] In an optional embodiment, the test board comprises a load control tool; the time length required for the voltage change data of the power test point on the test board and the voltage change data of the power test point on the CPU to reach a set requirement in the process of changing the corresponding load mode is detected by adjusting the load of the test board, comprising:

[0015] In the case of connecting the differential probe of the oscilloscope to the power test point on the test board, starting the test object;

[0016] Running the load control tool, adjusting the load of the test board, and simulating the current value of the first load mode and the current value of the second load mode;

[0017] Based on the load control tool, the test board repeatedly changes between the first load mode and the second load mode with different switching time lengths until the voltage change waveform of the test board from the first load mode to the second load mode obtained based on the oscilloscope coincides with the voltage change waveform of the CPU from the first load mode to the second load mode, and the target time length required for changing from the first load mode to the second load mode is obtained under the condition of voltage change waveform coincidence.

[0018] In an optional embodiment, the running of the load control tool, the adjustment of the load of the test board, and the simulation of the current value of the first load mode and the current value of the second load mode comprise:

[0019] Running the load control tool, adjusting the load of the test board, and making the current value of the power test point on the test board reach the current value of the power test point on the CPU in the first load mode;

[0020] Continuing to adjust the load of the test board, and making the current value of the power test point on the test board reach the current value of the power test point on the CPU in the second load mode.

[0021] In an optional embodiment, the load control tool is used to repeatedly change the test board between the first load mode and the second load mode with different switching durations until the voltage change waveform of the test board from the first load mode to the second load mode obtained by the oscilloscope coincides with the voltage change waveform of the CPU from the first load mode to the second load mode, and the target duration required for the test board to change from the first load mode to the second load mode is obtained, including:

[0022] The load control tool is used to repeatedly change the power test point on the test board between the current value of the first load mode and the current value of the second load mode with an initial duration;

[0023] The oscilloscope is used to obtain the voltage change waveform of the test board from the first load mode to the second load mode;

[0024] The initial duration is adjusted based on the relative positional relationship between the voltage change waveform of the test board from the first load mode to the second load mode and the voltage change waveform of the CPU from the first load mode to the second load mode until the voltage change waveform of the test board from the first load mode to the second load mode coincides with the voltage change waveform of the CPU from the first load mode to the second load mode based on the adjusted duration, and the target duration required for the test board to change from the first load mode to the second load mode is obtained.

[0025] In an optional embodiment, the initial duration is adjusted based on the relative positional relationship between the voltage change waveform of the test board from the first load mode to the second load mode and the voltage change waveform of the CPU from the first load mode to the second load mode, including:

[0026] In the case where the voltage change waveform of the test board from the first load mode to the second load mode is lower than the voltage change waveform of the CPU from the first load mode to the second load mode, the initial duration is reduced by a set value to obtain the adjusted duration;

[0027] In the case where the voltage change waveform of the test board from the first load mode to the second load mode is higher than the voltage change waveform of the CPU from the first load mode to the second load mode, the initial duration is increased by a set value to obtain the adjusted duration.

[0028] In an optional embodiment, the oscilloscope is used to obtain the voltage change waveform of the CPU from the first load mode to the second load mode, including:

[0029] In a case that the first load mode is a light load mode and the second load mode is a heavy load mode, the trigger mode of the oscilloscope is controlled to be a falling edge trigger, so as to obtain a voltage change waveform of the CPU from the light load mode to the heavy load mode.

[0030] In a case that the first load mode is a heavy load mode and the second load mode is a light load mode, the trigger mode of the oscilloscope is controlled to be a rising edge trigger, so as to obtain a voltage change waveform of the CPU from the heavy load mode to the light load mode.

[0031] In an optional embodiment, the power supply test point on the CPU is located on a c4 bump of a structure layer other than a structure layer where a power supply is located.

[0032] The current characteristic of the CPU is calculated based on the current data and the time length, and the current characteristic of the CPU includes:

[0033] The difference value of the current data of different load modes is divided by the time length, so as to obtain a current change slope.

[0034] In a second aspect, an embodiment of the present application provides a current characteristic verification device, which includes:

[0035] An information obtaining module is configured to detect current data and voltage change data of a power supply test point on a CPU in a test object under different load modes; in a case that the CPU in the test object is replaced by a test board, adjust a load of the test board, and detect a time length required for voltage change data of the power supply test point on the test board and voltage change data of the power supply test point on the CPU to reach a set requirement in a corresponding load mode change process; the packaging structure of the test board is consistent with the CPU, and a position and a wiring of the power supply test point on the test board are consistent with a position and a wiring of the power supply test point on the CPU.

[0036] An information processing module is configured to calculate a current characteristic of the CPU based on the current data and the time length.

[0037] In a third aspect, an embodiment of the present application provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the current characteristic verification method of any one of the foregoing embodiments when executing the program.

[0038] In a fourth aspect, an embodiment of the present application provides a computer readable storage medium, which includes a computer program, and the computer program controls an electronic device where the computer readable storage medium is located to execute the current characteristic verification method of any one of the foregoing embodiments when running.

[0039] The beneficial effects of the embodiments of the present application include, for example: the current characteristics are determined by comparing the test boards with the same CPU and packaging structure, the power supply parameters, the hardware and the test points do not change, only the change of the load current source is kept, in the case of single load and fixed power supply parameters, the dynamic voltage of the power supply is only related to the change rate and the change range of the load current, so that the results of the voltage test and the current change rate can be corresponded, and the reliability of the current characteristic verification is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows, and it should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation to the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0041] Figure 1 A schematic diagram of testing current in the prior art is shown.

[0042] Figure 2 A structural schematic diagram of an electronic device provided by the embodiments of the present application is shown.

[0043] Figure 3 A flow schematic diagram of a current characteristic verification method provided by the embodiments of the present application is shown.

[0044] Figure 4 A test architecture schematic diagram of a CPU provided by the embodiments of the present application is shown.

[0045] Figure 5 A waveform schematic diagram in falling edge trigger mode provided by the embodiments of the present application is shown.

[0046] Figure 6 A waveform schematic diagram in rising edge trigger mode provided by the embodiments of the present application is shown.

[0047] Figure 7 A position schematic diagram of a power supply test point of a CPU provided by the embodiments of the present application is shown.

[0048] Figure 8 A test architecture schematic diagram of a test board provided by the embodiments of the present application is shown.

[0049] Figure 9 A structural schematic diagram of a CPU and a test board in a first perspective provided by the embodiments of the present application is shown.

[0050] Figure 10This diagram illustrates a second-view structural schematic of a CPU and test board provided by an embodiment of the present invention.

[0051] Figure 11 The diagram illustrates a principle for determining duration according to an embodiment of the present invention.

[0052] Figure 12 An exemplary structural block diagram of a current characteristic verification device provided by an embodiment of the present invention is shown.

[0053] Icons: 100 - Electronic device; 110 - Memory; 120 - Processor; 130 - Communication module; 140 - Current characteristic verification device; 141 - Information acquisition module; 142 - Information processing module. Detailed Implementation

[0054] Research has found that, for example Figure 1 As shown, currently, methods such as testing the actual operating current of the IC chip by connecting a current probe in series, referencing the test results from VR, and observing the actual operating current of the IC chip by converting a resistor in series in the current path to a voltage are all unable to reliably verify the current changes of the IC chip itself.

[0055] For example, in low-current scenarios, the solution of using a series current probe to test the supply current cannot directly reflect the current change of the chip itself, as the measured current change rate already includes the influence of the capacitor inside the package.

[0056] For example, in high-current scenarios, when reading current changes through VR, the current sampling period of VR cannot actually reflect the rate of current change, and the measured rate of current change already includes the effect of the capacitance inside the package.

[0057] Based on the above research, this invention provides a current characteristic verification scheme that verifies voltage changes by simulating current changes. When the changed voltage and the measured voltage are consistent, the simulated current is the actual current change, thereby avoiding the influence of capacitance on the current test results.

[0058] The shortcomings of the above solutions are the result of the inventors' practical experience and careful research. Therefore, the discovery process of the above problems and the solutions proposed by the embodiments of the present invention in the following text should be considered as contributions made by the inventors during the invention process.

[0059] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some but not all of the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0060] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of the application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0061] It should be noted that the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusion, so that processes, methods, articles or devices including a series of elements not only include those elements, but also include other elements not explicitly listed or inherent to such processes, methods, articles or devices. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0062] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0063] It should be noted that the features in the embodiments of the present application can be combined with each other without conflict.

[0064] Please refer to Figure 2 is a block schematic diagram of an electronic device 100 provided by the present embodiment. The electronic device 100 in the present embodiment can be a server, a processing device, a processing platform, etc. capable of data interaction and processing. The electronic device 100 comprises a memory 110, a processor 120 and a communication module 130. The memory 110, the processor 120 and the communication module 130 are directly or indirectly electrically connected to each other to realize data transmission or interaction. For example, these elements can be electrically connected to each other through one or more communication buses or signal lines.

[0065] The memory 110 is used to store programs or data. The memory 110 may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0066] The processor 120 is used to read / write data or programs stored in the memory 110 and to perform corresponding functions.

[0067] The communication module 130 is used to establish a communication connection between the electronic device 100 and other communication terminals through the network, and to send and receive data through the network.

[0068] It should be understood that, Figure 2 The structure shown is only a schematic diagram of the electronic device 100. The electronic device 100 may also include components that are larger than... Figure 2 The more or fewer components shown, or having the same Figure 2 The different configurations shown. Figure 2 The components shown can be implemented using hardware, software, or a combination thereof.

[0069] Please refer to the following: Figure 3 This is a flowchart illustrating a current characteristic verification method provided in an embodiment of the present invention. It can be derived from... Figure 2 The electronic device 100 performs the operation, for example, by the processor 120 within the electronic device 100. The current characteristic verification method includes steps S110, S120, and S130.

[0070] S110 detects the current and voltage change data of the power supply test point on the CPU of the test object under different load modes.

[0071] S120, when the CPU in the test object is replaced with a test board, the load of the test board is adjusted, and the time required for the voltage change data of the power supply test point on the test board and the voltage change data of the power supply test point on the CPU to reach the set requirement during the corresponding load mode change is detected.

[0072] The test board has the same packaging structure as the CPU (Central Processing Unit), and the position and routing of the power test points on the test board are the same as the position and routing of the power test points on the CPU.

[0073] S130, based on the current data and the duration, the current characteristics of the CPU are calculated.

[0074] Based on the fact that under a single load and fixed power supply parameters, the dynamic voltage of the power supply is only related to the rate and range of change of the load current, the voltage test results can correspond to the current change rate, thus ensuring the reliability of the current characteristic verification.

[0075] Please refer to the following: Figure 4 This is a schematic diagram of a CPU test architecture provided by an embodiment of the present invention. Figure 4 As shown, the test objects can also include the operating system (OS) and the load software (also known as the load program).

[0076] In S110, the current and voltage change data of the power supply test point on the CPU of the test object under different load modes can be obtained as follows: With the differential probe of an oscilloscope connected to the power supply test point on the CPU, the test object is started. The load software is run under the operating system, and the CPU is controlled to repeatedly switch between a first load mode and a second load mode at set time intervals based on the load software. The current value of the power supply test point on the CPU in the first load mode and the current value in the second load mode are detected respectively. The voltage change waveform of the CPU from the first load mode to the second load mode is obtained based on the oscilloscope.

[0077] In this embodiment, the first load mode and the second load mode can be flexibly set. For example, they can be a light load mode and a heavy load mode, respectively, and the load amount of the light load mode and the heavy load mode can be flexibly set.

[0078] With the first load mode and the second load mode being light load mode and heavy load mode respectively, the voltage change waveform of the CPU from the first load mode to the second load mode based on the oscilloscope can be obtained in the following way:

[0079] When the first load mode is light load mode and the second load mode is heavy load mode, the oscilloscope's trigger mode is controlled to be falling edge triggering to obtain the voltage change waveform of the CPU from light load mode to heavy load mode. Please refer to [reference needed]. Figure 5This embodiment provides a waveform diagram in the falling edge triggering mode.

[0080] When the first load mode is heavy load mode and the second load mode is light load mode, the oscilloscope's trigger mode is controlled to rise-edge trigger to obtain the voltage change waveform of the CPU from heavy load mode to light load mode. Please refer to [reference needed]. Figure 6 This embodiment provides a waveform diagram in rising edge triggering mode.

[0081] Please refer to the following: Figure 7 To reduce the impact of capacitors and other factors on the voltage waveform, the power supply test point on the CPU in S110 can be located on the c4 bump of the non-power supply structure layer of the CPU. Based on this setup, the power supply test point is sampled directly from the C4 solder ball and directly connected to the chip, maintaining consistency with the actual CPU. This eliminates interference from decoupling capacitors and avoids the influence of capacitors on the voltage waveform in the power supply link, thereby further ensuring the accuracy and reliability of the current characteristic verification.

[0082] In this embodiment, the test board and the CPU use the same package to reduce parameter differences. By directly drawing the load current from the C4 solder ball, the influence of package parasitic parameters on the current change rate is eliminated, allowing for a more accurate reflection of the current change slope on the C4 solder ball.

[0083] Please refer to the following: Figure 8 This is a schematic diagram of a test architecture after replacing the CPU with a test board, provided by an embodiment of the present invention. The test board may include a load control tool. Accordingly, in S120, the load of the test board is adjusted, and the time required for the voltage change data of the power supply test points on the test board and the voltage change data of the power supply test points on the CPU to reach a set requirement during the corresponding load mode change can be achieved in the following way:

[0084] With the differential probe of the oscilloscope connected to the power test point on the test board, the test object is started. The load control tool is run to adjust the load on the test board, simulating the current values ​​of the first load mode and the second load mode. Based on the load control tool, the test board repeatedly changes between the first load mode and the second load mode with different switching durations until the voltage change waveform of the test board from the first load mode to the second load mode, obtained from the oscilloscope, coincides with the voltage change waveform of the CPU from the first load mode to the second load mode. The target time required to change from the first load mode to the second load mode when the voltage change waveforms coincide is obtained.

[0085] The process of running the load control tool and adjusting the load on the test board to simulate the current values ​​of the first and second load modes can be achieved as follows: Run the load control tool and adjust the load on the test board so that the current value at the power supply test point on the test board reaches the current value at the power supply test point on the CPU in the first load mode. Continue adjusting the load on the test board until the current value at the power supply test point on the test board reaches the current value at the power supply test point on the CPU in the second load mode.

[0086] The target time required to change from the first load mode to the second load mode can be obtained as follows: Based on the load control tool, the power test point on the test board is repeatedly changed between the current value in the first load mode and the current value in the second load mode according to an initial time. The voltage change waveform of the test board from the first load mode to the second load mode is obtained using the oscilloscope. Based on the relative positional relationship between the voltage change waveform of the test board from the first load mode to the second load mode and the voltage change waveform of the CPU from the first load mode to the second load mode, the initial time is adjusted until, based on the adjusted time, the voltage change waveform of the test board from the first load mode to the second load mode coincides with the voltage change waveform of the CPU from the first load mode to the second load mode, thus obtaining the target time required to change from the first load mode to the second load mode.

[0087] The initial duration can be adjusted as follows: If the voltage change waveform of the test board from the first load mode to the second load mode is lower than that of the CPU from the first load mode to the second load mode, the initial duration is reduced by a set value to obtain the adjusted duration. If the voltage change waveform of the test board from the first load mode to the second load mode is higher than that of the CPU from the first load mode to the second load mode, the initial duration is increased by a set value to obtain the adjusted duration.

[0088] Given the current data for each load mode and the time required for mode switching, S130 can achieve the following: divide the difference in current data for different load modes by the time to obtain the current change slope.

[0089] To more clearly illustrate the implementation scheme of the embodiments of the present invention, the following scenario is used as an example to illustrate the overall implementation process.

[0090] Taking a server as the test object, which includes a CPU, a load program, and an OS, with the chip integrated into the CPU, the implementation principle of current characteristic verification is illustrated with an example.

[0091] The extraction of test reference data includes the following steps:

[0092] 1. Connect the differential probe of the oscilloscope to the power test point of the CPU.

[0093] 2. The test object is powered on and enters the OS.

[0094] 3. Run the load program in the CPU under the OS, and set the load program to light load mode. Read and record the current value of light load mode (hereinafter referred to as light load current value) through VR; set the load program to heavy load mode, and read and record the current value of heavy load mode (hereinafter referred to as heavy load current value) through VR.

[0095] 4. Every 1 second, the load program is controlled to repeatedly change from "light load → heavy load → light load".

[0096] 5. After the test object has been stable for 30 minutes, start recording the voltage test waveform using an oscilloscope.

[0097] 6. Set the oscilloscope trigger mode to capture voltage change waveforms. In rising edge trigger mode, the voltage change corresponds to the transition from heavy load to light load; in falling edge trigger mode, the voltage change corresponds to the transition from light load to heavy load.

[0098] 7. Record the original file of the voltage test waveform for subsequent waveform comparison.

[0099] Simulating a load, comparing waveforms, and determining current characteristics involves the following steps:

[0100] 1. Replace the CPU of the test object with the test board, and connect the differential probe of the oscilloscope to the power test point of the test board.

[0101] like Figure 9 , Figure 10 As shown, during the test, only the source of the load current is considered. The test board substrate and the actual CPU package substrate are the same, with identical packaging structure and characteristics. The positions of the load control board and adapter board on the test board correspond to the positions of the die (wafer) on the actual CPU. The positions and traces of the voltage test points on the actual CPU and the test board are the same.

[0102] 2. Power on the test device, ensuring that the power supply originally providing power to the CPU is operational to power the test board. This can be confirmed using a multimeter or testing tools.

[0103] 3. Start the load control tool to simulate current changes. Set the light load current and heavy load current, referring to the previously recorded values. The current slope needs to be repeatedly adjusted and confirmed based on the test results.

[0104] The specific processing procedure is as follows:

[0105] Enable the load control tool, which detects the current signal on the test board and connects it to the oscilloscope.

[0106] Enable the load function on the load control tool, causing the oscilloscope current signal value to reach the previously recorded "light load current value" and save it as light load mode. Continue to slowly increase the load on the load control tool until the oscilloscope current signal value reaches the previously recorded "heavy load current value" and save it as heavy load mode.

[0107] Connect the voltage signal from the test board to an oscilloscope and retrieve the previously stored voltage test waveform (e.g., Figure 11 (The dashed line in the middle right figure).

[0108] The load control tool repeatedly switches between light load and heavy load modes for a preset initial duration, triggered by the rising edge of the current.

[0109] Observe the current test voltage waveform and compare it with the stored voltage test waveform. If the current test voltage waveform drops below the stored test voltage waveform, the initial duration needs to be reduced by time t0 (e.g., Figure 11 (As shown in the lower figure). If the current test voltage waveform drops higher than the stored voltage test waveform, the initial duration needs to be increased by t0.

[0110] The load control tool is repeatedly switched between light load and heavy load modes according to the adjusted duration until the voltage test waveforms overlap. At this point, the time t is recorded, which is the actual time of current change.

[0111] Accordingly, the load change rate of the test object = (heavy load current - light load current) / t.

[0112] To perform the corresponding steps in the above embodiments and various possible methods, an implementation of a current characteristic verification device is given below. Please refer to... Figure 12 , Figure 12 This is a functional block diagram of a current characteristic verification device 140 provided in an embodiment of the present invention. The current characteristic verification device 140 can be applied to... Figure 2 The electronic device 100 is shown. It should be noted that the current characteristic verification device 140 provided in this embodiment has the same basic principle and technical effects as the method embodiment described above. For the sake of brevity, any parts not mentioned in this embodiment can be referred to the corresponding content in the method embodiment described above. The current characteristic verification device 140 includes an information acquisition module 141 and an information processing module 142.

[0113] The information acquisition module 141 is used to detect and obtain current data and voltage change data of the power supply test points on the CPU of the test object under different load modes; when the CPU in the test object is replaced with a test board, the load of the test board is adjusted, and the time required for the voltage change data of the power supply test points on the test board to match the voltage change data of the power supply test points on the CPU to reach the set requirements during the corresponding load mode change is detected; the packaging structure of the test board is consistent with that of the CPU, and the position and routing of the power supply test points on the test board are consistent with the position and routing of the power supply test points on the CPU.

[0114] The information processing module 142 is used to calculate the current characteristics of the CPU based on the current data and the duration.

[0115] Based on the above, embodiments of the present invention also provide a computer-readable storage medium, the computer-readable storage medium including a computer program, wherein the computer program, when running, controls the electronic device in which the computer-readable storage medium is located to perform the above-described current characteristic verification method.

[0116] Using the above-described scheme in this embodiment of the invention, voltage changes can be verified by simulating current changes. When the changed voltage and the measured voltage are consistent, the simulated current represents the actual current change. By using equivalent substitution, and keeping other conditions consistent, voltage and current are made equivalent. The consistency between the simulated current load and the actual load is determined by voltage comparison, thus yielding the relative value of the chip current change. Theoretically, the more consistent the voltage, the more similar the current, ensuring the reliability of the current characteristic verification. Designing the voltage detection to originate from the C4 bump of the package avoids the influence of capacitors on the current test results, further ensuring the reliability of the current characteristic verification.

[0117] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0118] In addition, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0119] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0120] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for verifying current characteristics, characterized in that, include: The current and voltage change data of the power supply test point on the CPU of the test object were obtained under different load modes. When the CPU in the test object is replaced with a test board, the load of the test board is adjusted, and the time required for the voltage change data of the power supply test points on the test board to match the voltage change data of the power supply test points on the CPU to reach the set requirement during the corresponding load mode change is detected; the packaging structure of the test board is the same as that of the CPU, and the position and routing of the power supply test points on the test board are the same as those of the power supply test points on the CPU. Based on the current data and the duration, the current characteristics of the CPU are calculated.

2. The current characteristic verification method according to claim 1, characterized in that, The test object also includes the operating system and load software; the detection of current and voltage change data of the power supply test point on the CPU of the test object under different load modes includes: With the differential probe of the oscilloscope connected to the power test point on the CPU, start the test object; The load software runs under the operating system, and the CPU is controlled to repeatedly switch between a first load mode and a second load mode at set time intervals based on the load software. The current value of the power supply test point on the CPU in the first load mode and the current value in the second load mode were detected respectively. The voltage change waveform of the CPU from the first load mode to the second load mode is obtained based on the oscilloscope.

3. The current characteristic verification method according to claim 2, characterized in that, The test board includes a load control tool; adjusting the load on the test board and detecting the time required for the voltage change data of the power supply test points on the test board and the voltage change data of the power supply test points on the CPU to reach a set requirement during the corresponding load mode change includes: With the differential probe of the oscilloscope connected to the power test point on the test board, start the test object; Run the load control tool to adjust the load on the test board and simulate the current values ​​of the first load mode and the second load mode. The load control tool causes the test board to repeatedly switch between a first load mode and a second load mode with different switching durations until the voltage change waveform of the test board from the first load mode to the second load mode, obtained from the oscilloscope, coincides with the voltage change waveform of the CPU from the first load mode to the second load mode. The target time required to switch from the first load mode to the second load mode is obtained when the voltage change waveforms coincide.

4. The current characteristic verification method according to claim 3, characterized in that, The step of running the load control tool to adjust the load on the test board and simulate the current values ​​of the first load mode and the second load mode includes: Run the load control tool to adjust the load on the test board so that the current value of the power supply test point on the test board reaches the current value of the power supply test point on the CPU in the first load mode. Continue adjusting the load on the test board so that the current value of the power supply test point on the test board reaches the current value of the power supply test point on the CPU in the second load mode.

5. The current characteristic verification method according to claim 4, characterized in that, The load control tool causes the test board to repeatedly switch between a first load mode and a second load mode with different switching durations until the voltage change waveform of the test board from the first load mode to the second load mode, obtained from the oscilloscope, coincides with the voltage change waveform of the CPU from the first load mode to the second load mode. The target time required to switch from the first load mode to the second load mode when the voltage change waveforms coincide is then determined, including: Based on the load control tool, the power test points on the test board are made to repeatedly change between the current value in the first load mode and the current value in the second load mode according to the initial duration. The voltage change waveform of the test board from the first load mode to the second load mode was obtained based on the oscilloscope. Based on the relative positional relationship between the voltage change waveform of the test board from the first load mode to the second load mode and the voltage change waveform of the CPU from the first load mode to the second load mode, the initial duration is adjusted until, based on the adjusted duration, the voltage change waveform of the test board from the first load mode to the second load mode coincides with the voltage change waveform of the CPU from the first load mode to the second load mode, thus obtaining the target duration required to change from the first load mode to the second load mode.

6. The current characteristic verification method according to claim 5, characterized in that, The adjustment of the initial duration based on the relative positional relationship between the voltage change waveform of the test board from the first load mode to the second load mode and the voltage change waveform of the CPU from the first load mode to the second load mode includes: If the voltage change waveform of the test board from the first load mode to the second load mode is lower than the voltage change waveform of the CPU from the first load mode to the second load mode, the initial duration is reduced by a set value to obtain the adjusted duration; If the voltage change waveform of the test board from the first load mode to the second load mode is higher than the voltage change waveform of the CPU from the first load mode to the second load mode, the initial duration is increased by a set value to obtain the adjusted duration.

7. The current characteristic verification method according to claim 2, characterized in that, The step of obtaining the voltage change waveform of the CPU from the first load mode to the second load mode based on the oscilloscope includes: When the first load mode is light load mode and the second load mode is heavy load mode, the trigger mode of the oscilloscope is controlled to be falling edge trigger to obtain the voltage change waveform of the CPU from light load mode to heavy load mode; When the first load mode is heavy load mode and the second load mode is light load mode, the trigger mode of the oscilloscope is controlled to be rising edge trigger, so as to obtain the voltage change waveform of the CPU from heavy load mode to light load mode.

8. The current characteristic verification method according to claim 7, characterized in that, The power test point on the CPU is located on the c4 bump of the non-power supply structural layer in the CPU. The calculation of the CPU's current characteristics based on the current data and the duration includes: Divide the difference in current data for different load modes by the duration to obtain the slope of current change.

9. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the program, implements the current characteristic verification method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a computer program, which, when executed, controls the electronic device containing the computer-readable storage medium to perform the current characteristic verification method according to any one of claims 1 to 8.

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