Digital circuit capable of generating differential signals and microcontroller using the same

Abstract

A digital circuit capable of generating a differential signal and a microcontroller using the same. The digital circuit includes a signal generating circuit, first and second input / output connection pads, and third and fourth input / output connection pads. The signal generating circuit is used to generate a first signal and a second signal constituting a differential signal based on an input signal, and the first signal and the second signal are inverted to each other. The first and second input / output connection pads are coupled to the signal generating circuit, and determine whether to enable according to a first enable signal. The third and fourth input / output connection pads are used to determine whether to enable according to a second enable signal inverted to the first enable signal. When the first and second input / output connection pads are enabled, the first and second input / output connection pads are used to transmit the differential signal.

Description

Technical Field

[0001] The invention relates to a digital circuit and a microcontroller, and in particular to a digital circuit capable of generating a differential signal and a microcontroller using the same. Background Art

[0002] In some systems with high-speed signal transmission, differential signaling is used to transmit signals because differential signaling can resist noise. A differential signal is composed of two signals that are 180 degrees apart from each other. Figure 1 shown. Figure 1 It shows an ideal differential signal, with equal amplitude and 180-degree phase difference between the two signals. If the positive phase signal Sp and the negative phase signal Sn are overlapped, the overlap position of the two signals will fall exactly in the middle of the amplitude of the two signals, which means that the quality of this differential signal DFS is very good. However, in actual applications, due to circuit delay, one of the signals will usually lag behind or lead the other signal. If the signal cannot maintain a phase difference of nearly 180 degrees, such as Figure 2 As shown, the inverted signal Sn has a delay DLY compared to the positive signal Sp, which causes the intersection of the two signals to no longer be in the middle of the amplitude, which may cause the receiver to misjudge the transition time of the differential signal DFS'. Traditionally, differential signals need to be implemented through analog circuits to have low error characteristics, so it is usually necessary to design additional analog circuits to generate differential signals.

[0003] In the prior art, it has been proposed to use digital circuit design to solve the problem that differential signal generation requires complicated analog circuit design. However, the existing digital circuits are still difficult to generate high-precision / low-error differential signals, and therefore are difficult to apply in high-speed transmission applications. Figure 3 As shown, Figure 3 It is a schematic diagram of a traditional differential signal generating circuit. In addition to controlling whether the positive phase signal Sp and the negative phase signal Sn are output, the function control circuit FCC also has another main function of selecting whether the input and output signals of other components or functional modules can be input and output through the input and output connection pads PAD0 and PAD1. In other words, in a digital circuit, the user can change the mode or output value of the input and output connection pads PAD0 and PAD1 by changing the setting values ​​PAD0_SEL and PAD1_SEL of the function control circuit FCC, so that the input and output connection pads PAD0 and PAD1 can be freely set to multiple functions. Here, because the focus is on the output of the positive phase signal Sp and the negative phase signal Sn, the relationship between the function control circuit FCC and other components or functional modules is not shown.

[0004] In a general solution of using digital circuits to generate differential signals, an inverter INV can be used to generate an inverted signal Sn, wherein the positive phase signal Sp and the inverted signal Sn are provided to the corresponding input and output connection pads PAD0 and PAD1 respectively via the function control circuit FCC. Generally speaking, the positive phase signal Sp and the inverted signal Sn will pass through combinational circuits CC1 and CC2 composed of many digital circuits (for example, multiplexers and logic gates) when reaching the input and output connection pads PAD0 and PAD1. Since the combinational circuits CC1 and CC2 passed by the inverted signal Sn and the positive phase signal Sp are not necessarily the same, the positions of these combinational circuits CC1 and CC2 in the actual layout and the signal transmission paths will also be different, which will cause delay problems between the inverted signal Sn and the positive phase signal Sp, making the final waveform also like this. Figure 2 Generally, it is impossible to make the phase difference between signals reach 180 degrees. If the differential frequency is very high, the transmission of the circuit using this frequency synchronization may fail. The only way is to continuously correct the path of the positive phase signal Sp and the negative phase signal Sn to the input and output connection pads PAD0 and PAD1 through the back-end engineering to make the two signals close to 180 degrees, but this process is very cumbersome and difficult to adjust. In addition, it is possible that because the combination circuits CC1 and CC2 pass through too much logic, although the phase difference is 180 degrees under a certain function setting, the phase of the two is offset again when the function setting is changed. Summary of the invention

[0005] An embodiment of the present invention provides a digital circuit capable of generating a differential signal, the digital circuit comprising a signal generating circuit, first and second input / output connection pads, and third and fourth input / output connection pads. The signal generating circuit is used to generate a first signal and a second signal constituting a differential signal based on an input signal, wherein the first signal and the second signal are inverted to each other. The first and second input / output connection pads are coupled to the signal generating circuit, and determine whether to enable according to a first enable signal. The third and fourth input / output connection pads are used to determine whether to enable according to a second enable signal inverted to the first enable signal. When the first and second input / output connection pads are enabled, the first and second input / output connection pads are respectively used to transmit the first signal and the second signal constituting the differential signal, and when the third and fourth input / output connection pads are enabled, the third and fourth input / output connection pads are used to transmit a plurality of functional signals. The first and third input / output connection pads are commonly coupled to one of a plurality of package pins, and the second and fourth input / output connection pads are commonly coupled to another of the plurality of package pins.

[0006] An embodiment of the present invention provides a microcontroller, which includes a plurality of package pins, a function control circuit, a signal generating circuit, a first and a second input-output connection pad, and a third and a fourth input-output connection pad. The function control circuit is used to generate a plurality of function signals. The signal generating circuit is used to generate a first signal and a second signal constituting a differential signal based on a frequency signal, wherein the first signal and the second signal are inverted to each other. The first and the second input-output connection pads are coupled to the signal generating circuit to respectively receive the first signal and the second signal constituting the differential signal. The third and the fourth input-output connection pads are coupled to the function control circuit to respectively receive the plurality of function signals. The first and the third input-output connection pads are commonly coupled to one of the plurality of package pins, and the second and the fourth input-output connection pads are commonly coupled to another of the plurality of package pins.

[0007] In summary, compared to the prior art, the digital circuit capable of generating differential signals and the microcontroller using the same according to the embodiments of the present invention can significantly shorten the circuit design process because no additional analog circuit is required to generate differential signals. Furthermore, compared to the traditional mechanism of using digital circuits to generate differential signals, the embodiments of the present invention can effectively improve the phase offset problem of differential signals in digital circuits under different application scenarios, and also reduce the complexity of circuit adjustment. In addition, since the package pins of the circuit do not need to use additional pins under the design of this embodiment, the microcontroller can selectively have the ability to output precise differential frequency signals, so that the microcontroller can be more widely used in high-speed transmission scenarios without increasing costs or circuit complexity.

[0008] In order to further understand the technology, means and effects of the present invention, reference may be made to the following detailed description and accompanying drawings, so that the purpose, features and concepts of the present invention can be thoroughly and specifically understood. However, the following detailed description and accompanying drawings are only used for reference and explanation of the implementation of the present invention, and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings are provided to enable those with ordinary knowledge in the technical field to which the present invention belongs to further understand the present invention, and are incorporated into and constitute a part of the specification of the present invention. The accompanying drawings illustrate exemplary embodiments of the present invention, and together with the description of the present invention, are used to explain the principles of the present invention.

[0010] Figure 1 It is a waveform diagram of a differential signal.

[0011] Figure 2 This is another waveform diagram of a differential signal.

[0012] Figure 3It is a schematic diagram of a traditional differential signal generating circuit.

[0013] Figure 4 FIG. 4 is a schematic diagram of a digital circuit capable of generating a differential signal according to an embodiment of the present invention.

[0014] Figure 5 is a schematic diagram of a microcontroller according to an embodiment of the present invention.

[0015] The symbols indicated in the figure are explained as follows: 110 signal generating circuit; 112, INV, 132_1, 132_2 inverters; 114 delay circuit; 120_1~120_4, PAD0, PAD1 input and output connection pads; 130, FCC function control circuit; CLK, CLK', CLK_b frequency signals; DFS, DFS' differential signals; Dout data output terminal; DLY delay; EN enable terminal; PAD0_SEL, PAD1_SEL function control circuit setting value; S1 input signal; S1', S1_b signals; Sen, Sen_b enable signals; SEL1, SEL2 function signals; Sp positive phase signal; Sn negative phase signal DETAILED DESCRIPTION

[0016] Reference will now be made in detail to exemplary embodiments of the present invention, which are illustrated in the accompanying drawings. Where possible, the same component symbols are used in the drawings and the specification to refer to the same or similar components. In addition, the exemplary embodiments are only one of the implementation methods of the design concept of the present invention, and the following examples are not intended to limit the present invention.

[0017] The terms “first”, “second”, etc. used in this document do not specifically refer to an order or sequence, nor are they used to limit the present invention. They are merely used to distinguish components or operations described with the same technical terms.

[0018] In addition, the terms “coupled” or “connected” used herein may refer to direct physical or electrical contact between two or more components, or indirect physical or electrical contact between two or more components, or may refer to mutual operation or movement between two or more components.

[0019] The embodiment of the present invention proposes a differential signal generation mechanism implemented by a digital circuit. Since no additional analog circuit is designed to generate differential signals, the circuit design process can be greatly shortened. Furthermore, compared with the traditional mechanism of generating differential signals by digital circuits, the embodiment of the present invention can effectively improve the phase offset problem of differential signals in digital circuits in different application scenarios, and also reduce the complexity of circuit adjustment, thereby enabling the microcontroller to be more widely used in high-speed transmission scenarios. Several embodiments are used below to further illustrate the digital circuit and the microcontroller using the same.

[0020] Figure 4 is a schematic diagram of a digital circuit capable of generating a differential signal according to an embodiment of the present invention. Figure 4 The digital circuit 100 of the present embodiment can be configured to generate a differential signal DFS in a specific working mode, and includes a signal generating circuit 110 and a plurality of input / output connection pads (I / O pads). The signal generating circuit 110 generates the differential signal DFS based on a single-ended input signal S1, wherein the input signal S1 can be, for example, a frequency signal, but the present invention is not limited thereto.

[0021] The multiple input-output connection pads are used as interfaces for the digital circuit 100 to output signals to the outside, or to receive signals from the outside and transmit them to the internal control circuit. Each input-output connection pad may include a connection pad and an input-output unit, wherein the input-output unit may include, for example, an electrostatic protection circuit, a buffer circuit, and a power supply circuit. In this embodiment, the multiple input-output connection pads are illustrated as four of them, such as the input-output connection pads 120_1 to 120_4, but the present invention is not limited thereto.

[0022] Each of the input-output connection pads 120_1 to 120_4 has an enable terminal EN and a data output terminal Dout. Each of the input-output connection pads 120_1 to 120_4 determines whether to be enabled according to the signal on the enable terminal EN, and transmits the signal on the data transmission terminal Dout to the connection pad when enabled. The input-output connection pads 120_1 and 120_2 are respectively coupled to the signal generation circuit 110 through the data output terminal Dout to receive the differential signal DFS composed of the signals S1_b and S1', and determine whether to be enabled according to the enable signal Sen received from the enable terminal EN, wherein the signals S1_b and S1' are substantially inverted with each other, with a phase difference of 180 degrees. The input-output connection pads 120_3 and 120_4 receive the function signals SEL1 and SEL2 through the data output terminal Dout, and receive the enable signal Sen_b through the enable terminal EN. The enable signals Sen and Sen_b are inverted signals. That is, when the input / output connection pads 120_1 and 120_2 are enabled, the input / output connection pads 120_3 and 120_4 are disabled. Conversely, when the input / output connection pads 120_3 and 120_4 are enabled, the input / output connection pads 120_1 and 120_2 are disabled.

[0023] The enable signals Sen and Sen_b and the function signals SEL1 and SEL2 may be generated, for example, by a function control circuit (not shown). The function control circuit may provide different function signals SEL1 and SEL2 and enable signals Sen and Sen_b to each input / output connection pad 120_1 to 120_4 according to the user's selection, so as to set the working mode and output value of each input / output connection pad 120_1 to 120_4. The function control circuit implements the function of allowing the user to set the working mode and output value through a combination of multiple selectable logic circuits, but the present invention is not limited thereto.

[0024] Specifically, the digital circuit 100 can be selectively set to output the differential signal DFS or the function signals SEL1 and SEL2. When the digital circuit 100 is set to output the differential signal DFS, the function control circuit can generate corresponding enable signals Sen and Sen_b (e.g., 1 and 0) to enable the input-output connection pads 120_1 and 120_2 and disable the input-output connection pads 120_3 and 120_4. At this time, the input-output connection pads 120_1 and 120_2 are used to transmit the differential signal DFS. On the other hand, when the digital circuit 100 is set to output the function signals SEL1 and SEL2, the function control circuit can generate corresponding enable signals Sen and Sen_b (e.g., 0 and 1) to enable the input-output connection pads 120_1 and 120_2 and disable the input-output connection pads 120_3 and 120_4.

[0025] More specifically, compared to Figure 3 As for the differential signal generating circuit shown, the configuration of this embodiment is to add two input-output connection pads 120_1 and 120_2 in the digital circuit 100, and the two input-output connection pads 120_1 and 120_2 are directly connected to the output of the signal generating circuit 110 to receive the signals S1' and S1_b constituting the differential signal DFS, so that the input-output connection pads 120_1 and 120_2 are exclusively used for outputting the differential signal DFS. Since the differential signal DFS is not generated by the function control circuit, even when the user sets the mode or output value of each other input-output connection pad, the differential signal DFS will not generate different phase delays due to the change of the circuit combination path. In other words, the digital circuit 100 of this embodiment can output a differential signal DFS that stably maintains a phase difference of approximately 180 degrees, which is more suitable for application in a high-speed transmission environment.

[0026] On the other hand, since the additional input / output connection pads 120_1 and 120_2 have the same configuration as the other input / output connection pads 120_3 and 120_4 for outputting the function signals SEL1 and SEL2 (i.e., using the same / similar input / output units), there is no need to design an analog circuit to solve the electrostatic protection and driving force problems of the output signal. In addition, there is no need to match the phase of the differential signal DFS by adjusting the delay of each logic circuit combination in the function control circuit, so the circuit design schedule can be greatly reduced.

[0027] Furthermore, since the input / output connection pads 120_1 and 120_2 are configured to complement the enable / disable of the two corresponding functional input / output connection pads 120_3 and 120_4, the optional differential signal DFS output function can be realized without increasing the package pins by connecting the input / output connection pads 120_1 and the input / output connection pads 120_3 to the same pin, and connecting the input / output connection pads 120_2 and the input / output connection pads 120_4 to another pin, and at the same time, signal conflicts will not be caused. This part will be further described in the subsequent embodiments.

[0028] In some embodiments, the enable control of the input-output connection pads 120_1-120_4 may be, for example, the function control circuit sets the input-output connection pads 120_1-120_4 to an output mode, and the control of disabling the input-output connection pads 120_1-120_4 may be, for example, the function control circuit sets the input-output connection pads 120_1-120_4 to an input mode, but the present invention is not limited thereto. In short, the enable terminals EN of the input-output connection pads 120_1-120_4 may receive other different enable signals to achieve the purpose of input or output, and the input-output connection pads 120_1-120_4 will not be used only for output.

[0029] In some embodiments, the signal generating circuit 110 may include an inverter 112 and a delay circuit 114. The inverter 112 has an input terminal and an output terminal, wherein the input terminal of the inverter 112 receives the input signal S1, and the output terminal of the inverter 112 is coupled to the data output terminal Dout of the input-output connection pad 120_1 to transmit a signal S1_b that is inverted from the input signal S1. The input terminal of the delay circuit 114 receives the input signal S1, and the output terminal of the delay circuit 114 is coupled to the data output terminal Dout of the input-output connection pad 120_2. The delay circuit 114 is used to adjust the phase of the input signal S1 to compensate for the phase difference between the input signal S1 and the inverted signal S1_b, that is, to reduce the phase difference between the input signal S1 and the inverted signal S1_b. Figure 2The delay DLY is shown to generate an adjusted signal S1 ′, wherein the adjusted signal S1 ′ and a signal S1_b which is inverted from the signal S1 ′ form a differential signal DFS.

[0030] Next, an implementation example of a microcontroller using the above digital circuit is described. Figure 5 , Figure 5 In this embodiment, the microcontroller 50 includes a plurality of package pins 52 and a digital circuit 200 , wherein the digital circuit 200 includes a signal generating circuit 110 , input and output connection pads 120_1 ˜ 120_4 and a function control circuit 130 .

[0031] The signal generating circuit 110 is used for generating a differential signal DFS based on the clock signal CLK, wherein the differential signal DFS includes the clock signal CLK′ after phase adjustment by the delay circuit 114 and the inverse clock signal CLK_b of the clock signal CLK′.

[0032] The data output terminal Dout of the input-output connection pad 120_1 is coupled to the output terminal of the inverter 112 of the signal generating circuit 110 to receive the inverted clock signal CLK_b. The data output terminal Dout of the input-output connection pad 120_2 is coupled to the output terminal of the delay circuit 114 of the signal generating circuit 110 to receive the clock signal CLK'. The data output terminals Dout of the input-output connection pads 120_3 and 120_4 are coupled to the function control circuit 130 to receive the function signals SEL1 and SEL2, respectively.

[0033] The function control circuit 130 is coupled to the enable terminals EN of the input-output connection pads 120_1 to 120_4. In addition to generating the function signals SEL1 and SEL2, the function control circuit 130 also generates enable signals Sen and Sen_b to control the enable / disable of each input-output connection pad 120_1 to 120_4. In the present embodiment, the input-output connection pads 120_1 and 120_2 receive the enable signal Sen from the function control circuit 130, and the input-output connection pads 120_3 and 120_4 receive the enable signal Sen_b which is inverted from the enable signal Sen from the function control circuit 130. In addition, the configuration and operation between the signal generating circuit 110, the input-output connection pads 120_1 to 120_4 and the function control circuit 130 can refer to the above description. Figure 4 The description of the embodiments will not be repeated here.

[0034] In some embodiments, the function control circuit 130 further includes inverters 132_1 and 132_2 for generating an enable signal Sen_b. The input terminal of the inverter 132_1 receives the enable signal Sen, and the output terminal of the inverter 132_1 generates an inverted enable signal Sen' and transmits it to the enable terminal EN of the input-output connection pad 120_3. The input terminal of the inverter 132_2 receives the enable signal Sen, and the output terminal of the inverter 132_2 generates an inverted enable signal Sen' and transmits it to the enable terminal EN of the input-output connection pad 120_4. Although the above embodiments and Figure 5 In the figure, the use of two inverters 132_1 and 132_2 to generate the enable signal Sen_b required by the input-output connection pads 120_3 and 120_4 is used as an example, but the present invention is not limited thereto. In other embodiments, the function control circuit 130 may also be implemented by using a single inverter, and the output end of the single inverter is simultaneously connected to the enable end EN of the input-output connection pads 120_3 and 120_4.

[0035] In this embodiment, the input-output connection pads 120_1 and 120_3 are configured to be commonly coupled to the packaged pin 52_clkb through wire bonding, and the input-output connection pads 120_2 and 120_4 are configured to be commonly coupled to the packaged pin 52_clk through wire bonding. Through the above configuration, when the digital circuit 200 is set to output the differential signal DFS, the input-output connection pads 120_1 and 120_2 will be enabled in response to the enable signal Sen, and the frequency signals CLK_b and CLK are transmitted to the packaged pins 52_clkb and 52_clk respectively, so that the microcontroller 50 can output the differential frequency signal DFS to the external circuit through the packaged pins 52_clkb and 52_clk. On the other hand, when the digital circuit 200 is set to output the function signals SEL1 and SEL2, the input-output connection pads 120_3 and 120_4 are enabled in response to the enable signal Sen_b, and the function signals SEL1 and SEL2 are transmitted to the package pins 52_clkb and 52_clk, respectively, so that the microcontroller 50 can output the function signals SEL1 and SEL2 to the external circuit through the package pins 52_clkb and 52_clk.

[0036] In other words, in this embodiment, the input / output connection pads 120_1 - 120_4 share two package pins 52_clkb and 52_clk to implement the output of two different signal functions, including the input / output function generally settable by the user and the differential frequency signal output function.

[0037] From the perspective of circuit layout, the input / output connection pads 120_1-120_4 can be arranged on a side close to the package pin 52. In some embodiments, the input / output connection pads 120_1 and 120_2 for outputting the differential signal DFS are located at adjacent positions and are symmetrically arranged in a mirrored manner. That is, part or all of the circuit components in the input / output connection pads 120_1 and 120_2 can be arranged in a symmetrical manner on both sides of a baseline, and the data output terminals Dout of the input / output connection pads 120_1 and 120_2 are located on the adjacent side. Such a configuration can minimize the phase difference between the frequency signals CLK' and CLK_b, so that the differential signal DFS has better characteristics.

[0038] In some embodiments, the inverter 112 of the signal generating circuit 110 can be arranged between the input-output connection pads 120_1 and 120_2, and as close to the input-output connection pads 120_1 and 120_2 as possible under the premise of complying with the layout and routing rules. The inverter 112 is arranged between the input-output connection pads 120_1 and 120_2, which means that the distance between the layout position of the inverter 112 and the data output terminal Dout of the input-output connection pad 120_1 is substantially equal to the distance between the inverter 112 and the data output terminal Dout of the input-output connection pad 120_2.

[0039] In addition, in the embodiment of the present invention, the digital circuit 200 may have more than four input and output connection pads. Figure 5 , an input / output connection pad may be provided on the upper side of the input / output connection pad 120_3, and an input / output connection pad may be provided on the lower side of the input / output connection pad 120_4. That is, the digital circuit 200 has a total of 6 input / output connection pads. The two input / output connection pads on the upper side of the input / output connection pad 120_3 and the lower side of the input / output connection pad 120_4 may be used to respectively receive the positive signal and the reverse signal of another set of output differential signals, or may be used to respectively receive several other functional signals. The functional control circuit 130 may provide another enabling signal to control the enabling of the above two input / output connection pads, and at this time, the enabling signal Sen_b is not an inverted signal of the enabling signal Sen, but the three enabling signals are voltage levels indicating enabling at three different time points. The two input / output connection pads can be coupled to package pins 52_clk and 52_clkb, respectively, so that package pins 52_clk and 52_clkb can output one of two sets of different output differential signals and one set of multiple functional signals, or output one of two sets of functional signals and one set of output differential signals according to different enabling signals.

[0040] In summary, compared to the prior art, the digital circuit capable of generating differential signals and the microcontroller using the same according to the embodiments of the present invention can significantly shorten the circuit design process because no additional analog circuit is designed to generate differential signals. Furthermore, compared to the traditional mechanism of using digital circuits to generate differential signals, the embodiments of the present invention can effectively improve the phase offset problem of differential signals in digital circuits under different application scenarios, and also reduce the complexity of circuit adjustment. In addition, because the package pins of the circuit do not need to use additional pins under the design of this embodiment, the microcontroller can also selectively have the ability to output precise differential frequency signals, so that the microcontroller can be more widely used in high-speed transmission scenarios without increasing costs or circuit complexity.

[0041] It should be understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes in view thereof will be suggested to those skilled in the art and are to be included within the spirit and scope of the present application and the scope of the appended claims.

Claims

1. A digital circuit capable of generating a differential signal, characterized in that: The digital circuit comprises: A signal generating circuit for generating a first signal and a second signal constituting a differential signal based on an input signal, wherein the first signal and the second signal are in opposite phases to each other; A first input-output connection pad and a second input-output connection pad are coupled to the signal generating circuit and determine whether to enable according to a first enabling signal; and The third input-output connection pad and the fourth input-output connection pad are used to determine whether to enable according to the second enabling signal; wherein when the first input-output connection pad and the second input-output connection pad are enabled, the first input-output connection pad and the second input-output connection pad are respectively used to transmit the first signal and the second signal constituting the differential signal, and when the third input-output connection pad and the fourth input-output connection pad are enabled, the third input-output connection pad and the fourth input-output connection pad are used to transmit a plurality of functional signals; The first input / output connection pad and the third input / output connection pad are commonly coupled to one of a plurality of package pins, and the second input / output connection pad and the fourth input / output connection pad are commonly coupled to another of the plurality of package pins.

2. The digital circuit capable of generating a differential signal as claimed in claim 1, wherein: The digital circuit further comprises: The function control circuit is coupled to the first input-output connection pad and the fourth input-output connection pad, and is used to generate the first enabling signal, the second enabling signal, and the plurality of function signals.

3. The digital circuit capable of generating a differential signal as claimed in claim 2, wherein: The digital circuit comprises: The fifth input-output connection pad and the sixth input-output connection pad are used to determine whether to enable according to the third enabling signal; The functional control circuit also provides the third enable signal, and the first input-output connection pad, the third input-output connection pad and the fifth input-output connection pad are commonly coupled to one of a plurality of package pins, and the second input-output connection pad, the fourth input-output connection pad and the sixth input-output connection pad are commonly coupled to another one of the plurality of package pins.

4. The digital circuit capable of generating a differential signal as claimed in claim 2, wherein: The function control circuit comprises: At least one inverter has an input terminal and an output terminal, wherein the input terminal receives the first enabling signal, and the output terminal is coupled to the third input-output connection pad and the fourth input-output connection pad to output the second enabling signal.

5. The digital circuit capable of generating a differential signal as claimed in claim 1, wherein: The input signal is a frequency signal, and the signal generating circuit comprises: an inverter having an input terminal and an output terminal, wherein the input terminal receives the frequency signal, and the output terminal is coupled to the data output terminal of the first input / output connection pad to transmit the first signal, wherein the first signal is an inverted frequency signal; and A delay circuit is used to adjust the phase of the frequency signal to generate the second signal, wherein the second signal is the frequency signal after the phase is adjusted, and the phase of the frequency signal after the phase adjustment matches the phase of the inverted frequency signal, wherein the delay circuit transmits the adjusted frequency signal to the data output end of the second input-output connection pad.

6. The digital circuit capable of generating a differential signal as claimed in claim 4, wherein: The first input-output connection pad and the second input-output connection pad are adjacent to each other and are symmetrically arranged in a mirrored manner, and data output ends of the first input-output connection pad and the second input-output connection pad are located at adjacent sides.

7. The digital circuit capable of generating a differential signal as claimed in claim 5, wherein: The inverter is arranged at a position having a first distance from a data output end of the first input-output connection pad and a second distance from a data output end of the second input-output connection pad, wherein the first distance and the second distance are substantially equal.

8. A microcontroller, characterized in that: A digital circuit is included, wherein the digital circuit includes: Multiple package pins; A function control circuit for generating a plurality of function signals; A signal generating circuit, for generating a first signal and a second signal constituting a differential signal based on a frequency signal; A first input-output connection pad and a second input-output connection pad are coupled to the signal generating circuit to respectively receive the first signal and the second signal constituting the differential signal; and The third input-output connection pad and the fourth input-output connection pad are coupled to the function control circuit to respectively receive the multiple function signals, wherein the first input-output connection pad and the third input-output connection pad are commonly coupled to one of the multiple package pins, and the second input-output connection pad and the fourth input-output connection pad are commonly coupled to another one of the multiple package pins.

9. The microcontroller according to claim 8, characterized in that The function control circuit is further used to generate a first enable signal and a second enable signal which is inverted from the first enable signal, the first input-output connection pad and the second input-output connection pad receive the first enable signal, and the third input-output connection pad and the fourth input-output connection pad receive the second enable signal.

10. The microcontroller according to claim 9, characterized in that Wherein, when the first input-output connection pad and the second input-output connection pad are enabled in response to the first enable signal, the first input-output connection pad and the second input-output connection pad transmit the first signal and the second signal of the differential signal to one of the multiple package pins and another package pin of the multiple package pins respectively; and when the third input-output connection pad and the fourth input-output connection pad are enabled in response to the second enable signal, the third input-output connection pad and the fourth input-output connection pad transmit the multiple functional signals to one of the multiple package pins and another package pin of the multiple package pins respectively.

11. The microcontroller according to claim 8, characterized in that The first input-output connection pad to the fourth input-output connection pad are arranged on a side close to one of the multiple package pins and another one of the multiple package pins, the first input-output connection pad and the second input-output connection pad are adjacent and symmetrically arranged in an image manner, the first input-output connection pad and the third input-output connection pad are respectively wired to one of the multiple package pins, and the second input-output connection pad and the fourth input-output connection pad are respectively wired to another one of the multiple package pins.

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