Flash chip erase voltage configuration method and device, equipment and storage medium

Abstract

The present application relates to the technical field of flash memory chip, and specifically discloses a flash memory chip erase voltage configuration method, device, equipment and storage medium, wherein the method comprises the following steps: obtaining a first threshold voltage difference and a second threshold voltage difference; updating the voltage value of the erase pulse and the voltage value of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference respectively; the method updates the voltage value of the erase pulse and the voltage value of the weak programming pulse based on the first threshold voltage difference and the second threshold voltage difference, which can update the appropriate voltage value of the erase pulse and the voltage value of the weak programming pulse in time when the use characteristics of the storage unit decline, so as to ensure that the erase operation can be efficiently and smoothly completed.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of flash memory chips, in particular to a method and device for configuring erase voltage of a flash memory chip, equipment and a storage medium. BACKGROUND

[0002] For the operation of nor flash, the erase operation generally occupies a relatively long time, and the erase characteristics of nor flash generally show that the more the number of uses, the more difficult it is to erase, especially at the end of the life cycle of the flash memory chip, the related voltages of the erase operation based on the factory configuration cannot erase the data in the storage area of the flash memory chip, so that the user feels that the longer the flash memory chip is used, the slower it becomes.

[0003] At present, there is no effective technical solution to the above problems. SUMMARY

[0004] The purpose of the present application is to provide a method and device for configuring erase voltage of a flash memory chip, equipment and a storage medium, so as to configure the related voltages of the erase operation according to the use of the flash memory chip to ensure that the flash memory chip can efficiently complete the erase operation throughout its life cycle.

[0005] In a first aspect, the present application provides a method for configuring erase voltage of a flash memory chip, which is used to configure the related voltages of the erase operation of the flash memory chip, and the method comprises the following steps:

[0006] Obtain a first threshold voltage difference and a second threshold voltage difference, the first threshold voltage difference is the difference between the highest threshold voltage of the storage unit generated after the first erase pulse in the first and last erase operation in the last cycle number interval of the target storage area, and the second threshold voltage difference is the difference between the highest threshold voltage of the storage unit generated after the first weak programming pulse in the first and last erase operation in the last cycle number interval of the target storage area;

[0007] According to the first threshold voltage difference and the second threshold voltage difference, the voltage value of the erase pulse and the voltage value of the weak programming pulse are updated respectively.

[0008] The first threshold voltage difference and the second threshold voltage difference obtained by the method for configuring erase voltage of a flash memory chip of the present application respectively reflect the applicability change of the current erase pulse voltage value and the weak programming pulse voltage value to the target storage area, and can comprehensively reflect the decline of the use characteristics of the storage unit in the target storage area.

[0009] The method for configuring erase voltage of a flash memory chip, wherein the cycle number interval is divided based on the cycle number, and the method is executed when the cycle number switches the cycle number interval.

[0010] In this example, the way of switching the cycle number interval based on the cycle number to trigger the method of the application to run can realize the automatic adjustment of the voltage value of the erase pulse and the voltage value of the weak programming pulse of the flash chip.

[0011] The method for configuring the erase voltage of the flash chip, wherein the method updates and adjusts the voltage value of the erase pulse and the voltage value of the weak programming pulse by updating the configuration information.

[0012] The method for configuring the erase voltage of the flash chip, wherein the step of updating and adjusting the voltage value of the erase pulse and the voltage value of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference respectively comprises:

[0013] When the first threshold voltage difference is greater than a first preset threshold value, increasing the voltage value of the erase pulse;

[0014] When the second threshold voltage difference is greater than a second preset threshold value, decreasing the voltage value of the weak programming pulse.

[0015] The method for configuring the erase voltage of the flash chip, wherein the flash chip pre-stores a plurality of levels of voltage values of the erase pulse arranged in an increasing voltage manner and a plurality of levels of voltage values of the weak programming pulse arranged in a decreasing voltage manner;

[0016] The step of increasing the voltage value of the erase pulse comprises:

[0017] Switching the voltage value of the erase pulse to the voltage value of the erase pulse of the next level;

[0018] The step of decreasing the voltage value of the weak programming pulse comprises:

[0019] Switching the voltage value of the weak programming pulse to the voltage value of the weak programming pulse of the next level.

[0020] The method for configuring the erase voltage of the flash chip, wherein the step of increasing the voltage value of the erase pulse comprises:

[0021] According to the difference between the first threshold voltage difference and the first preset threshold value, setting the increase value of the voltage value of the erase pulse to update the voltage value of the erase pulse;

[0022] The step of decreasing the voltage value of the weak programming pulse comprises:

[0023] According to the difference between the second threshold voltage difference and the second preset threshold value, setting the decrease value of the voltage value of the weak programming pulse to update the voltage value of the weak programming pulse.

[0024] The method for configuring the erase voltage of the flash memory chip, wherein the target storage area is a plurality of blocks or a plurality of sectors in the flash memory chip.

[0025] In a second aspect, the present application further provides a device for configuring the erase voltage of a flash memory chip, which is used for configuring the related voltage of the flash memory chip for performing an erase operation, and the device comprises:

[0026] The obtaining module is configured to obtain a first threshold voltage difference and a second threshold voltage difference, the first threshold voltage difference being a difference between the highest threshold voltages of the storage cells in the target storage area after a first erase pulse in the first and last erase operations in the last cycle number interval, and the second threshold voltage difference being a difference between the highest threshold voltages of the storage cells in the target storage area after a first weak programming pulse in the first and last erase operations in the last cycle number interval.

[0027] The adjusting module is configured to update the voltage value of the erase pulse and the voltage value of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference, respectively.

[0028] The first threshold voltage difference and the second threshold voltage difference obtained by the device for configuring the erase voltage of the flash memory chip of the present application reflect the changes in the applicability of the current voltage value of the erase pulse and the voltage value of the weak programming pulse to the target storage area, respectively, and can comprehensively reflect the decline of the use characteristics of the storage cells in the target storage area.

[0029] In a third aspect, the present application further provides an electronic device comprising a processor and a memory, wherein the memory stores computer readable instructions, and when the computer readable instructions are executed by the processor, the steps in the method provided in the first aspect are executed.

[0030] In a fourth aspect, the present application further provides a storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps in the method provided in the first aspect are executed.

[0031] As known from the above, the present application provides a method, device, equipment and storage medium for configuring the erase voltage of a flash memory chip, wherein the first threshold voltage difference and the second threshold voltage difference obtained by the method reflect the changes in the applicability of the current voltage value of the erase pulse and the voltage value of the weak programming pulse to the target storage area, respectively, and can comprehensively reflect the decline of the use characteristics of the storage cells in the target storage area. The method updates the voltage value of the erase pulse and the voltage value of the weak programming pulse based on the first threshold voltage difference and the second threshold voltage difference, so that the appropriate voltage value of the erase pulse and the voltage value of the weak programming pulse can be updated in time when the use characteristics of the storage cells decline, so as to ensure that the erase operation can be efficiently and smoothly performed. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 A flow chart of a method for configuring an erase voltage of a flash memory chip is provided in embodiments of the present application.

[0033] Figure 2 A structure diagram of an apparatus for configuring an erase voltage of a flash memory chip is provided in embodiments of the present application.

[0034] Figure 3 A structure diagram of an electronic device is provided in embodiments of the present application.

[0035] The reference signs: 201, acquisition module; 202, adjustment module; 301, processor; 302, memory; 303, communication bus. DETAILED DESCRIPTION

[0036] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0037] It should be noted that: similar reference signs and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. Meanwhile, in the description of the present application, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0038] In a first aspect, referring to Figure 1 Some embodiments of the present application provide a method for configuring an erase voltage of a flash memory chip, for configuring related voltages for the flash memory chip to perform an erase operation, the method comprising the following steps:

[0039] S1, acquiring a first threshold voltage difference and a second threshold voltage difference, the first threshold voltage difference being a difference between the highest threshold voltages of storage cells generated after a first erase pulse in the first and last erase operations in a last cycle number interval of a target storage area, and the second threshold voltage difference being a difference between the highest threshold voltages of storage cells generated after a first weak programming pulse in the first and last erase operations in the last cycle number interval of the target storage area;

[0040] S2, updating the voltage value of the adjustment erase pulse and the voltage value of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference respectively.

[0041] Specifically, in the field of memory technology, Cycle refers to a recyclable operation of programming and erasing a target storage area in a flash memory chip, and the programming and erasing operation in Cycle can be performed continuously or separately; the number of Cycle represents the number of uses of the target storage area; as the number of uses of the storage unit in the flash memory chip increases, the use characteristics of the storage unit also deteriorate, mainly manifested as being more and more difficult to erase and more and more easy to program; the cycle number interval is an interval corresponding to the number of cycles performed on the target storage area, that is, the cycle number interval is a numerical interval divided based on the number of cycles.

[0042] More specifically, the target storage area is a region in a storage array of a flash chip to be executed with an erase operation, different storage areas in the storage array have certain process variability due to different usage, and a storage area with a larger number of cycles generally has more difficult-to-erase storage cells than a storage area with a smaller number of cycles, and more erase time is required when the erase operation is performed; the erase operation includes multiple stages, generally including pre-program, erase, over erase program, and soft program; each stage in the erase operation process is achieved by applying a voltage pulse of a certain length to the target storage area, that is, the erase stage reduces the threshold voltage of the storage cells in the target storage area by applying an erase pulse to the target storage area to achieve erase, and the soft program stage improves the threshold voltage of the storage cells in the target storage area by applying a soft program pulse to the target storage area to achieve soft program; therefore, the execution effect of erase depends on the usage characteristics of the storage cells, the voltage value of the erase pulse, and the length of the erase pulse, the length of the erase pulse is generally a fixed value, so after the usage characteristics of the storage cells in the target storage area change, the voltage value of the erase pulse determines the execution effect of erase; similarly, the execution effect of soft program depends on the usage characteristics of the storage cells, the voltage value of the soft program pulse, and the length of the soft program pulse, so after the usage characteristics of the storage cells in the target storage area change, the voltage value of the soft program pulse determines the execution effect of soft program.Therefore, during the execution of the entire erase operation, the voltage configurations of erase and soft program are particularly important. If the voltage value of the erase pulse of erase is too small, it will take more time to perform erase to erase all the data in the target storage area to 1. If the voltage value of the erase pulse of erase is too large, it is easy to cause a large number of over-erase storage units in the target storage area after performing erase, and more time is needed to perform over-erase program to repair. If the voltage value of the weak programming pulse of soft program is too small, it will take more time to perform soft program to adjust the threshold voltage of the target storage area. If the voltage value of the weak programming pulse of soft program is too large, it is easy to cause the storage unit of the target storage area to perform weak "0" data after performing soft program, resulting in the need to re-perform erase. The voltages of erase and soft program will prolong the time of the entire erase operation. It should be understood that the above description of too small or too large voltage refers to the pulse voltage value that does not match the target storage area, especially after the target storage area is cycled for multiple times, the use characteristics of the storage unit change, and the originally matched pulse voltage value becomes a mismatched pulse voltage value.

[0043] More specifically, as known from the foregoing, the storage unit changes towards more difficult to erase and easier to program use characteristics as the number of cycles increases. The pulse voltages of erase and soft program with fixed preset parameters in the prior art become too small and too large, respectively, which seriously affects the time of the erase operation.

[0044] More specifically, since the life cycle (the number of cycles that can be performed) of the flash memory chip is generally more than 100,000 times, the change process of the use characteristics of the storage unit is relatively not obvious. If the voltage values of the erase pulse and the weak programming pulse are frequently updated and adjusted according to the number of cycles, a large amount of memory resources will be wasted. Therefore, in the embodiments of the present application, whether the erase operation of the next stage (i.e., the next cycle interval) needs to set new voltage values of the erase pulse and the weak programming pulse to complete the erase and soft program stages, respectively, is determined according to the related time data of the erase operation generated in the last cycle interval. This not only reasonably utilizes the memory resources, but also ensures that the flash memory chip can timely configure appropriate voltage values of the erase pulse and the weak programming pulse for the erase operation.

[0045] More specifically, the first threshold voltage difference is the difference between the highest threshold voltage of the storage cells after the first erase pulse in the first and last erase operations in the last cycle interval, which is set as a positive value for the subsequent analysis and judgment, i.e. the absolute value of the voltage difference or the highest threshold voltage of the storage cells after the first erase pulse in the last erase operation minus the highest threshold voltage of the storage cells after the first erase pulse in the first erase operation (as the storage cells are more difficult to erase as the cycle number increases, and the first erase pulse in each erase operation is performed after the pre-programming stage, for the same target storage area, the first erase pulse of the erase operation with a larger cycle number has a worse erase effect, and the threshold voltage of the storage cells in the target storage area is more difficult to erase, so the highest threshold voltage of the storage cells after the first erase pulse in the last erase operation minus the highest threshold voltage of the storage cells after the first erase pulse in the first erase operation can produce a positive first threshold voltage difference); the highest threshold voltage of the storage cells is the threshold voltage of the storage cell with the highest threshold voltage in the target storage area; similarly, the second threshold voltage is also set as a positive value, i.e. the absolute value of the voltage difference or the highest threshold voltage of the storage cells after the first soft program pulse in the last erase operation minus the highest threshold voltage of the storage cells after the first soft program pulse in the first erase operation (for the same target storage area, the first soft program pulse of the erase operation with a larger cycle number has a stronger soft program effect, and the threshold voltage of the storage cells in the target storage area is easier to program, so the highest threshold voltage of the storage cells after the first soft program pulse in the last erase operation minus the highest threshold voltage of the storage cells after the first soft program pulse in the first erase operation can produce a positive second threshold voltage difference).

[0046] More specifically, the greater the first threshold voltage difference or the greater the second threshold voltage difference reflects the greater the change in the use characteristics of the memory cells in the target storage area in the previous cycle number interval, i.e., the greater the first threshold voltage difference reflects that the current erase pulse is more difficult to erase the threshold voltages of all the memory cells in the target storage area, and it is more difficult to complete the erase phase performed on the target storage area, and the greater the second threshold voltage difference reflects that the current weak program pulse is easier to program the threshold voltages of all the memory cells in the target storage area, so that the memory cells are more likely to become a weak "0" state, resulting in an increase in the number of erase phases to be performed; therefore, the first threshold voltage difference and the second threshold voltage difference can be used as a basis for determining whether the current erase pulse and the weak program pulse need to be adjusted.

[0047] It should be understood that the smaller the first threshold voltage difference and the second threshold voltage difference (indicating that the use characteristics of the memory cells in the target storage area do not change much), indicating that the voltage values of the current erase pulse and the weak program pulse can still well complete the erase operation performed on the target storage area, and the process of updating and adjusting the voltage values of the erase pulse and the weak program pulse in step S2 is a process of keeping the voltage values of the current erase pulse and the weak program pulse unchanged, which can be a process of skipping the update and adjustment process or resetting the voltage values of the current erase pulse and the weak program pulse to the voltage values of the erase pulse and the weak program pulse.

[0048] More specifically, the greater the first threshold voltage difference and the second threshold voltage difference (exceeding the expectation, indicating that the use characteristics of the memory cells in the target storage area change greatly), indicating that the voltage values of the current erase pulse and the weak program pulse affect the efficiency of the erase operation performed on the target storage area, and the process of updating and adjusting the voltage values of the erase pulse and the weak program pulse in step S2 is a process of increasing the voltage value of the erase pulse (strengthening the erase ability) and reducing the voltage value of the weak program pulse (weakening the soft program).

[0049] The first threshold voltage difference and the second threshold voltage difference obtained by the erase voltage configuration method of the flash memory chip of the embodiments of the present application respectively reflect the change in the applicability of the voltage values of the current erase pulse and the weak program pulse to the target storage area, and can comprehensively reflect the decline in the use characteristics of the memory cells in the target storage area. The method of updating and adjusting the voltage values of the erase pulse and the weak program pulse based on the first threshold voltage difference and the second threshold voltage difference can update the appropriate voltage values of the erase pulse and the weak program pulse in time when the use characteristics of the memory cells decline, so as to ensure that the erase operation can be efficiently and smoothly completed.

[0050] In some preferred embodiments, the cycle number interval is divided based on the cycle number, and the method for configuring the erase voltage of the flash memory chip in the embodiments of the present application is executed when the cycle number switches the cycle number interval, i.e., step S1 is executed when the cycle number of the target storage unit crosses the cycle number interval, for example, if the previous cycle number interval is 0-10000, then the execution of step S1 is triggered when the cycle number reaches 10001.

[0051] Specifically, in the embodiments of the present application, the cycle number interval is switched to trigger the method to run in the embodiments of the present application, which can realize the automatic update and adjustment of the voltage value of the erase pulse and the voltage value of the weak programming pulse of the flash memory chip.

[0052] More specifically, the cycle number interval is divided based on a preset manner. As known from the foregoing, the life cycle of the flash memory chip is relatively long, and the use characteristics of the storage unit change less obviously. If the cycle number interval is set too small, it will result in too many update and adjustment of the erase pulse voltage value and the weak programming pulse voltage value, which will waste the memory resources. If the cycle number interval is set too large, it will result in the first threshold voltage difference and the second threshold voltage difference being too large, which will affect the timeliness of the update of the erase pulse voltage value and the weak programming pulse voltage value. Therefore, in the embodiments of the present application, the cycle number interval is preferably divided in units of ten thousand times, or divided in 10%, 20%, 50% and 80% of the life cycle of the flash memory chip.

[0053] More specifically, in some more preferred embodiments, the cycle number interval is divided based on 10000, 20000, 50000 and 80000. The smaller the degree of the decrease of the use characteristics of the storage unit with the increase of the cycle number, the larger the cycle number interval can be in the later stage of the use of the flash memory chip.

[0054] More specifically, in the embodiments of the present application, step S2 is to analyze and judge the applicability between the erase pulse voltage value and the weak programming pulse voltage value and the target storage region according to the first threshold voltage difference and the second threshold voltage difference obtained in step S1, and to update and adjust the erase pulse voltage value and the weak programming pulse voltage value as the erase pulse voltage value and the weak programming pulse voltage value used for the next cycle number interval to execute the erase operation.

[0055] In some preferred embodiments, the cycle number is stored based on a non-volatile counter.

[0056] Specifically, the non-volatile counter is a circuit device commonly used in the field of memory technology, and is used for counting digital related data; in the embodiment of the present application, each storage area of the flash memory chip is configured with a corresponding non-volatile counter, which is respectively used to record the Cycle number of the corresponding storage area; the method for configuring the erase voltage of the flash memory chip in the embodiment of the present application can conveniently and accurately obtain the Cycle number by reading the data in the non-volatile counter corresponding to the target storage area.

[0057] More specifically, each storage area is configured with a counter to count, which can ensure that the counting data of each storage area is accurate and does not interfere with each other, and the target storage area is a storage area that needs to be erased.

[0058] In some preferred embodiments, the method updates the voltage values of the erase pulse and the voltage values of the weak programming pulse by updating the configuration information.

[0059] Specifically, in the embodiment of the present application, the configuration information can be written in the configuration area or the configuration register of the target storage area, the configuration area is the storage area of the start data of the target storage area, and is generally set in the first 8 bytes in the corresponding storage array; the configuration register is a register set in the chip for storing non-volatile specific configuration information; the above two methods can be used to store or update the configuration information, so that the flash memory chip can quickly read the configuration information and call the appropriate voltage values of the erase pulse and the voltage values of the weak programming pulse when the target storage area needs to be erased, to perform the erase operation on the target storage area, so that the next Cycle number interval performs the erase operation on the target storage area with the updated and adjusted voltage values of the erase pulse and the voltage values of the weak programming pulse.

[0060] In some preferred embodiments, the step of updating the voltage values of the erase pulse and the voltage values of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference respectively comprises:

[0061] S21, when the first threshold voltage difference is greater than the first preset threshold, increasing the voltage value of the erase pulse;

[0062] S22, when the second threshold voltage difference is greater than the second preset threshold, reducing the voltage value of the weak programming pulse.

[0063] Specifically, in the embodiments of the present application, the first preset threshold is set to realize the automatic judgment of the voltage value of the erase pulse. If the first threshold voltage difference is greater than the first preset threshold, it is considered that the use characteristics of the storage cells in the target storage area are degraded beyond expectation due to the erase operation in the cycle number interval, indicating that the current voltage value of the erase pulse is difficult to erase the threshold voltage of the storage cells in the target storage area, and therefore a higher voltage value of the erase pulse needs to be configured for the erase operation in the next cycle number interval.

[0064] More specifically, in the embodiments of the present application, the second preset threshold is set to realize the automatic judgment of the voltage value of the weak programming pulse. If the second threshold voltage difference is greater than the second preset threshold, it is considered that the use characteristics of the storage cells in the target storage area are degraded beyond expectation due to the erase operation in the cycle number interval, indicating that the current voltage value of the weak programming pulse is easy to program the threshold voltage of the storage cells in the target storage area too high, and therefore a lower voltage value of the weak programming pulse needs to be configured for the erase operation in the next cycle number interval.

[0065] In some more preferred embodiments, the steps of updating the voltage value of the erase pulse and the voltage value of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference respectively include:

[0066] S21', when the first threshold voltage difference is greater than the first preset threshold or the highest storage cell threshold voltage after the first erase pulse in the last erase operation in the last cycle number interval is higher than the third preset threshold, increasing the voltage value of the erase pulse;

[0067] S22', when the second threshold voltage difference is greater than the second preset threshold or the highest storage cell threshold voltage after the first weak programming pulse in the last erase operation in the last cycle number interval is higher than the fourth preset threshold, decreasing the voltage value of the weak programming pulse.

[0068] Specifically, if the update judgment is only based on the first preset threshold and the second preset threshold, there may be a situation that the first threshold voltage difference corresponding to a plurality of consecutive cycle number intervals is less than the first preset threshold or a situation that the second threshold voltage difference corresponding to a plurality of consecutive cycle number intervals is less than the second preset threshold. In this case, the adjustment of the voltage value of the erase pulse and the voltage value of the weak programming pulse will not be triggered, but the voltage value of the erase pulse and the voltage value of the weak programming pulse may have been unable to complete the erase operation of the target storage area. Therefore, in the embodiments of the present application, the third preset threshold and the fourth preset threshold are added to respectively judge whether the voltage value of the erase pulse and the voltage value of the weak programming pulse have been unable to complete the erase phase and the soft program phase, to trigger the update of the voltage value of the erase pulse and the voltage value of the weak programming pulse, and avoid the failure of the erase operation of the flash memory chip.

[0069] In some preferred embodiments, the first preset threshold value is 0.4-0.6V, preferably 0.5V, the threshold voltage of the successfully erased memory cell is near 4-7V, and the 0.5V is set as the update judgment parameter of the voltage value of the erase pulse, which can ensure that the voltage value of the erase pulse is updated in time.

[0070] In some preferred embodiments, the second preset threshold value is 0.2-0.4V, preferably 0.3V, the soft program belongs to the threshold voltage adjustment stage of the memory cell, and the threshold voltage of the memory cell changes in a small range, so the second preset threshold value is generally smaller than the first preset threshold value.

[0071] In some preferred embodiments, the flash memory chip pre-stores a plurality of levels of voltage values of the erase pulse arranged in a voltage increasing manner and a plurality of levels of voltage values of the soft program pulse arranged in a voltage decreasing manner.

[0072] The step of increasing the voltage value of the erase pulse includes:

[0073] switching the voltage value of the erase pulse to the voltage value of the erase pulse of the next level;

[0074] The step of decreasing the voltage value of the soft program pulse includes:

[0075] switching the voltage value of the soft program pulse to the voltage value of the soft program pulse of the next level.

[0076] Specifically, the flash memory chip to which the method of the embodiments of the present application is applied stores the erase voltage group library and the cycle number interval information non-volatilically through a non-volatilic register circuit.

[0077] It should be understood that the flash memory chip to which the method of the embodiments of the present application is applied stores the configuration data of the plurality of levels of voltage values of the erase pulse arranged in a voltage increasing manner and the plurality of levels of voltage values of the soft program pulse arranged in a voltage decreasing manner non-volatilically through a non-volatilic register circuit.

[0078] More specifically, based on the switching mode of the next level, when the first threshold voltage difference is greater than the first preset threshold value, the voltage value of the erase pulse can be updated to a voltage value of the erase pulse that is higher in voltage and is suitable for the current target storage area erase operation, and when the second threshold voltage difference is greater than the second preset threshold value, the voltage value of the soft program pulse can be updated to a voltage value of the soft program pulse that is lower in voltage and is suitable for the current target storage area erase operation.

[0079] In some preferred embodiments, the step of increasing the voltage value of the erase pulse includes:

[0080] The increasing value of the voltage value of the erase pulse is set according to a difference between the first threshold voltage difference and a first preset threshold value to update the voltage value of the erase pulse.

[0081] The step of reducing the voltage value of the weak programming pulse comprises:

[0082] The reducing value of the voltage value of the weak programming pulse is set according to a difference between the second threshold voltage difference and a second preset threshold value to update the voltage value of the weak programming pulse.

[0083] Specifically, in actual implementation, the degree of decline of the usage characteristics of the storage cells in the target storage area can be more severe than expected, that is, the first threshold voltage difference is 2 times or more than the first preset threshold value. At this time, if the voltage value of the erase pulse is simply updated according to the preset level or amplitude, the voltage value of the erase pulse required for the next stage of cycle number interval erase operation can not be obtained. Therefore, in the embodiments of the present application, the increasing value of the voltage value of the erase pulse is set based on the difference between the first threshold voltage difference and the first preset threshold value, so that the change amount of the voltage value of the erase pulse is proportionally adjusted based on the actual degree of decline of the usage characteristics of the storage cells, and it is ensured that the updated voltage value of the erase pulse is accurately applicable to the current target storage area. Similarly, the reducing value of the voltage value of the weak programming pulse is set based on the difference between the second threshold voltage difference and the second preset threshold value, so that the change amount of the voltage value of the weak programming pulse is proportionally adjusted based on the actual degree of decline of the usage characteristics of the storage cells, and it is ensured that the updated voltage value of the weak programming pulse is accurately applicable to the current target storage area.

[0084] In some preferred embodiments, the target storage area is a plurality of blocks or a plurality of sectors in a flash memory chip.

[0085] Specifically, the erase modes of the flash memory chip include chip erase, block erase and sector erase, and the usage degrees of different storage areas of the flash memory chip are quite different (which means that the cycle numbers of different storage areas are different). If the method of the embodiments of the present application is used for chip erase, the improvement effect of the erase efficiency is very small. Therefore, the method of the embodiments of the present application is mainly used for optimizing the use of block erase and sector erase, that is, the voltage value of the erase pulse and the voltage value of the weak programming pulse are updated for the target storage area composed of a plurality of blocks or a plurality of sectors, so as to improve the erase operation efficiency of the target storage area.

[0086] In the second aspect, referring to Figure 2 Some embodiments of the present application also provide an erase voltage configuration device of a flash memory chip, which is used for configuring the related voltages of the flash memory chip for performing erase operation. The device comprises:

[0087] The acquisition module 201 is configured to acquire a first threshold voltage difference and a second threshold voltage difference. The first threshold voltage difference is a difference between the highest threshold voltages of the storage cells in the target storage region after a first erase pulse in the first and last erase operations in the last cycle interval. The second threshold voltage difference is a difference between the highest threshold voltages of the storage cells in the target storage region after a first weak programming pulse in the first and last erase operations in the last cycle interval.

[0088] The adjustment module 202 is configured to update the voltage value of the erase pulse and the voltage value of the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference, respectively.

[0089] The first threshold voltage difference and the second threshold voltage difference acquired by the erase voltage configuration device of the flash memory chip in the embodiments of the present application reflect the changes in the applicability of the current voltage value of the erase pulse and the voltage value of the weak programming pulse to the target storage region, respectively, and can comprehensively reflect the decline of the use characteristics of the storage cells in the target storage region. The device updates the voltage value of the erase pulse and the voltage value of the weak programming pulse based on the first threshold voltage difference and the second threshold voltage difference, so that the appropriate voltage value of the erase pulse and the voltage value of the weak programming pulse can be updated in time when the use characteristics of the storage cells decline, to ensure that the erase operation can be efficiently and smoothly performed.

[0090] In some preferred embodiments, the device updates the voltage value of the erase pulse and the voltage value of the weak programming pulse by updating the configuration information.

[0091] In some preferred embodiments, the cycle interval is divided based on the cycle number, and the device is operated when the cycle number switches the cycle interval.

[0092] In some preferred embodiments, the erase voltage configuration device of the flash memory chip in the embodiments of the present application is used to perform the erase voltage configuration method of the flash memory chip provided in the first aspect.

[0093] In the third aspect, please refer to Figure 3 Some embodiments of the present application further provide a structural schematic diagram of an electronic device. The present application provides an electronic device, which includes a processor 301 and a memory 302. The processor 301 and the memory 302 are interconnected and communicate with each other through a communication bus 303 and / or other forms of connection mechanism (not shown). The memory 302 stores computer readable instructions executable by the processor 301. When the electronic device is running, the processor 301 executes the computer readable instructions to perform the method in any of the optional implementation manners of the above embodiments.

[0094] In a fourth aspect, an embodiment of the present application provides a storage medium having a computer program stored thereon, which, when executed by a processor, performs the method in any of the optional implementation manners of the above-mentioned embodiments. The storage medium can be implemented by any type of volatile or nonvolatile storage device or a combination thereof, such as a static random access memory (SRAM), an electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM), a programmable read-only memory (PROM), a read-only memory (ROM), a magnetic storage, a flash memory, a magnetic disk or an optical disk.

[0095] To sum up, the embodiment of the present application provides a method, device, equipment and storage medium for configuring an erase voltage of a flash memory chip. The first threshold voltage difference and the second threshold voltage difference obtained by the method reflect the applicability changes of the current erase pulse voltage value and the weak programming pulse voltage value to the target storage region, and can comprehensively reflect the decline of the use characteristics of the storage unit in the target storage region. The method updates and adjusts the erase pulse voltage value and the weak programming pulse voltage value based on the first threshold voltage difference and the second threshold voltage difference, so that the erase pulse voltage value and the weak programming pulse voltage value can be updated in time when the use characteristics of the storage unit decline, to ensure that the erase operation can be efficiently and smoothly performed.

[0096] In the embodiments provided by the present application, it should be understood that the disclosed device and method can be implemented in other manners. The described device embodiments are merely schematic, for example, the division of the units is only a logical function division, and there can be another division manner in actual implementation, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be electrical, mechanical or in other forms.

[0097] In addition, the units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the embodiment scheme.

[0098] Furthermore, each functional module in each embodiment of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0099] In this paper, relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations.

[0100] The above is only an embodiment of the present application and is not used to limit the protection scope of the present application. For those skilled in the art, the present application can have various changes and variations. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for configuring erase voltages of a flash memory chip for performing an erase operation, the method comprising: determining a first voltage for a first erase operation; determining a second voltage for a second erase operation; and configuring the first and second voltages for the first and second erase operations, respectively. The method comprises the following steps: obtaining a first threshold voltage difference and a second threshold voltage difference, the first threshold voltage difference being a difference between the highest threshold voltages of the memory cells of a target memory region after a first erase pulse in the first and last erase operations in a cycle number interval, and the second threshold voltage difference being a difference between the highest threshold voltages of the memory cells of the target memory region after a first weak programming pulse in the first and last erase operations in the cycle number interval; updating the voltage values of the erase pulse and the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference, respectively.

2. The method of claim 1, wherein the method further comprises: The cycle number interval is divided based on the cycle number, and the method is performed when the cycle number switches the cycle number interval.

3. The method of claim 1, wherein the method further comprises: determining whether the erase voltage is within a range of a maximum voltage and a minimum voltage; and adjusting the erase voltage to be within the range of the maximum voltage and the minimum voltage. The method updates the voltage values of the erase pulse and the weak programming pulse by updating configuration information.

4. The method of claim 1, wherein the method further comprises: determining whether the erase voltage is within a range of a maximum voltage and a minimum voltage; and adjusting the erase voltage to be within the range of the maximum voltage and the minimum voltage. The step of updating the voltage values of the erase pulse and the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference comprises: when the first threshold voltage difference is greater than a first preset threshold value, increasing the voltage value of the erase pulse; when the second threshold voltage difference is greater than a second preset threshold value, decreasing the voltage value of the weak programming pulse.

5. The method of claim 4, wherein the step of determining the erase voltage is performed by a microprocessor. The flash memory chip pre-stores a plurality of levels of voltage values of the erase pulse arranged in an increasing voltage manner and a plurality of levels of voltage values of the weak programming pulse arranged in a decreasing voltage manner. The step of increasing the voltage value of the erase pulse comprises: switching the voltage value of the erase pulse to the voltage value of the erase pulse of the next level; The step of decreasing the voltage value of the weak programming pulse comprises: switching the voltage value of the weak programming pulse to the voltage value of the weak programming pulse of the next level.

6. The method of claim 4, wherein the erase voltage is configured by: The step of increasing the voltage value of the erase pulse comprises: setting an increase value of the voltage value of the erase pulse according to a difference between the first threshold voltage difference and the first preset threshold value to update the voltage value of the erase pulse; The step of decreasing the voltage value of the weak programming pulse comprises: setting a decrease value of the voltage value of the weak programming pulse according to a difference between the second threshold voltage difference and the second preset threshold value to update the voltage value of the weak programming pulse.

7. The method of claim 1, wherein the method further comprises: determining a number of erase voltage levels of the flash memory chip; and determining a number of erase voltage levels of the flash memory chip. The target memory region is a plurality of blocks or a plurality of sectors in the flash memory chip.

8. An apparatus for configuring an erase voltage of a flash memory chip for performing an erase operation, the apparatus comprising: a voltage generator for generating a voltage; a voltage comparator for comparing the generated voltage with a reference voltage; and a voltage controller for controlling the voltage generator to generate the voltage based on the comparison result of the voltage comparator. The device comprises: an obtaining module, configured to obtain a first threshold voltage difference and a second threshold voltage difference, the first threshold voltage difference being a difference between the highest threshold voltages of the memory cells of a target memory region after a first erase pulse in the first and last erase operations in a cycle number interval, and the second threshold voltage difference being a difference between the highest threshold voltages of the memory cells of the target memory region after a first weak programming pulse in the first and last erase operations in the cycle number interval; an adjusting module, configured to update the voltage values of the erase pulse and the weak programming pulse according to the first threshold voltage difference and the second threshold voltage difference, respectively.

9. An electronic device, comprising: A computer program product comprising a processor and a memory storing computer readable instructions which, when executed by the processor, perform the steps of the method of any of claims 1-7.

10. A storage medium having stored thereon a computer program, characterized in that The computer program, when executed by a processor, performs the steps of the method of any of claims 1-7.

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