Electronic component embedded substrate

Abstract

The present disclosure provides an electronic component embedded substrate including an insulating material including a cavity formed in one surface of the insulating material, a protective layer embedded in the insulating material and covering an entire bottom surface of the cavity, a solder disposed on a side surface of the cavity, and an electronic component disposed in the cavity and at least partially in contact with the solder, wherein the protective layer has a material different from a material of the insulating material.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2021-0132445, filed on October 6, 2021, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to an embedded substrate for electronic components. Background Technology

[0003] In light of the recent trend toward lighter and smaller mobile devices, there is a growing need to achieve thinner and lighter embedded substrates for electronic components installed in such devices.

[0004] Furthermore, in order to meet the technical requirements of thinner and lighter mobile devices, and to shorten the connection paths between electronic components and suppress noise, it is necessary to insert electronic components such as integrated circuits (ICs), active components, or passive components into the substrate. Recently, research on technologies for embedding components into substrates in various ways has been ongoing.

[0005] In particular, a substrate structure including a cavity has been formed to insert various components into the substrate, and techniques such as sandblasting have been performed to form the cavity. Summary of the Invention

[0006] One aspect of this disclosure provides an embedded substrate for electronic components that includes fine circuitry and / or microvias.

[0007] Another aspect of this disclosure may provide an embedded substrate for electronic components, wherein high-capacity electronic components are mounted in a cavity.

[0008] Another aspect of this disclosure may provide an embedded substrate for electronic components, wherein cavities are fabricated to increase the design freedom of the inner layer circuit patterns.

[0009] According to one aspect of this disclosure, an embedded substrate for an electronic component may include: an insulating material including a cavity disposed in one surface of the insulating material; a protective layer embedded in the insulating material and covering the entire bottom surface of the cavity; solder disposed on a side surface of the cavity; and an electronic component disposed in the cavity and at least partially in contact with the solder, wherein the protective layer has a material different from that of the insulating material. Attached Figure Description

[0010] The above and other aspects, features and advantages of this disclosure will be more clearly understood through the following detailed embodiments, taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 This is a schematic block diagram illustrating an example of an electronic device system;

[0012] Figure 2 This is a schematic perspective view showing an example of an electronic device;

[0013] Figure 3 This is a schematic cross-sectional view showing an example of an embedded substrate for an electronic component according to the present disclosure;

[0014] Figure 4 This is a schematic cross-sectional view illustrating a method for manufacturing an embedded substrate for electronic components according to the present disclosure; and

[0015] Figure 5 This is a schematic diagram illustrating an example of an embedded substrate for an electronic component according to the present disclosure. Detailed Implementation

[0016] In the following description, exemplary embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. In the drawings, the shape, size, etc., of the components may be exaggerated or reduced for clarity.

[0017] In addition, when adding reference numerals to components in the accompanying drawings, the same components will be represented by the same reference numerals as much as possible, even if the same components are shown in different drawings.

[0018] In addition, when describing this disclosure, detailed descriptions of known technologies related to this disclosure will be omitted if it is determined that such detailed descriptions may unnecessarily obscure the main points of this disclosure.

[0019] The phrase "set on any component" in this article is not intended to specify direction. Therefore, "set on any component" can mean set on top of any component and set on bottom of any component.

[0020] The terms "upper surface," "lower surface," "upper side," "lower side," "topmost side," and "bottommost side" used in this document are orientations set in the accompanying drawings for ease of explanation. Therefore, upper surface, lower surface, upper side, lower side, topmost side, bottommost side, etc., may be described as different terms depending on the orientation set.

[0021] The term "connection" between components in this article conceptually includes both indirect connections via a third component and direct connections between two components. Additionally, "electrical connection" conceptually includes both physical connections and physical disconnections.

[0022] The terms "first," "second," etc., are used in this document to distinguish one component from another, without limiting the order, importance, etc., of the corresponding components. In some cases, a first element may be referred to as a second element. Similarly, a second element may be referred to as a first element.

[0023] The term "exemplary embodiment" as used herein does not refer to the same exemplary embodiment, but is used to emphasize a particular feature or characteristic that differs from a particular exemplary embodiment. However, the exemplary embodiments provided herein are considered to be implementable by combining them wholly or partially. For example, an element described in a particular exemplary embodiment may be understood as a description relating to the other exemplary embodiment, even if it is not described in another exemplary embodiment, unless a contrary or contradictory description is provided therein.

[0024] The terminology used herein is for describing exemplary embodiments only and not for limiting this disclosure. In this context, the singular form includes the plural form, unless the context otherwise requires.

[0025] Electronic devices

[0026] Figure 1 This is a schematic block diagram illustrating an example of an electronic device system.

[0027] Reference Figure 1 The electronic device 1000 may house the motherboard 1010. Chip-related components 1020, network-related components 1030, and other components 1040 may be physically or electrically connected to the motherboard 1010. These components may be connected to other electronic components described below via various signal lines 1090.

[0028] Chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM)), flash memory, etc.; application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processing units (e.g., graphics processing units (GPUs)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, chip-related components 1020 are not limited to these, and may also include other types of chip-related components. Furthermore, chip-related components 1020 can be combined with each other. Chip-related components 1020 may be in the form of a package including the aforementioned chips or electronic components.

[0029] Network-related components 1030 may include (but are not limited to) components compatible with or using protocols such as: Wi-Fi (IEEE 802.11 series, etc.), WiMAX (IEEE 802.16 series, etc.), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE+, GSM Evolution with Enhanced Data Rate, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, and 5G protocols, as well as any other wireless and wired protocols specified after the foregoing protocols. However, the network-related component 1030 is not limited to this, and may also include components that are compatible with or use various other wireless or wired standards or protocols. Furthermore, the network-related component 1030 may be combined with the aforementioned chip-related component 1020.

[0030] Other components 1040 may include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low-temperature co-fired ceramic (LTCC) components, electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCCs), etc. However, these other components 1040 are not limited to these, and may also include passive components of various other chip component types for various other purposes. Furthermore, other components 1040 may be combined with the aforementioned chip-related components 1020 and / or network-related components 1030.

[0031] Depending on the type of electronic device 1000, it may include other electronic components that are physically or electrically connected to the motherboard 1010 or not physically or electrically connected to the motherboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, etc. These other electronic components are not limited to these and may include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage units (e.g., hard disk drives), optical disc (CD) drives, digital versatile disc (DVD) drives, etc. Depending on the type of electronic device 1000, it may also include other electronic components for various purposes.

[0032] Electronic device 1000 can be a smartphone, personal digital assistant (PDA), digital video camera, digital camera, network system, computer, monitor, tablet PC, laptop PC, netbook PC, television, video game console, smartwatch, automotive component, etc. However, electronic device 1000 is not limited to these, and can be any other electronic device that processes data.

[0033] Figure 2 This is a schematic perspective view showing an example of an electronic device.

[0034] Reference Figure 2 The electronic device can be, for example, a smartphone 1100. A motherboard 1110 can be housed in the smartphone 1100, and various electronic components 1120 can be physically connected and / or electrically connected to the motherboard 1110. Additionally, other electronic components physically or electrically connected to the motherboard 1110, or other electronic components not physically or electrically connected to the motherboard 1110 (such as a camera module 1130 and / or a speaker 1140), can be housed in the smartphone 1100. Some of the electronic components 1120 can be chip-related components, such as an antenna module 1121, but are not limited thereto. The antenna module 1121 can have the form of surface mounting of the electronic component on an embedded substrate, but is not limited thereto. Furthermore, the electronic device is not limited to the smartphone 1100, but can be other electronic devices as described above.

[0035] Embedded substrate for electronic components

[0036] Figure 3 This is a schematic cross-sectional view showing an example of an embedded substrate for an electronic component according to the present disclosure.

[0037] Reference Figure 3 According to the present disclosure, the embedded substrate 10A of the electronic component may include an insulating material 100, a protective layer 200 and a solder 300. The insulating material 100 includes a cavity CV formed in a surface 100A of the insulating material 100. The protective layer 200 is embedded in the insulating material 100 and covers the entire bottom surface CV0 of the cavity CV. The solder 300 is disposed on the side surface CV1 of the cavity CV.

[0038] In this case, the protective layer 200 may include components different from those of the insulating material 100. For example, the insulating material 100 may include an Ajinomoto build-up film (ABF), and the protective layer 200 may include a dry film photoresist (DFR), but this disclosure is not limited thereto.

[0039] Additionally, the protective layer 200 may be embedded in the insulating material 100 such that at least a portion of each of a surface of the protective layer 200 facing the cavity CV and each of the two side surfaces of the protective layer 200 may contact the insulating material 100. As an example, see [reference needed]. Figure 3 The protective layer 200 can be embedded in the insulating material 100 such that at least a portion of one surface of the protective layer 200 facing the cavity CV and two side surfaces of the protective layer 200 can contact the insulating material 100.

[0040] Additionally, as described below, when machining cavity CV in one surface 100A of insulating material 100, protective layer 200 may be used as a barrier, but is not limited thereto.

[0041] The embedded substrate 10A of the electronic component according to this disclosure may further include an electronic component EC disposed in the cavity CV and at least partially in contact with the solder 300. As an example, the electronic component EC may be in contact with the protective layer 200. As an example, the entire surface of the bottom surface CV0 of the electronic component EC facing the cavity CV may be in contact with the protective layer 200.

[0042] Additionally, the embedded substrate 10A of the electronic components according to this disclosure may also include a metal layer 400, which is embedded in the insulating material 100 and is at least partially in contact with another surface of the protective layer 200 opposite to one surface of the protective layer 200 facing the cavity CV.

[0043] In this configuration, the metal layer 400 may be spaced apart from the electronic component EC, and the protective layer 200 may be disposed within the space between the metal layer 400 and the electronic component EC; however, this disclosure is not limited thereto. The protective layer 200 may also not be embedded in the insulating material 100, and the metal layer 400 and the electronic component EC may be in contact with each other.

[0044] Additionally, the electronic component embedded substrate 10A according to this disclosure may include a circuit layer 500 disposed on the exterior or interior of the insulating material 100. More specifically, a first circuit layer 500A may be embedded in the insulating material 100, and a second circuit layer 500B may be disposed on one surface of the insulating material 100. In this case, vias 600 may be formed in the insulating material 100 to connect the first circuit layer 500A and the second circuit layer 500B to each other.

[0045] Additionally, at least a portion of the first circuit layer 500A, the second circuit layer 500B, and the via 600 may be exposed on at least one side surface (or extend from at least one side surface CV1 of the cavity CV of the insulating material 100), and the exposed (or extended) first circuit layer 500A, the second circuit layer 500B, and the via 600 may contact and connect to the solder 300, but this disclosure is not limited thereto. As an example, at least a portion of each of the first circuit layer 500A, the second circuit layer 500B, and the via 600 extending from at least one side surface CV1 of the cavity CV may contact the solder 300.

[0046] As described above, no separate connection pads are provided between the electronic component EC and the insulating material 100, and the circuit layer 500 and via 600 exposed on the side surface CV1 of the cavity CV of the insulating material 100 (or extending from the side surface CV1 of the cavity CV of the insulating material 100) can be used as pads, so that when manufacturing the package substrate, the package substrate can be manufactured with a small thickness, such as close to the height of the solder, and fine pitch can be achieved, but the technical effect is not limited to this.

[0047] The insulating material 100 of the electronic component embedded substrate 10A according to this disclosure may be at least one of thermosetting resins (such as epoxy resins), thermoplastic resins (such as polyimide), and resins (such as prepregs, ABF, FR-4, or bismaleimide triazine (BT)) prepared by impregnating a core material (such as glass fiber, glass cloth, or glass fabric) and / or inorganic fillers in a thermosetting or thermoplastic resin.

[0048] In addition, the material of each of the circuit layer 500 and the via 600 may be a conductive material, such as, but not limited to, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or alloys thereof.

[0049] Furthermore, each of the first circuit layer 500A and the second circuit layer 500B, as well as the via 600, in the electronic component embedded substrate 10A according to this disclosure may include an electroless layer and an electroplated layer. The electroless layer may be used as a seed layer for the electroplated layer, but is not limited thereto.

[0050] The electroless and electroplated layers filling the via 600 may also include conductive materials such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), palladium (Pd), or alloys thereof.

[0051] At least a portion of the second circuit layer 500B protruding from one surface of the insulating material 100 may include a surface treatment layer. The surface treatment layer may include a component different from that of each of the first circuit layer 500A and the second circuit layer 500B. For example, each of the first circuit layer 500A and the second circuit layer 500B may include copper (Cu), and the surface treatment layer may include nickel (Ni) or tin (Sn), but this disclosure is not limited thereto.

[0052] Furthermore, in the electronic component embedded substrate 10A according to this disclosure, a solder resist layer covering at least a portion of the second circuit layer 500B on which a surface treatment layer is formed may be further disposed on a surface 100A of the insulating material 100. In this case, the solder resist layer may be formed using a photosensitive material. Additionally, the solder resist may have thermosetting and / or photocurable properties, but is not limited thereto.

[0053] Figure 4 This is a schematic cross-sectional view showing a method for manufacturing an embedded substrate 10B for electronic components according to the present disclosure.

[0054] Reference Figure 4 According to this disclosure, the embedded substrate 10B of the electronic component can be manufactured by stacking an insulating material 100 on a discrete core DCF and then forming a cavity CV, wherein a plurality of insulating layers, circuit patterns and vias are stacked in the insulating material 100.

[0055] More specifically, a cavity CV can be formed in a surface 100A of an insulating material 100 with embedded circuit patterns using laser processing or sandblasting methods. In this case, a mask can be placed in an area where the cavity CV is not formed, but is not limited thereto. As an example, such as... Figure 4 As shown, the electronic component embedded substrate 10B may also include an embedded pattern layer, which may be disposed in the other surface of the insulating material 100 opposite to one surface 100A of the insulating material 100.

[0056] Additionally, when forming the cavity CV, at least a portion of the circuit layers disposed on the two surfaces of the outermost insulating layer of the insulating material 100 and the vias connecting the circuit layers disposed on the two surfaces of the outermost insulating layer to each other can be polished to expose the side surface CV1 of the cavity CV. As described above, the circuit layers and vias exposed on the side surface CV1 of the cavity CV can be used as connection pads for connecting to the electronic component EC, but are not limited thereto.

[0057] In addition, the depth of the cavity CV is not limited to the depth of the outermost insulating layer of the insulating material 100, but each of the multiple circuit layers and vias can be exposed to the side surface CV1 of the cavity CV by processing multiple insulating layers.

[0058] Additionally, when forming the cavity CV, the protective layer 200 embedded in the insulating material 100 can serve as a barrier. That is, the cavity CV can be formed to the depth to which the protective layer 200 is formed, but is not limited thereto.

[0059] Subsequently, although not shown, the electronic component EC may be disposed in the formed cavity CV so as to contact the solder 300 disposed on the side surface CV1 of the cavity CV.

[0060] Other components are duplicates of those mentioned above, so their detailed descriptions are omitted.

[0061] Figure 5 This is a schematic diagram illustrating an example of an embedded substrate for an electronic component according to the present disclosure.

[0062] Reference Figure 5 The embedded substrate 10 of the electronic component according to the present disclosure may include an electronic component EC disposed in a cavity CV formed in a surface of an insulating material 100. The electronic component EC may be electrically connected to solder 300 disposed on a side surface CV1 of the cavity CV.

[0063] In this configuration, solder 300 may contact each of the circuit layer 500 and the via 600 exposed on the side surface CV1 of the cavity CV (or extending from the side surface CV1 of the cavity CV). In this configuration, the circuit layer 500 and the via 600 may serve as connection pads for connecting the electronic component EC and the electronic component embedded substrate 10 to each other, but are not limited thereto.

[0064] When the electronic component EC is mounted in the cavity CV of the insulating material 100, a space can be formed between the circuit layer 500 and the via 600 exposed on the side surface CV1 of the cavity CV and the electronic component EC. Solder 300 can be disposed in such a space to connect the electronic component embedded substrate 10 and the electronic component EC to each other.

[0065] In this configuration, the circuit layer 500 and via 600 exposed on the side surface CV1 of the cavity CV can serve as pads for connecting the electronic component embedded substrate 10 and the electronic component EC to each other, rather than for connecting electrical signals to each other. The via 600 can be eccentrically oriented towards the cavity CV, but this disclosure is not limited thereto. For example, the via 600 can be eccentrically oriented relative to the side surface CV1 of the cavity CV, and the central axis of the via 600 along the stacking direction of the electronic component embedded substrate 10 can be offset by a certain distance from the side surface CV1 of the cavity CV.

[0066] Unlike related techniques that mount electronic components in cavities or stack them on a surface of a substrate by setting individual connection pads, according to this disclosure, the circuit layer 500 and via 600 can be fabricated to expose the side surface CV1 of the cavity CV formed in the insulating material 100 of the electronic component embedded substrate 10, to serve as connection pads. Therefore, the size of the substrate, equivalent to the thickness of the connection pads, can be reduced, and the height of the solder 300 connecting the substrate and the electronic components to each other can also be reduced, enabling fine pitch, but this disclosure is not limited thereto.

[0067] Other components are duplicates of those mentioned above, so their detailed descriptions are omitted.

[0068] According to exemplary embodiments of the present disclosure, an embedded substrate for electronic components, including fine circuitry and / or microvias, can be provided.

[0069] In addition, an embedded substrate for electronic components can be provided for mounting large-capacity electronic components in the cavity.

[0070] In addition, an embedded substrate for electronic components may be provided, wherein cavities are fabricated to increase the design freedom of the inner layer circuit patterns.

[0071] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. An embedded substrate for electronic components, comprising: An insulating material, including a cavity disposed in one surface of the insulating material; A first circuit layer is disposed on one surface of the insulating material; The second circuit layer is embedded in the insulating material; Vias are used to connect the first circuit layer and the second circuit layer to each other; A protective layer, embedded in the insulating material and covering the entire bottom surface of the cavity; Solder is disposed on the side surface of the cavity; as well as An electronic component is disposed within the cavity and is at least partially in contact with the solder. The protective layer is made of a different material than the insulating material, and Wherein, at least a portion of each of the first circuit layer, the second circuit layer, and the via extends from at least one side surface of the side surface of the cavity of the insulating material.

2. The embedded substrate for electronic components as described in claim 1, wherein, At least a portion of each of the surface of the protective layer facing the cavity and the two side surfaces of the protective layer is in contact with the insulating material.

3. The electronic component embedded substrate of claim 1, further comprising a metal layer embedded in the insulating material and in at least partially contacting another surface of the protective layer opposite to one surface of the protective layer facing the cavity.

4. The embedded substrate for electronic components as described in claim 3, wherein, The metal layer is spaced apart from the electronic components.

5. The embedded substrate for electronic components as described in claim 1, wherein, The via is eccentrically oriented toward the cavity of the insulating material.

6. The embedded substrate for electronic components as described in claim 1, wherein, At least a portion of the first circuit layer and the second circuit layer, which extend from at least one side surface of the cavity, and at each of the vias, are in contact with the solder.

7. The embedded substrate for electronic components as described in claim 1, wherein, The protective layer includes a dry film photoresist.

8. The electronic component embedded substrate of claim 1, further comprising an embedded pattern layer disposed in a surface of the insulating material opposite to one surface of the insulating material.

9. The embedded substrate for electronic components as described in claim 1, wherein, The electronic components are in contact with the protective layer.

10. The embedded substrate for electronic components as claimed in claim 9, wherein, The entire surface of the bottom surface of the electronic component facing the cavity is in contact with the protective layer.

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