Operation Method of Resonant DC Link Inverter under Narrow Pulse

Abstract

The operation method of a resonant DC link inverter under narrow pulses belongs to the field of power electronics technology, and particularly relates to an operation method of a resonant DC link inverter under narrow pulses. The present invention provides an operation method of a resonant DC link inverter under narrow pulses. The present invention includes the following parts: 1) When the phase current is less than zero and the switching mode is O→P→O (P means the upper transistor of a single-phase bridge arm is turned on and the lower transistor is turned off. O means the upper transistor of a single-phase bridge arm is turned off and the lower transistor is turned on. These are conventional terms in SVPWM modulation mode); delay the turn-off of the driving signal of the main switch tube S1; when S1 is turned on and the main switch tube S2 (for the switch tubes S1-S6, see Figure 1, and these 6 switch tubes are all main switch tubes) is turned off, the auxiliary circuit does not operate; 2) When the phase current is greater than zero and the switching mode is O→P→O; turn on the driving signal of the main switch tube S1 in advance; when the auxiliary circuit creates a zero-voltage notch, it does not affect the output voltage.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and in particular relates to an operation method of a resonant DC link inverter under narrow pulses. Background Art

[0002] Soft-switching technology is widely used in voltage-source inverters. Resonant DC-link inverters are a key research area within this field. Compared to auxiliary resonant-pole inverters, they offer a simpler topology and lower hardware cost. Compared to passive soft-switching inverters, they can achieve stable soft switching even under light loads. Consequently, resonant DC-link inverters have garnered widespread attention.

[0003] The resonant DC link (RDCL) inverter creates a zero voltage notch through an auxiliary circuit to provide zero voltage switching conditions for the main switch tube. However, the zero voltage notch amplifies the narrow pulse effect, resulting in output voltage loss or soft switching failure.

[0004] In actual resonant DC-link inverter applications, whether using SPWM or SVPWM modulation, the operating principle is to create a zero-voltage groove, providing zero-voltage switching conditions for the main switch, thereby reducing switch losses and improving system efficiency. However, under narrow pulses, there are problems with soft switching failure or output voltage loss. Summary of the Invention

[0005] The present invention aims to solve the above problems and provides an operation method of a resonant DC link inverter under narrow pulses.

[0006] To achieve the above object, the present invention adopts the following technical solution, and the present invention includes the following parts:

[0007] 1) When the phase current is less than zero, the switching mode is O→P→O (P means the upper tube of the single-phase bridge arm is turned on and the lower tube is turned off. O means the upper tube of the single-phase bridge arm is turned off and the lower tube is turned on. It is a common term for SVPWM modulation); the driving signal of the main switch tube S1 is delayed to turn off; when S1 is turned on, the main switch tube S2 (for switches S1-S6, see Figure 1 , these 6 switch tubes are all main switch tubes) are turned off, and the auxiliary circuit does not operate;

[0008] 2) When the phase current is greater than zero and the switching mode is O→P→O, the main switch S1 of the driving signal is turned on in advance; the auxiliary circuit does not affect the output voltage when creating the zero voltage groove;

[0009] 3) Driving signal in the P→O→P mode; the auxiliary circuit operates twice to create the soft-switching conditions for the turn-off and turn-on of the main switch S1 respectively. At this time, the auxiliary circuit operates once to provide zero-voltage switching for the main switch S1 and output zero voltage for the inverter; keep the switching state of the main switch S1, and only the auxiliary circuit operates (see Appendix Figure 4 (c), 4(d), U AN is the output phase voltage. At this time, the output voltages are E→0→E respectively. When the zero-voltage groove created by the auxiliary circuit occurs, the inverter also outputs zero voltage. At this time, the main switch does not operate, and only the auxiliary switch operates to control the time of the zero-voltage groove to output the zero-voltage vector);

[0010] 4) When the switching mode is O→P→O; the output voltage of the inverter is 0→E→0 (when the switching mode is O→P→O; see Appendix Figure 4 (a), 4(b), U AN is the output phase voltage. At this time, the output voltages are 0→E→0 respectively), when the zero-voltage groove created by the auxiliary circuit occurs, the inverter actually outputs zero voltage, while under ideal conditions, UAN has a voltage output in the P state, which leads to the loss of the output voltage under narrow pulses. Therefore, the method proposed in the present invention needs to be used to compensate this part, as follows.

[0011] As a preferred solution, when the phase current is greater than zero and the switching mode is O→P→O in the present invention; where T A is the phase modulation time, T A - is the auxiliary modulation time, U A - is the auxiliary triangular carrier wave, t n is the conduction time of the switch under narrow pulses. The calculation method of the auxiliary modulation time (T A -) is as follows:

[0012] T A - = T A - t h

[0013] t h = t ac tanθ

[0014] t n < t ac < t notch

[0015] θ is the tilt angle of the auxiliary triangular carrier wave U A- , t h is the translation amount between the phase modulation time and the auxiliary modulation time, t notch is the zero-voltage groove time, t acIndicates the early conduction time of the driving signal of the main switch tube S1 under this method.

[0016] As another preferred solution, when the phase current is less than zero and the switching mode is O→P→O in the present invention (see attachment Figure 10 ), where T A is the phase modulation time, T A+ is the auxiliary modulation time, U A+ is the auxiliary triangular carrier wave, t n is the conduction time of the switch tube under a narrow pulse. The calculation method of the auxiliary modulation time (T A+ ) is as follows:

[0017] T A + = T A - t h

[0018] t h = t ad tanθ

[0019] t n < t ad < t n o tch

[0020] t dc ]>= t dead

[0021] t L = T S / 2 - t dead - t n / 2

[0022] t ab = t ad - t dead - t n

[0023] θ is the tilt angle of the auxiliary triangular carrier wave U A- t h is the translation amount between the phase modulation time and the auxiliary modulation time, t notch is the zero voltage groove time, t dead is the dead time, t ad is any value between t notch and t n , T S is the period of the triangular carrier wave, t L is the duration of the part where the auxiliary triangular carrier wave U A+ is 0.

[0024] In addition, t ac = 4us in the present invention.

[0025] Advantages of the present invention

[0026] A method for the operation of a resonant DC link (RDCL) inverter under narrow pulses provided by the present invention eliminates the narrow pulse effect based on the auxiliary modulation time and the space vector pulse width modulation (ATAC-SVPWM) method of the auxiliary triangular carrier. By improving the drive signal, the narrow pulse effect is eliminated, the influence of narrow pulses on the switches is avoided, and reliable soft switching is provided for the main switches.

[0027] The method for the operation of a resonant DC link (RDCL) inverter under narrow pulses provided by the present invention reduces the number of operations of the auxiliary circuit under narrow pulses, reduces the loss of the auxiliary circuit, and improves the system efficiency.

[0028] The method for the operation of a resonant DC link (RDCL) inverter under narrow pulses provided by the present invention compensates the output voltage under different conditions according to the current direction of the main switch and the switching mode (O→P→O or P→O→P is the switching mode), making the output voltage the same as the ideal SVPWM, avoiding the voltage loss problem under narrow pulses, and improving the output waveform quality.

[0029] The method for the operation of a resonant DC link (RDCL) inverter under narrow pulses provided by the present invention is applicable to all resonant DC link inverters (the modulation methods of resonant DC link inverters are mainly SPWM or SVPWM modulation methods. The method proposed by the present invention is based on the SVPWM method of the auxiliary modulation time and the auxiliary triangular carrier, and can also be applied to any resonant DC link inverter), which can effectively reduce the switching loss of the auxiliary circuit, eliminate the narrow pulse effect, and improve the system efficiency.

[0030] The characteristics of the modulation of the present invention are based on the influence of the output current direction and the switching sequence on the output voltage vector under the zero voltage notch, combining the zero voltage notch with the small vectors under narrow pulses, improving the working mode of the auxiliary circuit of the resonant DC link inverter, compensating the output voltage under narrow pulses, and making the output voltage vector the same as the ideal voltage; compared with the traditional SVPWM modulation, this method not only avoids the loss of the output voltage under narrow pulses, but also reduces the number of operations of the auxiliary circuit, improving both the voltage utilization rate and reducing the loss, and improving the efficiency of the system. Description of the drawings

[0031] The following further describes the present invention in conjunction with the drawings and specific embodiments. The protection scope of the present invention is not limited only to the description of the following content.

[0032] Figure 1 It is the circuit topology diagram of the resonant DC link inverter selected in the present invention.

[0033] Figure 2 This is the zero-voltage groove of the A-phase bridge arm in the present invention under ideal conditions.

[0034] Figure 3 This is the zero-voltage groove of the three-phase resonant DC-link inverter in the present invention under ideal conditions.

[0035] Figure 4 This is the zero-voltage groove under narrow pulses in the present invention.

[0036] Figure 5 This is the zero-voltage groove under soft-switching failure in the present invention.

[0037] Figure 6 This is in the present invention when I A ≥ 0, the method for implementing the driving signal of O → P → O.

[0038] Figure 7 This is in the present invention when I A < 0, the method for implementing the driving signal of O → P → O.

[0039] Figure 8 This is the method for implementing the driving signal of P → O → P in the present invention.

[0040] Figure 9 This is in the present invention when I A ≥ 0, the calculation of the auxiliary modulation time.

[0041] Figure 10 This is in the present invention when I A < 0, the calculation of the auxiliary modulation time.

[0042] Figure 11 This is the system block diagram of the ATAC-SVPWM method in the present invention.

[0043] Figure 12 This is the space vector diagram.

[0044] Figure 13 This is the specific experimental diagram using the method of the present invention. Detailed implementation manner

[0045] The present invention is a method for the operation of a resonant DC-link inverter under narrow pulses. The resonant DC-link inverter is not limited to Figure 1 the inverter shown. All existing parallel quasi-resonant DC-link inverters are applicable to this method. The operation principle of the inverter under narrow pulses is as Figure 4 shown (According to Figure 2 and Figure 3 it can be known that the operation modes of the auxiliary circuit under the three-phase bridge arms are the same. Therefore, for better illustration, here the A-phase is taken as an example). Figure 4Four effects of zero-voltage notches on the output voltage are given according to the operating mode of the switching device and the direction of the phase current. As Figure 4 (a) shows, when the output phase current is greater than zero and the operating mode of the switching device is O→P→O, ideally the auxiliary circuit needs to operate twice to create two zero-voltage notches for the turn-on and turn-off of the main switching device. However, when the drive signal is less than 4 μs (the 4 μs here and the 6 μs below are determined by the circuit topology of the resonant DC-link inverter selected. The 4 μs represents the time of the zero-voltage notch, and the 6 μs is the time of the zero-voltage notch plus the resonant time under the action of the auxiliary circuit. Combining the current literature, the zero-voltage notch time and the action time of the auxiliary circuit in the existing literature are not much different), at this time the auxiliary circuit only operates once, and at this time the ideal output phase voltage U AN is missing due to the existence of the zero-voltage notch. As Figure 4 (b) shows, when the output phase current is less than zero and the operating mode of the switching device is O→P→O, the output voltage will also be missing due to the existence of the zero-voltage notch. As Figure 4 (c) shows, when the output phase current is greater than zero and the operating mode of the switching device is P→O→P, ideally the auxiliary circuit needs to operate 2 times, but at this time it only operates once. Although it does not cause the output voltage to be missing, it will cause frequent misoperation of the main switch, affecting the system stability. As Figure 4 (d) shows, when the output phase current is less than zero and the operating mode of the switching device is P→O→P, the inverter also has this problem. Therefore, it is concluded that the missing output voltage caused by the zero-voltage notch has nothing to do with the direction of the phase current and is related to the operating mode of the switching device.

[0046] Figure 5 Four cases of soft-switching failure are given according to the operating mode of the switching device and the direction of the phase current. As Figure 5 (a) shows, when the output phase current is greater than zero and the operating mode of the switching device is O→P→O, ideally the auxiliary circuit needs to operate twice to create two zero-voltage notches for the turn-on and turn-off of the main switching device. However, when the drive signal is greater than 4 μs and less than 6 μs, although the auxiliary circuit operates twice, there are two problems at this time: 1) The ideal output phase voltage U AN is missing due to the existence of the zero-voltage notch. 2) When the auxiliary circuit creates the second zero-voltage notch, the voltage U PN has not completely dropped to zero, but the main switching device has already switched, which leads to the soft-switching failure of the main switching device, increasing the loss of the system. At this time, the system includes not only the loss of the auxiliary circuit, but also the switching loss of the main switching device. As Figure 5 (b) shows, when the output phase current is less than zero and the operating mode of the switching device is O→P→O, the above problems will also exist. As Figure 5As shown in (c), when the output phase current is greater than zero and the switching mode of the switch tube is P→O→P, although it does not cause the loss of the output voltage, it causes the failure of the main switch soft-switching and increases the loss of the system. As Figure 5 As shown in (d), when the output phase current is less than zero and the switching mode of the switch tube is P→O→P, the inverter also has this problem. Therefore, it is concluded that the failure of the soft-switching caused by the zero-voltage notch is independent of the direction of the phase current and the switching mode, and is related to the duration of the driving signal of the switch tube.

[0047] Figure 6 An improved method is given when the phase current is greater than zero and the switching mode is O→P→O. Selecting the current direction can reduce the number of operations of the auxiliary circuit, thereby avoiding the problem of soft-switching failure. As Figure 6 As shown, the black line represents the driving signal and output voltage of the inverter under ideal conditions, and the gray represents the improved method. There is a problem of voltage loss in the inverter under narrow pulses. To solve this problem, the driving signal S1 needs to be turned on in advance (in the present invention, t ac =4 us is given above. This value is selected because the duration of the zero-voltage notch is 4 us, which can ensure the operation time of the auxiliary circuit once and there will be no soft-switching failure or output voltage loss. The auxiliary circuit of this method only operates once, so 4 us is selected, or it can be greater than 4 us, but it will cause problems such as over-compensation of the output voltage). At this time, there is no need to consider the problem of increased output voltage because the existence of the zero-voltage notch makes the output voltage the same as the ideal voltage, avoiding the over-compensation problem. When S1 is turned off and S2 is turned on, the auxiliary circuit does not operate because when the current is greater than zero and the switching mode is P→O, the current flows through the anti-parallel diode of the switch tube S2 and does not pass through the switch tube S2. Therefore, the auxiliary circuit can not operate at this time and there is no need to create the condition of zero-voltage turn-on, and the parallel buffer capacitor of the main switch tube S1 can make it achieve quasi-zero-voltage turn-off. Therefore, this method not only compensates the output voltage, but also reduces the number of operations of the auxiliary circuit, reduces the loss of the auxiliary circuit, and improves the efficiency of the system.

[0048] Figure 7 An improved method is given when the phase current is less than zero and the switching mode is O→P→O. To reduce the number of operations of the auxiliary circuit and avoid the loss of the output voltage at the same time, when the phase current is less than zero, considering the addition of the dead time, the driving signal of the main switch tube S1 needs to be turned off later (see the above formula t ab =t ad -t dead -t n , t ab is the time of turning off later, where t abSimilarly, it is also 4 μs, for the same reason as the above-mentioned 4 μs), to ensure that the auxiliary circuit does not affect the output voltage when creating the zero-voltage notch.

[0049] Figure 8 An improved method for the drive signal in the P→O→P mode is given. In this mode, regardless of whether the phase current is greater than zero or less than zero, the output voltage of the inverter is E→0→E, and the inverter also outputs zero voltage when the auxiliary circuit creates the zero-voltage notch. In this mode, under ideal conditions, the auxiliary circuit needs to act twice to create the soft-switching condition for the main switch tube. At this time, the auxiliary circuit can act once, providing zero-voltage switching for the main switch tube while outputting zero voltage for the inverter. Frequent turn-on and turn-off under narrow pulses will damage the switch tube. The switching state of the main switch tube S1 can be maintained, and only the auxiliary circuit acts. According to Figure 8 It can be seen that when the switching mode is P→O→P, since the output voltage in the O state of the inverter is zero voltage, and the auxiliary circuit needs to act twice under the ideal SVPWM method to create the soft-switching conditions for the turn-off and turn-on of the main switch tube S2. In fact, the output voltage under the zero-voltage notch of the resonant DC-link inverter is also zero voltage. Therefore, the zero-voltage notch can be combined with the zero-voltage vector output by the inverter. In this method, the auxiliary circuit only acts once. For the auxiliary circuit, it not only reduces the number of actions of the auxiliary circuit and the losses caused by the actions of the auxiliary circuit, but also the output voltage will not be lost. For the main switch tube, at this time the main switch tube does not act (see the drive signal in the light color part). Frequent actions of the main switch tube under narrow pulses will cause damage to the switch tube itself.

[0050] Under narrow pulse conditions, according to the direction of the output current and the switching mode, judge the state of the resonant DC-link inverter from Figure 6 、 Figure 7 、and Figure 8 , and then the FPGA generates the auxiliary modulation wave and the auxiliary modulation time. When the phase current is greater than zero and the switching mode is O→P→O, the relationship between the variables can be seen in Figure 9 , Figure 9 gives the calculation method of the auxiliary modulation time. Among them, T A is the phase modulation time, T A - is the auxiliary modulation time, U A- is the auxiliary triangular carrier wave, t n is the conduction time of the switch tube under narrow pulses. The calculation method of the auxiliary modulation time (T A - ) is as follows:

[0051] T A - =T A -t h

[0052] t h = t ac tanθ

[0053] t n < t ac < t notch

[0054] When the phase current is less than zero and the switching mode is O → P → O, the relationships of the variables are shown in Figure 10 . Figure 10 The calculation method of the auxiliary modulation time is given. Among them, T A is the phase modulation time, T A + is the auxiliary modulation time, U A + is the auxiliary triangular carrier wave, t n is the conduction time of the switching tube under narrow pulses. The calculation method of the auxiliary modulation time (T A + ) is as follows:

[0055] T A + = T A - t h

[0056] t h = t ad tanθ

[0057] t n < t ad < t notch

[0058] t dc = t dead

[0059] t L = T S / 2 - t dead - t n / 2

[0060] When the switching mode is P → O → P, combined with Figure 8 it can be known that the output voltage of the inverter is E → 0 → E. When the zero - voltage groove created by the auxiliary circuit is present, the inverter also outputs zero voltage. Therefore, at this time, the main switching tube can remain inactive, and only the auxiliary switching tube operates. By controlling the time of the zero - voltage groove, zero - voltage vectors are output. Compared with the traditional resonant DC - link inverter, this improvement method can reduce the number of operations of the auxiliary circuit and avoid the frequent switching of the main switching tube under narrow pulses.

[0061] The present invention improves on the SVPWM method and proposes an improved SVPWM method to solve the operation method of the resonant DC link inverter under narrow pulses. Compared with the traditional SVPWM method, the improved SVPWM method does not change its sector division, nor does it change the action time and calculation method of the vectors. Like the ideal SVPWM method, each reference vector V ref is synthesized by three adjacent vectors (see subsequent description for details). The present invention does not change the calculation of the SVPWM method and the vector action time. Then, according to the current direction and the vector action sequence, the voltage loss part is reasonably judged ( Figure 4 (a) and Figure 4 (b) are the voltage loss parts), and the output voltage under different operating modes is analyzed. Combining the voltage output under the ideal SVPWM method, the output voltage is compensated. During the compensation process, according to the characteristics of narrow pulses, the action times of the auxiliary resonant circuit are reasonably reduced, thereby reducing the losses of the inverter and improving the efficiency of the system.

[0062] SVPWM Principle

[0063] Table 1 Switching state of phase A

[0064]

[0065] The present invention does not change the traditional SVPWM method. Therefore, only a brief description of the SVPWM method is given here. Taking phase A as an example, P is used to represent the switching state where S1 of phase A is on and S2 is off; O is used to represent the switching state where S1 of phase A is off and S2 is on; U AN is the phase voltage output by the inverter. Its switching state is shown in Table 1.

[0066] The space vector is as Figure 12 shown, where V ref is the reference vector. In the following text, for simplicity of description, it is assumed that V ref rotates to the position in Figure 12 to illustrate the two-level SVPWM modulation principle. V ref is in sector 1 in Figure 12 . The static vectors synthesizing V ref are V1, V2, and V0, and the calculation formula for the action time is

[0067]

[0068] In the formula, T0, T1, and T2 are the action times of the static vectors V0, V1, and V2 respectively, and T Sis the period of the triangular carrier wave. What is calculated by Equation (2) is the action time of each vector. To generate the drive signal, it is necessary to convert it into the modulation time for comparison with the triangular carrier wave.

[0069] Figure 13 Examples under this method are given, where Figure 13 (a) shows the drive signals output by the ideal SVPWM method and this method (ATAC-SVPWM) in the O→P→O switching mode when I A < 0. Figure 13 (b) shows the drive signals output by the ideal SVPWM method and this method (ATAC-SVPWM) in the O→P→O switching mode when I A ≥0. Figure 13 (c) shows the drive signals output by the ideal SVPWM method and this method (ATAC-SVPWM) in the P→O→P switching mode. As can be seen from Figure 13 (a), when the duration of the switch tube drive signal is 2.6 us, according to the above method, the dead time t dead is 2 us, and the delay conduction time of the drive signal under this method is 4 us. As can be seen from Figure 13 (b), when the duration of the switch tube drive signal is 2.6 us, according to the above method, the dead time t dead is 2 us, and the advance conduction time of the drive signal under this method is 4 us. As can be seen from Figure 13 (c), when the duration of the switch tube drive signal is 2.6 us, according to the above method, the drive signal under this method does not act, and only the auxiliary circuit acts.

[0070] It can be understood that the above specific description of the present invention is only for explaining the present invention and is not limited to the technical solutions described in the embodiments of the present invention. Those of ordinary skill in the art should understand that the present invention can still be modified or equivalently replaced to achieve the same technical effects; as long as the use requirements are met, they are all within the protection scope of the present invention.

Claims

1. Method of operation of a resonant DC link inverter under narrow pulses, characterized in that It includes the following parts: 1) When the phase current is less than zero and the switching mode is O→P→O, delay the turn-off of the main switch tube S1 of the drive signal; when S1 is turned on and the main switch tube S2 is turned off, the auxiliary circuit does not operate; 2) When the phase current is greater than zero and the switching mode is O→P→O, turn on the drive signal of the main switch tube S1 in advance; when the auxiliary circuit creates a zero-voltage groove, it does not affect the output voltage; 3) The drive signal in the P→O→P mode; the auxiliary circuit operates twice to create the soft-switching conditions for the turn-off and turn-on of the main switch tube S1 respectively. At this time, the auxiliary circuit operates once to provide zero-voltage switching for the main switch tube S1 and output zero voltage for the inverter; keep the switching state of the main switch tube S1, and only the auxiliary circuit operates; 4) When the switching mode is O→P→O, the output voltage of the inverter is 0→E→0. When the auxiliary circuit creates a zero-voltage groove, the inverter outputs zero voltage.

2. The operating method of the resonant DC link inverter according to claim 1 under narrow pulses, characterized in that When the phase current is greater than zero and the switching mode is O→P→O; where T A is the phase modulation time, T A - is the auxiliary modulation time, U A - is the auxiliary triangular carrier wave, t n is the conduction time of the switching device under narrow pulses. The calculation method of the auxiliary modulation time (T A - ) is as follows: T A - = T A -t h t h = t ac tan θ t n <t ac <t n o tch θ is the tilt angle of the auxiliary triangular carrier U A- , t h is the translation amount of the phase modulation time and the auxiliary modulation time, t notch is the zero-voltage notch time, t ac represents the early conduction time of the drive signal of the main switch tube S1.

3. The operation method of the resonant DC link inverter according to claim 1 under narrow pulses, characterized in that When the phase current is less than zero and the switching mode is O→P→O, where T A is the phase modulation time, T A + is the auxiliary modulation time, U A+ is the auxiliary triangular carrier wave, t n is the conduction time of the switching device under narrow pulses. The calculation method of the auxiliary modulation time (T A + ) is as follows: T A + = T A -t h t h = t ad tan θ t n <t ad <t n o tch t dc = t dead t L = T S / 2 - t dead -t n / 2 t ab = t ad -t dead -t n θ is the tilt angle of the auxiliary triangular carrier wave U A- , t h is the translation amount of the phase modulation time and the auxiliary modulation time, t notch is the zero-voltage groove time, t dead is the dead time, t ad is t notch and t n any value between, T S is the period of the triangular carrier wave, t L is the duration of the part where the auxiliary triangular carrier wave U A+ is 0.

4. The operation method of the resonant DC link inverter according to claim 2 under narrow pulses, characterized in that The said t ac = 4 μs.

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