A high-efficiency 10-nanosecond high-voltage pulse generator based on all-solid-state switches

Abstract

The present invention discloses a high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, comprising a power supply V DC The present invention comprises a circuit comprising a power supply (VDC), a resistor (R), an n-stage pulse generating module, and a load (Load); the voltage of the power supply (VDC) flows through the resistor (R) to power the n-stage pulse generating circuit module; the n-stage pulse generating module transmits high-voltage pulses to the load; the n-stage pulse generating module comprises n cascaded pulse generating circuits; each pulse generating circuit comprises a main circuit and a chopper circuit; the main circuit is configured to generate high-voltage pulses; and the chopper circuit is configured to adjust the pulse width of the high-voltage pulses generated by the main circuit. The present invention utilizes an all-solid-state switch to generate high-power-efficiency, continuously adjustable-pulse-width, high-voltage, ultrashort pulses.

Description

Technical Field

[0001] The present invention relates to the field of pulsed electric fields, in particular to a high-energy-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch. Background Art

[0002] Electroporation is a cell biology phenomenon widely used in tumor ablation, gene delivery, sterilization, and other fields. It primarily achieves its effects by applying high-voltage pulses to cells or bacteria, causing irreversible electroporation and inducing apoptosis. Pulse width is a key regulator of electroporation, determining the cellular target at which the electrical energy is applied.

[0003] Currently, there are abundant research results on electroporation with pulse widths of milliseconds, microseconds, and hundreds of nanoseconds. However, there is little research on the electroporation phenomenon caused by high-voltage ultrashort pulses below 50ns and amplitudes above 5kV, which is limited by the output performance of existing high-voltage ultrashort pulse generators.

[0004] In summary, traditional Marx high-voltage pulse generators have the following problems: 1) It is difficult for traditional Marx high-voltage pulse generators to simultaneously achieve ultrashort pulse width and continuously adjustable pulse width. 2) While existing high-voltage pulse generators strive to achieve narrow pulse width, their energy utilization is generally low. Summary of the Invention

[0005] The purpose of the present invention is to provide a high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, comprising a power supply V DC , resistor R, n-level pulse generating module and load Load;

[0006] The voltage of the power supply VDC flows through the resistor R to supply power to the n-level pulse generating circuit module;

[0007] The n-level pulse generating module transmits high voltage pulses to the load;

[0008] The n-stage pulse generation module includes n cascaded pulse generation circuits; each pulse generation circuit includes a main circuit and a chopping circuit;

[0009] The main circuit is used to generate high voltage pulses;

[0010] The chopper circuit is used to adjust the pulse width of the high-voltage pulse generated by the main circuit.

[0011] Furthermore, the n-level pulse generation module transmits 10 nanosecond high-voltage pulses to the load.

[0012] Furthermore, the topology of a high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch is shown below:

[0013] Note that the power supply V DCThe positive end is A, and the negative end is B.

[0014] Terminal B is grounded;

[0015] Connect resistor R in series to the anode of diode D11main at terminal A.

[0016] The cathode of diode D11main is connected in series with capacitor C1main, which is then connected to the anode of diode D12main. The cathode of diode D12main is also connected in series with the drain of switch S1chop.

[0017] The cathode of the diode D11main is connected in series with the drain of the switch tube S1main; the gate of the switch tube S1main is left floating; the source of the switch tube S1main is connected in series with the cathode of the diode D12main; the source of the switch tube S1main is connected in series with the drain of the switch tube S1chop;

[0018] The cathode of diode D11main is connected in series with the anode of diode D11chop;

[0019] The cathode of diode D11chop is connected in series with the cathode of diode D12chop; the anode of diode D12chop is connected in series with the drain of switch tube S1chop;

[0020] The cathode of diode D11chop is connected in series with capacitor C1chop and then connected to the source of switch tube S1chop; the gate of switch tube S1chop is left floating;

[0021] The anode of the diode Dj1main is connected in series with the cathode of the diode D(j-1)1chop; integer j = 2, 3, ..., n;

[0022] The cathode of diode Dj1main is connected in series with capacitor Cjmain and then connected to the anode of diode Dj2main; the anode of diode Dj2main is connected in series with the drain of switch tube Sjchop;

[0023] The cathode of the diode Dj2main is connected in series with the drain of the switching tube Sjchop;

[0024] The cathode of the diode Dj1main is connected in series with the drain of the switch tube Sjmain; the gate of the switch tube Sjmain is left floating; the source of the switch tube Sjmain is connected in series with the cathode of the diode Dj2main; the source of the switch tube Sjmain is connected in series with the drain of the switch tube Sjchop;

[0025] The cathode of diode Dj1main is connected in series with the anode of diode Dj1chop;

[0026] The cathode of diode Dj1chop is connected in series with the cathode of diode Dj2chop; the anode of diode Dj2chop is connected in series with the drain of switch tube Sjchop;

[0027] The cathode of the diode Dj1chop is connected in series with the capacitor Cjchop and then connected to the source of the switch tube Sjchop; the gate of the switch tube Sjchop is left floating;

[0028] The source of the switch Snchop is connected in series with the load Load and then connected to the B terminal;

[0029] The source of the switch tube Snchop is connected in series with the load Load and then grounded.

[0030] Furthermore, the main circuit of the i-th pulse generating circuit includes a diode Di1main, a diode Di2main, a capacitor Cimain, and a switch tube Simain; the integer i=1, 2, ..., n.

[0031] Furthermore, the chopper circuit of the i-th pulse generating circuit includes a diode Di1chop, a diode Di2chop, a capacitor Cichop, and a switch tube Sichop; the integer i=1, 2, ..., n.

[0032] Furthermore, the minimum pulse width PW of the 10 nanosecond high voltage pulse is min As shown below:

[0033]

[0034] Where, t rise , t fall is the rise time and fall time.

[0035] Furthermore, the rise time t rise , fall time t fall They are as follows:

[0036] t rise =0.8(t on +ΔS)(2)

[0037]

[0038] Where, t on is the switch on time; ΔS is the maximum trigger delay between switches; R load is the resistance value of the load; V DC is the power supply voltage; C ds is the parasitic capacitance between the drain and source of the MOSFET switch; N is the number of stages of the nanosecond high-voltage pulse generator.

[0039] Furthermore, the amplitude, pulse width, number and waveform of the high-voltage pulses are adjustable.

[0040] The technical effect of the present invention is unquestionable. The present invention uses an all-solid-state switch to generate high-power-efficiency, continuously adjustable pulse width, high-voltage ultrashort pulses.

[0041] The present invention connects bipolar capacitors in series with the load to cut off the discharge loop of a single capacitor, thereby generating narrow pulses with adjustable width. At the same time, a capacitor chopping topology that can be modularly stacked is proposed to obtain a higher amplitude.

[0042] Aiming at the research and application needs of high-voltage ultrashort pulses in the field of electroporation, the present invention combines capacitor chopping technology with traditional Marx pulse technology, designs and proposes the topology of an all-solid-state capacitor chopping Marx circuit, establishes a mathematical model for capacitor chopping Marx pulse width calculation, and for the first time uses an all-solid-state switch to achieve the generation of high-voltage ultrashort pulses with continuously adjustable pulse width, high amplitude, high energy utilization, and a minimum pulse width of single-digit nanoseconds. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a single module structure; Figure 1 (a) Main circuit, Figure 1 (b) is a chopper circuit;

[0044] Figure 2 For the overall circuit structure;

[0045] Figure 3 This is the circuit state diagram of a modular all-solid-state pulse generator based on a capacitor chopper circuit; Figure 3 (a)-(c) are the charging state, discharging state / pulse on state, and chopping state / pulse off state, respectively.

[0046] Figure 4 Schematic diagram of the shortest pulse width of four all-solid-state pulse power supply topology circuits;

[0047] Figure 5 Simulation diagrams of three all-solid-state pulse generation chopper topologies for generating ultrashort pulses;

[0048] Figure 5 (a)-(c) are tail-cut topology, differential topology, and the topology of the present invention, respectively;

[0049] Figure 6 (a) Power efficiency and voltage gain of the differential topology circuit; Figure 6 (b) is the power distribution of the differential topology circuit;

[0050] Figure 7 (a) Efficiency of circuits with different topologies; Figure 7(b) Power loss of circuits with different topologies;

[0051] Figure 8 (a) is an 8-stage all-solid-state generator; Figure 8 (b) is a single-stage PCB circuit;

[0052] Figure 9 (a)-(f) are the waveform measurement results of the capacitor chopper ultra-short pulse width all-solid-state pulse generator; Figure 9 (a) is the gate voltage waveform at 50ns pulse width; Figure 9 (b) is the test result of the amplitude adjustability of the prototype; Figure 9 (c) is the test result of the pulse width adjustability of the prototype; Figure 9 (d) is the typical minimum pulse width under 250 ohm load; Figure 9 (e) is the minimum pulse width under different loads; Figure 9 (f) is the output voltage of each pulse generating circuit under a DC voltage of 800 V and a pulse width of 20 ns;

[0053] Figure 10 is the power efficiency of the capacitor chopper circuit under different loads (unit: %);

[0054] Figure 11 (a)-(c) are comparisons of rise / fall time and pulse width based on theory, simulation, and measurement. DETAILED DESCRIPTION

[0055] The present invention will be further described below with reference to the following examples, but it should not be understood that the scope of the present invention is limited to the following examples. Without departing from the above technical ideas of the present invention, various substitutions and modifications can be made according to common technical knowledge and customary means in the art, and all should be included in the scope of protection of the present invention.

[0056] Example 1:

[0057] See also Figures 1 to 11 , a high-efficiency 10 nanosecond high-voltage pulse generator device based on all-solid-state switches, including a power supply V DC , resistor R, n-level pulse generating module and load Load;

[0058] The voltage of the power supply VDC flows through the resistor R to supply power to the n-level pulse generating circuit module;

[0059] The n-level pulse generating module transmits high voltage pulses to the load;

[0060] The n-stage pulse generation module includes n cascaded pulse generation circuits; each pulse generation circuit includes a main circuit and a chopping circuit;

[0061] The main circuit is used to generate high voltage pulses;

[0062] The chopper circuit is used to adjust the pulse width of the high-voltage pulse generated by the main circuit.

[0063] The n-level pulse generation module transmits 10 nanosecond high-voltage pulses to the load.

[0064] The topology of the energy-efficient 10 nanosecond high-voltage pulse generator based on all-solid-state switches is shown below:

[0065] Note that the power supply V DC The positive end is A, and the negative end is B.

[0066] Terminal B is grounded;

[0067] Connect resistor R in series to the anode of diode D11main at terminal A.

[0068] The cathode of diode D11main is connected in series with capacitor C1main, which is then connected to the anode of diode D12main. The cathode of diode D12main is also connected in series with the drain of switch S1chop.

[0069] The cathode of the diode D11main is connected in series with the drain of the switch tube S1main; the gate of the switch tube S1main is left floating; the source of the switch tube S1main is connected in series with the cathode of the diode D12main; the source of the switch tube S1main is connected in series with the drain of the switch tube S1chop;

[0070] The cathode of diode D11main is connected in series with the anode of diode D11chop;

[0071] The cathode of diode D11chop is connected in series with the cathode of diode D12chop; the anode of diode D12chop is connected in series with the drain of switch tube S1chop;

[0072] The cathode of diode D11chop is connected in series with capacitor C1chop and then connected to the source of switch tube S1chop; the gate of switch tube S1chop is left floating;

[0073] The anode of the diode Dj1main is connected in series with the cathode of the diode D(j-1)1chop; integer j = 2, 3, ..., n;

[0074] The cathode of diode Dj1main is connected in series with capacitor Cjmain and then connected to the anode of diode Dj2main; the anode of diode Dj2main is connected in series with the drain of switch tube Sjchop;

[0075] The cathode of the diode Dj2main is connected in series with the drain of the switching tube Sjchop;

[0076] The cathode of the diode Dj1main is connected in series with the drain of the switch tube Sjmain; the gate of the switch tube Sjmain is left floating; the source of the switch tube Sjmain is connected in series with the cathode of the diode Dj2main; the source of the switch tube Sjmain is connected in series with the drain of the switch tube Sjchop;

[0077] The cathode of diode Dj1main is connected in series with the anode of diode Dj1chop;

[0078] The cathode of diode Dj1chop is connected in series with the cathode of diode Dj2chop; the anode of diode Dj2chop is connected in series with the drain of switch tube Sjchop;

[0079] The cathode of the diode Dj1chop is connected in series with the capacitor Cjchop and then connected to the source of the switch tube Sjchop; the gate of the switch tube Sjchop is left floating;

[0080] The source of the switch Snchop is connected in series with the load Load and then connected to the B terminal;

[0081] The source of the switch tube Snchop is connected in series with the load Load and then grounded.

[0082] The main circuit of the i-th pulse generating circuit includes a diode Di1main, a diode Di2main, a capacitor Cimain, and a switch tube Simain; integer i=1, 2, ..., n.

[0083] The chopper circuit of the i-th pulse generating circuit includes a diode Di1chop, a diode Di2chop, a capacitor Cichop, and a switch Sichop; the integer i=1, 2, ..., n.

[0084] The minimum pulse width PW of the 10 nanosecond high voltage pulse min As shown below:

[0085]

[0086] Where, t rise , t fall is the rise time and fall time.

[0087] Rise time t rise , fall time t fall They are as follows:

[0088] t rise =0.8(t on +ΔS)(2)

[0089]

[0090] Where, t onis the switch on time; ΔS is the maximum trigger delay between switches; R load is the resistance value of the load; V DC is the power supply voltage; C ds is the parasitic capacitance between the drain and source of the MOSFET switch; N is the number of stages of the nanosecond high-voltage pulse generator.

[0091] The amplitude, pulse width, number and waveform of the high-voltage pulses are adjustable.

[0092] Example 2:

[0093] To overcome the limitations of existing pulse generators on high-voltage ultrashort pulse electroporation, this embodiment proposes a high-efficiency 10-nanosecond high-voltage pulse generator device based on an all-solid-state switch. This device not only produces a narrower pulse width than the tail-cut circuit, but also avoids the low power efficiency of traditional differential circuits.

[0094] 1) Narrow pulse width - with ordinary Marx structure

[0095] Like the tail-cutting and differential circuits, the circuit proposed in this embodiment also evolves from a Marx structure. As can be seen from the stage marked by the blue dashed line, it consists of a main circuit and a chopper circuit. Each subcircuit has a switch (Smain, Schop), two diodes (D1main and D2main, D1chop and D2chop), and a capacitor (Cmain, Cchop). Each circuit stage has only two switches.

[0096] pass Figure 1 As can be seen from the working principle, this circuit has the same rising / falling edges as the traditional Marx circuit. The only difference is that the chopper circuit can eliminate the platform time. Therefore, its minimum pulse width is as follows:

[0097]

[0098] The pulse load current in electroporation is less than 50A, so the following empirical model is based on this load current range and assumes that there is no inductance in the circuit. For a multi-stage Marx-solid-state pulse power supply, if the asynchrony of multiple switches is not considered, the time it takes for the load voltage to rise from 0 to the platform is almost equal to the turn-on time at the 1ns observation scale. Assuming t on is a known and measurable quantity determined by the gate drive circuit and represents the on-time. ΔS is the maximum trigger delay between switches and cannot be ignored. Therefore, the actual pulse t rise It can be expressed as:

[0099] t rise =0.8(t on +ΔS) (2)

[0100] In addition, due to the phenomenon of t fall It is not affected by the switch driving behavior, but is determined by the load under electroporation conditions. The circuit is equivalent to a series connection of capacitor, load and switch. Therefore, the falling edge of the classic Marx circuit can be approximately regarded as a nonlinear C ds The charging process of the load, not the shut-off speed. When the load is purely resistive, t fall The size of can be expressed as:

[0101]

[0102] Table 1 Comparison of the shortest pulse time of all-solid-state pulse power supply circuits

[0103]

[0104] The relative geometries of the minimum pulse widths generated by the four circuit topologies are shown in Figure 2. Figure 2 shown.

[0105] 2) High power efficiency - compared with ordinary Marx structure

[0106] The power efficiency of the above four circuits under the same working conditions is simulated and compared. The chopper circuit structure proposed in this embodiment is as follows: Figure 5 As shown:

[0107] To compare power efficiency differences caused by topology type, this example selected the control variables shown in Table 4. Each topology consists of eight stacked stages, with an input DC voltage of 800 V. To better approximate actual conditions, parasitic parameters were incorporated into the simulation circuits.

[0108] Table 2 Circuit simulation parameters

[0109]

[0110] For the differential topology that is most affected by load, the effects of different loads on power efficiency and voltage gain are simulated when outputting a 10ns pulse width. Figure 6 (a) shows the simulation results. The power efficiency of this topology is less than 5% when generating high-voltage ultrashort pulses. The smaller the load, the higher the efficiency, but the lower the voltage gain. The power is almost absorbed by the dual 60Ω internal resistors, as shown in Figure 2. Figure 6 (b) shown.

[0111] Finally, the power loss and efficiency of the capacitor chopper circuit under different pulse widths are simulated and compared with two traditional chopper topologies. Figure 7The comparison results in Figure 2 show that the capacitor chopping circuit of this embodiment is not inferior to the traditional method in adjusting the pulse width to less than 50ns, while also overcoming the high power loss of the existing differential topology. The results show that under the same operating conditions, the capacitor chopping circuit of this embodiment has a significant advantage in power efficiency over the existing modular high-voltage ultra-short pulse width pulse.

[0112] This example first conducted a theoretical analysis of the minimum pulse width and simulated power efficiency under different operating conditions. An eight-stage, all-solid-state prototype based on the proposed capacitive chopping topology was developed. The adjustability of pulse parameters and the grading performance were tested, ultimately demonstrating that the pulse width can be compressed to below 10ns at 6kV. These output parameters fully meet the requirements for high-voltage, ultrashort pulse electroporation applications in the biomedical field.

[0113] Example 3:

[0114] The experimental comparison of a high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch is as follows:

[0115] An 8-level (1 Hz) modular capacitive chopping ultrashort pulse width high-voltage pulse Marx experimental platform was established. A PP026 (LeCroy, 400 V, 500 MHz) low-voltage probe and a PPE6kV (LeCroy, 6 kV, 400 MHz) high-voltage probe were used. The trigger signal generator was an arbitrary / function generator (Tektronix, AFG31000). The oscilloscope was a WavePro 760Zi-A (LeCroy, 6 GHz).

[0116] Figure 8 To design the circuit, Figure 8 a is the proposed 8-level capacitor chopper ultra-short pulse width high-voltage pulse power supply, Figure 8 b shows the single-stage module of the proposed circuit. According to electromagnetic simulation, the parasitic inductance of the four-layer PCB is less than 5nH.

[0117] When the output pulse width is 50ns, the gate waveform generated by two commonly used commercial driver chips (IXYS, IXDN609) is as follows: Figure 9 As shown in (a), the trigger delay of the switch is about 0.5ns. Figure 9 (b) Figure 9 (c) shows the test results of the amplitude and pulse width adjustability of the prototype. The typical minimum pulse width of the 8-level circuit is as follows Figure 9 (d) shows that at an amplitude of 6.55kV, the minimum width is 6.9ns. Non-inductive thin film resistors are specially selected and the loop wire is shortened to suppress measurement deviation, thereby obtaining Figure 9 (e) Minimum pulse width under different loads. It can be seen that the rising edge has almost no change, while the falling edge slows down as the load increases.

[0118] To verify the reliability of modularization, the superimposed output of each stage is analyzed under fixed DC voltage and pulse width. Figure 9 (f) shows that the output of each stage is well stacked and the gain does not drop significantly, which provides support for further expansion of the module to output higher amplitude when higher amplitude is needed.

[0119] In addition, the power efficiency of the prototype was measured under different loads, and the maximum power efficiency reached 95%, such as Figure 10 shown.

[0120] Finally, the theoretical, simulated, and measured rise / fall time and pulse width values ​​are compared with each other, e.g. Figure 11 The above test results of the prototype show that the capacitive chopping topology proposed in this embodiment can be modularly stacked to generate high-voltage ultrashort pulses above 5 kV, and the pulse parameters can be continuously adjusted with high power efficiency to achieve electroporation.

[0121] The test results of the 8-level prototype show that the nanosecond pulse parameters that can be output by the present invention are: at 6.5kV, the shortest pulse width can reach 5ns; and under different load test conditions, the highest energy utilization rate can reach more than 95%.

[0122] Example 4:

[0123] A high-efficiency 10 nanosecond high-voltage pulse generator device based on all-solid-state switches, including a power supply V DC , resistor R, n-level pulse generating module and load Load;

[0124] The voltage of the power supply VDC flows through the resistor R to supply power to the n-level pulse generating circuit module;

[0125] The n-level pulse generating module transmits high voltage pulses to the load;

[0126] The n-stage pulse generation module includes n cascaded pulse generation circuits; each pulse generation circuit includes a main circuit and a chopping circuit;

[0127] The main circuit is used to generate high voltage pulses;

[0128] The chopper circuit is used to adjust the pulse width of the high-voltage pulse generated by the main circuit.

[0129] Example 5:

[0130] A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, the main contents of which are shown in Example 4, wherein the n-level pulse generation module transmits 10 nanosecond high-voltage pulses to the load.

[0131] Example 6:

[0132] The main content of the high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch is shown in Example 4. The topology of the high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch is as follows:

[0133] Note that the power supply V DC The positive end is A, and the negative end is B.

[0134] Terminal B is grounded;

[0135] Connect resistor R in series to the anode of diode D11main at terminal A.

[0136] The cathode of diode D11main is connected in series with capacitor C1main, which is then connected to the anode of diode D12main. The cathode of diode D12main is also connected in series with the drain of switch S1chop.

[0137] The cathode of the diode D11main is connected in series with the drain of the switch tube S1main; the gate of the switch tube S1main is left floating; the source of the switch tube S1main is connected in series with the cathode of the diode D12main; the source of the switch tube S1main is connected in series with the drain of the switch tube S1chop;

[0138] The cathode of diode D11main is connected in series with the anode of diode D11chop;

[0139] The cathode of diode D11chop is connected in series with the cathode of diode D12chop; the anode of diode D12chop is connected in series with the drain of switch tube S1chop;

[0140] The cathode of diode D11chop is connected in series with capacitor C1chop and then connected to the source of switch tube S1chop; the gate of switch tube S1chop is left floating;

[0141] The anode of the diode Dj1main is connected in series with the cathode of the diode D(j-1)1chop; integer j = 2, 3, ..., n;

[0142] The cathode of diode Dj1main is connected in series with capacitor Cjmain and then connected to the anode of diode Dj2main; the anode of diode Dj2main is connected in series with the drain of switch tube Sjchop;

[0143] The cathode of the diode Dj2main is connected in series with the drain of the switching tube Sjchop;

[0144] The cathode of the diode Dj1main is connected in series with the drain of the switch tube Sjmain; the gate of the switch tube Sjmain is left floating; the source of the switch tube Sjmain is connected in series with the cathode of the diode Dj2main; the source of the switch tube Sjmain is connected in series with the drain of the switch tube Sjchop;

[0145] The cathode of diode Dj1main is connected in series with the anode of diode Dj1chop;

[0146] The cathode of diode Dj1chop is connected in series with the cathode of diode Dj2chop; the anode of diode Dj2chop is connected in series with the drain of switch tube Sjchop;

[0147] The cathode of the diode Dj1chop is connected in series with the capacitor Cjchop and then connected to the source of the switch tube Sjchop; the gate of the switch tube Sjchop is left floating;

[0148] The source of the switch Snchop is connected in series with the load Load and then connected to the B terminal;

[0149] The source of the switch tube Snchop is connected in series with the load Load and then grounded.

[0150] Example 7:

[0151] A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, the main contents of which are shown in Example 4, wherein the main circuit of the i-th pulse generating circuit includes a diode Di1main, a diode Di2main, a capacitor Cimain, and a switch tube Simain; the integer i = 1, 2, ..., n.

[0152] Example 8:

[0153] A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, the main contents of which are shown in Example 4, wherein the chopper circuit of the i-th pulse generating circuit includes a diode Di1chop, a diode Di2chop, a capacitor Cichop, and a switch tube Sichop; the integer i = 1, 2, ..., n.

[0154] Example 9:

[0155] A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, the main contents of which are shown in Example 4, wherein the minimum pulse width PW of the 10 nanosecond high-voltage pulse is min As shown below:

[0156]

[0157] Where, t rise , t fall is the rise time and fall time.

[0158] Example 10:

[0159] A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, the main contents of which are shown in Example 4, wherein the rise time t rise , fall time t fall They are as follows:

[0160] t rise =0.8(t on +ΔS)(2)

[0161]

[0162] Where, t on is the switch on time; ΔS is the maximum trigger delay between switches; R load is the resistance value of the load; V DC is the power supply voltage; C ds is the parasitic capacitance between the drain and source of the MOSFET switch; N is the number of stages of the nanosecond high-voltage pulse generator.

[0163] Example 11:

[0164] A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, the main contents of which are shown in Example 4, wherein the amplitude, pulse width, number and waveform of the high-voltage pulse are adjustable.

Claims

1. A high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch, characterized by: Including power supply V DC , resistor R, n-level pulse generating module and load Load; The power supply V DC The voltage flows through the resistor R and supplies power to the n-level pulse generation circuit module; The n-level pulse generating module transmits high voltage pulses to the load; The n-stage pulse generation module includes n cascaded pulse generation circuits; Each pulse generating circuit includes a main circuit and a chopper circuit; The main circuit is used to generate high voltage pulses; The chopper circuit is used to adjust the pulse width of the high-voltage pulse generated by the main circuit; The topology of the energy-efficient 10 nanosecond high-voltage pulse generator based on all-solid-state switches is shown below: Note that the power supply V DC The positive end is A, and the negative end is B. Terminal B is grounded; The circuit topology of the first-stage pulse generation circuit is shown below: Power supply V DC Connect the A terminal of the resistor R and then the anode of the diode D11main; The cathode of diode D11main is connected to capacitor C1main and then to the anode of diode D12main; the cathode of diode D12main is connected to the drain of switch S1chop; The cathode of the diode D11main is connected to the drain of the switch tube S1main; the gate of the switch tube S1main is suspended; the source of the switch tube S1main is connected to the cathode of the diode D12main; the source of the switch tube S1main is connected to the drain of the switch tube S1chop; The cathode of diode D11main is connected to the anode of diode D11chop; The cathode of the diode D11chop is connected to the cathode of the diode D12chop; the anode of the diode D12chop is connected to the drain of the switch tube S1chop; The cathode of the diode D11chop is connected to the capacitor C1chop and then to the source of the switch tube S1chop; the gate of the switch tube S1chop is left floating; The j-1th stage pulse generating circuit is cascaded with the jth stage pulse generating circuit; integer j = 2, 3, ..., n; The circuit topology of the j-th level pulse generating circuit is shown below: The anode of diode Dj1main is connected to the cathode of diode D(j-1)1chop; The anode of the diode Dj1main is connected to the capacitor C(j-1)chop and then to the source of the switch tube S(j-1)chop; The cathode of diode Dj1main is connected to capacitor Cjmain and then to the anode of diode Dj2main; the anode of diode Dj2main is connected to the source of switch tube S(j-1)chop; The cathode of the diode Dj1main is connected to the capacitor Cjmain and then to the source of the switch tube S(j-1)chop; The cathode of the diode Dj2main is connected to the drain of the switching tube Sjchop; The cathode of the diode Dj1main is connected to the drain of the switch tube Sjmain; the gate of the switch tube Sjmain is suspended; the source of the switch tube Sjmain is connected to the cathode of the diode Dj2main; the source of the switch tube Sjmain is connected to the drain of the switch tube Sjchop; The cathode of diode Dj1main is connected to the anode of diode Dj1chop; The cathode of the diode Dj1chop is connected to the cathode of the diode Dj2chop; the anode of the diode Dj2chop is connected to the drain of the switch tube Sjchop; The cathode of the diode Dj1chop is connected to the capacitor Cjchop and then to the source of the switch tube Sjchop; the gate of the switch tube Sjchop is left floating; The circuit topology of the n-th level pulse generating circuit also includes: The source of the switch Snchop is connected to the load and then to the B terminal; The source of the switch tube Snchop is connected to the load Load and then grounded.

2. The high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch according to claim 1 is characterized in that: The n-level pulse generation module transmits 10 nanosecond high-voltage pulses to the load.

3. The high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch according to claim 1 is characterized in that: The main circuit of the i-th pulse generating circuit includes a diode Di1main, a diode Di2main, a capacitor Cimain, and a switch tube Simain; Integer i = 1, 2,…, n.

4. The high-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch according to claim 1 is characterized in that: The chopper circuit of the i-th pulse generating circuit includes a diode Di1chop, a diode Di2chop, a capacitor Cichop, and a switch tube Sichop; integer i=1, 2, ..., n.

5. The high-energy-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch according to claim 1 is characterized in that: The minimum pulse width PW of the 10 nanosecond high voltage pulse min As shown below: Where, t rise , t fall is the rise time and fall time.

6. The high-energy-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch according to claim 5, characterized in that: Rise time t rise , fall time t fall They are as follows: t rise =0.8(t on +ΔS)(2) Where, t on is the switch on time; ΔS is the maximum trigger delay between switches; R load is the resistance value of the load; V DC is the power supply voltage; C ds is the parasitic capacitance between the drain and source of the MOSFET switch; N is the number of stages of the nanosecond high-voltage pulse generator.

7. The high-energy-efficiency 10 nanosecond high-voltage pulse generator device based on an all-solid-state switch according to claim 5, characterized in that: The amplitude, pulse width, number and waveform of the high-voltage pulses are adjustable.

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