Method, system, device and readable storage medium for reading information of optical module

Abstract

The present invention proposes a method, system, device, and readable storage medium for reading information from an optical module. The method comprises: a CPU initializes an FPGA and sets initialization information to configure registers within the FPGA and registers for storing information; the FPGA uses the registers to read information from designated registers within the optical module; the FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message; and the FPGA transmits the payload data in Ethernet message format to the CPU and a network management server based on the initialization information. This method can read internal information from an optical module at the maximum supported rate and transmit it to the network management server, enabling early detection of problems with the optical module and optical link, thereby improving the quality of network operation and maintenance.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and more particularly to an information reading method, system, device and readable storage medium for an optical module. Background Art

[0002] Optical modules, a crucial component of fiber-optic communications, are optoelectronic devices that perform optical-to-electrical and electrical-to-optical conversion during optical signal transmission. Operating at the physical layer of the OSI model, optical modules are core components in fiber-optic communication systems. They primarily consist of optoelectronic components (optical transmitters and receivers), functional circuits, and optical interfaces, primarily responsible for performing optical-to-electrical and electrical-to-optical conversion in fiber-optic communications. Optical modules store a wealth of information related to the optical link, which is accessed by external processors via the I2C interface. The switch CPU frequently reads this information to determine the status of the optical link and periodically transmits it to a remote network management server via SNMP or other network management protocols. The server uses this information to continuously track the status of the optical link and other applications.

[0003] In existing technology, the CPU regularly polls optical module information via the I2C bus or an FPGA, and sends this information to a remote management server. To more accurately and quickly identify optical link problems, network management servers typically want to receive updates to the optical module's internal information as quickly as possible. This requires the CPU to periodically read the optical module information. The current requirement for this periodic reading frequency is 30 seconds, while the management server prefers an update every 1 second or even 50 milliseconds. However, the I2C bus transmits low-speed signals, so the reading process is time-consuming and cannot be interrupted. This causes the CPU to be busy for extended periods, making it impossible for the network management server to quickly obtain optical module information. Summary of the Invention

[0004] In response to the above problems, the purpose of the present invention is to provide an information reading method, system, device and readable storage medium for an optical module, which can read its internal information at the maximum supported rate of the optical module and send it to the network management server, so as to detect problems with the optical module and optical link as early as possible and improve the quality of network operation and maintenance.

[0005] To achieve the above-mentioned object, the present invention is implemented through the following technical solutions: A method for reading information of an optical module, comprising:

[0006] The CPU initializes the FPGA and sets initialization information to configure registers within the FPGA and registers used to store information;

[0007] FPGA uses registers to read information in the specified registers inside the optical module;

[0008] FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message;

[0009] Based on the initialization information, the FPGA sends the payload data in Ethernet message format to the CPU and network management server.

[0010] Furthermore, the setting initialization information includes:

[0011] Set the network address information of CPU and network management service;

[0012] Set the address information of the optical module;

[0013] Set the transmission protocol;

[0014] Set the timer interval;

[0015] Sets the system time and starts the internal timer.

[0016] Furthermore, the FPGA uses a register to read information in a specified register inside the optical module, including:

[0017] The FPGA starts the timer according to the set timing interval and reads the information in the specified register inside the optical module according to the received control command.

[0018] Furthermore, the FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message, including:

[0019] The FPGA stores the read information in internal registers;

[0020] Use the current timer value as the timestamp;

[0021] The read information and timestamp are combined into the payload data of an Ethernet message.

[0022] Furthermore, the FPGA sends the payload data to the CPU and the network management server in an Ethernet message format according to the initialization information, including:

[0023] The FPGA stitches together the payload data, CPU, and network address information of the network management service into an Ethernet message;

[0024] The spliced ​​Ethernet packets are sent to the CPU and the network management server.

[0025] Furthermore, after sending the spliced ​​Ethernet message to the CPU and the network management server, the method further includes:

[0026] After the time value of the waiting timer reaches 0, the initial value of the timer is restored to the set timing interval.

[0027] Furthermore, when the timing interval is set to 0, the FPGA reads the information in the designated register inside the optical module at the maximum speed.

[0028] Correspondingly, the present invention also discloses an information reading system for an optical module, comprising: a CPU, an FPGA, an Ethernet gateway, a switch, and multiple optical modules. The CPU is connected to the FPGA via a PCIE interface and to the optical modules via an I2C bus. The FPGA is connected to the CPU and a network management server network respectively via the switch. The CPU is used to initialize the FPGA and set initialization information to configure registers within the FPGA and registers for storing information. The FPGA is used to use registers to read information in designated registers within the optical module, attach a timestamp to the read information, and form payload data of an Ethernet message. According to the initialization information, the payload data is sent to the CPU and the network management server in an Ethernet message format.

[0029] Furthermore, the FPGA includes: a control module, a status indication module, a network module, a data reading module and a timer module;

[0030] The control module is used to set network address information, control network transmission, set timer and system time information, set optical module command calculator, and configure control interface;

[0031] The status indication module is used to indicate the working status of the internal modules of the FPGA;

[0032] The network module is used to configure Ethernet MAC and PHY, read data packets and send them, and clear the flag corresponding to the linked list after successful sending;

[0033] The data reading module is used to read the information of the optical module according to the information in the optical module command register, store the read information in the corresponding internal storage location, attach the timestamp and network address information to the information, splice it into an Ethernet message, and put it into the message sending list;

[0034] The timer module is used to set a time timer and start the timer according to the set time interval.

[0035] Accordingly, the present invention discloses an information reading device for an optical module, comprising:

[0036] A memory, used for storing an information reading program of the optical module;

[0037] The processor is configured to implement the steps of the optical module information reading method as described above when executing the optical module information reading program.

[0038] Accordingly, the present invention discloses a readable storage medium, on which an information reading program for an optical module is stored. When the information reading program for an optical module is executed by a processor, the steps of the information reading method for an optical module as described in any one of the above items are implemented.

[0039] Compared with the prior art, the present invention has the following beneficial effects:

[0040] 1. The present invention can automatically read the optical module information and send it to the designated server and CPU via Ethernet message.

[0041] 2. The present invention effectively reduces or even eliminates the pressure on the CPU caused by reading optical module information.

[0042] 3. The present invention can read the internal information of the optical module at the maximum supported rate and send it to the network management server, which can detect problems with the optical module and optical link as early as possible and improve the quality of network operation and maintenance.

[0043] 4. The present invention includes a reading timestamp every time information is read, which facilitates problem location.

[0044] It can be seen that compared with the prior art, the present invention has outstanding substantial features and significant progress, and the beneficial effects of its implementation are also obvious. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0046] Figure 1 It is a method flow chart of a specific embodiment of the present invention.

[0047] Figure 2 It is a system structure diagram of a specific implementation method of the present invention.

[0048] Figure 3 It is a system structure diagram of FPGA according to a specific embodiment of the present invention.

[0049] In the figure, 1. Control module; 2. Status indication module; 3. Network module; 4. Data reading module; 5. Timer module. DETAILED DESCRIPTION

[0050] The core of the present invention is to provide a method for reading optical module information. In the prior art, a CPU uses an I2C bus or an FPGA to periodically poll and read optical module information, and then sends this information to a remote management server. This allows for more accurate and rapid identification of optical link problems. Typically, a network management server wishes to read updates to the optical module's internal information as quickly as possible, requiring the CPU to periodically read the optical module information. This timing frequency is currently required to be 30 seconds, while the management server desires an update every 1 second or even 50 milliseconds. However, the I2C bus transmits low-speed signals, making the reading process time-consuming and uninterruptible. This results in the CPU being busy for extended periods, making it impossible for the network management server to quickly obtain optical module information.

[0051] To read information from an optical module, the present invention first initializes the FPGA and sets initialization information to configure registers within the FPGA and the registers used to store information. The FPGA then uses the registers to read information from designated registers within the optical module. The FPGA then adds a timestamp to the read information to form the payload data of an Ethernet message. Finally, based on the initialization information, the FPGA transmits the payload data in Ethernet message format to the CPU and network management server. This demonstrates that the present invention can read internal information from an optical module at its maximum supported rate and transmit it to the network management server, enabling early detection of problems with the optical module and optical link, thereby improving the quality of network operations and maintenance.

[0052] In order to enable those skilled in the art to better understand the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0053] Example 1:

[0054] like Figure 1 As shown, this embodiment provides a method for reading information of an optical module, including the following steps:

[0055] S1: The CPU initializes the FPGA and sets initialization information to configure registers within the FPGA and registers used to store information.

[0056] The initialization information setting includes: setting the network address information of the CPU and the network management service, setting the address information of the optical module, setting the transmission protocol, setting the timing interval, setting the system time and starting the internal timer.

[0057] S2: FPGA uses registers to read information in the specified registers inside the optical module.

[0058] Specifically, the FPGA starts the timer according to the set timer interval and reads the information in the specified register inside the optical module according to the received control command. When the timer interval is set to 0, the FPGA reads the information in the specified register inside the optical module at the maximum speed.

[0059] S3: FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message.

[0060] First, the FPGA stores the read information in an internal register; then, the current time value of the timer is used as a timestamp; finally, the read information and the timestamp are combined to form the payload data of an Ethernet message.

[0061] S4: Based on the initialization information, the FPGA sends the payload data in Ethernet message format to the CPU and the network management server.

[0062] Specifically, the FPGA combines the payload data, the CPU, and the network address information of the network management service into an Ethernet message, and then sends the combined Ethernet message to the CPU and the network management server.

[0063] S5: After the time value of the waiting timer reaches 0, the initial value of the timer is restored to the set timing interval, and the process returns to step S2.

[0064] This embodiment provides a method for reading optical module information, which automatically reads optical module information and sends it to a designated server and CPU via Ethernet messages. This method adds a timestamp to each read, facilitating problem location. Furthermore, by setting timed intervals to read internal information at the optical module's maximum supported rate and send it to a network management server, problems with optical modules and optical links can be detected early, improving network operation and maintenance.

[0065] Example 2:

[0066] Based on Example 1, Figure 2As shown, the present invention also discloses an information reading system for an optical module, comprising: a CPU, an FPGA, an Ethernet gateway, a switch (SWITCH) and multiple optical modules. The CPU is connected to the FPGA via a PCIE interface and to the optical modules via an I2C bus. The FPGA is connected to the CPU and a network management server via the switch (SWITCH). The CPU is used to initialize the FPGA and set initialization information to configure registers within the FPGA and registers for storing information. The FPGA is used to use registers to read information in designated registers within the optical module, attach a timestamp to the read information, and form payload data of an Ethernet message. According to the initialization information, the payload data is sent to the CPU and the network management server in an Ethernet message format.

[0067] Among them, Pcie is the control channel, used to configure the registers inside the FPGA. Eth is the data channel. The optical module data read is timestamped and composed into Ethernet messages according to pre-configured information. It is sent to the CPU and network management server through the switch.

[0068] As an example, Figure 3 As shown, the FPGA includes: a control module 1, a status indication module 2, a network module 3, a data reading module 4 and a timer module 5.

[0069] The control module 1 is used to set network address information, control network transmission, set timer and system time information, set optical module command calculator, and configure control interface.

[0070] The status indication module 2 is used to indicate the working status of the internal modules of the FPGA.

[0071] Network module 3 is used to configure Ethernet MAC and PHY, read data packets and send them, and clear the corresponding flag of the linked list after successful sending.

[0072] The data reading module 4 is used to read the information of the optical module according to the information in the optical module command register, store the read information in the corresponding internal storage location, attach the timestamp and network address information to the information, splice it into an Ethernet message, and put it into the message sending list.

[0073] The timer module 5 is used to set a time timer and start the timer according to the set time interval.

[0074] This embodiment provides an optical module information reading system that automatically reads optical module information and sends it to a designated server and CPU via Ethernet messages. This system timestamps each readout, facilitating problem location. Furthermore, the system can read internal information at the optical module's maximum supported rate at set intervals and send it to a network management server. This allows for early detection of optical module and optical link problems, improving network operation and maintenance quality while effectively reducing or even eliminating the CPU load associated with reading optical module information.

[0075] Example 3:

[0076] This embodiment discloses an optical module information reading device, comprising a processor and a memory. When the processor executes an optical module information reading program stored in the memory, the following steps are implemented:

[0077] 1. The CPU initializes the FPGA and sets initialization information to configure registers within the FPGA and registers used to store information.

[0078] 2. FPGA uses registers to read the information in the specified registers inside the optical module.

[0079] 3. FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message.

[0080] 4. Based on the initialization information, the FPGA sends the payload data in Ethernet message format to the CPU and network management server.

[0081] 5. After the timer value reaches 0, restore the initial value of the timer to the set timing interval and return to step 1.

[0082] Furthermore, the information reading device of the optical module in this embodiment may further include:

[0083] The input interface is used to obtain an externally imported optical module information reading program and save the obtained optical module information reading program to the memory. It can also be used to obtain various instructions and parameters transmitted by an external terminal device and transmit them to the processor so that the processor can use these various instructions and parameters to carry out corresponding processing. In this embodiment, the input interface can specifically include but is not limited to a USB interface, a serial interface, a voice input interface, a fingerprint input interface, a hard disk read interface, etc.

[0084] The output interface is used to output various data generated by the processor to the terminal device connected to it, so that other terminal devices connected to the output interface can obtain various data generated by the processor. In this embodiment, the output interface can specifically include but is not limited to a USB interface, a serial interface, etc.

[0085] The communication unit is used to establish a remote communication connection between the information reading device of the optical module and the external server so that the information reading device of the optical module can mount the image file to the external server. In this embodiment, the communication unit may specifically include but is not limited to a remote communication unit based on wireless communication technology or wired communication technology.

[0086] The keyboard is used to obtain various parameter data or instructions input by the user by tapping the keycaps in real time.

[0087] The display is used to display relevant information of the server power supply line short circuit locating process in real time.

[0088] The mouse can be used to assist users in inputting data and simplify user operations.

[0089] Example 4:

[0090] This embodiment further discloses a readable storage medium, which includes random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, register, hard disk, removable hard disk, CD-ROM, or any other form of storage medium known in the art. The readable storage medium stores an information reading program for the optical module, and when the information reading program for the optical module is executed by a processor, the following steps are implemented:

[0091] 1. The CPU initializes the FPGA and sets initialization information to configure registers within the FPGA and registers used to store information.

[0092] 2. FPGA uses registers to read the information in the specified registers inside the optical module.

[0093] 3. FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message.

[0094] 4. Based on the initialization information, the FPGA sends the payload data in Ethernet message format to the CPU and network management server.

[0095] 5. After the timer value reaches 0, restore the initial value of the timer to the set timing interval and return to step 2.

[0096] In summary, the present invention can read the internal information of the optical module at the maximum supported rate and send it to the network management server, which can detect problems with the optical module and optical link as early as possible and improve the quality of network operation and maintenance.

[0097] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from the other embodiments. References to the same or similar parts between the various embodiments are sufficient. The methods disclosed in the embodiments are described briefly because they correspond to the systems disclosed in the embodiments. For relevant details, refer to the method description.

[0098] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0099] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of systems or units, which can be electrical, mechanical or other forms.

[0100] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0101] In addition, the functional modules in the various embodiments of the present invention may be integrated into one processing unit, or each module may exist physically separately, or two or more modules may be integrated into one unit.

[0102] Similarly, each processing unit in each embodiment of the present invention may be integrated into one functional module, or each processing unit may exist physically, or two or more processing units may be integrated into one functional module.

[0103] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0104] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0105] The above describes in detail the information reading method, system, device, and readable storage medium for the optical module provided by the present invention. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only intended to help understand the method and core concept of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from the principles of the present invention, and such improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for reading information from an optical module, characterized in that: include: The CPU initializes the FPGA and sets initialization information to configure registers within the FPGA and registers used to store information; The setting of initialization information includes: setting the network address information of the CPU and network management service; setting the address information of the optical module; setting the transmission protocol; setting the timing interval; setting the system time, and starting the internal timer; FPGA uses registers to read information in the specified registers inside the optical module; FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message; Based on the initialization information, the FPGA sends the payload data in Ethernet message format to the CPU and network management server.

2. The method for reading information from an optical module according to claim 1, wherein: The FPGA uses registers to read information in a specified register within the optical module, including: The FPGA starts the timer according to the set timing interval and reads the information in the specified register inside the optical module according to the received control command.

3. The method for reading information from an optical module according to claim 2, wherein: It is characterized by: The FPGA attaches a timestamp to the read information to form the payload data of an Ethernet message, including: The FPGA stores the read information in internal registers; Use the current timer value as the timestamp; The read information and timestamp are combined into the payload data of an Ethernet message.

4. The method for reading information from an optical module according to claim 3, wherein: The FPGA sends the payload data in Ethernet message format to the CPU and the network management server according to the initialization information, including: The FPGA stitches together the payload data, CPU, and network address information of the network management service into an Ethernet message; The spliced ​​Ethernet packets are sent to the CPU and the network management server.

5. The method for reading information from an optical module according to claim 4, wherein: After sending the spliced ​​Ethernet message to the CPU and the network management server, the method further includes: After the time value of the waiting timer reaches 0, the initial value of the timer is restored to the set timing interval.

6. The method for reading information from an optical module according to claim 1, wherein: When the timing interval is set to 0, the FPGA reads the information in the designated register inside the optical module at the maximum speed.

7. An information reading system for an optical module, characterized in that: include: CPU, FPGA, switch, network management server and multiple optical modules. The CPU is connected to the FPGA through the PCIE interface and to the optical module through the I2C bus. The FPGA is connected to the CPU and network management server through the switch. The CPU is used to initialize the FPGA and set initialization information to configure registers within the FPGA and registers used to store information. The initialization information setting includes: setting network address information for the CPU and network management service; setting address information for the optical module; setting the transmission protocol; setting the timing interval; setting the system time, and starting the internal timer; The FPGA is used to use registers to read the information in the specified registers inside the optical module, attach a timestamp to the read information to form the payload data of an Ethernet message; based on the initialization information, the payload data is sent to the CPU and network management server in the Ethernet message format.

8. An information reading device for an optical module, characterized in that: include: A memory, used for storing an information reading program of the optical module; A processor is configured to implement the steps of the optical module information reading method according to any one of claims 1 to 6 when executing the optical module information reading program.

9. A readable storage medium, characterized in that: The readable storage medium stores an information reading program for the optical module. When the information reading program for the optical module is executed by the processor, the steps of the method for reading information of the optical module according to any one of claims 1 to 6 are implemented.

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