Integrated device for measuring the shielding performance of an antistatic shielding packaging bag

Abstract

The application relates to an integrated device for measuring the shielding performance of an anti-static shielding packaging bag, which comprises an ESD simulator, a discharge switch, a high-voltage power supply, an energy storage capacitor, a discharge network, a capacitor probe, a current and voltage function selection relay, a current transformer and at least one voltage divider, a waveform acquisition module, a control module, a calibration interface, and a calibration interface. The discharge network is configured to be controlled by the current and voltage function selection relay to switch at least in 200pF and 400kOmega or 100pF and 1500Omega discharge modes. The application can simultaneously realize the functions of the induced voltage peak difference method and the induced energy method, and has high universality, applicability and practicability.

Description

Technical Field

[0001] This invention relates to the field of electrostatic discharge detection, and more specifically to an integrated device for measuring the shielding performance of antistatic shielding packaging bags. Background Technology

[0002] Antistatic shielding packaging bags are characterized by being less prone to static electricity generation due to friction. They are made of static dissipative materials, which allow the charges to easily balance and become an equipotential body. For internal or external contact discharges, they can suppress the rapid release of large currents and also have the function of electrostatic discharge shielding, which can attenuate the penetration of electrostatic discharge energy during rapid discharges.

[0003] Currently, there are two main methods for measuring the shielding performance of shielding bags: the induced voltage peak difference method and the induced energy method.

[0004] The standards corresponding to the induced voltage peak difference method are the Chinese military standard GJB2605-96 "Specification for Heat-Sealable Flexible Antistatic Shielding Materials" and the American Electronic Industries Association standard EIA-541-1998. The standards corresponding to the induced energy method are the American Electrostatic Discharge Society standard ANSI / ESD STM11.31-2006 and the aerospace standard Q / QJA 122-2013 "Test Method for Antistatic Shielding Packaging Bags of Aerospace Electronic Products".

[0005] For the induced voltage peak difference method, a prototype can be temporarily built using discrete components and oscilloscopes for testing. However, this method suffers from poor test consistency, hindering its widespread adoption. As for the induced energy method, my country currently lacks the necessary instruments and equipment. Summary of the Invention

[0006] In view of this, the present invention aims to provide an integrated device for measuring the shielding performance of antistatic shielding packaging bags, which has both induced voltage peak difference method and induced energy method detection functions.

[0007] This invention provides an integrated device for measuring the shielding performance of antistatic shielding packaging bags. The device includes: an ESD simulator, comprising a discharge switch and a high-voltage power supply, an energy storage capacitor, and a discharge network connected to the discharge switch; a capacitor probe connected to the discharge network; a current and voltage function selection relay connected to the capacitor probe; a current transformer connected to the current and voltage function selection relay; at least one voltage divider connected to the current and voltage function selection relay; a waveform acquisition module connected to the current transformer and the voltage divider; a control module connected to the waveform acquisition module; and a calibration interface, including a current calibration interface connected to the current transformer, a capacitor-resistor network calibration interface connected to the discharge network, and a high-voltage output calibration interface connected to the high-voltage power supply. The discharge network is configured to switch between multiple discharge modes under the control of the current and voltage function selection relay. The discharge modes include at least a first mode and a second mode, wherein the first mode is a 200pF and 400kΩ discharge mode, and the second mode is a 100pF and 1500Ω discharge mode.

[0008] In a preferred embodiment of the present invention, the current transformer is multiplexed with the current calibration interface. The primary side of the current transformer is a one-turn coil. The two ends of the primary side are connected to or disconnected from the two electrodes of the capacitor probe through the current and voltage function selection relay. The primary side is also connected in parallel with the BNC terminal used for current calibration. The secondary side of the current transformer is connected to a resistor divider network and is matched with the current acquisition input port of the waveform acquisition module.

[0009] In a preferred embodiment of the present invention, the voltage divider is multiplexed with the high-voltage output calibration interface. The two electrodes of the capacitor probe are connected or disconnected by the current and voltage function selection relay of the two series resistors. Each branch has two voltage division measurement points: the first voltage division point is located between the 10MΩ resistor and the 100kΩ resistor and is connected to the BNC core wire for voltage calibration; the second voltage division point is located between the 100kΩ resistor and the 9.1kΩ resistor and is connected to the voltage waveform acquisition input port; and each of the two branches corresponds to one BNC core wire and one voltage waveform acquisition input port.

[0010] In a preferred embodiment of the present invention, the current calibration interface includes three BNC ports, namely a calibration current input port, a trigger 1 port, and a trigger 2 port; the capacitor-resistor network calibration interface includes at least one terminal connected to an internal circuit board; and the high-voltage output calibration interface includes at least one terminal connected to an internal circuit board.

[0011] In a preferred embodiment of the present invention, the number of voltage dividers is two, and the waveform acquisition module includes three waveform acquisition channels: two voltage waveform acquisition channels and one current waveform acquisition channel. Each waveform acquisition channel includes a gain amplifier and an analog-to-digital converter. The two voltage waveform acquisition channels are each connected to one of the voltage dividers, and the one current waveform acquisition channel is connected to the resistor divider network on the secondary side of the current transformer.

[0012] In a preferred embodiment of the present invention, the control module includes: an FPGA; a RAM connected to the FPGA; a touch screen display connected to the FPGA; a communication interface connected to the FPGA; and a relay drive control interface connected to the FPGA.

[0013] In a preferred embodiment of the present invention, the control module further includes three analog-to-digital conversion interfaces, which correspond to the two voltage waveform acquisitions and the one current waveform acquisition, respectively.

[0014] In a preferred embodiment of the present invention, the RAM is configured to store digital waveforms and, in conjunction with the FPGA, calculate the energy of the voltage peak difference and current waveform.

[0015] In a preferred embodiment of the present invention, the communication interface is configured to connect to a host computer. The FPGA includes an MCU core, which serves as a lower-level platform connected to the host computer. The functions of the MCU core include human-machine interface interaction control, ESD discharge triggering logic, data acquisition and triggering, range conversion, waveform storage, waveform display, pulse energy calculation, saving correction data, and communication with the host computer.

[0016] In a preferred embodiment of the present invention, the ESD simulator further includes a high-voltage display unit connected to the high-voltage power supply.

[0017] The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to embodiments of the present invention has a simple structure and is easy to operate. It can simultaneously realize the detection functions of induced voltage peak difference method and induced energy method, and has extremely high versatility, applicability and practicality. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1This is a schematic diagram of the integrated device for measuring the shielding performance of antistatic shielding packaging bags according to an embodiment of the present invention.

[0020] Figure 2 This is a software schematic diagram of an integrated device for measuring the shielding performance of antistatic shielding packaging bags according to an embodiment of the present invention;

[0021] Figure 3 (a)-(c) are front, top and side views of the integrated device for measuring the shielding performance of antistatic shielding packaging bags according to an embodiment of the present invention;

[0022] Figure 4 This is a schematic diagram of an electrostatic discharge network according to an embodiment of the present invention;

[0023] Figure 5 This is a schematic diagram of the capacitor probe and voltage / current function selection in an embodiment of the present invention;

[0024] Figure 6 This is a timing diagram of the trigger output interface according to an embodiment of the present invention;

[0025] Figure 7 This is a schematic diagram of an RC network replacing a 1.5kΩ circuit in an embodiment of the present invention. Detailed Implementation

[0026] The description of the embodiments in this specification should be taken in conjunction with the accompanying drawings, which should form part of the complete specification. In the drawings, the shape or thickness of the embodiments may be exaggerated and may be indicated in a simplified or convenient manner. Furthermore, parts of the various structures in the drawings will be described separately; it is worth noting that elements not shown in the figures or not described in words are in a form known to those skilled in the art.

[0027] The descriptions of the embodiments herein, including any references to directions and orientations, are for ease of description only and should not be construed as limiting the scope of the invention. The following description of preferred embodiments involves combinations of features, which may exist independently or in combination; the invention is not particularly limited to the preferred embodiments. The scope of the invention is defined by the claims.

[0028] like Figure 1The diagram illustrates an integrated device for measuring the shielding performance of antistatic shielding packaging bags according to an embodiment of the present invention. The device includes: an ESD simulator comprising a discharge switch and a high-voltage power supply, an energy storage capacitor, and a discharge network connected to the discharge switch; a capacitor probe connected to the discharge network; a current and voltage function selection relay connected to the capacitor probe; a current transformer connected to the current and voltage function selection relay; at least one voltage divider connected to the current and voltage function selection relay; a waveform acquisition module connected to the current transformer and the voltage divider; a control module connected to the waveform acquisition module; and calibration interfaces including a current calibration interface connected to the current transformer, a capacitor-resistor network calibration interface connected to the discharge network, and a high-voltage output calibration interface connected to the high-voltage power supply. The discharge network is configured to switch between multiple discharge modes under the control of the current and voltage function selection relay. The discharge modes include at least a first mode and a second mode. The first mode is a 200pF and 400kΩ discharge mode, and the second mode is a 100pF and 1500Ω discharge mode.

[0029] like Figure 1 As shown, in this embodiment, the ESD simulator further includes a high-voltage display unit connected to the high-voltage power supply. The capacitance probe is configured to sense the discharge of the ESD simulator during testing and contact the inner surface of the anti-static shielding packaging bag, and to contact the discharge electrode when inspecting the ESD discharge waveform. The waveform acquisition module includes two voltage waveform acquisition channels and one current waveform acquisition channel, wherein the two voltage waveform acquisition channels are respectively connected to the two plates of the capacitance probe. The control module includes: an FPGA; RAM connected to the FPGA; a touch screen display connected to the FPGA; a communication interface; and a relay control interface connected to the FPGA. The waveform acquisition module also includes a gain amplifier and an analog-to-digital converter (A / D); the control module also includes three high-speed A / D interfaces, and the waveform acquisition module is connected to the control module through the three high-speed A / D interfaces, which respectively correspond to the two voltage waveform acquisition channels and the one current waveform acquisition channel. The RAM is configured to store digital waveforms and, in conjunction with the FPGA, calculate the voltage peak difference and the energy of the current waveform. The communication interface is configured to connect to a host computer. The FPGA includes an MCU core, which serves as a lower-level platform connected to the host computer. The functions of the MCU core include human-machine interface interaction control, ESD discharge triggering logic, data acquisition and triggering, range conversion, waveform storage, waveform display, pulse energy calculation, saving correction data, and communication with the host computer.

[0030] The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to embodiments of the present invention has two measurement modes: induced voltage peak difference method and induced energy method. The induced energy method measurement mode conforms to standards such as GB / T32304, Q / QJA122, ANSI / ESD STM11.31, and IEC61340-4-8, while the induced voltage peak difference measurement mode conforms to standards such as GJB2605 and EIA541. Specifically, it can achieve the following functions:

[0031] (1) Measurement of the shielding performance of antistatic shielding packaging bags by the peak difference of induced voltage.

[0032] (2) Measurement of the shielding performance of antistatic shielding packaging bags by induction energy method.

[0033] (3) The induced electrical parameters are displayed in digital form through capacitive sensing, resistive energy absorption, and waveform acquisition.

[0034] (4) It has a calibration interface, in which electrical parameters such as voltage, capacitance, and resistance can be output to the metrology standard through the calibration interface.

[0035] (5) The detector integrates ESD discharge, voltage pulse and current pulse measurement functions. The charging and discharging trigger signals can be output or input.

[0036] The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to an embodiment of the present invention has the following parameters:

[0037] (1) High voltage source charging voltage: 100V~1200V, resolution 1V;

[0038] (2) Energy measurement range: 0~50uJ, maximum permissible error: ±6uJ at 50uJ;

[0039] (3) Discharge network for the peak difference of induced voltage method: EIA 541: 200pF & 400kΩ;

[0040] (4) Discharge network for inductive energy method: STM11.31: 100pF & 1500Ω;

[0041] (5) Discharge waveform rising edge: @0Ω: <10ns, @500Ω: <20ns, along the oscillation ring <15%;

[0042] (6) Discharge waveform falling edge: @0Ω: 150ns±15ns, @500Ω: 200ns±20ns, along the oscillating ring 15%;

[0043] (7) Capacitance of capacitive sensor: 8pF±2pF;

[0044] (8) Communication interface function: It can communicate with a computer via USB serial port;

[0045] (9) Compliance with standards: Compliant with ANSI / ESD STM 11.31 and EIA 541 standards;

[0046] (10) Calibration interface: An interface for calibrating the built-in high voltage power supply output voltage, current sensor, and RC network.

[0047] (11) Trigger output interface: It has trigger output signals for charging and discharging, and can be connected to an external anti-static shielded packaging bag energy method calibration device and an anti-static shielded packaging bag voltage peak difference method calibration device to calibrate the equipment.

[0048] In this embodiment of the invention, the high-voltage power supply has an adjustment range of 100VDC to 1200VDC, which can be adjusted via the knob on the front panel of the device (see...). Figure 3 The high-voltage power supply is adjusted (top view). The high-voltage power supply has an independent switch. The high-voltage display is a fixed-range LED meter. The discharge switch is responsible for charging the capacitor and controlling the ESD simulator (hereinafter referred to as ESD) discharge; the rising edge and peak value of the ESD waveform are generated by the discharge switch. The discharge network can be selected to conform to a combination of two ESD discharge standards, including at least a discharge network using the induced voltage peak difference method that meets the GJB2605 standard (or EIA 541): 200pF & 400kΩ; and a discharge network using the induced energy method that meets the Q / QJA122 standard (or ANSI / ESD STM11.31 standard): 100pF & 1500Ω; the above discharge networks can be connected by a relay (see...). Figure 4 The switching between S3-1 and S4-1 is performed and selected via the touchscreen on the front panel of the device.

[0049] The capacitive probe is used to sense ESD discharge. During normal testing of the anti-static shielded packaging bag, it directly contacts the inner surface of the bag. When inspecting the ESD discharge waveform, it directly contacts the discharge electrode. The voltage or current signal sensed by the capacitive probe is passed through a voltage divider or current shunt, then connected to a gain amplifier for waveform acquisition, and finally to a high-speed A / D converter to acquire voltage and current waveforms (8-bit & 1Gsps recommended). The FPGA is the main controller, with a built-in MCU core, responsible for controlling measurement mode selection, data acquisition and storage, serial communication, and data exchange with the display. RAM is used to store digital waveforms and, in conjunction with the FPGA, calculates the voltage peak difference and the energy of the current waveform. The touchscreen display shows the human-machine interface and receives operating commands. The communication interface communicates with the host computer and stores measurement data there. The calibration interface calibrates the discharge waveform and provides a calibration signal to the high-speed A / D converter. It is disconnected from the internal circuitry during normal testing.

[0050] like Figure 2As shown, the software portion of the integrated device for measuring the shielding performance of antistatic shielded packaging bags in this embodiment of the invention includes upper-level computer software and lower-level computer software. The upper-level computer software runs in a computer environment and communicates with the lower-level computer via a USB interface. Its functions include waveform display, pulse current energy calculation, induced voltage peak difference calculation, calibration interface, correction parameter download, file generation and saving, report generation, and printing. The lower-level computer software runs in the MCU core of the FPGA and its functions include human-machine interface, ESD discharge trigger logic, data acquisition and triggering, range conversion, waveform storage, waveform display, pulse energy calculation, saving correction data, and communication with the upper-level computer.

[0051] like Figure 3 As shown in the embodiment of the invention, the two electrodes of the capacitance probe are encased in an anti-static shielded packaging bag for easy testing. The insertion depth is greater than 150mm, while the standard requires at least 50mm. The main structure of the product resembles an E-shaped opening groove. The capacitance probe is supported by a composite fiber material and protrudes from the product like a tongue, possessing elasticity and toughness. The grounding electrode disc is fixed at the bottom of the groove. The discharge electrode disc is located at the top of the groove and is a movable part driven by a knob-operated clamping / releasing mechanism, allowing it to move up and down. The discharge electrode is controlled to be clamped and released by a knob. The clamping force is limited by an internal spring plate, ensuring that the force applied each time is basically consistent and maintaining repeatability.

[0052] like Figure 4 As shown, the calibration interface design of the RC discharge network and the calibration interface design of the high-voltage power supply output voltage in this embodiment of the invention include: S1, S2-1, S2-2, S3-1, and S4-1 are all single-pole single-throw switches, which are all in the open state when not powered on. Points A, B, C, D, E, F, and G are all led out to the connection point of the calibration port. By switching S3-1 and S4-1, capacitors C1 and C2 and resistors R2 and R3 can form the standard required induced energy method and induced peak difference method discharge networks. When the device is not powered on, the capacitance across BG and CG can be measured using an RLC meter to calibrate the capacitance values ​​of C1 and C2 respectively. After connecting B and C in parallel, the capacitance of G is measured to be 200pF. Measuring the resistance across DF and EF can calibrate the resistance values ​​across R2 and R3. When the high-voltage power supply output switch is open, the output voltage of the high-voltage source module can be calibrated by measuring the voltage across AG using a high-voltage meter.

[0053] like Figure 5As shown, the capacitance probe and voltage / current function selection design of this embodiment includes: a voltage measurement relay S5, a current measurement relay S6, two voltage divider branches, and one current transformer circuit. The primary side of the current transformer is connected in parallel to the current calibration interface S3, connecting the corresponding BNC core wire and the drop wire. The secondary side of the current transformer is connected in parallel to the current calibration interface J16, connecting the corresponding BNC core wire. The secondary side of the current transformer also connects to an RC network and the current waveform acquisition interface J15. The two voltage divider branches are connected to the two electrodes of the capacitance probe via relay S5. Each branch uses three resistors to divide the voltage, leaving two branch points. The branch with the lower voltage connects to the waveform acquisition interface J13 (or J11), and the branch with the higher voltage connects to the voltage calibration interface S4-1 (or S4-2). These two points connect to the corresponding BNC core wires, allowing the voltage waveform to be monitored with an oscilloscope or a standard voltage signal to be input from S4-1 (or S4-2).

[0054] like Figure 6 As shown, the trigger output interface of this embodiment outputs two signals: trigger signal 1 for the charging signal and trigger signal 2 for the discharging signal. These two signals are used to control the opening and closing of an external relay; a high level indicates that the relay is closed. During the high duration of t1, the charging relay charges the capacitor; during the high duration of t3, the charging relay discharges the capacitor. These two signals are used to control an external energy method calibration device or a voltage peak difference method calibration device to perform ESD discharge on the device being calibrated, calibrating the device's energy method or voltage peak difference method readings. The rising edge of trigger signal 2 is also used to eliminate interference from non-ESD waveforms, providing synchronous triggering for effective data identification.

[0055] In this embodiment, the differences between the induced energy method and the induced voltage peak difference method during the testing process include:

[0056] (1) Different RC discharge networks

[0057] like Figure 4 As shown, by switching S3-1 and S4-1, C1, C2, R2, and R3 can form the standard required discharge networks for the inductive energy method and the inductive peak difference method.

[0058] (2) Different sampling methods for capacitor electrodes

[0059] The induced energy method involves connecting a 500-ohm resistor in parallel with the capacitor electrodes, measuring the current flowing through the 500-ohm resistor, integrating the current, and calculating the energy. The induced voltage peak difference method involves sampling the voltage waveforms of the upper and lower electrodes of the capacitor probe and then calculating the peak voltage difference between them.

[0060] like Figure 7As shown, in this embodiment, an RC network can be used instead of a 1.5kΩ resistor. The standards Q / QJA122 and ANSI / ESD STM11.31, upon which the induced energy method is based, both rely on the Human Being Model (HBM). Detailed requirements for the HBM are specified in ANSI / ESD STM5.1, "ESD Association Standard Test Method for Electrostatic Discharge Sensitivity Testing – Human Being Model (HBM) – Component Level." This standard specifies two discharge waveform parameters: one for a direct short-circuit short condition, requiring a rise time of 2ns to 10ns and a discharge current Ip value of 0.67 (1 ± 10%) A for a 1000V HBM; the other for a series 500Ω load condition, requiring a rise time of 2ns to 25ns. To compensate for the differences caused by distributed parameters in the compensation design and ensure the discharge current waveform meets the requirements, this product designs an RC network to replace the 1.5kΩ discharge resistor in the induced energy method. To adjust the discharge network parameters, the 1.5kΩ resistor was divided into three 500Ω resistors connected in series. A capacitor to ground was designed at the junction to compensate for the inductance of the leads. The values ​​of capacitors C1, C2, C3, and C4 range from 0.5pF to 3pF, and are adjusted according to the actual circuit.

[0061] In summary, compared to current systems that utilize multiple devices and components such as computers, oscilloscopes, discharge units, and test fixtures, this invention employs an integrated structure, allowing a single device to independently measure the shielding performance of shielded packaging bags. This invention includes two measurement modes: the induced voltage peak difference method and the induced energy method, which can be controlled via a touchscreen LCD and automatically switched. This invention uses hardware circuitry to replace the sampling and calculation functions of oscilloscopes and general-purpose computers. This invention uses a current sensor instead of the oscilloscope current probe. This invention uses a touchscreen LCD instead of an external display. This invention proposes an interface for calibrating the RC discharge network of the induced voltage peak difference method and the induced energy method without power. This invention proposes an interface for calibrating the built-in current sensor. This invention proposes a calibration circuit interface for the static voltage of a high-voltage source. This invention proposes a trigger signal output interface, which can be connected to external calibration devices for the anti-static shielded packaging bag energy method and the anti-static shielded packaging bag voltage peak difference method for calibration. This invention proposes an RC network to replace the 1.5kΩ discharge resistor in the inductive energy method, in order to compensate for the differences caused by the distributed parameters in the design and make the discharge current waveform meet the requirements.

[0062] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An integrated device for measuring the shielding performance of antistatic shielding packaging bags, characterized in that, The device includes: An ESD simulator includes a discharge switch and a high-voltage power supply, an energy storage capacitor, and a discharge network respectively connected to the discharge switch; Capacitor probes are connected to the discharge network; A current and voltage function selection relay is connected to the capacitor probe; A current transformer is connected to the current and voltage function selection relay; At least one voltage divider is connected to the current and voltage function selection relay; A waveform acquisition module is connected to the current transformer and the at least one voltage divider, respectively. The control module is connected to the waveform acquisition module; The calibration interface includes a current calibration interface connected to the current transformer, a capacitor-resistor network calibration interface connected to the discharge network, and a high-voltage output calibration interface connected to the high-voltage power supply. The discharge network is configured to switch between multiple discharge modes under the control of the current and voltage function selection relay. The discharge modes include at least a first mode and a second mode. The first mode is a 200pF and 400kΩ discharge mode, and the second mode is a 100pF and 1500Ω discharge mode.

2. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 1, characterized in that, The current transformer is reused with the current calibration interface. The primary side of the current transformer is a one-turn coil. The two ends of the primary side are connected or disconnected by the current and voltage function selection relay to the two electrodes of the capacitor probe. The primary side is also connected in parallel with the BNC terminal used for current calibration. The secondary side of the current transformer is connected to a resistor divider network and is matched to the current acquisition input port of the waveform acquisition module.

3. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 2, characterized in that, The voltage divider is multiplexed with the high-voltage output calibration interface. The two electrodes of the capacitance probe connect or disconnect two branches of series resistors via the current and voltage function selection relay. Each branch has two voltage division measurement points. The first voltage divider point is located between the 10MΩ resistor and the 100kΩ resistor, and is connected to the BNC core wire for voltage calibration. The second voltage divider point is located between the 100kΩ resistor and the 9.1kΩ resistor, and is connected to the voltage waveform acquisition input port; Each of the two branches corresponds to a BNC core wire and a voltage waveform acquisition input port.

4. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 3, characterized in that, The current calibration interface includes three BNC ports: calibration current input port, trigger 1 port, and trigger 2 port. The capacitor-resistor network calibration interface includes at least one terminal for connection to a circuit board. The high-voltage output calibration interface includes at least one terminal for connection to a circuit board.

5. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 4, characterized in that, The voltage divider is of two types, and the waveform acquisition module includes three waveform acquisition channels: two voltage waveform acquisition channels and one current waveform acquisition channel. Each waveform acquisition channel includes a gain amplifier and an analog-to-digital converter; wherein: Each of the two voltage waveform acquisition channels is connected to one of the voltage dividers; The current waveform acquisition is connected to the resistor voltage divider network on the secondary side of the current transformer.

6. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 5, characterized in that, The control module includes: FPGA; RAM, connected to the FPGA; A touchscreen display connected to the FPGA; A communication interface is provided for connection to the FPGA. A relay drive control interface is connected to the FPGA.

7. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 6, characterized in that, The control module also includes three analog-to-digital conversion interfaces, which correspond to the two voltage waveform acquisitions and the one current waveform acquisition, respectively.

8. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 6, characterized in that, The RAM is configured to store digital waveforms and, in conjunction with the FPGA, calculate the energy of the voltage peak difference and current waveform.

9. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to any one of claims 6-8, characterized in that, The communication interface is configured to connect to a host computer. The FPGA includes an MCU core, which serves as a lower-level platform connected to the host computer. The functions of the MCU core include human-machine interface interaction control, ESD discharge triggering logic, data acquisition and triggering, range conversion, waveform storage, waveform display, pulse energy calculation, saving correction data, and communication with the host computer.

10. The integrated device for measuring the shielding performance of antistatic shielding packaging bags according to claim 1, characterized in that, The ESD simulator also includes a high-voltage display unit connected to the high-voltage power supply.

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