A DC signal sampling circuit based on high frequency modulation

Abstract

The present invention provides a DC signal sampling circuit based on high-frequency modulation in the field of DC signal sampling technology, including a pre-processing circuit, a modulation and demodulation circuit, an AC amplifier circuit, a gear switching circuit, a post-stage filtering circuit, an ADC driving circuit, an ADC circuit, an MCU, a PWM isolation driving circuit, and a power supply reference circuit; the modulation and demodulation circuit is respectively connected to the pre-processing circuit, the AC amplifier circuit, the gear switching circuit, the post-stage filtering circuit and the PWM isolation driving circuit; the output end of the AC amplifier circuit is connected to the input end of the gear switching circuit; the input end of the ADC driving circuit is connected to the output end of the post-stage filtering circuit, and the output end is connected to the input end of the ADC circuit; the MCU is respectively connected to the ADC circuit and the PWM isolation driving circuit; the power supply reference circuit is respectively connected to the ADC driving circuit and the ADC circuit. The advantages of the present invention are: the DC signal sampling accuracy is greatly improved, and the DC signal sampling cost is greatly reduced.

Description

Technical Field

[0001] The invention relates to the technical field of direct current signal sampling, and in particular to a direct current signal sampling circuit based on high frequency modulation. Background Art

[0002] Some precision instruments need to process weak DC signals, which requires sampling of DC signals, such as output signals of photoelectric sensors, leakage current detection of insulation tests, static current detection of lithium battery protection boards, etc. Traditionally, there are two methods for sampling DC signals:

[0003] Method 1: Directly amplify and filter the DC signal; however, this method will simultaneously amplify the power frequency noise signal, and the circuit structure used in this method is relatively simple, lacking effective means of suppressing noise, which affects the stability of sampling and further affects the sampling accuracy. If the sampling stability is to be improved, the time constant of the low-pass filter can only be increased, which will sacrifice the response speed.

[0004] Method 2: Extract the DC value of the measured signal through a phase-locked amplifier circuit; although this method has a certain guarantee on sampling accuracy, it requires a dedicated multiplier chip, which is expensive. In order to ensure signal quality, it is often necessary to provide an additional high-stability sinusoidal reference signal, which further increases the sampling cost.

[0005] Therefore, how to provide a DC signal sampling circuit based on high-frequency modulation to improve the DC signal sampling accuracy and reduce the DC signal sampling cost has become a technical problem that needs to be solved urgently. Summary of the invention

[0006] The technical problem to be solved by the present invention is to provide a DC signal sampling circuit based on high frequency modulation, so as to improve the DC signal sampling accuracy and reduce the DC signal sampling cost.

[0007] The present invention is implemented as follows: a DC signal sampling circuit based on high-frequency modulation, comprising a pre-processing circuit, a modulation and demodulation circuit, an AC amplification circuit, a gear switching circuit, a post-filter circuit, an ADC drive circuit, an ADC circuit, an MCU, a PWM isolation drive circuit and a power reference circuit;

[0008] The modulation and demodulation circuit is respectively connected to the pre-processing circuit, the AC amplifier circuit, the gear switching circuit, the post-stage filtering circuit and the PWM isolation drive circuit; the output end of the AC amplifier circuit is connected to the input end of the gear switching circuit; the input end of the ADC drive circuit is connected to the output end of the post-stage filtering circuit, and the output end is connected to the input end of the ADC circuit; the MCU is respectively connected to the ADC circuit and the PWM isolation drive circuit; the power supply reference circuit is respectively connected to the ADC drive circuit and the ADC circuit.

[0009] Further, the pre-processing circuit includes an inductor L2, an inductor L5, a common-mode inductor L3, a common-mode inductor L4, a capacitor C26, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C135, a resistor R76, a resistor R77, a resistor R79, a resistor R80, a resistor R83, a resistor R86, a resistor R87, a resistor R88, a resistor R130, an operational amplifier U9, an operational amplifier U10A and a voltage regulator diode D4;

[0010] One end of the capacitor C27 is connected to the inductor L2 and the pin 1 of the common-mode inductor L3, and the other end is connected to the inductor L5 and the pin 2 of the common-mode inductor L3; one end of the capacitor C28 is connected to the pin 4 of the common-mode inductor L3 and the pin 1 of the common-mode inductor L4, and the other end is connected to the pin 3 of the common-mode inductor L3 and the pin 2 of the common-mode inductor L4; one end of the capacitor C135 is connected to the pin 4 of the common-mode inductor L4, the resistor R77 and the zener diode D4, and the other end is connected to the pin 3 of the common-mode inductor L4 and grounded;

[0011] Pin 1 of the operational amplifier U9 is connected to resistor R76, resistor R79, resistor R87 and capacitor C30, pin 3 is connected to resistor R77 and resistor R130, and pin 4 is connected to resistor R83, resistor R87 and capacitor C30;

[0012] Pin 1 of the operational amplifier U10A is connected to capacitor C26, resistor R86 and a modulation and demodulation circuit, pin 2 is connected to resistor R86 and resistor R88, and pin 3 is connected to resistor R80 and capacitor C29; capacitor C29 is connected to resistor R88 and grounded; capacitor C26 is connected to resistor R79 and resistor R80.

[0013] Further, the modulation and demodulation circuit includes an operational amplifier U10B, a resistor R90, a resistor R91, a resistor R100, a capacitor C35, a capacitor C36 and an analog switch U11;

[0014] Pin 2 of the analog switch U11 is connected to the gear switching circuit, pin 3 is connected to the post-filter circuit, pins 4 and 8 are connected to the PWM isolation drive circuit, pin 9 is connected to the resistor R90, and pin 10 is connected to the pre-processing circuit;

[0015] Pin 5 of the operational amplifier U10B is connected to resistor R91 and capacitor C36, pin 6 is connected to resistor R100, and pin 7 is connected to resistor R100 and the AC amplifier circuit; one end of the capacitor C35 is connected to resistor R90 and resistor R91, and the other end is connected to capacitor C36 and grounded.

[0016] Further, the AC amplifier circuit includes an operational amplifier U12A, an operational amplifier U12B, a resistor R92, a resistor R93, a resistor R95, a resistor R96, a resistor R97, a resistor R98, a resistor R99, a resistor R102, a resistor R103, a resistor R106, a capacitor C32, a capacitor C33, a capacitor C34, a capacitor C37, a capacitor C38, a capacitor C46 and a capacitor C47;

[0017] One end of the resistor R93 is connected to pin 3 of the operational amplifier U12A, and the other end is connected to the modulation and demodulation circuit; after the capacitor C34 and the capacitor C37 are connected in parallel, one end is connected to the resistor R96, and the other end is grounded; after the resistor R103, the capacitor C46 and the capacitor C47 are connected in parallel, one end is connected to the resistor R96 and the pin 2 of the operational amplifier U12A, and the other end is connected to the resistor R92, the capacitor C33 and the pin 1 of the operational amplifier U12A; one end of the resistor R97 is connected to the capacitor C33 and the resistor R99, and the other end is connected to the resistor R98 and the capacitor C32;

[0018] Pin 5 of the operational amplifier U12B is connected to the resistor R98 and the capacitor C38, pin 6 is connected to the resistor R102 and the resistor R106, and pin 7 is connected to the resistor R95, the resistor R102, the capacitor C32, and the gear switching circuit.

[0019] Further, the gear switching circuit includes an operational amplifier U13A, an operational amplifier U13B, an analog switch U25, a resistor R109, a resistor R110, a resistor R112, a resistor R114, a resistor R115, a resistor R116, a resistor R118, a resistor R119, a resistor R136 and a resistor R139;

[0020] One end of the resistor R109 is connected to the resistor R114, and the other end is connected to the AC amplifier circuit; Pin 1 of the operational amplifier U13A is connected to the resistor R115, the resistor R118 and the pin 9 of the analog switch U25, Pin 2 is connected to the resistor R114, the resistor R110 and the resistor R139, and Pin 3 is grounded; One end of the resistor R116 is connected to the resistor R115, and the other end is connected to the resistor R112, the resistor R136 and the pin 6 of the operational amplifier U13B; Pin 7 of the operational amplifier U13B is connected to the resistor R119, the pin 3 of the analog switch U25 and the modulation and demodulation circuit;

[0021] Pin 2 of the analog switch U25 is connected to the resistor R112 , pin 5 is connected to the resistor R136 , pin 7 is connected to the resistor R139 , and pin 10 is connected to the resistor R110 .

[0022] Further, the post-stage filter circuit includes an operational amplifier U14A, a resistor R104, a resistor R105, a resistor R111, a capacitor C48 and a capacitor C49;

[0023] Pin 3 of the operational amplifier U14A is connected to resistor R105 and capacitor C49, pin 2 is connected to resistor R111, and pin 1 is connected to resistor R111 and an ADC drive circuit; one end of the capacitor C48 is connected to resistor R104 and resistor R105, and the other end is connected to capacitor C49 and grounded; the resistor R104 is connected to a modulation and demodulation circuit.

[0024] Further, the ADC driving circuit includes an operational amplifier U6A, an operational amplifier U6B, an operational amplifier U7A, an operational amplifier U7B, a capacitor C20, a capacitor C21, a capacitor C22, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R39, a resistor R40, a resistor R43, a resistor R48, a resistor R49, a resistor R50, a resistor R51, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a resistor R56, a resistor R57 and a resistor R58;

[0025] One end of the resistor R49 is connected to the resistor R54 and the power reference circuit, and the other end is connected to the resistor R52 and the pin 3 of the operational amplifier U7A; one end of the resistor R57 is connected to the resistor R52 and the post-stage filter circuit, and the other end is connected to the resistor R58 and the pin 6 of the operational amplifier U7B;

[0026] Pin 1 of the operational amplifier U7A is connected to resistors R31 and R43, and pin 2 is connected to resistors R31 and R39; pin 5 of the operational amplifier U7B is connected to resistors R54 and R55, and pin 7 is connected to resistors R56 and R58;

[0027] Pin 1 of the operational amplifier U6A is connected to resistors R30 and R40, pin 2 is connected to resistors R29 and R30, and pin 3 is connected to resistors R32 and R43; the resistor R29 is connected to resistor R32 and is grounded;

[0028] Pin 5 of the operational amplifier U6B is connected to resistors R53 and R56, pin 6 is connected to resistors R48 and R50, and pin 7 is connected to resistors R48 and R51;

[0029] One end of the capacitor C21 is connected to the resistor R40 , the capacitor C20 , and the ADC circuit, and the other end of the capacitor C21 is connected to the resistor R51 , the capacitor C22 , and the ADC circuit.

[0030] Further, the ADC circuit includes an ADC chip U1, a capacitor C1, a capacitor C3, a capacitor C4, a capacitor C82, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and a resistor R125;

[0031] Pin 1 of the ADC chip U1 is connected to capacitor C1 and a power reference circuit, pin 2 is connected to capacitor C82, pin 3 is connected to capacitor C82 and grounded, pins 4 and 5 are connected to an ADC drive circuit, pin 8 is connected to capacitor C3, and pin 9 is connected to capacitor C4;

[0032] One end of the resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6 and resistor R125 are respectively connected to pins 16, 15, 14, 13, 12, 10 and 7 of the ADC chip U1, and the other end is connected to the MCU.

[0033] Further, the PWM isolation driving circuit includes an optocoupler U24, an optocoupler U26, a resistor R132, a resistor R133, a resistor R134, a resistor R135, a resistor R137, a resistor R138, a resistor R155 and a resistor R156;

[0034] Pin 1 of the optical coupler U24 is connected to resistors R132 and R134, pin 3 is connected to resistor R134 and MCU, pin 5 is connected to resistor R133 and R155, and pin 6 is connected to resistor R155; the resistor R133 is connected to the modulation and demodulation circuit;

[0035] Pin 1 of the optocoupler U26 is connected to resistor R135 and resistor R138, pin 3 is connected to resistor R138 and MCU, pin 5 is connected to resistor R137 and resistor R156, and pin 6 is connected to resistor R156; the resistor R137 is connected to the modulation and demodulation circuit.

[0036] Further, the power supply reference circuit includes a voltage reference chip U2, an operational amplifier U4A, an operational amplifier U4B, a capacitor C6, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R21, a resistor R22, a resistor R25, a resistor R26, a resistor R27 and a resistor R28;

[0037] Pin 4 of the voltage reference chip U2 is connected to one end of the capacitor C12, pin 5 is connected to the other end of the capacitor C12, and pin 6 is connected to the capacitor C10, the capacitor C11, the resistor R7, the resistor R9, and the resistor R25; one end of the capacitor C14 is connected to the resistor R9, and the other end is connected to the capacitor C10 and the capacitor C11;

[0038] After the resistor R26 is connected in parallel with the capacitor C15, one end is connected to the resistor R25 and the pin 3 of the operational amplifier U4A, and the other end is grounded; the pin 1 of the operational amplifier U4A is connected to the resistor R27, the resistor R28 and the ADC drive circuit, and the pin 2 is connected to the resistor R27;

[0039] After the resistor R10 is connected in parallel with the capacitor C9, one end is connected to the resistor R7 and the pin 5 of the operational amplifier U4B, and the other end is grounded; the pin 6 of the operational amplifier U4B is connected to the capacitor C13, the resistor R21 and the resistor R22, and the pin 7 is connected to the resistor R8 and the capacitor C13; one end of the capacitor C6 is connected to the resistor R8, the resistor R22 and the ADC circuit, and the other end is grounded.

[0040] The advantages of the present invention are:

[0041] By setting a pre-processing circuit, a modulation and demodulation circuit including an analog switch U11, an AC amplifier circuit, a gear switching circuit, a post-stage filtering circuit, an ADC driving circuit, an ADC circuit, an MCU, a PWM isolation driving circuit and a power supply reference circuit, the MCU controls the analog switch U11 through the PWM isolation driving circuit to control the modulation function and the demodulation function of the modulation and demodulation circuit, and modulates the weak DC signal that is susceptible to power frequency interference input by the pre-processing circuit to a high frequency band for processing through the modulation and demodulation circuit, that is, the modulated signal is first amplified and filtered by the AC amplifier circuit, and then the gear is switched by the gear switching circuit, and then the AC signal is demodulated by the modulation and demodulation circuit, and is sampled by the post-stage filtering circuit, the ADC driving circuit and the ADC circuit in turn. Compared with the traditional direct amplification and filtering of the DC signal, the interference by the power frequency noise is small, and the sampling stability is greatly improved; compared with the traditional extraction of the DC quantity of the measured signal through the phase-locked amplifier circuit, the structure is simple and the circuit cost is low, and finally the DC signal sampling accuracy is greatly improved, and the DC signal sampling cost is greatly reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The present invention will be further described below in conjunction with embodiments with reference to the accompanying drawings.

[0043] Figure 1 The invention discloses a circuit principle block diagram of a DC signal sampling circuit based on high frequency modulation.

[0044] Figure 2 It is a circuit diagram of the pre-processing circuit of the present invention.

[0045] Figure 3 It is a circuit diagram of the modulation and demodulation circuit and the post-stage filtering circuit of the present invention.

[0046] Figure 4 It is a circuit diagram of the AC amplifier circuit of the present invention.

[0047] Figure 5 It is a circuit diagram of the gear switching circuit of the present invention.

[0048] Figure 6 It is a circuit diagram of the ADC driving circuit of the present invention.

[0049] Figure 7 1 is a circuit diagram of an ADC circuit of the present invention.

[0050] Figure 8 It is a circuit diagram of the PWM isolation drive circuit of the present invention.

[0051] Fig. 9 1 is a circuit diagram of a power supply reference circuit of the present invention. DETAILED DESCRIPTION

[0052] Please refer to Figures 1 to 9 As shown, a preferred embodiment of a DC signal sampling circuit based on high-frequency modulation of the present invention includes a pre-processing circuit, a modulation and demodulation circuit, an AC amplifier circuit, a gear switching circuit, a post-stage filter circuit, an ADC drive circuit, an ADC circuit, an MCU, a PWM isolation drive circuit and a power reference circuit;

[0053] The pre-processing circuit is used for preprocessing the measured signal; the modulation and demodulation circuit is used for modulating and demodulating the measured signal; the AC amplifier circuit is used for amplifying and filtering the modulated measured signal; the gear switching circuit is used for switching the measuring range; the post-filtering circuit is used for filtering the demodulated measured signal; the ADC driving circuit is used for converting the processed measured signal into a differential signal; the ADC circuit is used for sampling the measured signal; the MCU is used for the generation of the modulation and demodulation switch signal and the sampling logic control, that is, it is responsible for the generation of the PWM signal, and controls the analog switch U11 through the PWM isolation driving circuit, and is also responsible for controlling the phase difference between the modulation and demodulation PWM signals to change the transmission ratio of the measured signal; the PWM isolation driving circuit is used to send the switch signal generated by the MCU into the modulation and demodulation circuit; the power supply reference circuit is used to generate a voltage reference.

[0054] The modulation and demodulation circuit is respectively connected to the pre-processing circuit, the AC amplifier circuit, the gear switching circuit, the post-stage filtering circuit and the PWM isolation drive circuit; the output end of the AC amplifier circuit is connected to the input end of the gear switching circuit; the input end of the ADC drive circuit is connected to the output end of the post-stage filtering circuit, and the output end is connected to the input end of the ADC circuit; the MCU is respectively connected to the ADC circuit and the PWM isolation drive circuit; the power supply reference circuit is respectively connected to the ADC drive circuit and the ADC circuit.

[0055] The pre-processing circuit includes an inductor L2, an inductor L5, a common mode inductor L3, a common mode inductor L4, a capacitor C26, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C135, a resistor R76, a resistor R77, a resistor R79, a resistor R80, a resistor R83, a resistor R86, a resistor R87, a resistor R88, a resistor R130, an operational amplifier U9, an operational amplifier U10A and a voltage stabilizing diode D4;

[0056] The measured signals VS+ and VS- pass through the high-order LC filtering circuit composed of the inductor L2, common-mode inductor L3, common-mode inductor L4, inductor L5, capacitor C27, capacitor C28, and capacitor C135 to first filter out a certain amount of high-frequency interference and noise; then pass through the in-phase proportional amplifier circuit composed of the operational amplifier U9, resistor R76, resistor R77, resistor R83, resistor R87, resistor R130 and capacitor C30 to obtain a certain gain; and then pass through the second-order active low-pass filter composed of the operational amplifier U10A, resistor R79, resistor R80, resistor R88, resistor R86 and capacitor C26, capacitor C29 to further suppress noise.

[0057] One end of the capacitor C27 is connected to the inductor L2 and the pin 1 of the common-mode inductor L3, and the other end is connected to the inductor L5 and the pin 2 of the common-mode inductor L3; one end of the capacitor C28 is connected to the pin 4 of the common-mode inductor L3 and the pin 1 of the common-mode inductor L4, and the other end is connected to the pin 3 of the common-mode inductor L3 and the pin 2 of the common-mode inductor L4; one end of the capacitor C135 is connected to the pin 4 of the common-mode inductor L4, the resistor R77 and the zener diode D4, and the other end is connected to the pin 3 of the common-mode inductor L4 and grounded;

[0058] Pin 1 of the operational amplifier U9 is connected to resistor R76, resistor R79, resistor R87 and capacitor C30, pin 3 is connected to resistor R77 and resistor R130, and pin 4 is connected to resistor R83, resistor R87 and capacitor C30;

[0059] Pin 1 of the operational amplifier U10A is connected to capacitor C26, resistor R86 and a modulation and demodulation circuit, pin 2 is connected to resistor R86 and resistor R88, and pin 3 is connected to resistor R80 and capacitor C29; capacitor C29 is connected to resistor R88 and grounded; capacitor C26 is connected to resistor R79 and resistor R80.

[0060] The modulation and demodulation circuit includes an operational amplifier U10B, a resistor R90, a resistor R91, a resistor R100, a capacitor C35, a capacitor C36 and an analog switch U11;

[0061] The analog switch U11 is divided into two parts: a modulator and a demodulator. PWM_OUTA controls the modulation switch, and the output signal SIG_PR of the pre-processing circuit and the analog ground reference are alternately connected to the analog switch U11. The modulation frequency is determined by the frequency of PWM_OUTA. PWM_OUTB controls the demodulation switch, and restores the modulation signal, and its frequency is the same as PWM_OUTA. The modulated signal passes through an active low-pass filter (SIG_MDOUT) and is output to the AC amplifier circuit.

[0062] Pin 2 of the analog switch U11 is connected to the gear switching circuit, pin 3 is connected to the post-filter circuit, pins 4 and 8 are connected to the PWM isolation drive circuit, pin 9 is connected to the resistor R90, and pin 10 is connected to the pre-processing circuit;

[0063] Pin 5 of the operational amplifier U10B is connected to resistor R91 and capacitor C36, pin 6 is connected to resistor R100, and pin 7 is connected to resistor R100 and the AC amplifier circuit; one end of the capacitor C35 is connected to resistor R90 and resistor R91, and the other end is connected to capacitor C36 and grounded.

[0064] The AC amplifier circuit includes an operational amplifier U12A, an operational amplifier U12B, a resistor R92, a resistor R93, a resistor R95, a resistor R96, a resistor R97, a resistor R98, a resistor R99, a resistor R102, a resistor R103, a resistor R106, a capacitor C32, a capacitor C33, a capacitor C34, a capacitor C37, a capacitor C38, a capacitor C46 and a capacitor C47;

[0065] One end of the resistor R93 is connected to pin 3 of the operational amplifier U12A, and the other end is connected to the modulation and demodulation circuit; after the capacitor C34 and the capacitor C37 are connected in parallel, one end is connected to the resistor R96, and the other end is grounded; after the resistor R103, the capacitor C46 and the capacitor C47 are connected in parallel, one end is connected to the resistor R96 and the pin 2 of the operational amplifier U12A, and the other end is connected to the resistor R92, the capacitor C33 and the pin 1 of the operational amplifier U12A; one end of the resistor R97 is connected to the capacitor C33 and the resistor R99, and the other end is connected to the resistor R98 and the capacitor C32;

[0066] Pin 5 of the operational amplifier U12B is connected to the resistor R98 and the capacitor C38, pin 6 is connected to the resistor R102 and the resistor R106, and pin 7 is connected to the resistor R95, the resistor R102, the capacitor C32, and the gear switching circuit.

[0067] The gear switching circuit includes an operational amplifier U13A, an operational amplifier U13B, an analog switch U25, a resistor R109, a resistor R110, a resistor R112, a resistor R114, a resistor R115, a resistor R116, a resistor R118, a resistor R119, a resistor R136 and a resistor R139; the analog switch U11 and the analog switch U25 are both dual-channel single-pole double-throw analog switches;

[0068] The gear switching circuit is used to switch gears according to the size of the signal, and the switching action is achieved through the analog switch U25.

[0069] One end of the resistor R109 is connected to the resistor R114, and the other end is connected to the AC amplifier circuit; Pin 1 of the operational amplifier U13A is connected to the resistor R115, the resistor R118 and the pin 9 of the analog switch U25, Pin 2 is connected to the resistor R114, the resistor R110 and the resistor R139, and Pin 3 is grounded; One end of the resistor R116 is connected to the resistor R115, and the other end is connected to the resistor R112, the resistor R136 and the pin 6 of the operational amplifier U13B; Pin 7 of the operational amplifier U13B is connected to the resistor R119, the pin 3 of the analog switch U25 and the modulation and demodulation circuit;

[0070] Pin 2 of the analog switch U25 is connected to the resistor R112 , pin 5 is connected to the resistor R136 , pin 7 is connected to the resistor R139 , and pin 10 is connected to the resistor R110 .

[0071] The post-stage filter circuit includes an operational amplifier U14A, a resistor R104, a resistor R105, a resistor R111, a capacitor C48 and a capacitor C49;

[0072] Pin 3 of the operational amplifier U14A is connected to resistor R105 and capacitor C49, pin 2 is connected to resistor R111, and pin 1 is connected to resistor R111 and an ADC drive circuit; one end of the capacitor C48 is connected to resistor R104 and resistor R105, and the other end is connected to capacitor C49 and grounded; the resistor R104 is connected to a modulation and demodulation circuit.

[0073] The ADC driving circuit includes an operational amplifier U6A, an operational amplifier U6B, an operational amplifier U7A, an operational amplifier U7B, a capacitor C20, a capacitor C21, a capacitor C22, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R39, a resistor R40, a resistor R43, a resistor R48, a resistor R49, a resistor R50, a resistor R51, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a resistor R56, a resistor R57 and a resistor R58;

[0074] The ADC driving circuit is used to convert the single-ended signal into a differential signal and send it to the ADC circuit; wherein the resistor R31, the resistor R39, the resistor R49, the resistor R52 and the operational amplifier U7A constitute an adder circuit; the resistor R54, the resistor R55, the resistor R57, the resistor R58 and the operational amplifier U7B constitute a subtractor circuit, which converts the output signal SI of the post-stage filter circuit into a differential signal. The amplitude of G_OUT is doubled, and a common-mode voltage ADC_VCOM is assigned to it. The size of ADC_VCOM is half of the reference voltage of the ADC chip U1, so that the measured signal can obtain the optimal resolution; the resistor R29, the resistor R30, the resistor R32, the resistor R43, the operational amplifier U6A, and the resistor R48, the resistor R50, the resistor R54, the resistor R56, and the operational amplifier U6B respectively constitute the buffers of the adder circuit and the subtractor circuit; the resistor R40, the resistor R51, the capacitor C20, the capacitor C21, and the capacitor C22 constitute an anti-aliasing filter to attenuate the high-frequency noise signal entering the ADC circuit.

[0075] One end of the resistor R49 is connected to the resistor R54 and the power reference circuit, and the other end is connected to the resistor R52 and the pin 3 of the operational amplifier U7A; one end of the resistor R57 is connected to the resistor R52 and the post-stage filter circuit, and the other end is connected to the resistor R58 and the pin 6 of the operational amplifier U7B;

[0076] Pin 1 of the operational amplifier U7A is connected to resistors R31 and R43, and pin 2 is connected to resistors R31 and R39; pin 5 of the operational amplifier U7B is connected to resistors R54 and R55, and pin 7 is connected to resistors R56 and R58;

[0077] Pin 1 of the operational amplifier U6A is connected to resistors R30 and R40, pin 2 is connected to resistors R29 and R30, and pin 3 is connected to resistors R32 and R43; the resistor R29 is connected to resistor R32 and is grounded;

[0078] Pin 5 of the operational amplifier U6B is connected to resistors R53 and R56, pin 6 is connected to resistors R48 and R50, and pin 7 is connected to resistors R48 and R51;

[0079] One end of the capacitor C21 is connected to the resistor R40 , the capacitor C20 , and the ADC circuit, and the other end of the capacitor C21 is connected to the resistor R51 , the capacitor C22 , and the ADC circuit.

[0080] The ADC circuit includes an ADC chip U1, a capacitor C1, a capacitor C3, a capacitor C4, a capacitor C82, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and a resistor R125;

[0081] The differential output signals VI N+ and VI N- of the ADC driving circuit are sent to the ADC chip U1 for sampling; the ADC chip U1 uses a Σ-Δ type ADC, and the reference clock and the communication clock do not need to be synchronized. Its DRDY pin generates a square wave pulse according to the configured sampling rate and sends it to the IO port of the MCU. At the same time, the MCU enters an interrupt through the external level jump on the pin and reads the conversion data of the ADC chip U1.

[0082] Pin 1 of the ADC chip U1 is connected to capacitor C1 and a power reference circuit, pin 2 is connected to capacitor C82, pin 3 is connected to capacitor C82 and grounded, pins 4 and 5 are connected to an ADC drive circuit, pin 8 is connected to capacitor C3, and pin 9 is connected to capacitor C4;

[0083] One end of the resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6 and resistor R125 are respectively connected to pins 16, 15, 14, 13, 12, 10 and 7 of the ADC chip U1, and the other end is connected to the MCU.

[0084] The PWM isolation driving circuit includes an optocoupler U24, an optocoupler U26, a resistor R132, a resistor R133, a resistor R134, a resistor R135, a resistor R137, a resistor R138, a resistor R155 and a resistor R156;

[0085] The PWM isolation drive circuit sends the switching signals PWM_OUTA and PWM_OUTB of the modulation and demodulation circuit to the analog switch U11 through the optocoupler U24 and the optocoupler U26; wherein the resistor R155 and the resistor R156 are pull-up resistors, which are used to shorten the rising edge time of the switching signal and reduce the delay in the signal transmission process; the capacitor C84, the capacitor C85, the capacitor C86 and the capacitor C87 are decoupling capacitors, which are used to reduce the influence of power supply fluctuations caused by current transients in the switching process.

[0086] Pin 1 of the optical coupler U24 is connected to resistors R132 and R134, pin 3 is connected to resistor R134 and MCU, pin 5 is connected to resistor R133 and R155, and pin 6 is connected to resistor R155; the resistor R133 is connected to the modulation and demodulation circuit;

[0087] Pin 1 of the optocoupler U26 is connected to resistor R135 and resistor R138, pin 3 is connected to resistor R138 and MCU, pin 5 is connected to resistor R137 and resistor R156, and pin 6 is connected to resistor R156; the resistor R137 is connected to the modulation and demodulation circuit.

[0088] The power reference circuit includes a voltage reference chip U2, an operational amplifier U4A, an operational amplifier U4B, a capacitor C6, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R21, a resistor R22, a resistor R25, a resistor R26, a resistor R27 and a resistor R28;

[0089] The resistor R9, capacitor C10, capacitor C11, capacitor C12, and capacitor C14 are peripheral devices of the voltage reference chip U2, which enable the voltage reference chip U2 to achieve optimal performance; the resistor R7, resistor R8, resistor R10, resistor R21, resistor R22, capacitor C6, capacitor C9, capacitor C13 and operational amplifier U4B constitute a reference buffer circuit to reduce the low-frequency noise of the reference output, and its output signal REF+ serves as the voltage reference of the ADC chip U1; the resistor R25, resistor R26, resistor R27, resistor R28, capacitor C15 and operational amplifier U4A constitute a 1 / 2 attenuation circuit to attenuate the output signal of the voltage reference chip U2 to half, and send it to the ADC drive circuit after buffering as the common-mode voltage ADC_VCOM of the sampled differential signal.

[0090] Pin 4 of the voltage reference chip U2 is connected to one end of the capacitor C12, pin 5 is connected to the other end of the capacitor C12, and pin 6 is connected to the capacitor C10, the capacitor C11, the resistor R7, the resistor R9, and the resistor R25; one end of the capacitor C14 is connected to the resistor R9, and the other end is connected to the capacitor C10 and the capacitor C11;

[0091] After the resistor R26 is connected in parallel with the capacitor C15, one end is connected to the resistor R25 and the pin 3 of the operational amplifier U4A, and the other end is grounded; the pin 1 of the operational amplifier U4A is connected to the resistor R27, the resistor R28 and the ADC drive circuit, and the pin 2 is connected to the resistor R27;

[0092] After the resistor R10 is connected in parallel with the capacitor C9, one end is connected to the resistor R7 and the pin 5 of the operational amplifier U4B, and the other end is grounded; the pin 6 of the operational amplifier U4B is connected to the capacitor C13, the resistor R21 and the resistor R22, and the pin 7 is connected to the resistor R8 and the capacitor C13; one end of the capacitor C6 is connected to the resistor R8, the resistor R22 and the ADC circuit, and the other end is grounded.

[0093] Working principle of the present invention:

[0094] After the DC signal is filtered and amplified by the pre-processing circuit, it is subjected to high-frequency modulation processing by the modulation and demodulation circuit to become an AC signal. The AC signal further attenuates noise through the AC amplifier circuit to improve the signal-to-noise ratio, enters the gear switching circuit to obtain corresponding gains according to different ranges, and then is demodulated by the modulation and demodulation circuit to restore the effective signal to a DC quantity, and attenuates noise through the post-filter circuit, and is sampled by the ADC circuit through the ADC drive circuit.

[0095] In summary, the advantages of the present invention are:

[0096] By setting a pre-processing circuit, a modulation and demodulation circuit including an analog switch U11, an AC amplifier circuit, a gear switching circuit, a post-stage filtering circuit, an ADC driving circuit, an ADC circuit, an MCU, a PWM isolation driving circuit and a power supply reference circuit, the MCU controls the analog switch U11 through the PWM isolation driving circuit to control the modulation function and the demodulation function of the modulation and demodulation circuit, and modulates the weak DC signal that is susceptible to power frequency interference input by the pre-processing circuit to a high frequency band for processing through the modulation and demodulation circuit, that is, the modulated signal is first amplified and filtered by the AC amplifier circuit, and then the gear is switched by the gear switching circuit, and then the AC signal is demodulated by the modulation and demodulation circuit, and is sampled by the post-stage filtering circuit, the ADC driving circuit and the ADC circuit in turn. Compared with the traditional direct amplification and filtering of the DC signal, the interference by the power frequency noise is small, and the sampling stability is greatly improved; compared with the traditional extraction of the DC quantity of the measured signal through the phase-locked amplifier circuit, the structure is simple and the circuit cost is low, and finally the DC signal sampling accuracy is greatly improved, and the DC signal sampling cost is greatly reduced.

[0097] Although the specific implementation modes of the present invention are described above, those skilled in the art should understand that the specific implementation modes described are only illustrative and are not intended to limit the scope of the present invention. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present invention should be included in the scope of protection of the claims of the present invention.

Claims

1. A DC signal sampling circuit based on high frequency modulation, Features: It includes a pre-processing circuit, a modulation and demodulation circuit, an AC amplifier circuit, a gear switching circuit, a post-filter circuit, an ADC drive circuit, an ADC circuit, an MCU, a PWM isolation drive circuit and a power reference circuit; The modulation and demodulation circuit is respectively connected to the pre-processing circuit, the AC amplifier circuit, the gear switching circuit, the post-stage filtering circuit and the PWM isolation driving circuit; the output end of the AC amplifier circuit is connected to the input end of the gear switching circuit; the input end of the ADC driving circuit is connected to the output end of the post-stage filtering circuit, and the output end is connected to the input end of the ADC circuit; the MCU is respectively connected to the ADC circuit and the PWM isolation driving circuit; the power reference circuit is respectively connected to the ADC driving circuit and the ADC circuit; The pre-processing circuit includes an inductor L2, an inductor L5, a common mode inductor L3, a common mode inductor L4, a capacitor C26, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C135, a resistor R76, a resistor R77, a resistor R79, a resistor R80, a resistor R83, a resistor R86, a resistor R87, a resistor R88, a resistor R130, an operational amplifier U9, an operational amplifier U10A and a voltage stabilizing diode D4; One end of the capacitor C27 is connected to the inductor L2 and the pin 1 of the common-mode inductor L3, and the other end is connected to the inductor L5 and the pin 2 of the common-mode inductor L3; one end of the capacitor C28 is connected to the pin 4 of the common-mode inductor L3 and the pin 1 of the common-mode inductor L4, and the other end is connected to the pin 3 of the common-mode inductor L3 and the pin 2 of the common-mode inductor L4; one end of the capacitor C135 is connected to the pin 4 of the common-mode inductor L4, the resistor R77 and the zener diode D4, and the other end is connected to the pin 3 of the common-mode inductor L4 and grounded; Pin 1 of the operational amplifier U9 is connected to resistor R76, resistor R79, resistor R87 and capacitor C30, pin 3 is connected to resistor R77 and resistor R130, and pin 4 is connected to resistor R83, resistor R87 and capacitor C30; Pin 1 of the operational amplifier U10A is connected to capacitor C26, resistor R86 and a modulation and demodulation circuit, pin 2 is connected to resistor R86 and resistor R88, and pin 3 is connected to resistor R80 and capacitor C29; capacitor C29 is connected to resistor R88 and grounded; capacitor C26 is connected to resistor R79 and resistor R80; The modulation and demodulation circuit includes an operational amplifier U10B, a resistor R90, a resistor R91, a resistor R100, a capacitor C35, a capacitor C36 and an analog switch U11; Pin 2 of the analog switch U11 is connected to the gear switching circuit, pin 3 is connected to the post-filter circuit, pins 4 and 8 are connected to the PWM isolation drive circuit, pin 9 is connected to the resistor R90, and pin 10 is connected to the pre-processing circuit; Pin 5 of the operational amplifier U10B is connected to resistor R91 and capacitor C36, pin 6 is connected to resistor R100, and pin 7 is connected to resistor R100 and the AC amplifier circuit; one end of the capacitor C35 is connected to resistor R90 and resistor R91, and the other end is connected to capacitor C36 and grounded.

2. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The AC amplifier circuit includes an operational amplifier U12A, an operational amplifier U12B, a resistor R92, a resistor R93, a resistor R95, a resistor R96, a resistor R97, a resistor R98, a resistor R99, a resistor R102, a resistor R103, a resistor R106, a capacitor C32, a capacitor C33, a capacitor C34, a capacitor C37, a capacitor C38, a capacitor C46 and a capacitor C47; One end of the resistor R93 is connected to pin 3 of the operational amplifier U12A, and the other end is connected to the modulation and demodulation circuit; after the capacitor C34 and the capacitor C37 are connected in parallel, one end is connected to the resistor R96, and the other end is grounded; after the resistor R103, the capacitor C46 and the capacitor C47 are connected in parallel, one end is connected to the resistor R96 and the pin 2 of the operational amplifier U12A, and the other end is connected to the resistor R92, the capacitor C33 and the pin 1 of the operational amplifier U12A; one end of the resistor R97 is connected to the capacitor C33 and the resistor R99, and the other end is connected to the resistor R98 and the capacitor C32; Pin 5 of the operational amplifier U12B is connected to the resistor R98 and the capacitor C38, pin 6 is connected to the resistor R102 and the resistor R106, and pin 7 is connected to the resistor R95, the resistor R102, the capacitor C32, and the gear switching circuit.

3. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The gear switching circuit includes an operational amplifier U13A, an operational amplifier U13B, an analog switch U25, a resistor R109, a resistor R110, a resistor R112, a resistor R114, a resistor R115, a resistor R116, a resistor R118, a resistor R119, a resistor R136 and a resistor R139; One end of the resistor R109 is connected to the resistor R114, and the other end is connected to the AC amplifier circuit; Pin 1 of the operational amplifier U13A is connected to the resistor R115, the resistor R118 and the pin 9 of the analog switch U25, Pin 2 is connected to the resistor R114, the resistor R110 and the resistor R139, and Pin 3 is grounded; One end of the resistor R116 is connected to the resistor R115, and the other end is connected to the resistor R112, the resistor R136 and the pin 6 of the operational amplifier U13B; Pin 7 of the operational amplifier U13B is connected to the resistor R119, the pin 3 of the analog switch U25 and the modulation and demodulation circuit; Pin 2 of the analog switch U25 is connected to the resistor R112 , pin 5 is connected to the resistor R136 , pin 7 is connected to the resistor R139 , and pin 10 is connected to the resistor R110 .

4. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The post-stage filter circuit includes an operational amplifier U14A, a resistor R104, a resistor R105, a resistor R111, a capacitor C48 and a capacitor C49; Pin 3 of the operational amplifier U14A is connected to resistor R105 and capacitor C49, pin 2 is connected to resistor R111, and pin 1 is connected to resistor R111 and an ADC drive circuit; one end of the capacitor C48 is connected to resistor R104 and resistor R105, and the other end is connected to capacitor C49 and grounded; the resistor R104 is connected to a modulation and demodulation circuit.

5. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The ADC driving circuit includes an operational amplifier U6A, an operational amplifier U6B, an operational amplifier U7A, an operational amplifier U7B, a capacitor C20, a capacitor C21, a capacitor C22, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R39, a resistor R40, a resistor R43, a resistor R48, a resistor R49, a resistor R50, a resistor R51, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a resistor R56, a resistor R57 and a resistor R58; One end of the resistor R49 is connected to the resistor R54 and the power reference circuit, and the other end is connected to the resistor R52 and the pin 3 of the operational amplifier U7A; one end of the resistor R57 is connected to the resistor R52 and the post-stage filter circuit, and the other end is connected to the resistor R58 and the pin 6 of the operational amplifier U7B; Pin 1 of the operational amplifier U7A is connected to resistors R31 and R43, and pin 2 is connected to resistors R31 and R39; pin 5 of the operational amplifier U7B is connected to resistors R54 and R55, and pin 7 is connected to resistors R56 and R58; Pin 1 of the operational amplifier U6A is connected to resistors R30 and R40, pin 2 is connected to resistors R29 and R30, and pin 3 is connected to resistors R32 and R43; the resistor R29 is connected to resistor R32 and is grounded; Pin 5 of the operational amplifier U6B is connected to resistors R53 and R56, pin 6 is connected to resistors R48 and R50, and pin 7 is connected to resistors R48 and R51; One end of the capacitor C21 is connected to the resistor R40 , the capacitor C20 , and the ADC circuit, and the other end of the capacitor C21 is connected to the resistor R51 , the capacitor C22 , and the ADC circuit.

6. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The ADC circuit includes an ADC chip U1, a capacitor C1, a capacitor C3, a capacitor C4, a capacitor C82, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and a resistor R125; Pin 1 of the ADC chip U1 is connected to capacitor C1 and a power reference circuit, pin 2 is connected to capacitor C82, pin 3 is connected to capacitor C82 and grounded, pins 4 and 5 are connected to an ADC drive circuit, pin 8 is connected to capacitor C3, and pin 9 is connected to capacitor C4; One end of the resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6 and resistor R125 are respectively connected to pins 16, 15, 14, 13, 12, 10 and 7 of the ADC chip U1, and the other end is connected to the MCU.

7. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The PWM isolation driving circuit includes an optocoupler U24, an optocoupler U26, a resistor R132, a resistor R133, a resistor R134, a resistor R135, a resistor R137, a resistor R138, a resistor R155 and a resistor R156; Pin 1 of the optical coupler U24 is connected to resistors R132 and R134, pin 3 is connected to resistor R134 and MCU, pin 5 is connected to resistor R133 and R155, and pin 6 is connected to resistor R155; the resistor R133 is connected to the modulation and demodulation circuit; Pin 1 of the optocoupler U26 is connected to resistor R135 and resistor R138, pin 3 is connected to resistor R138 and MCU, pin 5 is connected to resistor R137 and resistor R156, and pin 6 is connected to resistor R156; the resistor R137 is connected to the modulation and demodulation circuit.

8. A DC signal sampling circuit based on high frequency modulation as claimed in claim 1, Features: The power reference circuit includes a voltage reference chip U2, an operational amplifier U4A, an operational amplifier U4B, a capacitor C6, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a resistor R21, a resistor R22, a resistor R25, a resistor R26, a resistor R27 and a resistor R28; Pin 4 of the voltage reference chip U2 is connected to one end of the capacitor C12, pin 5 is connected to the other end of the capacitor C12, and pin 6 is connected to the capacitor C10, the capacitor C11, the resistor R7, the resistor R9, and the resistor R25; one end of the capacitor C14 is connected to the resistor R9, and the other end is connected to the capacitor C10 and the capacitor C11; After the resistor R26 is connected in parallel with the capacitor C15, one end is connected to the resistor R25 and the pin 3 of the operational amplifier U4A, and the other end is grounded; the pin 1 of the operational amplifier U4A is connected to the resistor R27, the resistor R28 and the ADC drive circuit, and the pin 2 is connected to the resistor R27; After the resistor R10 is connected in parallel with the capacitor C9, one end is connected to the resistor R7 and the pin 5 of the operational amplifier U4B, and the other end is grounded; the pin 6 of the operational amplifier U4B is connected to the capacitor C13, the resistor R21 and the resistor R22, and the pin 7 is connected to the resistor R8 and the capacitor C13; one end of the capacitor C6 is connected to the resistor R8, the resistor R22 and the ADC circuit, and the other end is grounded.

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