Programmable voltage drive circuit

Abstract

The present application relates to a programmable voltage driving circuit, including a control output of a field programmable gate array connected to a control input of a digital-to-analog conversion module, a power supply of the digital-to-analog conversion module connected to an output of an onboard power manager, a conversion voltage output of the digital-to-analog conversion module connected to an inverting input of a subtractor, a reference voltage output of the digital-to-analog conversion module connected to a non-inverting input of a subtractor, and an output of the subtractor connected to a non-inverting input of a driving buffer. The inverting input of the driving buffer is grounded, and the output of the driving buffer is used to output a driving voltage to an electrochromic device. The onboard power manager is used to output positive and negative DC voltages, the field programmable gate array is used to precisely program and control the output voltage of the digital-to-analog conversion module, and the driving buffer is used to isolate the influence of the previous and next stages. The electrochromic device meets the high-precision driving requirements of positive and negative voltages for the oxidation and reduction processes.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic circuits and relates to a programmable voltage driving circuit. Background Art

[0002] In the field of camouflage technology, the research on electrochromic devices has become an important development direction. Organic electrochromic materials based on polyaniline have become a research hotspot for visible light-infrared compatible camouflage materials due to their wide color change range (visible light-near and mid-infrared), good flexibility, rapid response, easy processing and ability to be composited with a variety of materials. Through experiments, it can be seen that when the bias voltage is -0.25V, the color of the polyaniline film is yellow, and when the bias voltage of 0.5V is applied, the film is green, and the polyaniline film exhibits two pairs of reversible redox peaks under a bias voltage of -0.3V to 1.2V, indicating that the material gradually transitions from a reduced state to an oxidized state. The applied voltage has a decisive effect on the color of the polyaniline film. In order to achieve a good camouflage effect, the color change of the polyaniline film must be accurately grasped to achieve camouflage transformations that adapt to various scenes. However, in the process of realizing the present invention, the inventor found that the traditional driving circuit can only realize the oxidation process under positive voltage, and cannot realize the dynamic change of color. Summary of the invention

[0003] In view of the problems existing in the above-mentioned traditional methods, the present invention proposes a programmable voltage driving circuit, which can meet the requirements of positive and negative voltages required for the oxidation and reduction processes of polyaniline-based electrochromic devices and realize high-precision programmable design of driving voltage.

[0004] In order to achieve the above objectives, the embodiments of the present invention adopt the following technical solutions:

[0005] In one aspect, a programmable voltage driving circuit is provided, comprising a field programmable gate array, a digital-to-analog conversion module, a subtractor, a driving buffer, and an onboard power manager;

[0006] The control output of the field programmable gate array is connected to the control input of the digital-to-analog conversion module, the power supply of the digital-to-analog conversion module is connected to the output of the onboard power manager, the conversion voltage output of the digital-to-analog conversion module is connected to the inverting input of the subtractor, the reference voltage output of the digital-to-analog conversion module is connected to the non-inverting input of the subtractor, the output of the subtractor is connected to the non-inverting input of the driving buffer, the inverting input of the driving buffer is grounded, and the output of the driving buffer is used to output a driving voltage to the electrochromic device;

[0007] The onboard power manager is used to output positive DC voltage and negative DC voltage, the field programmable gate array is used to accurately program and control the output voltage of the digital-to-analog conversion module, and the driver buffer is used to isolate the influence of the previous and next stages.

[0008] In one embodiment, the onboard power manager includes a positive voltage output unit and a negative voltage output unit, the output end of the positive voltage output unit is respectively connected to the voltage input end of the negative voltage output unit and the power supply end of the digital-to-analog conversion module, and the output end of the negative voltage output unit is connected to the power supply end of the digital-to-analog conversion module;

[0009] The positive voltage output unit is used to output a positive DC voltage of +5V, and the negative voltage output unit is used to output a negative DC voltage of -5V.

[0010] In one embodiment, the positive voltage output unit is a TYPE-C interface circuit, and the negative voltage output unit is a DC-DC power supply.

[0011] In one embodiment, the digital-to-analog conversion module includes a digital-to-analog converter and a linear regulator, the power supply end of the digital-to-analog converter is connected to the output end of the onboard power manager through the linear regulator, the data input interface, clock interface and chip select signal interface of the digital-to-analog converter are respectively connected to the corresponding control output ends of the field programmable gate array, the conversion voltage output end of the digital-to-analog converter is connected to the inverting input end of the subtractor, and the reference voltage output end of the digital-to-analog converter is connected to the non-inverting input end of the subtractor.

[0012] In one embodiment, the subtractor includes an operational amplifier U3A, a resistor R12, a resistor R13 and a resistor R14, the inverting input terminal of the operational amplifier U3A is connected to the conversion voltage output terminal of the digital-to-analog converter through the resistor R12, the inverting input terminal of the operational amplifier U3A is connected to the reference voltage output terminal of the digital-to-analog converter through the resistor R13, and the output terminal of the operational amplifier U3A is connected to the non-inverting input terminal of the driving buffer through the resistor R14.

[0013] In one embodiment, the driving buffer includes an operational amplifier U3B and a resistor R8, wherein the non-inverting input terminal of the operational amplifier U3B is connected to one end of the resistor R14, and the inverting input terminal of the operational amplifier U3B is grounded through the resistor R8.

[0014] In one embodiment, the field programmable gate array performs control of serial data writing via a state machine.

[0015] In one embodiment, the DC-DC power supply is a LM27761 chip.

[0016] In one embodiment, the digital-to-analog converter is an AD5676R chip.

[0017] In one embodiment, the operational amplifier U3A is an OPA2677 chip.

[0018] One of the above technical solutions has the following advantages and beneficial effects:

[0019] The above-mentioned programmable voltage driving circuit, by adopting the circuit structure of field programmable gate array, digital-to-analog conversion module, subtractor, driving buffer and onboard power manager, constructs the required high-precision programmable voltage driving circuit. The onboard power manager can provide positive DC voltage and negative DC voltage output to the digital-to-analog conversion module, and the field programmable gate array can provide a programmable voltage control method to achieve high-precision programmable control of the output voltage of the digital-to-analog conversion module, thereby achieving the generation and output of positive and negative programmable driving voltages. Finally, the subtractor provides the high output current and low distortion control required for the normal operation of the circuit, and the driving buffer is used to isolate the influence of the front and rear stages, so as to finally provide a high-precision programmable stable driving voltage to the external electrochromic device. In this way, the requirements of the electrochromic device based on polyaniline for the positive and negative voltages required for the oxidation and reduction processes are met, and the design of high-precision programmable driving voltage is realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 is a block diagram of an architecture of a programmable voltage driving circuit in one embodiment;

[0022] Figure 2 is a block diagram of a programmable voltage driving circuit in another embodiment;

[0023] Figure 3 A schematic diagram of the structure of a TYPE-C interface circuit and its peripheral circuits in one embodiment;

[0024] Figure 4 A schematic diagram of the structure of a DC-DC power supply and its peripheral circuits in one embodiment;

[0025] Figure 5 Schematic diagram of the circuit structure of a digital-to-analog conversion module in one embodiment;

[0026] Figure 6 is a schematic diagram of a circuit structure of a subtractor in one embodiment;

[0027] Figure 7 is a schematic diagram of a circuit structure of a driving buffer in one embodiment;

[0028] Figure 8 A timing diagram of a field programmable gate array FPGA in one embodiment;

[0029] Fig. 9 FIG. 1 is a schematic diagram of a state machine of a field programmable gate array FPGA in one embodiment. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present application. The terms used herein in the specification of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0031] It should be noted that the reference to "embodiment" herein means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present invention. The presentation of the phrase at various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments.

[0032] Those skilled in the art will appreciate that the embodiments described herein may be combined with other embodiments. The term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the items listed in association and all possible combinations, and includes these combinations. It should be noted that when an element is considered to be "connected" to another element, it may be directly connected to another element and combined with it as a whole, or there may be a centering element at the same time. The terms "one end", "the other end" and similar expressions used herein are for illustrative purposes only.

[0033] Experiments show that the accuracy of the applied voltage needs to reach the millivolt level. If high-precision hardware products are used, higher costs will be incurred. If low-precision hardware products are selected to reduce costs, the color change control accuracy requirements of polyaniline cannot be met. Therefore, it is necessary to select a DAC with certain accuracy and low cost, and realize the control of polyaniline-based electrochromic devices through a combination of logic and drive.

[0034] The following will describe the implementation of the present invention in detail with reference to the accompanying drawings in the embodiment diagram of the present invention.

[0035] In one embodiment, Figure 1As shown, the embodiment of the present application provides a programmable voltage driving circuit, including a field programmable gate array 11, a digital-to-analog conversion module 12, a subtractor 13, a driving buffer 14 and an onboard power manager 15. The control output end of the field programmable gate array 11 is connected to the control input end of the digital-to-analog conversion module 12. The power supply end of the digital-to-analog conversion module 12 is connected to the output end of the onboard power manager 15. The conversion voltage output end of the digital-to-analog conversion module 12 is connected to the inverting input end of the subtractor 13. The reference voltage output end of the digital-to-analog conversion module 12 is connected to the non-inverting input end of the subtractor 13. The output end of the subtractor 13 is connected to the non-inverting input end of the driving buffer 14. The inverting input end of the driving buffer 14 is grounded. The output end of the driving buffer 14 is used to output a driving voltage to the electrochromic device. The onboard power manager 15 is used to output a positive DC voltage and a negative DC voltage. The field programmable gate array 11 is used to perform precise programming control on the output voltage of the digital-to-analog conversion module 12. The driving buffer 14 is used to isolate the influence of the previous and next stages.

[0036] The above-mentioned programmable voltage driving circuit, by adopting the circuit structure of field programmable gate array 11, digital-to-analog conversion module 12, subtractor 13, driving buffer 14 and onboard power manager 15, constructs the required high-precision programmable voltage driving circuit. The onboard power manager 15 can provide positive DC voltage and negative DC voltage output to the digital-to-analog conversion module 12, and the field programmable gate array 11 can provide a programmable voltage control method to achieve high-precision programmable control of the output voltage of the digital-to-analog conversion module 12, thereby achieving the generation and output of positive and negative programmable driving voltages. Finally, the subtractor 13 provides the high output current and low distortion control required for the normal operation of the circuit, and the driving buffer 14 is used to isolate the influence of the front and rear stages, so as to finally provide a high-precision programmable stable driving voltage to the external electrochromic device. In this way, the requirements of the electrochromic device based on polyaniline for the positive and negative voltages required for the oxidation and reduction processes are met, and the design of high-precision programmable driving voltage is realized.

[0037] It should be noted that the above-mentioned field programmable gate array 11, digital-to-analog conversion module 12, subtractor 13, drive buffer 14 and on-board power manager 15 and other modules can respectively adopt the corresponding chip modules / circuits available on the market. The specific type can be determined according to the driving voltage requirements of the polyaniline-based electrochromic device to be driven, as long as the chip modules / circuits can be connected and powered on according to the circuit structure design of the above-mentioned programmable voltage driving circuit of this application to generate the required driving voltage output.

[0038] In one embodiment, Figure 2As shown, the onboard power manager 15 includes a positive voltage output unit 151 and a negative voltage output unit 152. The output end of the positive voltage output unit is respectively connected to the voltage input end of the negative voltage output unit and the power supply end of the digital-to-analog conversion module 12. The output end of the negative voltage output unit is connected to the power supply end of the digital-to-analog conversion module 12. The positive voltage output unit is used to output a positive DC voltage of +5V, and the negative voltage output unit is used to output a negative DC voltage of -5V.

[0039] It can be understood that the onboard power manager 15 is mainly used to output the +5V DC voltage and -5V DC voltage required by the circuit of the digital-to-analog conversion module 12. Therefore, the onboard power manager 15 can use a positive voltage output unit and a negative voltage output unit to generate the above two DC voltage outputs respectively. The positive voltage output unit can be implemented by various types of DC voltage converters currently available in the art, as long as it can be used to convert the voltage of the external input power supply into a +5V DC voltage output, and the negative voltage output unit can be implemented by various types of DC-DC converters currently available in the art, as long as it can be used to convert the +5V DC voltage into a -5V DC voltage output. By designing a dual voltage output unit to generate a +5V DC voltage and a -5V DC voltage output respectively, the circuit structure is simple, the reliability is high, and the cost is low.

[0040] In one embodiment, further, Figure 3 As shown, the positive voltage output unit is a TYPE-C interface circuit, and the negative voltage output unit is a DC-DC power supply.

[0041] It can be understood that in this embodiment, the existing TYPE-C interface circuit (recorded as USB1) and DC-DC power supply (recorded as U1) on the market are used to directly realize the above-mentioned +5V DC voltage and -5V DC voltage output functions. It should be noted that those skilled in the art can understand that the aforementioned TYPE-C interface circuit and DC-DC power supply, in addition to the chip circuit itself, also include the corresponding peripheral circuits inherent in the chip circuit to ensure the normal realization of the circuit function itself. For example, the TYPE-C interface circuit USB1 can be implemented by a TYPE-C-31-M-16 interface circuit, whose pin B9 corresponds to the power supply pin VBUS, and VBUS directly obtains a +5V DC voltage VCC-5V after passing through the fuse F1 and filtering. Among them, C1, C2 and C3 are capacitor devices in the peripheral circuit, R4 and R5 are resistors in the peripheral circuit, pins B12, A5, B5, A9, A12 and pins 1-4, etc., their specific functions can be understood by referring to the specific structure and description of the TYPE-C-31-M-16 interface circuit, and will not be described in detail in this manual.

[0042] Furthermore, the DC-DC power supply is a LM27761 chip. Figure 4As shown, optionally, the DC-DC power supply U1 can adopt the existing LM27761 chip, whose pin 1 corresponds to the VIN terminal, connected to the +5V DC voltage through the fuse F2; pin 4 corresponds to the VOUT terminal, connected to the ground through the fuse F3 and the filter. Pin 6 corresponds to the EN (enable) terminal, outputting a -5V DC voltage. The +5V DC voltage is connected to the light-emitting diode LED1 through the resistor R2 and then to the ground, which can be used as a power prompt signal light. Among them, C4, C6-C11 and C13-C18 are capacitor components in the peripheral circuit, R1, R2, R5, R6 and R10 are resistors in the peripheral circuit, and pins 1-9, whose specific functions can be understood by referring to the specific structure and description of the LM27761 chip and its peripheral circuit, and will not be described in detail in this manual. The cost of generating negative voltage can be effectively reduced.

[0043] In one embodiment, Figure 5 As shown, the digital-to-analog conversion module 12 includes a digital-to-analog converter and a linear regulator. The power supply end of the digital-to-analog converter is connected to the output end of the onboard power manager 15 through the linear regulator. The data input interface, clock interface and chip select signal interface of the digital-to-analog converter are respectively connected to the corresponding control output ends of the field programmable gate array 11. The conversion voltage output end of the digital-to-analog converter is connected to the inverting input end of the subtractor 13, and the reference voltage output end of the digital-to-analog converter is connected to the non-inverting input end of the subtractor 13.

[0044] It can be understood that the digital-to-analog conversion module 12 is mainly composed of a digital-to-analog converter (recorded as U2) and its peripheral circuits, and a linear regulator U3 and its peripheral circuits. The connection relationship between these circuits can be understood by referring to the circuit structure of the circuit itself of the existing converter and linear regulator, and will not be described in detail in this specification. The above-mentioned digital-to-analog converter and linear regulator can support voltage conversion output under programmable control at a lower cost and higher reliability.

[0045] Furthermore, the digital-to-analog converter U2 is an AD5676R chip, such as Figure 5 As shown, pins 4, 5, 6, 7, 14 and 17 of U2 correspond to VLOGIC, The specific meaning and function of each terminal can be understood by referring to the instruction manual of the chip. The SCLK terminal and the SDI terminal are connected to the VLOGIC terminal through resistor R24 ​​and resistor R25 respectively.

[0046] Furthermore, the SCLK and SDI terminals of the digital-to-analog converter U2 are connected to the RSTSEL and RESET terminals via resistors R19 and R20, respectively, and then connected to ground via resistors R22 and R23, respectively. Pins 15 and 18 correspond to the LDAC and VREF terminals, respectively, and are connected to ground via resistors R26 and capacitors C24 in parallel. Pin 20 corresponds to VOUT. Since the chip has 8 output channels, pins 1, 2, 9, 10, 11, 12, 19, and 20 can all be used as VOUT terminals. The SCLK and SDI terminals are connected to the corresponding control output pins of the field programmable gate array FPGA respectively. The control signals of these pins 5, 6 and 7 are generated by the field programmable gate array FPGA, thereby accurately controlling the voltage value output by the digital-to-analog converter U2. Pin 3 corresponds to the VDD terminal, which is powered by the linear regulator U3. The linear regulator U3 can use the H7211-33M5R regulator. The +5V DC voltage is connected to the linear voltage regulator circuit through the fuse F4, and the +5V DC voltage is stepped down to +3.3V DC voltage to supply the VDD terminal of the digital-to-analog converter U2. By using the above devices to specifically implement the required voltage conversion output function under programmable control, the cost is low and the reliability is high.

[0047] In one embodiment, Figure 6 As shown, the subtractor 13 includes an operational amplifier U3A, a resistor R12, a resistor R13 and a resistor R14. The inverting input terminal of the operational amplifier U3A is connected to the conversion voltage output terminal of the digital-to-analog converter through the resistor R12. The inverting input terminal of the operational amplifier U3A is connected to the reference voltage output terminal of the digital-to-analog converter through the resistor R13. The output terminal of the operational amplifier U3A is connected to the non-inverting input terminal of the driving buffer 14 through the resistor R14.

[0048] It can be understood that the subtractor 13 can specifically include an operational amplifier U3A and its peripheral circuits. Further, the operational amplifier U3A is an OPA2677 chip, and its pins 5 and 6 correspond to the in-phase input terminal and the inverting input terminal respectively. The VOUT terminal of the digital-to-analog converter U2 is connected to the inverting input terminal of the operational amplifier U3A through a resistor R12, and the reference voltage VREF terminal is connected to the in-phase input terminal of the operational amplifier U3A through a resistor R13, and then grounded through a resistor R16. The remaining components such as resistor R11, capacitor C12, resistor R15 and resistor R17 are reserved components that can be used to expand different functions, and welding is not required here. Pin 7 corresponds to the output terminal of the operational amplifier U3A, which is connected to the in-phase input terminal of the buffer driver through a resistor R14. Through the above-mentioned operational amplifier U3A and its peripheral circuits, the required high output current and low distortion functions can be efficiently provided.

[0049] In one embodiment, Figure 7As shown, the driving buffer 14 includes an operational amplifier U3B and a resistor R8, the non-inverting input terminal of the operational amplifier U3B is connected to one end of the resistor R14, and the inverting input terminal of the operational amplifier U3B is grounded through the resistor R8.

[0050] It can be understood that the buffer driver module can specifically include an operational amplifier U3B and its peripheral circuits. The operational amplifier U3B in this embodiment can use an OPA2677 chip circuit, and its pins 3 and 2 correspond to the in-phase input terminal and the inverting input terminal, respectively. The inverting input terminal of the operational amplifier U3B is grounded via a resistor R8. Pin 1 corresponds to POUT, which is used to output the driving voltage required by the electrochromic device. By using the above-mentioned operational amplifier U3B and its peripheral circuits, the influence between the front and rear stages is efficiently isolated, and the driving ability of the electrochromic device is enhanced.

[0051] In one embodiment, the field programmable gate array 11 performs control of serial data writing through a state machine.

[0052] Specifically, the digital-to-analog converter U2 The timing diagram corresponding to the SCLK terminal and the SDI terminal is as follows Figure 8 The serial clock is 50MHz, and the SYNC signal is a low-level active control input, which is the frame synchronization signal of the input data. When SYNC becomes low, the data is read in on the falling edge of the subsequent 24 clocks.

[0053] SDI is the serial data input. The data is read into the register at the falling edge of the serial clock input. There are 24 bits in total. The first to fourth bits are the control mode. Select the command 0010 to realize the function of writing to the input register. The data is written when the power is turned on. The fifth to eighth bits are the control channel, that is, the selected DAC. Select the address bit 0000, which means that channel 0 is selected to input data. Similarly, 0111 represents channel 8. The last sixteen bits are control data. The SPI (serial peripheral interface) signal is sent according to the timing to control the output voltage. When the 16-bit wide data is all 0, it means that the output voltage is 0. When the 16-bit wide data is all 1, it means that the output voltage is full-scale voltage. These 24 bits of data can be adjusted according to actual needs.

[0054] In the field programmable gate array 11, the serial data writing module function can be implemented by a state machine. The state transition diagram of the state machine is shown in FIG. Fig. 9 As shown. The execution operations of the three instructions are performed through the operation of the state machine. The meaning of each state can be as follows:

[0055] IDLE: idle state;

[0056] LOAD: start writing data;

[0057] FINISH: completes a cycle and writes data;

[0058] SHIFT: write data state.

[0059] The specific operation process of the state machine is as follows: At the falling edge of SCLK, the following operations are performed: If the current state is IDLE, no processing is performed, the data bit is kept unloaded, and the next state is determined to be IDLE or LOAD according to the start instruction. If the current state jumps to LOAD, it jumps to SHIFT and writes the data in the shift register. After writing 24 bits of data, it jumps to FINISH.

[0060] In summary, in the design of the above-mentioned programmable voltage driving circuit, the output driving voltage can be programmed and controlled through programming of the field programmable gate array 11 (FPGA); the onboard power manager 15 can output positive voltage and negative voltage to realize the dynamic change of the two processes of oxidation and reduction of the polyaniline-based electrochromic device; the LDO (low-dropout linear regulator) connected to the power supply of the digital-to-analog conversion module 12 can reduce the ±5V voltage output by the onboard power manager 15 to ±3.3V voltage to drive the chip, which can achieve a high relative accuracy of ±3LSB (least significant bit); the subtractor 13 and the driving buffer 14 as the intermediate stage can isolate the influence between the previous and next stages and enhance their driving capabilities.

[0061] Compared with traditional technologies, the present invention designs a high-precision programmable voltage driving circuit that can be used for polyaniline-based electrochromic devices, which can realize voltage control of dynamic color changes of polyaniline films and meet the requirements of polyaniline films for voltage accuracy through low hardware cost and field programmable gate array FPGA driving design.

[0062] The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification. The above embodiments only express several implementation methods of the present application, and their descriptions are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, without departing from the concept of the present application, several variations and improvements can be made, all of which belong to the protection scope of the present application. Therefore, the protection scope of the patent of this application shall be based on the attached claims.

Claims

1. A programmable voltage driving circuit, characterized in that: Includes field programmable gate array, digital-to-analog conversion module, subtractor, driver buffer and on-board power manager; The digital-to-analog conversion module includes a digital-to-analog converter and a linear regulator, the subtractor includes an operational amplifier U3A, a resistor R12, a resistor R13 and a resistor R14, the driving buffer includes an operational amplifier U3B and a resistor R8, the power supply end of the digital-to-analog converter is connected to the output end of the onboard power manager through the linear regulator, the data input interface, the clock interface and the chip select signal interface of the digital-to-analog converter are respectively connected to the corresponding control output ends of the field programmable gate array, the inverting input end of the operational amplifier U3A is connected to the conversion voltage output end of the digital-to-analog converter through the resistor R12, the non-inverting input end of the operational amplifier U3A is connected to the reference voltage output end of the digital-to-analog converter through the resistor R13, the output end of the operational amplifier U3A is connected to the non-inverting input end of the operational amplifier U3B through the resistor R14, the inverting input end of the operational amplifier U3B is grounded through the resistor R8, and the output end of the operational amplifier U3B is used to output a driving voltage to the electrochromic device; The onboard power manager is used to output positive DC voltage and negative DC voltage, the field programmable gate array is used to perform precise programming control on the output voltage of the digital-to-analog conversion module, and the driving buffer is used to isolate the influence of the previous and next stages.

2. The programmable voltage driving circuit according to claim 1, characterized in that: The onboard power manager comprises a positive voltage output unit and a negative voltage output unit, the output end of the positive voltage output unit is respectively connected to the voltage input end of the negative voltage output unit and the power supply end of the digital-to-analog conversion module, and the output end of the negative voltage output unit is connected to the power supply end of the digital-to-analog conversion module; The positive voltage output unit is used to output the positive DC voltage of +5V, and the negative voltage output unit is used to output the negative DC voltage of -5V.

3. The programmable voltage driving circuit according to claim 2, characterized in that: The positive voltage output unit is a TYPE-C interface circuit, and the negative voltage output unit is a DC-DC power supply.

4. The programmable voltage driving circuit according to claim 1, characterized in that: The field programmable gate array performs control of serial data writing through a state machine.

5. The programmable voltage driving circuit according to claim 3, characterized in that: The DC-DC power supply is a LM27761 chip.

6. The programmable voltage driving circuit according to claim 1, characterized in that: The digital-to-analog converter is an AD5676R chip.

7. The programmable voltage driving circuit according to claim 1, characterized in that: The operational amplifier U3A is an OPA2677 chip.

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