Differential memory cell, multi-resistance state memory cell, and magnetic memory

Abstract

The application provides a differential storage unit and a multi-resistance state storage unit, both of which comprise a spin-orbit torque generating layer and two magnetic tunnel junctions, the two magnetic tunnel junctions are arranged in parallel at a certain interval on the same side surface of the spin-orbit torque generating layer, the cross-sectional shape of the two magnetic tunnel junctions is both an arcuate shape, and the direction of the chord of the arcuate shape is kept parallel, wherein each magnetic tunnel junction comprises a free layer, a barrier layer and a reference layer, the free layer is close to the spin-orbit torque generating layer, and the free layer and the reference layer are both vertically magnetized. By changing the direction of the write current in the spin-orbit torque generating layer, differential storage and multi-resistance state storage can be realized respectively.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of magnetic memory, in particular to a differential storage unit, a multi-resistance state storage unit and a magnetic memory. BACKGROUND

[0002] Spin-orbit torque magnetic memory (SOT-MRAM) is one of the most promising memory devices in the future because it is non-volatile, fast in erasing and writing, and low in power consumption.

[0003] The SOT-MRAM storage unit is composed of a magnetic tunnel junction (MTJ) and a spin-orbit torque generation layer. The MTJ includes a free layer, a barrier layer, and a reference layer. The reference layer has a fixed magnetization direction, and the free layer has a variable magnetization direction. When the free layer and the reference layer are parallel, the MTJ exhibits a low resistance state; when the free layer and the reference layer are anti-parallel, the MTJ exhibits a high resistance state. The spin-orbit torque generation layer generally uses heavy metals. When an electric current flows through the heavy metals, the SOT (spin-orbit torque) effect causes the free layer magnetic moment to deflect, and through the assistance of an external magnetic field, the deterministic flipping of the free layer magnetic moment can be achieved.

[0004] In order to improve the reliability of data and realize more scene applications, the SOT-MRAM storage unit can be designed in a differential form or a multi-resistance state form. Therefore, how to improve the structure of the differential storage unit and the multi-resistance state storage unit has become a problem of concern in the industry. SUMMARY

[0005] Therefore, the present application provides a differential storage unit and a multi-resistance state storage unit, which utilize the asymmetric shape anisotropy of a magnetic tunnel junction to realize differential storage and multi-resistance state storage of data.

[0006] In one aspect, the present application provides a differential storage unit based on spin-orbit torque, comprising:

[0007] a spin-orbit torque generation layer;

[0008] two magnetic tunnel junctions arranged side by side on the same side surface of the spin-orbit torque generation layer with a certain interval, the cross-sectional shape of each of the two magnetic tunnel junctions is an arcuate bow shape, and the direction of the chord of the arcuate bow shape is parallel, wherein each magnetic tunnel junction includes a free layer, a barrier layer, and a reference layer, the free layer is close to the spin-orbit torque generation layer, and the free layer and the reference layer are both perpendicular magnetization;

[0009] a first terminal and a second terminal leading out from the spin-orbit torque generation layer for forming a first write current in the spin-orbit torque generation layer, the direction of the first write current is parallel to the direction of the chord of the arcuate bow shape of the two magnetic tunnel junctions.

[0010] Optionally, a transistor is further included, the first terminal is connected with a write bit line, the second terminal is connected with a drain of the transistor, a source of the transistor is connected with a source line, and a gate of the transistor is connected with a word line.

[0011] Optionally, a third terminal and a fourth terminal are further included, which are respectively led out from top ends of the two magnetic tunnel junctions and are respectively connected with a read bit line.

[0012] Optionally, the two magnetic tunnel junctions are horizontally arranged and keep the arcs of the arc of circle opposite, or the two magnetic tunnel junctions are horizontally arranged and keep the chords of the arc of circle opposite.

[0013] Optionally, the two magnetic tunnel junctions are vertically arranged and keep the chords of the arc of circle facing different directions.

[0014] In another aspect, the application provides a spin-orbit torque based multi-resistance state memory cell, comprising:

[0015] a spin-orbit torque generation layer;

[0016] two magnetic tunnel junctions, which are arranged side by side on the same side surface of the spin-orbit torque generation layer with a certain interval, the cross-sectional shape of each of the two magnetic tunnel junctions is an arc of circle, and the directions of the chords of the arcs of circle are kept parallel, wherein each of the two magnetic tunnel junctions comprises a free layer, a barrier layer and a reference layer, the free layer is close to the spin-orbit torque generation layer, and the free layer and the reference layer are both perpendicular magnetization;

[0017] a fifth terminal and a sixth terminal, which are led out from the spin-orbit torque generation layer, for forming a second write current in the spin-orbit torque generation layer, the direction of the second write current is perpendicular to the directions of the chords of the arcs of circle of the two magnetic tunnel junctions.

[0018] Optionally, a switch and a write control transistor are further included, the fifth terminal is connected with a write bit line through the switch, the sixth terminal is connected with a drain of the write control transistor, a source of the write control transistor is connected with a source line, and a gate of the write control transistor is connected with a write word line.

[0019] Optionally, a seventh terminal, an eighth terminal and a read control transistor are further included, which are respectively led out from top ends of the two magnetic tunnel junctions, wherein the seventh terminal is connected with a read bit line, the eighth terminal is connected with a drain of the read control transistor, a source of the read control transistor is connected with a source line, and a gate of the read control transistor is connected with a read word line.

[0020] Optionally, the two magnetic tunnel junctions are horizontally arranged and keep the arcs of the arc of circle opposite, or the two magnetic tunnel junctions are horizontally arranged and keep the chords of the arc of circle opposite.

[0021] Optionally, the two magnetic tunnel junctions are arranged vertically, with the chords of the superior arc facing in different directions.

[0022] On the other hand, the present invention provides a magnetic memory comprising the aforementioned differential storage unit based on spin orbital moments.

[0023] On the other hand, the present invention provides a magnetic memory comprising the above-described multi-resistivity memory cell based on spin orbital moments.

[0024] The differential storage cell, multi-resistivity storage cell, and magnetic memory provided by this invention utilize the asymmetric anisotropy of the magnetic tunnel junction. By applying currents in different directions through two magnetic tunnel junctions with different arrangements, differential data storage or multi-resistivity storage can be achieved. Furthermore, it eliminates the need for an external magnetic field to assist magnetic moment reversal and requires no additional bias layer, simplifying the array layout and improving integration. Attached Figure Description

[0025] Figure 1 This is a perspective view of a differential storage cell based on spin orbit moment according to an embodiment of the present invention;

[0026] Figure 2 for Figure 1 A top view of the differential storage unit shown;

[0027] Figure 3 for Figure 1 A side view of the differential storage unit shown;

[0028] Figure 4 for Figure 1 The diagram shows the read / write circuit of the differential memory unit.

[0029] Figure 5 for Figure 1 The differential memory cell MTJ shown A and MTJ B Schematic diagrams showing the changes in the magnetic moment of the free layer under current driving in the y-direction;

[0030] Figure 6 for Figure 1 The differential memory cell shown in the figure changes its current density every 4 ns. MTJ A and MTJ B Schematic diagram of the change in total magnetic moment in the free layer;

[0031] Figure 7 This is a top view of a differential storage cell based on spin orbit moment according to an embodiment of the present invention;

[0032] Figure 8A top view of a spin-orbit torque based differential memory cell according to an embodiment of the present invention;

[0033] Figure 9 A top view of a spin-orbit torque based differential memory cell according to an embodiment of the present invention;

[0034] Figure 10 A perspective view of a spin-orbit torque based multi-resistance state memory cell according to an embodiment of the present invention;

[0035] Figure 11 A top view of a multi-resistance state memory cell according to an embodiment of the present invention; Figure 10 A top view of a multi-resistance state memory cell according to an embodiment of the present invention;

[0036] Figure 12 A side view of a multi-resistance state memory cell according to an embodiment of the present invention; Figure 10 A side view of a multi-resistance state memory cell according to an embodiment of the present invention;

[0037] Figure 13 A read / write circuit schematic of a multi-resistance state memory cell according to an embodiment of the present invention; Figure 10 A read / write circuit schematic of a multi-resistance state memory cell according to an embodiment of the present invention;

[0038] Figure 14 A top view of a multi-resistance state memory cell MTJ Figure 10 MTJ C and MTJ D Free layer magnetic moment variation schematic under x-direction current drive, respectively;

[0039] Figure 15 A schematic of total free layer magnetic moment variation of a multi-resistance state memory cell when current density varies every 3 ns according to an embodiment of the present invention; Figure 10 MTJ C and MTJ D Free layer magnetic moment variation schematic under x-direction current drive, respectively;

[0040] Figure 16 A top view of a spin-orbit torque based multi-resistance state memory cell according to an embodiment of the present invention;

[0041] Figure 17 A top view of a spin-orbit torque based multi-resistance state memory cell according to an embodiment of the present invention;

[0042] Figure 18 A top view of a spin-orbit torque based multi-resistance state memory cell according to an embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work belong to the scope of protection of the present application.

[0044] It should be noted that the terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device comprising a series of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0045] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0046] In addition, in addition to indicating the orientation or positional relationship, the above-mentioned part of the terms can also be used to indicate other meanings, for example, the term "upper" can also be used to indicate a certain dependent relationship or connection relationship in some cases. For a person of ordinary skill in the art, the specific meaning of these terms in the present application can be understood according to the specific circumstances.

[0047] In addition, the terms "mount", "set", "provided with", "connected", "connected", "sleeved" should be broadly understood. For example, it can be fixedly connected, detachably connected, or integrally constructed; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium, or internal communication between two devices, elements or components. For a person of ordinary skill in the art, the specific meaning of the above-mentioned terms in the present application can be understood according to the specific circumstances.

[0048] Some embodiments of the present application will be described in detail with reference to the drawings. The following embodiments and features of the embodiments described below can be combined with each other in the case of no conflict.

[0049] Figure 1 is a perspective view of a spin-orbit torque based differential memory cell provided by an embodiment of the present application. In addition, Figure 2 and Figure 3 are a top view and a side view of the differential memory cell, respectively.

[0050] Referring to Figures 1 to 3 , the differential memory cell includes a spin-orbit torque generation layer 101 and two magnetic tunnel junctions (MTJs) 102 and 103. A and MTJ B , MTJ A and MTJ B are arranged side by side with a certain interval on the same side surface of the spin-orbit torque generation layer 101, the material of the spin-orbit torque generation layer 101 includes a topological insulator material and / or a heavy metal material, the topological insulator material is selected from any one or more of Bi x Se (1-x) , Sb x Te (1-x) , Bi x Te (1-x) , and the heavy metal material is selected from any one or more of Ta, Pt, Pd and W. The cross-sectional shape of MTJ A and MTJ B is an arc of a circle, and the direction of the chord of the arc of a circle is kept parallel, wherein each magnetic tunnel junction includes a free layer, a barrier layer and a reference layer, the free layer is close to the spin-orbit torque generation layer 101, the free layer and the reference layer are both perpendicular magnetization, and the easy magnetization axis direction is perpendicular to the surface of the spin-orbit torque generation layer 101. The material of the free layer and the reference layer is independently selected from any one or more of Co, CoFe, CoFeB, Co / Mo / CoFeB and CoFe / Mo / CoFeB, and the material of the barrier layer includes MgO and / or MgAl2O4.

[0051] In addition, two connection terminals are drawn from the spin-orbit torque generation layer 101, denoted as a first terminal D1 and a second terminal D2, D1 and D2 are used to form a first write current in the spin-orbit torque generation layer 101, the direction of the first write current is parallel to the direction of the chord of the arc of a circle of the two magnetic tunnel junctions MTJ A and MTJ B . Figure 1 The x, y, z three directions are shown in , which are perpendicular to each other, the x direction represents the direction perpendicular to the direction of the chord of the arc of a circle, the y direction represents the direction of the chord of the arc of a circle, and the z direction represents the direction perpendicular to the xy plane.

[0052] Further, Figure 4 is based on Figure 2 one extension of the top view shown, Figure 4 The differential storage unit is added with related write circuit and read circuit. Referring to Figure 4 , as to the write circuit, the differential storage unit further comprises a transistor M1, a first terminal D1 connected with a write bit line WBL, a second terminal D2 connected with the drain of M1, the source of M1 connected with a source line SL, and the gate of M1 connected with a word line WL. As to the read circuit, a third terminal D3 is led out from the top of the magnetic tunnel junction MTJ A , and a fourth terminal D4 is led out from the top of the magnetic tunnel junction MTJ B , D3 is connected with a read bit line RBL1, D4 is connected with a read bit line RBL2, and RBL1 and RBL2 are connected to the input of a sensitive amplifier SA.

[0053] The read and write processes of the differential storage unit of the embodiment of the application will be briefly introduced as follows. Still referring to Figure 4 , during the write operation, the word line WL is powered on, the transistor M1 is turned on, the write bit line WBL is powered on, the source line SL is grounded, and the write current passes through the spin orbit momentum generation layer 101 along the y direction. During the read operation, the word line WL is powered on, the transistor M1 is turned on, the source line SL is powered on, and the sensitive amplifier SA reads data through the read bit lines RBL1 and RBL2.

[0054] Specifically, Figure 5 shows the changes of the free layer magnetic moments of the differential storage units MTJ A and MTJ B under the y direction current driving respectively. As shown in (a) of Figure 5 , the initial state of MTJ A is m z =1, a positive current J1=J0 is applied, the magnetization direction finally flips, and finally m z =-1; when a negative current J1=-J0 is applied, the magnetization direction finally does not flip, and m z =1. Due to the spin Hall effect, the y direction is powered on, which generates a spin current in the x direction, and the spin current acts on the asymmetric magnetic layer, which has different effects with and without notches. When a positive current is applied, the magnetization flips from the position with a notch at the lower left corner, and because there is a larger demagnetizing field at the position with a notch, the magnetic domain is more likely to nucleate, and thus the position with a notch is easy to flip. As shown in (b) of Figure 5 , the initial state of MTJ B is m z =1, a positive current J1=J0 is applied, the magnetization direction finally does not flip, and finally m z =1; when a negative current J1=-J0 is applied, the magnetization direction finally flips, and m z= -1. When negative current is applied, the magnetization flips from the upper right corner of the notch, and for the same reason, the notched position is easier to flip because the magnetic domain is easy to nucleate.

[0055] Figure 6 The figure shows the current density change of the differential storage unit provided by the embodiment of the application every 4ns, the MTJ A and the MTJ B free layer total magnetic moment change. Two arc-shaped MTJs, whether positive current or negative current, the MTJ A and the MTJ B magnetic moment direction is opposite, because the reference layer magnetization direction is consistent and fixed, so the resistance of the two MTJs is always high and low, complementary state, can realize differential storage.

[0056] In addition, in the above embodiment, the two magnetic tunnel junctions MTJ A and MTJ B are horizontally arranged and the arcs of the superior arc-shaped arches are opposite. In actual application, it is not limited to the above embodiment. For example, the following arrangement can also be used: as shown in Figure 7 , the two magnetic tunnel junctions are horizontally arranged and the arcs of the superior arc-shaped arches are opposite. As shown in Figure 8 and Figure 9 , the two magnetic tunnel junctions are vertically arranged and the arcs of the superior arc-shaped arches are opposite in different directions. As for the write circuit and the read circuit, reference can be made to Figure 4 , which will not be described in detail.

[0057] The differential storage unit given above is that the two magnetic tunnel junctions are aligned whether horizontally arranged or vertically arranged. In actual application, the two magnetic tunnel junctions do not have to be aligned, even if they are not aligned and have a certain offset in position, the application can still be realized. However, no matter how the arrangement changes, one thing is certain, which is to ensure that the direction of the write current flowing through the spin-orbit torque generation layer is parallel to the direction of the chord of the two magnetic tunnel junctions.

[0058] The differential storage unit based on spin-orbit torque provided by the embodiment of the application is that the cross-sectional shape of the two magnetic tunnel junctions is designed to be a superior arc-shaped arch, and the direction of the write current is parallel to the direction of the chord of the superior arc-shaped arch of the two magnetic tunnel junctions, which utilizes the asymmetric shape anisotropy of the magnetic tunnel junction to realize differential storage. Moreover, it does not need to set an external magnetic field to assist the magnetic moment flip, nor does it need to set an additional bias layer, which can simplify the array arrangement structure and improve the integration.

[0059] On the other hand, Figure 10 is a perspective view of a multi-resistance state storage unit based on spin-orbit torque provided by an embodiment of the application. In addition, Figure 11 andFigure 12 These are the top and side views of the multi-resistive memory cell, respectively.

[0060] refer to Figures 10 to 12 The multi-resistivity storage cell includes a spin-orbit moment generation layer 201 and two magnetic tunnel junctions (MTJs). C and MTJ D MTJ C and MTJ D The spin orbital moment generating layers 201 are arranged side-by-side at a certain interval on the same side surface. The material of the spin orbital moment generating layer 201 includes a topological insulating material and / or a heavy metal material. The topological insulating material is selected from Bi x Se (1-x) Sb x Te (1-x) Bi x Te (1-x) Any one or more of the following, wherein the heavy metal material is selected from any one or more of Ta, Pt, Pd, and W. MTJ C and MTJ D The cross-sectional shape of each magnetic tunnel junction is a superior arc shape, with the chords of the superior arc shape remaining parallel. Each magnetic tunnel junction includes a free layer, a barrier layer, and a reference layer. The free layer is close to the spin-orbit moment generation layer 201. Both the free layer and the reference layer are perpendicularly magnetized, and the easy magnetization axis is perpendicular to the surface of the spin-orbit moment generation layer 201. The materials of the free layer and the reference layer are independently selected from one or more of Co, CoFe, CoFeB, Co / Mo / CoFeB, and CoFe / Mo / CoFeB. The material of the barrier layer includes MgO and / or MgAl2O4.

[0061] Additionally, two connection terminals, designated as terminal D5 and terminal D6, are led out from the spin-orbit moment generation layer 201. D5 and D6 are used to generate a second write current in the spin-orbit moment generation layer 201. The direction of this second write current is aligned with the two magnetic tunnel junctions (MTJs). C and MTJ D The direction of the chord of the superior arc is perpendicular. Figure 10 The diagram shows three directions: x, y, and z, which are perpendicular to each other. The x-direction is perpendicular to the direction of the chord of the major arc, the y-direction is perpendicular to the direction of the chord of the major arc, and the z-direction is perpendicular to the xy plane.

[0062] Furthermore, Figure 13 Based on Figure 11 An extension of the top view shown. Figure 13 The system incorporates write and read circuits for multi-resistive state memory cells. (Reference) Figure 13, as to the write circuit, the multi-resistance-state storage unit further comprises a switch S and a write control transistor M2, the fifth terminal D5 is connected with the write bit line WBL through the switch S, the sixth terminal D6 is connected with the drain of the write control transistor M2, the source of the write control transistor M2 is connected with the source line SL, and the gate of the write control transistor M2 is connected with the write word line WWL. As to the read circuit, a read control transistor M3 is arranged, the seventh terminal D7 is led out from the top of the magnetic tunnel junction MTJ C , the eighth terminal D8 is led out from the top of the magnetic tunnel junction MTJ D , D7 is connected with the read bit line RBL, D8 is connected with the drain of the read control transistor M3, the source of the read control transistor M3 is connected with the source line SL, and the gate of the read control transistor M3 is connected with the read word line RWL.

[0063] The following briefly introduces the read and write process of the multi-resistance-state storage unit of the embodiment. Still referring to Figure 13 , in the write operation, the switch S is closed, the WBL is electrified, the word line WWL is electrified, the M2 is turned on, the source line is grounded, and the write current passes through the spin orbit moment generation layer 201 in the x direction. In the read operation, the switch S is opened, the word line WWL is opened, the M2 is opened, the RWL is electrified, the M3 is turned on, the current enters from the MTJ C , passes through the spin orbit moment generation layer 201, and flows out from the MTJ D . The switch S is used to prevent the current from flowing out from the S in the read data.

[0064] Specifically, Figure 14 Fig. 2 shows the variation of the free layer magnetic moment of the multi-resistance-state storage unit MTJ C and MTJ D under the current driving in the x direction. Figure 14 Fig. (a) shows the variation of the magnetic moment of the MTJ C , and Figure 14 Fig. (b) shows the variation of the magnetic moment of the MTJ D . The critical current of Fig. (a) is 1.4*10 12 A / m 2 , and the critical current of Fig. (b) is 1.6*10 12 A / m 2 . Due to the spin Hall effect, the current in the x direction will generate the spin current in the y direction. In the same current direction (all positive currents in Figure 14 , the magnetization reversal starts from the right lower corner. Because there is no notch in the right lower corner of Fig. (a) and there is a notch in the right lower corner of Fig. (b), the current needs to overcome different demagnetizing fields to realize the reversal, so the critical currents of the two are different.

[0065] Figure 15 Fig. 3 shows the variation of the current density of the multi-resistance-state storage unit every 3 ns, and the MTJ C and MTJD Free layer total magnetic moment change. By using the different critical current characteristics, MTJ C and MTJ D Initial state m z =1, when J2=1.4*10 12 A / m 2 , MTJ C flip, re-apply the same current, MTJ C flip back to the initial state. When J2=1.8*10 12 A / m 2 , MTJ C and MTJ D flip at the same time. Therefore, the multi-resistance state characteristics can be achieved, and three resistance states are shown in the figure. By changing the size of the two MTJs, more resistance states can be achieved due to the different sizes of the two MTJs.

[0066] In addition, it is pointed out that in the above embodiment, the two magnetic tunnel junctions MTJ C and MTJ D are horizontally arranged and the arcs of the superior arc arches are opposite. However, in actual applications, it is not limited to the above embodiment. For example, the following arrangement can also be used: as shown in Figure 16 , the two magnetic tunnel junctions are horizontally arranged and the chords of the superior arc arches are opposite. As shown in Figure 17 and Figure 18 , the two magnetic tunnel junctions are vertically arranged and the chords of the superior arc arches are directed in different directions. As for the write circuit and the read circuit, reference can be made to Figure 13 , and no further description is given.

[0067] The multi-resistance state storage unit given above is that the two magnetic tunnel junctions are aligned whether they are horizontally arranged or vertically arranged. However, in actual applications, the two magnetic tunnel junctions do not have to be aligned, and even if they are not aligned but have a certain offset in position, the application can still be achieved. However, no matter how the arrangement is changed, one thing is certain, which is that the direction of the write current flowing through the spin-orbit torque generation layer needs to be perpendicular to the direction of the chord of the two magnetic tunnel junctions.

[0068] The multi-resistance state storage unit based on spin-orbit torque provided by the embodiment of the application is that the cross-sectional shape of the two magnetic tunnel junctions is designed to be a superior arc arch, and the direction of the write current is perpendicular to the direction of the chord of the superior arc arch of the two magnetic tunnel junctions, the asymmetric shape anisotropy of the magnetic tunnel junction is used to achieve multi-resistance state storage. Moreover, no external magnetic field is needed to assist the magnetic moment flip, and no additional bias layer is needed, which can simplify the array arrangement structure and improve the integration.

[0069] In another aspect, embodiments of the present application also provide a magnetic memory including the above spin-orbit torque based differential memory cell.

[0070] In another aspect, embodiments of the present application also provide a magnetic memory including the above spin-orbit torque based multi-resistance state memory cell.

[0071] The above description is merely that of a specific implementation of the present application, but the scope of protection of the present application is not limited thereto. Any changes or replacements within the technical scope of the present application disclosed herein can be easily conceived by those skilled in the art, and should be encompassed within the scope of protection of the present application. Therefore, the scope of protection of the present application should be subject to the scope of protection of the claims.

Claims

1. A spin-orbit-torque-based multi-resistance state memory cell comprising: Comprising: a spin-orbit torque generating layer; two magnetic tunnel junctions, arranged side by side at a certain interval on the same side surface of the spin-orbit torque generating layer, the cross-sectional shape of each of the two magnetic tunnel junctions is an arc of an inscribed circle, and the direction of the chord of the arc of the inscribed circle is parallel, wherein each magnetic tunnel junction comprises a free layer, a barrier layer and a reference layer, the free layer is close to the spin-orbit torque generating layer, and the free layer and the reference layer are both perpendicular magnetization; a fifth terminal and a sixth terminal, leading out from the spin-orbit torque generating layer, for forming a second write current in the spin-orbit torque generating layer, the direction of the second write current is perpendicular to the direction of the chord of the arc of the inscribed circle of the two magnetic tunnel junctions.

2. The spin-orbit torque based multi-state memory cell of claim 1, wherein, Further comprising a switch and a write control transistor, the fifth terminal is connected with a write bit line through the switch, the sixth terminal is connected with the drain of the write control transistor, the source of the write control transistor is connected with a source line, and the gate of the write control transistor is connected with a write word line.

3. The spin-orbit torque based multi-state memory cell of claim 1, wherein, Further comprising: a seventh terminal, an eighth terminal and a read control transistor, leading out from the top of each of the two magnetic tunnel junctions respectively, wherein the seventh terminal is connected with a read bit line, the eighth terminal is connected with the drain of the read control transistor, the source of the read control transistor is connected with a source line, and the gate of the read control transistor is connected with a read word line.

4. The spin-orbit torque based multi-state memory cell of claim 1, wherein, The two magnetic tunnel junctions are arranged horizontally and keep the arcs of the arcs of the inscribed circle opposite, or the two magnetic tunnel junctions are arranged horizontally and keep the chords of the arcs of the inscribed circle opposite.

5. The spin-orbit torque based multi-state memory cell of claim 1, wherein, The two magnetic tunnel junctions are arranged vertically and keep the chords of the arcs of the inscribed circle pointing in different directions.

6. A magnetic memory, comprising: The magnetic memory comprises the spin-orbit torque based multi-resistance state storage unit according to any one of claims 1 to 5.

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