A double-blade type semiconductor processing apparatus and a semiconductor processing method

Abstract

This application discloses a dual-leaf semiconductor processing apparatus and a semiconductor processing method. The semiconductor processing apparatus includes a first processing structure and a second processing structure. The first processing structure includes a loading reaction chamber for placing a target substrate, a stripping reaction chamber for discharging the target substrate, and multiple degassing reaction chambers. The second processing structure includes multiple pre-cleaning reaction chambers and multiple deposition reaction chambers. A cooling chamber structure is provided with cooling water for cooling treatment. The first processing structure is connected to the cooling chamber structure via a first gate valve. The second processing structure is connected to the cooling chamber structure via a second gate valve. The first gate valve and the second gate valve are not opened simultaneously. This application improves the quality of film deposition and increases the production efficiency of semiconductor products.

Description

Technical Field

[0001] This application relates to the field of display panel driving technology, specifically to a dual-leaf semiconductor processing apparatus and a semiconductor processing method. Background Technology

[0002] In recent years, fan-out chip-level packaging (FO-WLP) and fan-out panel-level packaging (FO-PLP) have gained widespread attention in the IC packaging technology field due to their high heterogeneous integration capabilities, small form factor, and reduced total system cost. With the widespread adoption of TSMC's "InFO" (Integrated Fan-Out) FO-WLP solution, fan-out packaging has shifted from core fan-out applications (such as baseband, power management, and RF transceivers) to more advanced high-density fan-out applications.

[0003] like Figure 1 As shown, current PVD machines used in fan-out wafer-level packaging employ a large leaf-shaped structure, sequentially designed with a degassing chamber, a pre-cleaning chamber, and a PVD chamber. The degassing chamber removes adsorbed H2O and organic solvents from the substrate. During this process, the vacuum level of the intermediate transfer chamber may be affected, leading to airflow disturbances in the PVD chamber. Gas molecules from the degassing chamber may adhere to the chamber walls, impacting subsequent pre-cleaning and PVD processes. The degassing chamber is prone to particle generation, and combining it with the process chamber within a single vacuum system significantly increases the risk of excessive particle levels. Summary of the Invention

[0004] This application provides a dual-leaf semiconductor processing apparatus and a semiconductor processing method, solving the technical problems of low deposition quality and low efficiency in the prior art.

[0005] In a first aspect, embodiments of this application provide a dual-leaf semiconductor processing apparatus, comprising:

[0006] A first processing structure includes a loading reaction chamber for placing a target substrate, a desizing reaction chamber for discharging the target substrate, and a plurality of degassing reaction chambers.

[0007] The second processing structure includes multiple pre-cleaning reaction chambers and multiple deposition reaction chambers;

[0008] The cooling chamber structure is used to provide cooling water for cooling treatment;

[0009] The first processing structure is connected to the cooling chamber structure via a first gate valve;

[0010] The second processing structure is connected to the cooling chamber structure via a second gate valve;

[0011] The first gate valve and the second gate valve do not open at the same time.

[0012] Optionally, the first processing structure further includes: a first transfer reaction chamber;

[0013] The loading reaction chamber, the unloading reaction chamber, and multiple degassing reaction chambers are arranged around the first transfer reaction chamber.

[0014] Optionally, the second processing structure further includes: a second transfer reaction chamber;

[0015] The plurality of pre-cleaning reaction chambers and the plurality of deposition reaction chambers are arranged around the second transfer reaction chamber; the deposition film layers are different between the plurality of deposition reaction chambers.

[0016] Optionally, the vacuum degree of the loading reaction chamber, unloading reaction chamber, and degassing reaction chamber in the first processing structure is less than the vacuum degree of the pre-cleaning reaction chamber and deposition reaction chamber in the second processing structure.

[0017] Optionally, the first processing structure includes a plurality of first backup reaction chambers, and the second processing structure includes a plurality of second backup reaction chambers. The first backup reaction chambers and the second backup reaction chambers are used for deposition, etching, annealing, pre-cleaning, and removal of metal or metal oxides.

[0018] Optionally, the degassing reaction chamber has a multi-layer structure to store at least two of the target substrates.

[0019] Optionally, the cooling chamber structure is a multi-layer structure to store at least two of the target substrates.

[0020] Secondly, embodiments of this application also provide a semiconductor processing method, using the aforementioned dual-leaf semiconductor processing apparatus, comprising the following steps:

[0021] The target substrate is obtained from the loaded reaction chamber;

[0022] The target substrate is sequentially degassed and cooled using a degassing reaction chamber and a cooling chamber structure.

[0023] The target substrate is pre-cleaned and deposited using a pre-cleaning reaction chamber and a deposition reaction chamber.

[0024] The target substrate is cooled sequentially through the cooling chamber structure.

[0025] The target substrate is removed from the desizing reaction chamber.

[0026] Optionally, the step of sequentially degassing and cooling the target substrate through the degassing reaction chamber and cooling chamber structure includes the following steps:

[0027] After the target substrate is degassed in the degassing reaction chamber, the first insert valve connected to the first transfer reaction chamber is opened to transfer the target substrate into the cooling chamber structure, and the first insert valve is closed to cool the target substrate.

[0028] The pre-cleaning and deposition treatment of the target substrate through the pre-cleaning reaction chamber and the deposition reaction chamber includes the following steps:

[0029] Open the second insert valve connected to the second transfer reaction chamber to transfer the target substrate into the pre-cleaning reaction chamber, close the second insert valve and pre-clean the target substrate;

[0030] The target substrate is transferred to a first deposition reaction chamber for a first deposition process, and then transferred to a second deposition reaction chamber for a second deposition process to sequentially deposit different film layers on the target substrate.

[0031] Optionally, the cooling process of the target substrate through the cooling chamber structure includes the following steps:

[0032] The second insert valve is opened to transfer the target substrate into the cooling chamber structure, and the second insert valve is closed to cool the target substrate.

[0033] This application provides a dual-leaf semiconductor processing apparatus and a semiconductor processing method. The method involves degassing the target substrate in a degassing reaction chamber in a first processing structure, pre-cleaning the target substrate in a pre-cleaning reaction chamber in a second processing structure, and depositing the target substrate in a deposition reaction chamber within the second processing structure. Since the first and second processing structures are independent, the risk of degassing contamination is reduced, the risk of excessive particle load is decreased, and the film deposition quality of the substrate is improved. Furthermore, because the first and second processing structures are connected by a cooling chamber structure, the substrate is cooled after degassing before subsequent processes, avoiding the impact of direct pre-cleaning at high temperatures on the substrate. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of a single-leaf semiconductor processing device;

[0036] Figure 2 This is a schematic diagram of the structure of the dual-leaf semiconductor processing apparatus provided in the embodiments of this application;

[0037] Figure 3 This is a schematic diagram of the state of the first and second gate valves of the dual-leaf semiconductor processing apparatus provided in this application, after they move from the first processing structure to the cooling chamber structure and then to the second processing structure.

[0038] Figure 4 This is a schematic diagram of the product structure of the dual-leaf semiconductor processing apparatus provided in the embodiments of this application. Detailed Implementation

[0039] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be noted that the following embodiments are for illustrative purposes only and do not limit the scope of the application. Similarly, the following embodiments are only some, not all, embodiments of the present application, and all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of the present application.

[0040] In this description, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features.

[0041] In this description, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0042] Understandably, the meanings of “on”, “above”, and “above” in this text should be interpreted in the broadest sense, so that “on” means not only that it is “on” something without any intervening feature or layer (i.e., directly on something), but also that it is “on” something with an intervening feature or layer.

[0043] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments. Unless the context clearly indicates otherwise, the singular forms “a” and “an” as used herein are also intended to include the plural. “A plurality” means two or more. It should also be understood that the terms “comprising” and / or “including” as used herein specify the presence of the stated features, integers, steps, operations, units, and / or components, without excluding the presence or addition of one or more other features, integers, steps, operations, units, components, and / or combinations thereof.

[0044] PVD machines commonly used in fan-out chip packaging, such as Figure 1 As shown, a large leaf-shaped structure is adopted, with a Degas chamber (hereinafter referred to as the degassing reaction chamber or exhaust reaction chamber), a Pre-clean chamber (hereinafter referred to as the pre-cleaning reaction chamber or pre-cleaning reaction chamber), and a PVD chamber (hereinafter referred to as the deposition reaction chamber) arranged sequentially around the transfer chamber (hereinafter referred to as the transfer reaction chamber). The degassing reaction chamber is used to remove H2O and organic solvents adsorbed in the target substrate. Because... Figure 1The PVD machine is configured with Degas 1, Degas 2, Pre-clean 1, Pre-clean 2, PVD1, and PVD2 arranged sequentially. Therefore, during the degassing process in the degassing chambers (Degas 1 and Degas 2), the vacuum level in the intermediate transfer chamber may be affected, causing airflow disturbance in the PVD chamber. Gas molecules discharged from the degassing chambers (Degas 1 and Degas 2) may adhere to the inner wall of the transfer chamber, posing a high risk of excessive gas molecule levels and potentially affecting subsequent Pre-clean and PVD processes. Furthermore, the large-blade structure with six reaction chambers simultaneously supplied by a single vacuum pump results in low efficiency and hinders efficient substrate processing. The vacuum chambers of the PVD machine are typically maintained at high temperature and high vacuum. If an abnormality occurs during production, requiring personnel to observe the conditions within the vacuum chambers and the substrate inside, the PVD machine must be shut down and cooled before the vacuum chambers can be opened for observation. This process is time-consuming, and after the observation is completed, a series of rework actions such as heating and vacuuming are required, which affects production efficiency and causes unnecessary waste of production capacity.

[0045] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed. In the above embodiments, the descriptions of each embodiment have their own emphasis; parts not described in detail in a certain embodiment can be referred to in the relevant descriptions of other embodiments.

[0046] Please see Figure 2 and Figure 4 This application provides a dual-leaf semiconductor processing apparatus.

[0047] The first processing structure 10 includes a loading reaction chamber 11 for placing the target substrate, a desizing reaction chamber 12 for discharging the target substrate, and a plurality of degassing reaction chambers.

[0048] Specifically, the degassing reaction chamber performs degassing treatment under a vacuum environment. When the substrate is placed in the vacuum environment, it is in an out-gassing state. During this state, gaseous substances are emitted from the substrate, which may contaminate the processing apparatus and parts of the substrate itself. The substrate in the out-gassing state under vacuum can take many forms. In a first embodiment, the substrate is a semiconductor wafer containing an organic material layer. For example, the organic material contains a polyimide layer formed on the front surface of the semiconductor wafer, which is a silicon wafer. The target substrate is placed inside the chamber of the degassing reaction chamber and heated to a temperature T1, and then evacuated by a vacuum pump to remove the gaseous substances emitted from the target substrate outside the chamber. Alternatively, during evacuation, a gas flow can be applied to the target substrate to increase the removal rate.

[0049] For example, a semiconductor substrate is used as the target substrate, and the position data of the target substrate is provided to a robotic arm in the degassing reaction chamber, allowing the robotic arm to accurately grasp the target substrate and perform a degassing process in the degassing reaction chamber. This degassing process can remove moisture through heat treatment or plasma treatment. For example, vacuum degassing at 200°C for 30 seconds, or vacuum degassing at 200°C for 5 minutes.

[0050] Preferably, the degassing treatment of the target substrate in the degassing reaction chamber of this application can establish an equilibrium, that is, the target substrate continuously generates gaseous substances in a vacuum environment at temperature T1 and is continuously extracted.

[0051] Preferably, the dielectric constant of the target substrate is measured before and after the degassing process. By comparing the dielectric constant values ​​before and after degassing, the change in dielectric constant can be determined, thereby revealing the degassing effectiveness.

[0052] The second processing structure 20 includes multiple pre-cleaning reaction chambers and multiple deposition reaction chambers;

[0053] Specifically, PVD (Physical Vapor Deposition) refers to the process of ionizing gas under vacuum conditions using a medium-voltage, high-current arc discharge technique. The ionization is accelerated by an electric field, generating even more ions. Under the influence of the electric field and negative voltage, these ions bombard a target material, depositing the bombarded material onto the workpiece. Compared to CVD, PVD processes operate at lower temperatures and have no adverse environmental impact. PVD is typically carried out in a PVD reaction chamber.

[0054] The pre-cleaning or pre-rinsing process can generate free radicals from plasmas of one or more reactive gases, such as argon, helium, hydrogen, nitrogen, fluorine-containing compounds, and combinations thereof. For example, the reactive gas may include argon (Ar), or a mixture of carbon tetrafluoride (CF4) and oxygen (O2), or a mixture of helium (He) and nitrogen trifluoride (NF3). More preferably, the reactive gas is argon.

[0055] Cooling chamber structure 30 is used to provide cooling water for cooling treatment;

[0056] Specifically, such as Figure 3 As shown, the cooling chamber structure 30 is equipped with a first pin 41 that is matched with the first gate valve 40, and a second pin 42 that is matched with the second gate valve 50. Because the process time is relatively long, the first processing structure 10 is equipped with multiple degassing reaction chambers, and the second processing structure 20 is equipped with multiple pre-cleaning reaction chambers and multiple deposition reaction chambers. This allows for the arbitrary selection of idle reaction chambers during the process, reducing the waiting time for degassing or pre-cleaning treatments and thus improving the production efficiency of semiconductor products.

[0057] The first processing structure 10 is connected to the cooling chamber structure 30 via a first gate valve 40;

[0058] The second processing structure 20 is connected to the cooling chamber structure 30 via the second gate valve 50;

[0059] The first gate valve 40 and the second gate valve 50 are not opened at the same time.

[0060] Specifically, such as Figure 3 As shown, the target substrate is in a degassed state when placed in a vacuum environment. The target substrate is placed in a vacuum environment, and degassed by heating it to a temperature T1 and removing the gaseous substances emitted by the target substrate. Then, the first gate valve 40 is opened and the second gate valve 50 is closed, allowing the target substrate to move from the degassed reaction chamber to the cooling chamber structure 30. Then, the first gate valve 40 and the second gate valve 50 are simultaneously closed, allowing the target substrate to be cooled to a temperature T2 within the cooling chamber structure 30. In this way, by subsequently lowering the temperature of the target substrate to T2 through the cooling chamber structure 30, further processing of the target substrate at temperature T2 avoids further increasing the degassed rate by raising the temperature.

[0061] Then, the first gate valve 40 is closed and the second gate valve 50 is opened, allowing the target substrate to move from the cooling chamber structure 30 to the pre-cleaning reaction chamber in the second processing structure 20 for pre-cleaning. Afterward, the target substrate is moved from the pre-cleaning reaction chamber to the deposition reaction chamber in the second processing structure 20 for repeated deposition processes until the target substrate is covered by a multilayer film containing metal.

[0062] The dual-leaf semiconductor processing apparatus designed in this application separates the degassing chamber (i.e., the degassing reaction chamber of this application), the PVD chamber (i.e., the deposition reaction chamber of this application), and the pre-clean chamber (i.e., the pre-cleaning reaction chamber of this application). The two processing structures (i.e., the first processing structure 10 and the second processing structure 20 of this application) are connected by a cooling chamber (i.e., the cooling chamber structure 30 of this application). The cooling chamber is designed with two gate valves. The first robotic arm robot 1 of the first processing structure 10 opens gate valve 1 and closes gate valve 2 to allow the target substrate to move from the degassing reaction chamber in the first processing structure 10 to the cooling chamber structure 30. The second robotic arm robot 2 of the second processing structure 20 closes gate valve 1 and opens gate valve 2 to allow the target substrate to move from the cooling chamber structure 30 to the pre-cleaning reaction chamber in the second processing structure 20, thus ensuring the stability of the vacuum system of the dual-leaf semiconductor processing apparatus.

[0063] In some embodiments of this application, the first processing structure 10 further includes: a first transfer reaction chamber;

[0064] The loading reaction chamber 11, the unloading reaction chamber 12, and a plurality of degassing reaction chambers are arranged around the first transfer reaction chamber.

[0065] Specifically, such as Figure 2 As shown, a loading reaction chamber 11, a desizing reaction chamber 12, and multiple degassing reaction chambers are arranged around the first transfer reaction chamber. The loading reaction chamber 11 is adjacent to the desizing reaction chamber 12, and a portion of the multiple degassing reaction chambers is located closer to the loading reaction chamber 11, while another portion is located closer to the desizing reaction chamber 12. The multiple degassing reaction chambers have the same function. Assuming there are two degassing reaction chambers, the desizing reaction chamber 12 is adjacent to the loading reaction chamber 11, the first degassing reaction chamber 131 is adjacent to the desizing reaction chamber 12, and the second degassing reaction chamber 132 is adjacent to the loading reaction chamber 11 and opposite to the first degassing reaction chamber 131. Figure 2As shown, the second degassing reaction chamber 132, the loading reaction chamber 11, the unloading reaction chamber 12, and the first degassing reaction chamber 131 are arranged sequentially around the first transfer reaction chamber.

[0066] In some embodiments of this application, the second processing structure 20 further includes: a second transfer reaction chamber;

[0067] The plurality of pre-cleaning reaction chambers and the plurality of deposition reaction chambers are arranged around the second transfer reaction chamber; the deposition film layers are different between the plurality of deposition reaction chambers.

[0068] Specifically, such as Figure 2 As shown, multiple pre-cleaning reaction chambers and multiple deposition reaction chambers are arranged around the second transfer reaction chamber. The pre-cleaning reaction chambers are adjacent and located on one side of the second transfer reaction chamber, while the deposition reaction chambers are adjacent and located on the other side. In other words, the pre-cleaning reaction chambers and deposition reaction chambers are arranged opposite each other. For example, assuming there are two pre-cleaning reaction chambers and two deposition reaction chambers... Figure 2 As shown, the first pre-cleaning reaction chamber 211, the second pre-cleaning reaction chamber 212, the first deposition reaction chamber 221, and the second deposition chamber are arranged sequentially around the first transfer reaction chamber.

[0069] In some embodiments of this application, the vacuum degree of the loading reaction chamber 11, the unloading reaction chamber 12, and the degassing reaction chamber in the first processing structure 10 is less than the vacuum degree of the pre-cleaning reaction chamber and the deposition reaction chamber in the second processing structure 20.

[0070] In some embodiments of this application, the first processing structure 10 includes a plurality of first backup reaction chambers, and the second processing structure 20 includes a plurality of second backup reaction chambers. The first backup reaction chambers and the second backup reaction chambers are used for deposition, etching, annealing, pre-cleaning, and removal of metals or metal oxides.

[0071] In some embodiments, a plurality of first backup reaction chambers are coupled to a first transfer reaction chamber, and a plurality of second backup reaction chambers are coupled to a second transfer reaction chamber. The plurality of first backup reaction chambers and the plurality of second backup reaction chambers can be used to perform any processing related to the target substrate, such as annealing, chemical vapor deposition, physical vapor deposition, epitaxial processing, etching, thermal oxidation or thermal nitriding processes, and degassing.

[0072] In some embodiments of this application, the degassing reaction chamber has a multi-layer structure to store at least two of the target substrates.

[0073] In some embodiments of this application, the cooling chamber structure 30 is a multi-layer structure to store at least two of the target substrates.

[0074] Specifically, this application designs a dual-leaf semiconductor processing apparatus, separating the degas chamber from the PVD chamber and pre-clean chamber. The two processing structures are connected by a cooling chamber, which is designed with multiple layers to hold ≥2 target substrates. It is also designed with two insertion valves. When robot 1 retrieves or places wafers into the cooling chamber, insertion valve 1 opens and insertion valve 2 closes; when robot 1 retrieves or places wafers into the cooling chamber, insertion valve 1 closes and insertion valve 2 opens. This ensures the stability of the vacuum system of the processing chamber.

[0075] This application designs a dual-leaf coating apparatus with two transfer chambers, isolating the contamination-risk degas chamber from the PVD and pre-clean chambers. Applied to fan-out chip packaging, it: a) ensures the independence of the vacuum system, mitigating the risks of degas contamination and excessive particle buildup present in conventional single-processing structures, and improving the quality of PVD film deposition; b) allows the two robots to operate independently, increasing equipment production efficiency; c) compared to large-size single-processing structures, the equipment width is reduced, requiring less space for the same number of chambers; d) the robot size is reduced, the arm overhang length is shortened, and wafer handling accuracy is improved; e) only the inner process reaction chamber requires high vacuum, while the outer reaction chamber can operate at low vacuum, saving costs on high-vacuum pumps such as molecular pumps and cooling pumps; f) after degassing, the target substrate is transferred to the cooling chamber, where it is cooled before subsequent processes, avoiding the impact of high temperatures on pre-cleaning.

[0076] Two leaf-shaped vacuum structures are connected by a cooling chamber, which is designed with multiple layers to hold at least two target substrates. The cooling chamber in this application features two gate valves; when the robot loads or unloads substrates, one gate valve is open while the other is closed, ensuring that the two transfer chambers are not spatially connected. In the embodiments of this application, the chamber type within the leaf-shaped structure includes, but is not limited to, Degas, PVD, CVD, Pre-clean, and dry etching.

[0077] In this embodiment, the vacuum requirements of the two-leaf semiconductor processing apparatus are different. The first leaf, namely the first processing structure 10, only requires a low vacuum and can be roughly pumped with a regular mechanical pump or a dry pump. The second processing structure, namely the second processing structure 20, requires a high vacuum and is equipped with a mechanical pump or a dry pump for rough pumping, a turbomolecular pump for high vacuum pumping, and a cold pump.

[0078] In this embodiment, the substrate stage of the Degas chamber can be designed as a single layer or multiple layers according to process requirements; no specific limitation is made.

[0079] In this application embodiment, the application fields of the dual-leaf semiconductor processing apparatus include, but are not limited to, chip packaging, chip manufacturing, panels, solar energy, and other fields.

[0080] This application also provides a semiconductor processing method, applied to... Figure 2 The illustrated double-leaf semiconductor processing apparatus includes the following steps:

[0081] S100, Obtain the target substrate from the loading reaction chamber 11;

[0082] S200, the target substrate is sequentially degassed and cooled through the degassing reaction chamber and cooling chamber structure 30;

[0083] S300, The target substrate is pre-cleaned and deposited through a pre-cleaning reaction chamber and a deposition reaction chamber;

[0084] S400, The target substrate is cooled sequentially through the cooling chamber structure 30;

[0085] S500, The target substrate is removed from the desizing reaction chamber 12.

[0086] Specifically, a dual-leaf semiconductor processing apparatus is designed, spatially separating the degas chamber, PVD chamber, and pre-clean chamber; the two processing structures are connected by a cooling chamber, which is designed with multiple layers to hold ≥2 substrates and includes two gate valves.

[0087] When robot 1 retrieves or places wafers, valve 1 opens and valve 2 closes; when robot 2 retrieves or places wafers in the cooling chamber, valve 1 closes and valve 2 opens, thus ensuring the stability of the vacuum system in the process chamber. During operation, the substrate action logic is: Load → Degas (selecting an idle degassing reaction chamber Degas1 or Degas2) → Cooling → Pre-clean (selecting an idle degassing reaction chamber Pre-clean1 or Pre-clean2) → PVD1 → PVD2. Transfer is completed by two vacuum robots, where the two Degas and two Pre-clean chambers are chambers with the same function, and PVD1 and PVD2 are chambers for different film deposition layers. After PVD coating is completed, the substrate action logic is: PVD2 → Cooling → Unload.

[0088] In some embodiments of this application, the step of sequentially degassing and cooling the target substrate through the degassing reaction chamber and cooling chamber structure 30 includes the following steps:

[0089] After the target substrate is degassed in the degassing reaction chamber, the first insert valve 40 connected to the first transfer reaction chamber is opened to transfer the target substrate into the cooling chamber structure 30, and the first insert valve is closed to cool the target substrate.

[0090] The pre-cleaning and deposition treatment of the target substrate through the pre-cleaning reaction chamber and the deposition reaction chamber includes the following steps:

[0091] Open the second insert valve 50 connected to the second transfer reaction chamber to transfer the target substrate into the pre-cleaning reaction chamber, close the second insert valve and pre-clean the target substrate;

[0092] The target substrate is transferred to the first deposition reaction chamber 221 for a first deposition process, and then transferred to the second deposition reaction chamber 222 for a second deposition process to sequentially deposit different film layers on the target substrate.

[0093] In some embodiments of this application, the cooling process performed on the target substrate through the cooling chamber structure 30 includes the following steps:

[0094] The second insert valve 50 is opened to transfer the target substrate into the cooling chamber structure 30, and the second insert valve is closed to cool the target substrate.

[0095] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0096] The first processing structure 10 and the second processing structure 20 maintain vacuum conditions while allowing the target substrate to be transferred between the first transfer reaction chamber and the second transfer reaction chamber. The first transfer reaction chamber has a robotic transfer mechanism (e.g., a robotic arm, not shown) to transfer the target substrate between the loading reaction chamber 11, the desizing reaction chamber 12, the plurality of degassing reaction chambers, and the cooling chamber structure 30. Similarly, the second transfer reaction chamber also has a robotic transfer mechanism (e.g., a robotic arm, not shown) to transfer the target substrate between the plurality of pre-cleaning reaction chambers, the plurality of deposition reaction chambers, and the cooling chamber structure 30.

[0097] During operation, the target substrate is transported from the container to the loading reaction chamber 11. A robotic transfer mechanism within the first transfer reaction chamber transfers the target substrate one at a time from the loading reaction chamber 11 to the degassing reaction chamber, where degassing is performed. Once the target substrate has been degassed, the first gate valve 40 is opened and the second gate valve 50 is closed. The robotic transfer mechanism within the first transfer reaction chamber moves the target substrate from the degassing reaction chamber to the cooling chamber structure 30. Then, the first gate valve 40 and the second gate valve 50 are simultaneously closed to allow the target substrate to cool down to temperature T2 within the cooling chamber structure 30. This cooling process, by subsequently lowering the temperature of the target substrate to T2 via the cooling chamber structure 30, allows for further processing of the target substrate at temperature T2, avoiding the need to further increase the degassing rate due to temperature increases. Then, the first gate valve 40 is closed and the second gate valve 50 is opened, allowing the target substrate to move from the cooling chamber structure 30 to the pre-cleaning reaction chamber in the second processing structure 20. The cooled target substrate is pre-cleaned in the pre-cleaning reaction chamber to remove oxides from its surface. Once the oxides are removed, the cleaned target substrate is transferred from the pre-cleaning reaction chamber to one or more deposition reaction chambers via a robotic transfer mechanism located in the second transfer reaction chamber. In any case, the one or more deposition reaction chambers may include an epitaxial processing reaction chamber, a PVD reaction chamber, etc., wherein one or more deposition reaction chambers perform layer formation processes (such as epitaxial deposition, metal film deposition, etc.). Thus, the target substrate is moved from the pre-cleaning reaction chamber to the deposition reaction chamber in the second processing structure 20, where the cleaned target substrate undergoes multiple deposition processes sequentially until the target substrate is covered by a multilayer thin film containing metal. After processing in one or more deposition chambers, a robotic transfer mechanism located in the second transfer chamber moves the target substrate from any of the deposition chambers to the stripping chamber 12, where it is removed from the vacuum processing system. Because the first processing structure 10 and the second processing structure 20 have their own independent vacuum systems, the vacuum is not disrupted when the target substrate is transferred between the chambers, reducing the possibility of contamination and improving the quality of the deposited film. It should be understood that the movement of the target substrate is described for illustrative purposes, and the movement of the target substrate can be scheduled according to a desired sequence, which can be varied depending on the application.

[0098] In this application, the target substrate operation logic is Load → Degas (degas1 or degas2) → Cooling → Pre-clean (pre-clean1 or pre-clean2) → PVD1 → PVD2. The transfer is accomplished by two vacuum robots, where the two Degas and two Pre-clean chambers are identical in function, and PVD1 and PVD2 are chambers for different film deposition layers. After PVD coating is completed, the target substrate operation logic is PVD2 → Cooling → Unload.

[0099] This application ensures the independence of the process chamber vacuum system, mitigating the risks of degassing and excessive particle buildup inherent in conventional single-processing structures, and improving PVD film deposition quality. The two robots operate independently, increasing equipment production efficiency. Compared to large-size single-processing structures, this application...

[0100] The equipment width is reduced, resulting in a smaller footprint for the same number of chambers. Furthermore, the robotic arm size is smaller, and the overhang length of the five arms is shorter, improving wafer handling accuracy. In this application, only the internal process chamber requires high fidelity.

[0101] The degas chamber outside the substrate can be kept at a low vacuum, saving the cost of high-vacuum pumps such as molecular pumps and cold pumps. Most importantly, after the degas chamber is completed, the substrate is transferred to the cooling chamber. The substrate is cooled down before subsequent processes are performed, avoiding the impact of high temperature on the pre-clean process.

[0102] The foregoing has provided a detailed description of a dual-leaf semiconductor processing apparatus and a semiconductor processing method according to embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application.

[0103] The above description of the embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application; those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A double-leaf semiconductor processing apparatus, characterized in that, include: A first processing structure includes a loading reaction chamber for placing a target substrate, a desizing reaction chamber for discharging the target substrate, and a plurality of degassing reaction chambers. The second processing structure includes multiple pre-cleaning reaction chambers, multiple deposition reaction chambers, and a second transfer reaction chamber. The multiple pre-cleaning reaction chambers and multiple deposition reaction chambers are arranged around the second transfer reaction chamber, with the multiple pre-cleaning reaction chambers adjacent to each other and located on one side of the second transfer reaction chamber, and the multiple deposition reaction chambers adjacent to each other and located on the other side of the second transfer reaction chamber. The vacuum degree of the loading reaction chamber, deslagging reaction chamber, and degassing reaction chamber in the first processing structure is lower than the vacuum degree of the pre-cleaning reaction chamber and deposition reaction chamber in the second processing structure. The cooling chamber structure is used to provide cooling water for cooling treatment; The first processing structure is connected to the cooling chamber structure via a first gate valve; The second processing structure is connected to the cooling chamber structure via a second gate valve; The first gate valve and the second gate valve do not open at the same time.

2. The dual-leaf semiconductor processing apparatus according to claim 1, characterized in that, The first processing structure further includes: a first transfer reaction chamber; The loading reaction chamber, the unloading reaction chamber, and multiple degassing reaction chambers are arranged around the first transfer reaction chamber.

3. The dual-leaf semiconductor processing apparatus according to claim 1, characterized in that, The deposited film layers are different between the multiple deposition reaction chambers.

4. The dual-leaf semiconductor processing apparatus according to claim 1, characterized in that, The first processing structure includes a plurality of first backup reaction chambers, and the second processing structure includes a plurality of second backup reaction chambers. The first backup reaction chambers and the second backup reaction chambers are used for deposition, etching, annealing, pre-cleaning, and removal of metal or metal oxides.

5. The dual-leaf semiconductor processing apparatus according to claim 1, characterized in that, The degassing reaction chamber has a multi-layer structure to store at least two of the target substrates.

6. The dual-leaf semiconductor processing apparatus according to any one of claims 1-5, characterized in that, The cooling chamber has a multi-layer structure to store at least two of the target substrates.

7. A semiconductor processing method, characterized in that, The application of the dual-leaf semiconductor processing apparatus according to any one of claims 1-6 includes the following steps: The target substrate is obtained from the loaded reaction chamber; The target substrate is sequentially degassed and cooled using a degassing reaction chamber and a cooling chamber structure. The target substrate is pre-cleaned and deposited using a pre-cleaning reaction chamber and a deposition reaction chamber. The target substrate is cooled sequentially through the cooling chamber structure. The target substrate is removed from the desizing reaction chamber.

8. The semiconductor processing method according to claim 7, characterized in that, The step of sequentially degassing and cooling the target substrate through a degassing reaction chamber and a cooling chamber structure includes the following steps: After the target substrate is degassed in the degassing reaction chamber, the first gate valve connected to the first transfer reaction chamber is opened to transfer the target substrate into the cooling chamber structure, and the first gate valve is closed to cool the target substrate. The pre-cleaning and deposition treatment of the target substrate through the pre-cleaning reaction chamber and the deposition reaction chamber includes the following steps: Open the second gate valve connected to the second transfer reaction chamber to transfer the target substrate into the pre-cleaning reaction chamber, close the second gate valve and pre-clean the target substrate; The target substrate is transferred to a first deposition reaction chamber for a first deposition process, and then transferred to a second deposition reaction chamber for a second deposition process to sequentially deposit different film layers on the target substrate.

9. The semiconductor processing method according to claim 8, characterized in that, The step of sequentially cooling the target substrate through the cooling chamber structure includes the following steps: The second gate valve is opened to transfer the target substrate into the cooling chamber structure, and the second gate valve is closed to cool the target substrate.

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