Light emitting diode with improved external quantum efficiency and method of manufacturing the same

Abstract

The present disclosure provides a light emitting diode with improved external quantum efficiency and a preparation method thereof, and belongs to the technical field of optoelectronic manufacturing. The light emitting diode comprises a substrate and an epitaxial layer on the substrate, wherein the epitaxial layer comprises a p-type layer, the p-type layer comprises a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers, the plurality of first nitride semiconductor layers and the plurality of second nitride semiconductor layers are alternately stacked, and the roughness of the surface of the first nitride semiconductor layer away from the substrate is greater than the roughness of the surface of the second nitride semiconductor layer away from the substrate. The embodiment of the present disclosure can improve the problem of light absorption of the p-type layer and improve the light emitting efficiency of the light emitting diode.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting diode with improved external quantum efficiency and a method for its fabrication. Background Technology

[0002] Light-emitting diodes (LEDs) are highly influential new products in the optoelectronics industry. They are characterized by their small size, long lifespan, rich and colorful colors, and low energy consumption. They are widely used in lighting, displays, signal lights, backlights, toys, and other fields.

[0003] In related technologies, light-emitting diodes (LEDs) typically consist of a substrate, an n-type layer, a light-emitting layer, and a p-type layer stacked sequentially. The n-type layer provides electrons, and the p-type layer provides holes. Electrons and holes recombine in the light-emitting layer, thus emitting light. Because the p-type layer absorbs light, its thickness is typically reduced to decrease light absorption.

[0004] However, the thinner p-type layer grown typically has poorer crystal quality, which leads to a decrease in the luminous efficiency of the light-emitting diode. Summary of the Invention

[0005] This disclosure provides a light-emitting diode (LED) with improved external quantum efficiency and its fabrication method, which can improve the problem of light absorption by the p-type layer and improve the luminous efficiency of the LED. The technical solution is as follows:

[0006] On one hand, this disclosure provides a light-emitting diode, which includes a substrate and an epitaxial layer on the substrate. The epitaxial layer includes a p-type layer, which includes a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers. The plurality of first nitride semiconductor layers and the plurality of second nitride semiconductor layers are alternately stacked, and the roughness of the surface of the first nitride semiconductor layer away from the substrate is greater than the roughness of the surface of the second nitride semiconductor layer away from the substrate.

[0007] Optionally, the surface roughness of the p-type layer away from the substrate is 5 to 7.

[0008] Optionally, the ratio of the thickness of the first nitride semiconductor layer to the thickness of the second nitride semiconductor layer is 1.5 to 5.

[0009] Optionally, the epitaxial layer further includes an Al film located on the surface of the p-type layer away from the substrate.

[0010] Optionally, both the first nitride semiconductor layer and the second nitride semiconductor layer are GaN layers.

[0011] On the other hand, embodiments of this disclosure provide a method for fabricating a light-emitting diode, the method comprising: providing a substrate; growing an epitaxial layer on the substrate, the epitaxial layer comprising a p-type layer, the p-type layer comprising a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers, the plurality of first nitride semiconductor layers and the plurality of second nitride semiconductor layers being alternately stacked, the roughness of the surface of the first nitride semiconductor layer away from the substrate being greater than the roughness of the surface of the second nitride semiconductor layer away from the substrate.

[0012] Optionally, both the first nitride semiconductor layer and the second nitride semiconductor layer are GaN layers; the first nitride semiconductor layer is formed by controlling the flow rate of the TMGa source to 300 sccm to 500 sccm, the flow rate of the Mg source to 1000 sccm to 1500 sccm, and the growth time to 2 min to 5 min; the first second nitride semiconductor layer is formed by stopping the Mg source, adjusting the flow rate of the TMGa source to 500 sccm to 1000 sccm, and controlling the growth time to 3 min to 5 min.

[0013] Optionally, the second first nitride semiconductor layer is formed by stopping the flow of the TMGa source, starting the flow of the Mg source, controlling the flow rate of the Mg source to be 1000 sccm to 1200 sccm, and the growth time to be 2 min to 4 min; the second second nitride semiconductor layer is formed by starting the flow of the TMGa source, controlling the flow rate of the TMGa source to be 200 sccm to 300 sccm, adjusting the flow rate of the Mg source to be 800 sccm to 1000 sccm, and controlling the growth time to be 4 min to 8 min.

[0014] Optionally, the p-type layer includes 2 to 5 first nitride semiconductor layers and second nitride semiconductor layers, wherein the first nitride semiconductor layers and the second nitride semiconductor layers are stacked alternately, and the number of first nitride semiconductor layers and the number of second nitride semiconductor layers are the same.

[0015] Optionally, after growing the p-type layer, the process further includes: introducing an Al source, controlling the flow rate of the Al source to be 100 sccm to 200 sccm, and the growth time to be 1 min to 3 min, to form an Al film on the surface of the p-type layer away from the substrate.

[0016] The beneficial effects of the technical solutions provided in this disclosure include at least the following:

[0017] In this embodiment of the light-emitting diode, the p-type layer grown on the substrate includes multiple alternating layers of first nitride semiconductor layers and second nitride semiconductor layers. The surface roughness of the first nitride semiconductor layer away from the substrate is greater than the surface roughness of the second nitride semiconductor layer away from the substrate. This forms a sandwich-type p-type layer with alternating roughness, effectively increasing the roughness of the p-type layer and making its surface rougher. Because the surface of the p-type layer is rougher, light emitted from the epitaxial layer will be reflected after entering the p-type layer. Thus, some of the light absorbed by the p-type layer will be reflected again, thereby improving the light absorption problem of the p-type layer and increasing the luminous efficiency of the light-emitting diode. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure;

[0020] Figure 2 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure.

[0021] The markings in the diagram are explained as follows:

[0022] 10. Substrate;

[0023] 21. Buffer layer; 22. Undoped GaN layer;

[0024] 30. n-type layer;

[0025] 40. Light-emitting layer; 41. Quantum well layer; 42. Quantum barrier layer;

[0026] 50. p-type layer; 51. First nitride semiconductor layer; 52. Second nitride semiconductor layer. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0028] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0029] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. Figure 1 As shown, the light-emitting diode includes a substrate 10 and an epitaxial layer on the substrate 10. The epitaxial layer includes a p-type layer 50, which includes a plurality of first nitride semiconductor layers 51 and a plurality of second nitride semiconductor layers 52. The plurality of first nitride semiconductor layers 51 and the plurality of second nitride semiconductor layers 52 are stacked alternately. The roughness of the first nitride semiconductor layer 51 is greater than the roughness of the second nitride semiconductor layer 52.

[0030] In this embodiment of the light-emitting diode, the p-type layer 50 grown on the substrate 10 includes multiple alternating layers of first nitride semiconductor layers 51 and second nitride semiconductor layers 52. The surface roughness of the first nitride semiconductor layer 51 away from the substrate 10 is greater than the surface roughness of the second nitride semiconductor layer 52 away from the substrate 10. This forms a sandwich-type p-type layer 50 with alternating roughness, effectively increasing the roughness of the p-type layer 50 and making its surface rougher. Because the surface of the p-type layer 50 is rougher, light emitted from the epitaxial layer will be reflected after entering the p-type layer 50. Thus, some of the light absorbed by the p-type layer 50 will be reflected again, thereby improving the light absorption problem of the p-type layer 50 and increasing the luminous efficiency of the light-emitting diode.

[0031] Optionally, the surface roughness of the p-type layer 50 away from the substrate 10 is 5 to 7.

[0032] This sandwich-type GaN layer improves the roughness of the p-type layer 50, making the surface of the p-type layer 50 further away from the substrate 10 rougher. Because the surface of the p-type layer 50 is rougher, the light emitted from the epitaxial layer is reflected when it enters the p-type layer 50. This means that some of the light absorbed by the p-type layer 50 is reflected back out, thus improving the light absorption problem of the p-type layer 50 and increasing the luminous efficiency of the light-emitting diode.

[0033] For example, the surface roughness of the p-type layer 50 away from the substrate 10 is 6.

[0034] The greater roughness allows the light emitted by the epitaxial layer to be reflected to a certain extent after entering the p-type layer 50. As a result, some of the light absorbed by the p-type layer 50 will be reflected again due to the reflection effect, thereby improving the light absorption problem of the p-type layer 50.

[0035] Optionally, the thickness of the first nitride semiconductor layer 51 is greater than the thickness of the second nitride semiconductor layer 52.

[0036] For example, both the first nitride semiconductor layer 51 and the second nitride semiconductor layer 52 are GaN layers. That is, the thickness of the first GaN layer is greater than the thickness of the second GaN layer. The p-type layer 50 formed by this alternating combination of GaN layers will have a greater roughness, which is beneficial to improving the roughness of the p-type layer 50.

[0037] For example, the thickness ratio of the first nitride semiconductor layer 51 to the thickness of the second nitride semiconductor layer 52 is 1.5 to 5. For instance, the thickness ratio of the first nitride semiconductor layer 51 to the thickness of the second nitride semiconductor layer 52 is 3.

[0038] By controlling the ratio of the thickness of the first nitride semiconductor layer 51 to the thickness of the second nitride semiconductor layer 52 within the above range, it is possible to avoid the first nitride semiconductor layer 51 being too thin, thus failing to improve the roughness of the p-type layer 50, and to make the roughness of the p-type layer 50 more easily approach 5 to 7.

[0039] Optionally, the number of the first nitride semiconductor layer 51 and the second nitride semiconductor layer 52 are both 2 to 5, and the number of the first nitride semiconductor layer 51 and the number of the second nitride semiconductor layer 52 are the same.

[0040] By setting the number of the first nitride semiconductor layer 51 and the second nitride semiconductor layer 52 within the above range, it is possible to avoid setting too many of the first nitride semiconductor layer 51 and the second nitride semiconductor layer 52, which would increase the thickness of the p-type layer 50 and increase light absorption; it is also possible to avoid setting too few of the first nitride semiconductor layer 51 and the second nitride semiconductor layer 52, which would fail to achieve the purpose of improving roughness.

[0041] Optionally, the epitaxial layer also includes an Al film located on the surface of the p-type layer 50 away from the substrate 10.

[0042] By forming an Al film on the surface of the p-type layer 50, the surface of the p-type layer 50 is made smoother, and defects on the surface of the p-type layer 50 are prevented from extending further to the top layer of the epitaxial layer, thereby improving the crystal quality of the light-emitting diode.

[0043] In this embodiment, the substrate 10 is a sapphire substrate 10. The sapphire substrate 10 is a commonly used substrate 10, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate 10 or a flat sapphire substrate 10.

[0044] Optionally, the epitaxial layer includes an n-type layer 30, a light-emitting layer 40, and a p-type layer 50 stacked sequentially.

[0045] The light-emitting layer 40 includes multiple quantum well layers 41 and multiple quantum barrier layers 42, which are stacked alternately.

[0046] Optionally, the n-type layer 30 may be an n-type GaN layer. The thickness of the n-type layer 30 is from 1.5 μm to 3.5 μm.

[0047] The dopant for the n-type layer 30 is silane.

[0048] Optionally, both the first nitride semiconductor layer 51 and the second nitride semiconductor layer 52 in the p-type layer 50 can be p-type doped. The dopant of the p-type layer 50 is magnesium nitride.

[0049] In this embodiment of the disclosure, the thickness of the quantum well layer 41 in the light-emitting layer 40 is 2 nm to 5 nm.

[0050] By controlling the thickness of the quantum well layer 41 within the above range, it is possible to avoid the quantum well layer 41 being too thin and thus failing to meet the purpose of electron-hole recombination; it is also possible to avoid the quantum well layer 41 being too thick and thus increasing the manufacturing cost.

[0051] For example, the thickness of the quantum well layer 41 can be 3 nm.

[0052] Optionally, the quantum barrier layer 42 can be an n-type GaN quantum barrier layer 42 with a thickness of 5 nm to 15 nm.

[0053] By controlling the thickness of the n-type GaN quantum barrier layer 42 within the above range, it is possible to avoid the n-type GaN quantum barrier layer 42 being too thin and thus failing to meet the purpose of electron-hole recombination; it is also possible to avoid the n-type GaN quantum barrier layer 42 being too thick and thus increasing the manufacturing cost.

[0054] For example, the thickness of the n-type GaN quantum barrier layer 42 is 10 nm.

[0055] Optionally, the light-emitting layer 40 includes 8 to 12 quantum well layers 41 and 8 to 12 quantum barrier layers 42.

[0056] By controlling the number of quantum well layer 41 and quantum barrier layer 42 within the above range, it is possible to avoid setting the number of quantum well layer 41 and quantum barrier layer 42 too few, resulting in the thickness of the light-emitting layer 40 being too small, thus failing to meet the purpose of electron-hole recombination; it is also possible to avoid setting the thickness of the light-emitting layer 40 too thick, thereby increasing the manufacturing cost.

[0057] For example, the number of layers in the quantum well layer 41 can be 10, and the number of layers in the quantum barrier layer 42 can be 10.

[0058] It should be noted that, Figure 1 The diagram only shows a portion of the structure in the light-emitting layer 40 and is not used to limit the number of cycles of the alternating stacking of the quantum well layer 41 and the quantum barrier layer 42.

[0059] Optionally, such as Figure 1 As shown, a buffer layer 21 and an undoped GaN layer 22 are also stacked sequentially between the substrate 10 and the epitaxial layer.

[0060] In this embodiment of the present disclosure, an undoped GaN layer 22 is also grown between the buffer layer 21 and the epitaxial layer. Compared with the substrate 10, since the crystal structure of the undoped GaN layer 22 is similar to that of the n-type layer 30, the crystal quality of the subsequent epitaxial layer can be improved by setting the undoped GaN layer 22 as a transition layer.

[0061] The thickness of the undoped GaN layer 22 is 1 μm to 2 μm. For example, the thickness of the undoped GaN layer 22 is 1.5 μm.

[0062] By setting the thickness of the undoped GaN layer 22 within the above range, it is possible to avoid the undoped GaN layer 22 being too thin, thus failing to play a transition role and reducing the crystal quality of the grown epitaxial layer; it is also possible to avoid the undoped GaN layer 22 being too thick, which would increase the absorption of light by the undoped GaN layer 22, thereby reducing the luminous efficiency of the epitaxial wafer.

[0063] Figure 2 This is a flowchart illustrating a method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. This method is used to fabricate... Figure 1 The epitaxial wafer shown. (As shown in the image) Figure 2 As shown, the preparation method includes:

[0064] S11: Provide a substrate.

[0065] S12: Growing an epitaxial layer on a substrate.

[0066] The epitaxial layer includes a p-type layer, which includes multiple first nitride semiconductor layers and multiple second nitride semiconductor layers. The multiple first nitride semiconductor layers and multiple second nitride semiconductor layers are stacked alternately. The roughness of the surface of the first nitride semiconductor layer away from the substrate is greater than the roughness of the surface of the second nitride semiconductor layer away from the substrate.

[0067] In the light-emitting diode (LED) fabricated by this method, the p-type layer grown on the substrate includes multiple alternating layers of first and second nitride semiconductor layers. The surface roughness of the first nitride semiconductor layer away from the substrate is greater than that of the second nitride semiconductor layer away from the substrate. This creates a sandwich-type p-type layer with alternating roughness, effectively increasing the surface roughness of the p-type layer. Because the p-type layer surface is rougher, light emitted from the epitaxial layer is reflected after entering the p-type layer. This means that some of the light absorbed by the p-type layer is reflected back out, thus improving the light absorption problem of the p-type layer and increasing the luminous efficiency of the LED.

[0068] In step S11, the substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.

[0069] As an example, in this embodiment of the disclosure, the substrate is a sapphire substrate. Sapphire substrates are a commonly used substrate, with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a flat sapphire substrate.

[0070] In step S11, the sapphire substrate can be subjected to high-temperature cleaning treatment in a hydrogen atmosphere at 1000°C to 1200°C for 5 to 20 minutes, and then subjected to nitriding treatment.

[0071] In step S11, the sapphire substrate can be pretreated by placing it in an MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber and baking it for 12 to 18 minutes. As an example, in this embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.

[0072] Specifically, the baking temperature can be from 1000℃ to 1200℃, and the pressure inside the MOCVD reaction chamber during baking can be from 100mbar to 200mbar.

[0073] In this embodiment of the disclosure, a buffer layer and an undoped GaN layer are further stacked sequentially between the substrate and the epitaxial layer. The buffer layer may be an AlN layer.

[0074] The growth buffer layer may include the following steps:

[0075] The first step is to control the flow rate of Ar to 400 sccm to 800 sccm.

[0076] The time is between 3 and 5 minutes. For example, the time is 4 minutes.

[0077] Specifically, this may include: placing the substrate to be coated into a PVD device, then introducing Ar and controlling the flow rate of the introduced Ar to be 500 sccm.

[0078] This serves to buffer and stabilize the gas flow, preparing for the next step of bombarding the Al target.

[0079] The second step is to reduce the Ar flow rate from 300 sccm to 500 sccm.

[0080] The time is between 10 and 15 minutes. For example, the time is 12 minutes.

[0081] Specifically, this can include reducing the Ar flow rate to 400 sccm and controlling the Ar introduction time to 12 minutes. This can remove impurities and moisture from the surface of the Al target.

[0082] The third step is to grow an AlN layer on the substrate.

[0083] Specifically, this may include: controlling the power to be 3500W to 5000W, the flow rate of nitrogen to be 300sccm to 500sccm, the flow rate of oxygen to be 3sccm to 6sccm, the time to be 10min to 15min, and the temperature to be 450℃ to 550℃, sputtering an Al target to generate the first AlN layer.

[0084] After the AlN layer has grown, the preparation method may include shutting off all gases for approximately 30 to 60 seconds. This serves as a surface annealing process, resulting in a more compact AlN film.

[0085] Prior to step S12, the preparation method may include: growing an undoped GaN layer on the buffer layer.

[0086] Compared to the substrate, since the crystal structure of the undoped GaN layer is similar to that of the n-type layer, setting the undoped GaN layer as a transition layer can improve the crystal quality of the subsequent epitaxial layer.

[0087] The thickness of the undoped GaN layer is 1 μm to 2 μm. For example, the thickness of the undoped GaN layer is 1.5 μm.

[0088] Specifically, after the growth of the low-temperature GaN buffer layer, the temperature is adjusted to 1000 °C to 1200 °C, and an undoped GaN layer with an epitaxial growth thickness of 1 μm to 2 μm is grown. The growth pressure is 100 Torr to 500 Torr, and the V / III ratio is 200 to 3000.

[0089] Step S12 may include the following steps:

[0090] First, an n-type layer is grown on the undoped GaN layer.

[0091] Optionally, the n-type layer may be an n-type GaN layer. The thickness of the n-type layer is 1.5 μm to 3.5 μm. Among them, the dopant of the n-type layer is silane. <00***199>Specifically, after the growth of the undoped GaN layer, an n-type GaN layer with a stable Si doping concentration is grown, with a thickness of 1.5 μm to 3.5 μm. The growth temperature is 950 °C to 1150 °C, the growth pressure is 300 Torr to 500 Torr, and the V / III ratio is 400 to 3000.

[0093] Second, a light-emitting layer is grown on the n-type layer.

[0094] Specifically, after the growth of the n-type layer, an alternately stacked quantum well layer and quantum barrier layer are grown.

[0095] Among them, the quantum well layer is an In , , ,

[0099] ,

[0100] ,

[0098] Ga 1-y N(0.1 < y < 0.3) layer. The quantum well layer may include a first InGaN layer, a second InGaN layer, and a third InGaN layer stacked in sequence.

[0096] When growing the quantum well layer, ammonia, triethylgallium, and trimethylindium are introduced into the reaction chamber for a duration of 30 s to 60 s, and the growth temperature in the reaction chamber is controlled to be 700 °C to 850 °C, the growth pressure is 100 Torr to 500 Torr, the V / III ratio is 2000 to 20000, and the thickness is 2 nm to 5 nm.

[0097] Exemplarily, the thickness of the quantum well layer may be 3 nm.

[0098] In the embodiments of the present disclosure, the quantum barrier layer may be an n-type GaN quantum barrier layer.

[0099] When growing the quantum barrier layer, the growth temperature in the reaction chamber is controlled to be 850 °C to 950 °C, the growth pressure is 100 Torr to 500 Torr, the V / III ratio is 2000 to 20000, and the thickness is 5 nm to 15 nm.

[0100] Exemplarily, the thickness of the n-type GaN quantum barrier layer is 10 nm.

[0101] Optionally, the number of quantum well layers and quantum barrier layers are both 8 to 12. For example, the number of quantum well layers and quantum barrier layers are both 10.

[0102] The third step is to grow a p-type layer on the light-emitting layer.

[0103] The p-type layer includes 2 to 5 first nitride semiconductor layers and second nitride semiconductor layers, which are stacked alternately, and the number of first nitride semiconductor layers and the number of second nitride semiconductor layers are the same.

[0104] For example, the p-type layer includes two first nitride semiconductor layers and two second nitride semiconductor layers.

[0105] Optionally, both the first nitride semiconductor layer and the second nitride semiconductor layer are GaN layers.

[0106] The growth of the first first nitride semiconductor layer includes:

[0107] The flow rate of the TMGa source was controlled at 300 sccm to 500 sccm, the flow rate of the Mg source was controlled at 1000 sccm to 1500 sccm, and the growth time was controlled at 2 min to 5 min.

[0108] The growth of the first second nitride semiconductor layer includes:

[0109] Stop the flow of Mg source, adjust the flow rate of TMGa source to 500 sccm to 1000 sccm, and control the growth time to 3 min to 5 min.

[0110] The growth of the second first nitride semiconductor layer includes:

[0111] Stop the flow of the TMGa source and start the flow of the Mg source, controlling the flow rate of the Mg source to be 1000 sccm to 1200 sccm, and the growth time to be 2 min to 4 min.

[0112] The growth of the second second nitride semiconductor layer includes:

[0113] Start introducing the TMGa source, control the flow rate of the TMGa source to 200 sccm to 300 sccm, adjust the flow rate of the Mg source to 800 sccm to 1000 sccm, and control the growth time to 4 min to 8 min.

[0114] Optionally, after growing the p-type layer, the preparation method further includes:

[0115] An Al source is introduced, with the flow rate controlled at 100 sccm to 200 sccm, and the growth time at 1 min to 3 min, forming an Al film on the surface of the p-type layer away from the substrate. Forming an Al film on the surface of the p-type layer makes the surface smoother and prevents defects on the p-type layer surface from extending further into the top layer of the epitaxial layer, thus improving the crystal quality of the light-emitting diode.

[0116] After step S12, the preparation method may further include annealing the epitaxial wafer.

[0117] After epitaxial growth, the temperature of the reaction chamber is lowered to 600°C to 900°C and annealed in a PN2 atmosphere for 10 to 30 minutes. Then, it is gradually lowered to room temperature. Subsequently, a single 22×35mil chip is fabricated through subsequent processing steps such as cleaning, deposition, photolithography, and etching.

[0118] In specific implementation, embodiments of this disclosure may use high-purity H2 and / or N2 as carrier gas, TEGa or TMGa as Ga source, TMIn as In source, SiH4 as n-type dopant, TMAl as aluminum source, ammonia as N source, and Cp2Mg as p-type dopant.

[0119] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes a substrate (10) and an epitaxial layer on the substrate (10). The epitaxial layer includes a p-type layer (50). The p-type layer (50) includes a plurality of first nitride semiconductor layers (51) and a plurality of second nitride semiconductor layers (52). The first nitride semiconductor layers (51) and the second nitride semiconductor layers (52) in the p-type layer (50) are both p-type doped. The plurality of first nitride semiconductor layers (51) and the plurality of second nitride semiconductor layers (52) are stacked alternately. The surface roughness of the first nitride semiconductor layer (51) away from the substrate (10) is greater than the surface roughness of the second nitride semiconductor layer (52) away from the substrate (10). The number of the first nitride semiconductor layer (51) and the second nitride semiconductor layer (52) is 2 to 5, and both the first nitride semiconductor layer (51) and the second nitride semiconductor layer (52) are GaN layers.

2. The light-emitting diode according to claim 1, characterized in that, The surface roughness of the p-type layer (50) away from the substrate (10) is 5 to 7.

3. The light-emitting diode according to claim 1, characterized in that, The thickness ratio of the first nitride semiconductor layer (51) to the thickness of the second nitride semiconductor layer (52) is 1.5 to 5.

4. The light-emitting diode according to any one of claims 1 to 3, characterized in that, The epitaxial layer also includes an Al film, which is located on the surface of the p-type layer away from the substrate.

5. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: Provide a substrate; An epitaxial layer is grown on the substrate. The epitaxial layer includes a p-type layer, which includes a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers. Both the first and second nitride semiconductor layers in the p-type layer are p-type doped. The plurality of first and second nitride semiconductor layers are stacked alternately. The roughness of the surface of the first nitride semiconductor layer away from the substrate is greater than the roughness of the surface of the second nitride semiconductor layer away from the substrate. The number of the first and second nitride semiconductor layers is 2 to 5. Both the first and second nitride semiconductor layers are GaN layers.

6. The preparation method according to claim 5, characterized in that, Both the first nitride semiconductor layer and the second nitride semiconductor layer are GaN layers; The first nitride semiconductor layer is formed in the following manner: The flow rate of the TMGa source was controlled at 300 sccm to 500 sccm, the flow rate of the Mg source was controlled at 1000 sccm to 1500 sccm, and the growth time was controlled at 2 min to 5 min. The first second nitride semiconductor layer is formed in the following manner: Stop the flow of Mg source, adjust the flow rate of TMGa source to 500 sccm to 1000 sccm, and control the growth time to 3 min to 5 min.

7. The preparation method according to claim 6, characterized in that, The second first nitride semiconductor layer is formed in the following manner: Stop the flow of the TMGa source and start the flow of the Mg source, controlling the flow rate of the Mg source to be 1000 sccm to 1200 sccm, and the growth time to be 2 min to 4 min. The second second nitride semiconductor layer is formed in the following manner: Start introducing the TMGa source, control the flow rate of the TMGa source to 200 sccm to 300 sccm, adjust the flow rate of the Mg source to 800 sccm to 1000 sccm, and control the growth time to 4 min to 8 min.

8. The preparation method according to any one of claims 5 to 7, characterized in that, After growing the p-type layer, the process further includes: An Al source is introduced, and the flow rate of the Al source is controlled to be 100 sccm to 200 sccm. The growth time is 1 min to 3 min, and an Al film is formed on the surface of the p-type layer away from the substrate.

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