Quasi-two-level SVPWM modulation method of three-phase three-level inverter
By employing a quasi-two-level SVPWM modulation method for a three-phase three-level inverter, vector calculations are simplified through modulation wave shifting and switching delay. This solves the problem of midpoint potential imbalance in the three-level inverter, achieving midpoint potential self-balancing and stable output current quality.
Patent Information
- Application Number
- CN202310002582.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-03
- Publication Date
- 2026-02-10
- Estimated Expiration
- 2043-01-03
AI Technical Summary
The problem of unbalanced midpoint potential in three-level inverters leads to poor output current quality and increased switching voltage withstand capability, while existing algorithms have high computational complexity.
A quasi-two-level SVPWM modulation method using a three-phase three-level inverter is adopted. By shifting the modulation wave and delaying the switching, vector calculation is simplified, and midpoint potential self-balancing is achieved.
It reduces computational complexity, stabilizes the midpoint potential, avoids damage to the switching transistor, and ensures the quality of the output current.
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Figure CN115987126B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of inverter pulse width modulation technology, specifically a quasi-two-level SVPWM modulation method for a three-phase three-level inverter. Background Technology
[0002] With the continuous improvement of power electronics technology and the performance of semiconductor devices, three-level inverters are widely used in high-voltage, high-power applications. However, the midpoint potential imbalance problem in three-level inverters is quite prominent. This not only degrades the quality of the output current but may even cause the switching transistors to overheat and be damaged, significantly reducing the output performance and reliability of the three-level inverter. To suppress the fluctuation of the midpoint potential in three-level inverters, existing methods adjust the action time of the vectors using algorithms based on the three-level output to achieve midpoint potential balance, increasing computational complexity. Furthermore, traditional three-level SVPWM requires the calculation of 27 voltage vectors, which, when combined with the midpoint potential balancing algorithm, further increases computational complexity.
[0003] Therefore, this invention proposes a quasi-two-level SVPWM modulation method for a three-phase three-level inverter, which achieves quasi-two-level output of the inverter by shifting the modulation wave, simplifying the vector calculation process. Summary of the Invention
[0004] In view of the problems existing in the prior art, the technical problem to be solved by the present invention is to provide a quasi-two-level SVPWM modulation method for a three-phase three-level inverter.
[0005] The technical solution adopted by the present invention to solve the aforementioned technical problem is as follows:
[0006] A quasi-two-level SVPWM modulation method for a three-phase three-level inverter, characterized in that the method includes the following steps:
[0007] Step 1: Divide the inverter's space voltage vector evenly into six sectors, which are denoted as I to VI; determine the sector where the reference voltage vector is located.
[0008] Step 2: Based on the volt-second balance principle, calculate the duration of action of the zero voltage vector and two adjacent non-zero voltage vectors in the sector;
[0009] Step 3: Generate the original three-phase modulation wave and the translated three-phase modulation wave according to Table 3; if there is no midpoint potential shift due to changes in load, etc., proceed to step 5; otherwise, proceed to steps 4 and 5.
[0010] Table 3:
[0011]
[0012] Among them, T cm1 Tcm2 T cm3 These represent the original three-phase modulated waves, T and T, respectively. c ' m1 T c ' m2 and T c ' m3 T represents the three-phase modulated wave after translation. delay Indicates the switching delay time; T a T b T c The three variables satisfy the following equation:
[0013]
[0014] In the formula, T s For the switching cycle, T1 and T2 are the durations of action of two adjacent non-zero voltage vectors U1 and U2 in sector I, respectively;
[0015] Step 4: Define vector x based on the position of the reference voltage vector. If the reference voltage vector is located in sector I, then x = [1, 0, -1]; if the reference voltage vector is located in sector II, then x = [0, 1, -1]; if the reference voltage vector is located in sector III, then x = [-1, 1, 0]; if the reference voltage vector is located in sector IV, then x = [-1, 0, 1]; if the reference voltage vector is located in sector V, then x = [0, -1, 1]; if the reference voltage vector is located in sector VI, then x = [1, -1, 0]; if u N >U dc / 2, define variable y = 1, otherwise y = -1; u N U is the midpoint potential. dc This is the DC bus voltage;
[0016] definition:
[0017] ΔT cm =x×y×ΔT delay (7)
[0018]
[0019] Where, ΔT delay This represents the change in switching delay time.
[0020] The original three-phase modulation wave is generated according to equation (8). By changing the magnitude of the original three-phase modulation wave, the midpoint potential is stabilized at the rated potential.
[0021] Step 5: Compare the three-phase modulation waves with the carrier wave respectively to generate the switching signals of each switch in the three-phase bridge arm. If the shifted A-phase modulation wave is greater than the carrier wave, the switching signals of the first and third switches in the A-phase bridge arm are 0 and 1 respectively. If the shifted A-phase modulation wave is less than the carrier wave, the switching signals of the first and third switches in the A-phase bridge arm are 1 and 0 respectively. If the original A-phase modulation wave is greater than the carrier wave, the switching signals of the second and fourth switches in the A-phase bridge arm are 0 and 1 respectively. If the original A-phase modulation wave is less than the carrier wave, the switching signals of the second and fourth switches in the A-phase bridge arm are 1 and 0 respectively. Similarly, generate the switching signals of each switch in the other two phase bridge arms. 0 indicates off, and 1 indicates on.
[0022] Furthermore, in step three, if T1 + T2 ≤ T s Then, substituting T1 and T2 into equation (6) defines T. a T b T c Three variables; if T1 + T2 > T s Then, according to equation (5), overmodulation processing is performed, and T1' and T2' are used to replace T1 and T2 in equation (6) to define T. a T b T c Three variables;
[0023]
[0024] Furthermore, the carrier wave has a width of T. s The height is T s / 2 triangular carrier.
[0025] Compared with the prior art, the present invention has the following beneficial effects:
[0026] 1. This invention delays the switching time of the first and third switches of a single-phase bridge arm by making the switching time of the first and third switches lag behind that of the second and fourth switches, thus changing the three-level output of the inverter into a quasi-two-level output. Only 8 voltage vectors need to be calculated, while the traditional three-level SVPWM algorithm requires the calculation of 27 voltage vectors. Therefore, the method of this invention simplifies the process of vector calculation and switching state generation, reduces the computational complexity, and at the same time retains the advantage of low voltage stress on the switching transistors brought about by the topology.
[0027] 2. When the load is balanced, the midpoint potential fluctuation is minimal and stable, achieving self-balancing of the midpoint potential without the need for additional control of the midpoint potential.
[0028] 2. When the midpoint potential shifts due to load changes, the midpoint potential is balanced by adjusting the switching time of the quasi-two-level output level, thus stabilizing it at the rated potential. This ensures the quality of the inverter output current and prevents damage to the switching transistors. Attached Figure Description
[0029] Figure 1 This is the topology diagram of a three-phase three-level inverter with midpoint clamping;
[0030] Figure 2 This is an overall flowchart of the present invention;
[0031] Figure 3 This is a voltage space vector diagram;
[0032] Figure 4 The topology and switching signal timing diagram of a single-phase bridge arm of the inverter are shown.
[0033] Figure 5 This is a flowchart of the midpoint potential balance adjustment of the present invention;
[0034] Figure 6 This is a waveform diagram of the single-phase modulation wave, carrier wave, and output voltage of the present invention;
[0035] Figure 7(a) shows the simulation results of the midpoint potential of the method of the present invention;
[0036] Figure 7(b) shows the simulation results of the midpoint potential of the traditional three-level SVPWM modulation method;
[0037] Figure 8 This is a comparison chart showing the effect of the midpoint potential balance adjustment of the present invention. Detailed Implementation
[0038] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments, but it is not intended to limit the scope of protection of this application.
[0039] Figure 1 This is a topology diagram of the neutral-point clamped three-phase three-level inverter used in this invention. The neutral-point clamped three-phase three-level inverter includes two DC-side voltage divider capacitors, 12 IGBTs with anti-parallel diodes, and 6 clamping diodes; each phase arm consists of 4 IGBTs with anti-parallel diodes and 2 clamping diodes. Utilizing the clamping effect of the neutral point, the phase voltage output by the inverter includes U... dc U dc There are three voltage levels: / 2 and 0.
[0040] This invention discloses a quasi-two-level SVPWM modulation method for a three-phase three-level inverter, comprising five parts: sector determination, vector action time calculation, modulation wave generation, switching signal generation, and neutral point potential balancing. The specific steps are as follows:
[0041] Step 1: Divide the inverter's space voltage vector into six sectors, each segment representing 60°, to obtain the following: Figure 3The voltage space vector diagram is shown. The six sectors are denoted as I to VI. Sector I is formed by the zero voltage vector U0 and its two adjacent non-zero voltage vectors U1 and U2; sector II is formed by the zero voltage vector U0 and its two adjacent non-zero voltage vectors U2 and U3; and so on, resulting in the non-zero voltage vectors that make up the remaining sectors. The fixed voltage vectors of the six sectors are denoted as U1' to U'6. Fixed voltage vectors refer to the voltage vectors that are always generated during the switching delay. Within each sector, the reference voltage vector U... out It can be obtained by synthesizing a fixed voltage vector, a zero voltage vector and two non-zero voltage vectors that make up the sector. Since the switching time is short, the influence of the fixed voltage vector is not considered. Therefore, the reference voltage vector is synthesized by the zero voltage vector of the sector and two adjacent non-zero voltage vectors.
[0042] The value of parameter n is calculated based on the reference voltage vector, and the sector where the reference voltage vector is located is determined based on the correspondence between n and sectors. The purpose of determining the sector where the reference voltage vector is located is to determine the non-zero voltage vector used in this switching cycle. u α and u β Represents the reference voltage vector U out The components on the α and β axes are defined as U. ref1 U ref2 and U ref3 Three variables, let
[0043]
[0044] Let U define three more variables, a, b, and c. ref1 If U > 0, then a = 1; otherwise, a = 0. ref2 If U > 0, then b = 1; otherwise, b = 0. ref3 If c > 0, then c = 1; otherwise, c = 0.
[0045] Let n = 4c + 2b + a, then we can obtain the relationship between n and the sector, see Table 1;
[0046] Table 1. Correspondence between n and sectors
[0047] n 3 1 5 4 6 2 sector Ⅰ Ⅱ Ⅲ Ⅳ Ⅴ Ⅵ
[0048] Step 2: Calculate the duration of the zero voltage vector and each non-zero voltage vector; taking sector I as an example, the following formula is obtained based on the volt-second balance principle:
[0049]
[0050] Among them, T s The switching cycle is T0, T1, and T2, which are the durations of the zero voltage vector U0 and the non-zero voltage vectors U1 and U2, respectively.
[0051] Further calculations yielded T1, T2, and the reference voltage vector U. out The relationship between the α and β axis components is as follows:
[0052]
[0053] Among them, U dc This is the DC bus voltage;
[0054] Similarly, the duration of action of each non-zero voltage vector in other sectors can be obtained; let
[0055]
[0056] The duration of the zero voltage vector and each non-zero voltage vector is obtained, see Table 2;
[0057] Table 2. Implementation time of zero voltage vector and non-zero voltage vector
[0058]
[0059] Step 3: Generate the original three-phase modulation wave and the translated three-phase modulation wave; the translated three-phase modulation wave determines the switching signals of the first and third switches of the corresponding phase bridge arm, and the original three-phase modulation wave determines the switching signals of the second and fourth switches of the corresponding phase bridge arm.
[0060] Taking sector I as an example, if T1+T2≤T s Then, substituting T1 and T2 into equation (6) defines T. a T b T c Three variables; if T1 + T2 > T s Then, according to equation (5), overmodulation processing is performed, and T1' and T2' are used to replace T1 and T2 in equation (6) to define T. a T b T c Three variables; the three-phase modulation waveforms of each sector are shown in Table 3. If the load does not change, proceed to step five; if the load changes, proceed to steps four and five.
[0061]
[0062]
[0063] Table 3 Three-phase modulation waveforms for each sector
[0064]
[0065]
[0066] Among them, T cm1 T cm2T cm3 These represent the original A, B, and C phase modulation waves, respectively, and T... c ' m1 T c ' m2 and T c ' m3 These represent the shifted A, B, and C phase modulation waves, respectively; T delay T represents the switching delay time. delay The value is greater than the dead time;
[0067] Step 4: When the load changes, the neutral point potential is shifted by balancing the neutral point potential, that is, the original three-phase modulation wave is generated according to formula (8), so that the neutral point potential is stabilized at the rated potential; the neutral point potential balancing refers to adjusting the switching time of the second and fourth switching tubes of each phase bridge arm by adjusting the magnitude of the original three-phase modulation wave.
[0068] Figure 5 This is a flowchart for adjusting the midpoint potential balance. The vector x is defined based on the position of the reference voltage vector. If the reference voltage vector is located in sector I, then x = [1, 0, -1]; if it is located in sector II, then x = [0, 1, -1]; if it is located in sector III, then x = [-1, 1, 0]; if it is located in sector IV, then x = [-1, 0, 1]; if it is located in sector V, then x = [0, -1, 1]; if it is located in sector VI, then x = [1, -1, 0]; based on the midpoint potential and the reference voltage U... dc The relational definition of variable y is / 2, if u N >U dc / 2, then y = 1, otherwise y = -1; let
[0069] ΔT cm =x×y×ΔT delay (7)
[0070]
[0071] Where, ΔT delay This represents the change in switching delay time.
[0072] Step 5: Compare the three-phase modulated waves with the carrier wave respectively to generate the switching signals of each switch in the three-phase bridge arm; taking the A-phase modulated wave as an example, if the shifted A-phase modulated wave T c ' m1 If the signal is greater than the carrier wave, then the switching signals S of the first and third switches in phase A bridge arm... a1 S a3 The values are 0 and 1 respectively; if the shifted A-phase modulation wave T c ' m1If the signal is less than the carrier wave, then the switching signals S of the first and third switches in phase A bridge arm will be... a1 S a3 They are 1 and 0 respectively; if the original A-phase modulation wave T cm1 If the signal is greater than the carrier wave, then the switching signals S of the second and fourth switches in phase A bridge arm will be greater than the carrier wave. a2 S a4 They are 0 and 1 respectively; if the original A-phase modulation wave T cm1 If the signal is less than the carrier wave, then the switching signals S of the second and fourth switches in phase A bridge arm... a2 S a4 The values are 1 and 0 respectively; similarly, the switching signals for each switch in the other two phase arms are generated; 0 indicates off, and 1 indicates on; the timing diagram of the switching signals for a single phase arm is as follows. Figure 4 As shown. The carrier wave has a width of T. s The height is T s / 2 triangular carrier.
[0073] Figure 6 The diagram shows the phase voltage waveform output by the method of this invention. The phase voltage is a quasi-two-level waveform.
[0074] To verify the superiority of the method of the present invention, a simulation comparison was conducted between the method of the present invention and the traditional three-level SVPWM modulation method. The system operated stably under the same conditions. Figures 7(a) and (b) are simulation results of the method of the present invention and the traditional three-level SVPWM modulation method, respectively. As can be seen from Figure 7(b), the midpoint potential u obtained by the traditional three-level SVPWM modulation method... N Significant fluctuations occurred, with the midpoint potential u at a bus voltage of 15V. N The fluctuation amplitude exceeded 2V; however, using the quasi-two-level SVPWM modulation method of this invention, the midpoint potential u N There are almost no fluctuations; it remains stable at the rated potential. The specific principle is as follows:
[0075] Based on the switching states of the four switching transistors in a single-phase bridge arm, the output state of the inverter is defined as three states: P, O, and N, as shown in Table 4.
[0076] Table 4 Inverter Output State Definitions
[0077]
[0078] Among them, S1, S2, S3, and S4 are the switching signals of single-phase bridge arm switching transistors V1, V2, V3, and V4, respectively;
[0079] The output status of the inverter in each sector is shown in Table 5:
[0080] Table 5 Output Status of Inverters in Each Sector
[0081] sector Output status Ⅰ NNN-ONN-PNN-PON-PPN-PPO-PPP-PPP-PPO-PPN-PON-PNN-ONN-NNN Ⅱ NNN-NON-NPN-OPN-PPN-PPO-PPP-PPP-PPO-PPN-OPN-NPN-NON-NNN Ⅲ NNN-NON-NPN-NPO-NPP-OPP-PPP-PPP-OPP-NPP-NPO-NPN-NON-NNN Ⅳ NNN-NNO-NNP-NOP-NPP-OPP-PPP-PPP-OPP-NPP-NOP-NNP-NNO-NNN Ⅴ NNN-NNO-NNP-ONP-PNP-POP-PPP-PPP-POP-PNP-ONP-NNP-NNO-NNN Ⅵ NNN-ONN-PNN-PNO-PNP-POP-PPP-PPP-POP-PNP-PNO-PNN-ONN-NNN
[0082] In Table 5, the output states containing 0 are intermediate levels of level switching, which affect the midpoint potential, while other output states have no effect on the midpoint potential. Based on their different effects on the midpoint potential, the intermediate levels of level switching are divided into three categories, as shown in Table 6.
[0083] Table 6 Classification of intermediate states during level switching
[0084] Effect on midpoint potential Includes state Increase the midpoint potential OPP, POP, PPO Lower the midpoint potential ONN, NON, NNO Uncertain impact PON, PNO, OPN, ONP, NPO, NOP
[0085] As shown in Table 5, the output state of each phase within each sector must switch from N to P and then back to O. Assuming the three-phase current remains constant and the system is star-connected during each switching cycle, the three-phase current i... a +i b +i c =0, then during the switching period T s The charge change ΔQ of the internal neutral point capacitor is:
[0086]
[0087] Therefore, in steady state, the fluctuations of the midpoint potential are balanced, and the midpoint potential can achieve self-balancing.
[0088] When the midpoint potential shifts due to load changes, it is adjusted back to the rated potential through midpoint potential balancing; when the midpoint potential is higher than the reference voltage U... dc When the voltage is / 2, the midpoint potential is stabilized at the rated potential by increasing the time of the ONN, NON, and NNO output states and shortening the time of the OPP, POP, and PPO output states; when the midpoint potential is lower than the reference voltage U... dc At / 2, by shortening the time of the three output states ONN, NON, and NNO, and increasing the time of the three output states OPP, POP, and PPO, the midpoint potential is stabilized at the rated potential.
[0089] The effectiveness of midpoint potential balance regulation in a motor control system was verified by conducting simulation comparisons under varying motor speed and torque conditions. Figure 8 (a) and (b) are the fluctuation diagrams of the midpoint potential before and after the midpoint potential balance adjustment when the motor speed changes. Figure 8(c) and (d) show the fluctuations of the midpoint potential before and after midpoint potential balancing adjustment under varying motor torque, respectively. The simulation results show that without midpoint potential balancing adjustment, the midpoint potential exhibits no significant fluctuations during steady-state operation. However, when the load changes, such as with variations in motor speed and torque, the midpoint potential shifts by approximately 1V. After applying midpoint potential balancing adjustment, the midpoint potential shows no significant fluctuations regardless of whether the load changes or the steady-state operation. This demonstrates that the quasi-two-level modulation method of this invention has a good effect on suppressing midpoint potential fluctuations.
[0090] Any aspects not covered in this invention are applicable to existing technologies.
Claims
1. A quasi-two-level SVPWM modulation method for a three-phase three-level inverter, characterized in that, The method includes the following steps: Step 1: Divide the inverter's space voltage vector evenly into six sectors, which are denoted as I to VI; determine the sector where the reference voltage vector is located. Step 2: Based on the volt-second balance principle, calculate the duration of action of the zero voltage vector and two adjacent non-zero voltage vectors in the sector; Step 3: Generate the original three-phase modulation wave and the translated three-phase modulation wave according to Table 3; if the load has not changed, proceed to step 5; otherwise, proceed to steps 4 and 5. Table 3: Among them, T cm1 T cm2 T cm3 These represent the original three-phase modulated waves, T and T, respectively. c ' m1 T c ' m2 and T c ' m3 T represents the three-phase modulated wave after translation. delay Indicates the switching delay time; T a T b T c The three variables satisfy the following equation: In the formula, T s For the switching cycle, T1 and T2 are the durations of action of two adjacent non-zero voltage vectors U1 and U2 in sector I, respectively; Step 4: Define vector x based on the position of the reference voltage vector. If the reference voltage vector is located in sector I, then x = [1, 0, -1]; if the reference voltage vector is located in sector II, then x = [0, 1, -1]; if the reference voltage vector is located in sector III, then x = [-1, 1, 0]; if the reference voltage vector is located in sector IV, then x = [-1, 0, 1]; if the reference voltage vector is located in sector V, then x = [0, -1, 1]; if the reference voltage vector is located in sector VI, then x = [1, -1, 0]; if u N >U dc / 2, define variable y = 1, otherwise y = -1; u N U is the midpoint potential. dc This is the DC bus voltage; definition: ΔT cm =x×y×ΔT delay (7) Where, ΔT delay This represents the change in switching delay time. The original three-phase modulation wave is generated according to equation (8). By adjusting the magnitude of the original three-phase modulation wave, the midpoint potential is stabilized at the rated potential. Step 5: Compare the three-phase modulation waves with the carrier wave respectively to generate the switching signals of each switch in the three-phase bridge arm. If the shifted A-phase modulation wave is greater than the carrier wave, the switching signals of the first and third switches in the A-phase bridge arm are 0 and 1 respectively. If the shifted A-phase modulation wave is less than the carrier wave, the switching signals of the first and third switches in the A-phase bridge arm are 1 and 0 respectively. If the original A-phase modulation wave is greater than the carrier wave, the switching signals of the second and fourth switches in the A-phase bridge arm are 0 and 1 respectively. If the original A-phase modulation wave is less than the carrier wave, the switching signals of the second and fourth switches in the A-phase bridge arm are 1 and 0 respectively. Similarly, generate the switching signals of each switch in the other two phase bridge arms. 0 indicates off, and 1 indicates on.
2. The quasi-two-level SVPWM modulation method for a three-phase three-level inverter according to claim 1, characterized in that, In step three, if T1 + T2 ≤ T s Then, substituting T1 and T2 into equation (6) defines T. a T b T c Three variables; if T1 + T2 > T s Then, according to equation (5), overmodulation processing is performed, and T1' and T2' are used to replace T1 and T2 in equation (6) to define T. a T b T c Three variables; 3. The quasi-two-level SVPWM modulation method for a three-phase three-level inverter according to claim 1 or 2, characterized in that, The carrier wave has a width of T. s The height is T s / 2 triangular carrier.
Citation Information
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