An adjustable-isolation ultra-wideband high-power single-pole double-throw switch circuit

Abstract

This invention discloses an ultra-wideband high-power single-pole double-throw switch circuit with adjustable isolation, belonging to the field of microwave integrated circuit technology. The first and second branches of this circuit have identical structural parameters and are symmetrical about the microstrip line MILN1. Both the first and second branches can function as either conducting or isolating branches. Therefore, one branch can be used as a conducting branch for low-insertion-loss transmission of the input signal, while the other branch acts as an isolating branch to block the input signal transmission, thus achieving both low insertion loss and high isolation for the entire circuit. Furthermore, by adjusting the control voltage of transistor Q7 in the reconfigurable stub, the isolation can be further improved and adjusted according to changes in the desired operating frequency band. In this invention's circuit, adjusting the isolation does not affect the switch's power capacity or the insertion loss of the other branch, solving the problems of bandwidth limitations on isolation and poor high-frequency isolation in high-power single-pole double-throw switches.

Description

Technical Field

[0001] This invention belongs to the field of microwave integrated circuit technology, specifically relating to an ultra-wideband high-power single-pole double-throw switch circuit with adjustable isolation. Background Technology

[0002] As a crucial component of the transceiver front-end system, the radio frequency single-pole double-throw (SPDT) switch is responsible for controlling the transmit and receive branches. Its isolation, insertion loss, and other technical specifications directly impact the overall performance of the transceiver system. Meanwhile, with the continuous development of communication, radar, and electronic warfare technologies, the demand for ultra-wideband and high-power capacity is increasing. However, insertion loss and isolation are mutually restrictive; high power capacity increases the high-frequency parasitic effects of transistors, making it difficult to achieve low insertion loss and high isolation in ultra-wideband high-power switches.

[0003] In 2010, Charles F. Campbell et al. of QORVO Corporation in the United States designed a single-pole double-throw switch with an insertion loss of less than 1.5dB, an isolation of greater than 25dB, and a P1dB of 40dBm in the DC-18GHz frequency band, but a P0.1dB of only 34dBm. See [F. Campbell and DCDumka, "Wideband high power GaN on SiC SPDT switch MMICs," 2010 IEEE MTT-S International Microwave Symposium, 2010, pp. 145-148, doi:10.1109 / MWSYM.2010.5517940.].

[0004] In 2021, Hao-Ran Zhu et al. from Anhui University, China, designed a single-pole double-throw switch operating at DC-30GHz using a π-type topology. The in-band insertion loss was less than 1.5dB and the isolation was greater than 36dB, but the P1 dB was only 20dBm and the P0.1dB was only 16dBm. See [H.-R.Zhu,X.-Y.Ning,Z.-X.Huang,Y.-X.Guo and X.-L.Wu, "Miniaturized, Ultra-Wideband and High Isolation Single Pole Double ThrowSwitch by Using π-Type Topology in GaAs pHEMT Technology," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol.68, no.1, pp.191-195, Jan.2021, doi:10.1109 / TCSII.2020.3001171.].

[0005] In 2022, Yo-Shen Lin et al. from National Central University in Taiwan designed a dual-frequency single-pole double-throw switch operating at 2.45 and 5.8 GHz using a T-bridge as a dual-band λ / 4 transformer. At 2.45 GHz, the insertion loss was less than 1.57 dB and the isolation was greater than 35 dB; at 5.8 GHz, the insertion loss was less than 1.97 dB and the isolation was greater than 29 dB. However, the P1 dB in both dual-band applications was only 14.5 dBm. See [Y.-S.Lin and L.-W.Deng, "Design of a Compact Dual-Band Absorptive Single-Pole Double-Throw Switch," in IEEE Solid-State Circuits Letters, vol.5, pp.90-93, 2022, doi:10.1109 / LSSC.2022.3165641.].

[0006] MACOM's MASW-011129-DIE product uses a PIN diode switch, operates at a frequency of 2–22 GHz, has an in-band isolation greater than 35 dB, and an insertion loss of less than 1 dB, but its P0.1 dB is only 30 dBm. See [www.macom.com].

[0007] Analog Devices' HMC347B uses GaAs pHEMT technology, operates at frequencies from 0.1 to 20 GHz, has a typical in-band isolation greater than 46 dB, and an insertion loss of less than 1.7 dB, but its P1 dB is 25 dBm and its P0.1 dB is only 20 dBm. See [www.analog.com].

[0008] It is evident that current ultra-wideband single-pole double-throw switches are mostly low-power capacity, and their reconfigurability is limited to a narrow dual-frequency operation. Therefore, for ultra-wideband single-pole double-throw switches, achieving both high power capacity and adjustable isolation according to the required operating frequency band remains a gap. Summary of the Invention

[0009] To address the limitations of bandwidth on isolation and poor high-frequency isolation in high-power single-pole double-throw switches, this invention proposes an ultra-wideband high-power single-pole double-throw switch circuit with adjustable isolation. This circuit achieves lower insertion loss and higher isolation while ensuring high power capacity, and its isolation is adjustable with changes in the operating frequency band.

[0010] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows:

[0011] An ultrawideband high-power single-pole double-throw switch circuit with adjustable isolation includes a Port1 port, a microstrip line MILN1, a first branch, a second branch, a Port2 port, and a Port3 port;

[0012] One end of the microstrip line MILN1 is connected to Port1, and the other end is connected to Port2 via the first branch and to Port3 via the second branch.

[0013] The first branch includes: microstrip lines: MILN2, MILN3, MILN4, MILN5, MILN6, MILN7, and MILN8; transistors: Q1, Q2, Q3, Q4, Q5, Q6, and Q7; and pull-up resistors: R 1-1 R 1-2 R 1-3 R 1-4 R 1-5 R 1-6The system includes pull-up resistor R2, resistor R3, and capacitor C1. One end of microstrip line MILN2 is connected to microstrip line MILN1, and the other end is connected to port 2 via microstrip lines MILN3, MILN4, MILN5, MILN6, MILN7, and MILN8 connected in series. Transistor Q1 has its drain connected to the other end of microstrip line MILN2, its source connected to one end of microstrip line MILN3, and its gate connected to one end of resistor R1-1. Transistor Q2 has its drain connected to the other end of microstrip line MILN3, its source connected to one end of microstrip line MILN4, and its gate connected to resistor R1-1. 1-2 One end; the drain of transistor Q3 is connected between microstrip lines MILN4 and MILN5, the source is grounded, and the gate is connected to resistor R. 1-3 One end; the drain of transistor Q4 is connected between microstrip lines MILN5 and MILN6, the source is grounded, and the gate is connected to resistor R. 1-3 One end; the drain of transistor Q5 is connected between microstrip lines MILN6 and MILN7, the source is grounded, and the gate is connected to resistor R. 1-5 One end of the transistor; the drain of transistor Q6 is connected between microstrip lines MILN7 and MILN8, the source is connected to the drain of transistor Q7 and one end of capacitor C1, and the gate is connected to resistor R. 1-6 One end of the transistor Q7; the source of the transistor Q7 is connected to the other end of the capacitor C1 and then grounded; the gate is connected to the DC control power supply V through resistor R2. gc Resistance R 1-1 R 1-2 The other end is connected to a DC power supply V. g1 resistance R 1-3 R 1-4 R 1-5 and R 1-6 The other end is connected to a DC power supply V. g2 One end of resistor R3 is connected to the other end of microstrip line MILN3 and the drain of transistor Q2, and the other end is connected to one end of microstrip line MILN4 and the source of transistor Q2. Transistor Q7, capacitor C1, and resistor R2 together form a reconfigurable stub. By adjusting the control voltage of transistor Q7 in the reconfigurable stub, the isolation can be adjusted according to the change of operating frequency.

[0014] The second branch has the same structural parameters as the first branch and is symmetrical about the microstrip line MILN1. The microstrip line MILN8 of the second branch is connected to the Port3 port.

[0015] Furthermore, both the first branch and the second branch can serve as either a conducting branch or an isolating branch. When Vg1 = 0V and Vg2 = -40V, the first branch is a conducting branch and the second branch is an isolating branch; when Vg1 = -40V and Vg2 = 0V, the first branch is an isolating branch and the second branch is a conducting branch.

[0016] This invention provides an ultra-wideband high-power single-pole double-throw switch circuit with adjustable isolation. The first and second branches of this circuit have identical structural parameters and are symmetrical about the microstrip line MILN1. Both the first and second branches can function as either conducting or isolating branches. Therefore, one branch can be used as the conducting branch for low-insertion-loss transmission of the input signal, while the other branch acts as the isolating branch to block the input signal transmission, thus achieving both low insertion loss and high isolation for the entire circuit. Furthermore, by adjusting the control voltage of transistor Q7 in the reconfigurable stub, the isolation can be further improved and adjusted according to changes in the desired operating frequency band. In this invention's circuit, adjusting the isolation does not affect the switch's power capacity or the insertion loss of the other branch, solving the problems of bandwidth limitations on isolation and poor high-frequency isolation in high-power single-pole double-throw switches. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the ultra-wideband high-power single-pole double-throw switch circuit in Example 1;

[0018] Figure 2 The figure shows the simulation results of insertion loss and isolation of the ultrawideband high-power single-pole double-throw switch circuit in Example 1;

[0019] Figure 3 The figure shows the simulation results of the power capacity of the ultra-wideband high-power single-pole double-throw switch circuit in Example 1. Detailed Implementation

[0020] The technical solutions of the present invention will be further described below with reference to the accompanying drawings and embodiments. It should be noted that in the following description, when the detailed description of known functions and designs may obscure the main content of the present invention, these descriptions will be omitted here.

[0021] Example 1

[0022] like Figure 1 As shown, this embodiment provides an ultrawideband high-power single-pole double-throw switch circuit with adjustable isolation, including Port1, microstrip line MILN1, a first branch, a second branch, Port2, and Port3.

[0023] One end of the microstrip line MILN1 is connected to Port1, and the other end is connected to Port2 via a first branch and to Port3 via a second branch; that is, the first branch connects Port1 to Port3, and the second branch connects Port1 to Port3. Each branch uses a microstrip line to connect transistors in series and parallel, thereby realizing two symmetrical branches.

[0024] The first branch includes: microstrip lines: MILN2, MILN3, MILN4, MILN5, MILN6, MILN7, and MILN8; transistors: Q1, Q2, Q3, Q4, Q5, Q6, and Q7; and pull-up resistors: R 1-1 R 1-2 R 1-3 R 1-4 R 1-5 R 1-6 The system includes pull-up resistor R2, resistor R3, and capacitor C1. One end of microstrip line MILN2 is connected to microstrip line MILN1, and the other end is connected to port 2 via microstrip lines MILN3, MILN4, MILN5, MILN6, MILN7, and MILN8 connected in series. Transistor Q1 has its drain connected to the other end of microstrip line MILN2, its source connected to one end of microstrip line MILN3, and its gate connected to one end of resistor R1-1. Transistor Q2 has its drain connected to the other end of microstrip line MILN3, its source connected to one end of microstrip line MILN4, and its gate connected to resistor R1-1. 1-2 One end; the drain of transistor Q3 is connected between microstrip lines MILN4 and MILN5, the source is grounded, and the gate is connected to resistor R. 1-3 One end; the drain of transistor Q4 is connected between microstrip lines MILN5 and MILN6, the source is grounded, and the gate is connected to resistor R. 1-3 One end; the drain of transistor Q5 is connected between microstrip lines MILN6 and MILN7, the source is grounded, and the gate is connected to resistor R. 1-5 One end of the transistor; the drain of transistor Q6 is connected between microstrip lines MILN7 and MILN8, the source is connected to the drain of transistor Q7 and one end of capacitor C1, and the gate is connected to resistor R. 1-6 One end of the transistor Q7; the source of the transistor Q7 is connected to the other end of the capacitor C1 and then grounded; the gate is connected to the DC control power supply V through resistor R2. gc Resistance R 1-1 R 1-2 The other end is connected to a DC power supply V. g1 resistance R 1-3 R 1-4 R 1-5 and R 1-6The other end is connected to a DC power supply V. g2 One end of resistor R3 is connected to the other end of microstrip line MILN3 and the drain of transistor Q2, and the other end is connected to one end of microstrip line MILN4 and the source of transistor Q2. In this embodiment, transistor Q7, capacitor C1, and resistor R2 together constitute a reconfigurable stub. By adjusting the control voltage of transistor Q7 in the reconfigurable stub, the isolation can be further improved and adjusted according to the desired operating frequency band.

[0025] The second branch has the same structural parameters as the first branch and is symmetrical to the first branch about the microstrip line MILN1. The microstrip line MILN8 of the second branch is connected to Port3. By changing the control voltage of transistor Q7 in the reconfigurable stub, the isolation can be improved and adjusted according to the desired operating frequency.

[0026] In use, the RF signal is input through Port1 and then enters two symmetrical branches. When the DC power supply V... g1 =0V, V g2 At -40V, the branch from Port1 to Port2 is a conducting branch, with transistors Q1 and Q2 conducting. The equivalent resistance is the insertion loss of the conducting branch. Transistors Q3, Q4, Q5, and Q6 are turned off, which is equivalent to a resistor and capacitor in parallel. A small amount of signal is transmitted to ground through this path, which is the inherent insertion loss of the conducting path. The branch from Port1 to Port3 is an isolation branch, with transistors Q1 and Q2 turned off. R3 is connected in parallel with Q2 to improve low-frequency isolation. Transistors Q3, Q4, Q5, and Q6 are conducted, which is equivalent to a resistor grounded, further increasing the isolation.

[0027] When the control voltage V gc At -50V, the switch operates with optimal isolation in the 2-18GHz frequency band, achieving an isolation greater than 34dB. In the Port1 to Port3 isolation branch, the capacitance of transistor Q7 connected in parallel with C1 increases, and this capacitance, along with the equivalent resistance of the preceding transistor, is grounded, further enhancing the isolation of the isolation branch. In the branch from Port1 to Port2, which is a conducting branch, the capacitance of transistor Q7 connected in parallel with capacitor C1 in the reconfigurable stub has minimal impact on the off-state equivalent capacitance of transistor Q6. Therefore, the reconfigurable stub does not affect the insertion loss of the conducting branch. When the control voltage V... gc At -5V, the switch operates with optimal isolation in the 2-13GHz frequency band, with isolation greater than 40dB. The equivalent capacitance of transistor Q7 is affected by the control voltage V. gc As the absolute value increases, the resonant frequency of the reconfigurable stub shifts to lower frequencies, thereby further increasing the isolation at lower frequencies. When the control voltage V... gcWhen the voltage is -5V to -50V, the optimal isolation can be achieved when the maximum operating frequency of the switch is between 13GHz and 18GHz. The branch from Port1 to Port3 is an isolated branch with an isolation of 34dB (V). gc =-50V) and 40dB(V gc Between -5V, the insertion loss of the Port1 to Port2 conducting branch and the switch P0.1dB remain unchanged, with the insertion loss less than 0.52dB and P0.1dB greater than 44dBm.

[0028] When the DC power supply V g1 =-40V, V g2 When the voltage is 0V, the branch from Port1 to Port2 is an isolated branch, and the branch from Port1 to Port3 is a conductive branch. The working principle of the two branches is the same as the process described above.

[0029] To better demonstrate the effect of the ultra-wideband high-power single-pole double-throw switching circuit in this embodiment, this embodiment selects a DC power supply V... g1 =0V, V g2 = -40V, control voltage V gc Simulations were performed at -5V, -20V, and -50V, with operating frequencies of 13GHz, 15GHz, and 18GHz. Figure 2 , Figure 3 As shown, the ultra-wideband high-power single-pole double-throw switch circuit of this embodiment can switch its operating frequency arbitrarily within the range of 2-18GHz to 2-13GHz. When the operating frequency is 2-18GHz, its insertion loss is less than 0.52dB, its isolation is greater than 34dB, and its P0.1 dB is greater than 44dBm. When the operating frequency is 2-13GHz, the isolation is greater than 40dB, while the insertion loss and P0.1dB remain unchanged.

[0030] In summary, this invention proposes a novel ultrawideband high-power single-pole double-throw switch structure with adjustable isolation. By changing the control voltage of the transistor in the reconfigurable stub of each branch, the isolation can be improved and adjusted according to the change of the required operating frequency band, without affecting the insertion loss of the other branch or the power capacity of the switch. This solves the problem of the limitation of isolation by the operating bandwidth of high-power single-pole double-throw switches and the problem of poor high-frequency isolation.

Claims

1. An ultrawideband high-power single-pole double-throw switch circuit with adjustable isolation, comprising Port1, a microstrip line MILN1, a first branch, a second branch, Port2, and Port3, characterized in that: One end of the microstrip line MILN1 is connected to Port1, and the other end is connected to Port2 via the first branch and to Port3 via the second branch. The first branch includes: microstrip lines: MILN2, MILN3, MILN4, MILN5, MILN6, MILN7, and MILN8; transistors: Q1, Q2, Q3, Q4, Q5, Q6, and Q7; and pull-up resistors: R 1-1 R 1-2 R 1-3 R 1-4 R 1-5 R 1-6 The system includes pull-up resistor R2, resistor R3, and capacitor C1. One end of microstrip line MILN2 is connected to microstrip line MILN1, and the other end is connected to port 2 via microstrip lines MILN3, MILN4, MILN5, MILN6, MILN7, and MILN8 connected in series. The drain of transistor Q1 is connected to the other end of microstrip line MILN2, the source is connected to one end of microstrip line MILN3, and the gate is connected to one end of resistor R1-1. The drain of transistor Q2 is connected to the other end of microstrip line MILN3, the source is connected to one end of microstrip line MILN4, and the gate is connected to resistor R1-1. 1-2 One end; the drain of transistor Q3 is connected between microstrip lines MILN4 and MILN5, the source is grounded, and the gate is connected to resistor R. 1-3 One end; the drain of transistor Q4 is connected between microstrip lines MILN5 and MILN6, the source is grounded, and the gate is connected to resistor R. 1-3 One end; the drain of transistor Q5 is connected between microstrip lines MILN6 and MILN7, the source is grounded, and the gate is connected to resistor R. 1-5 One end of the transistor; the drain of transistor Q6 is connected between microstrip lines MILN7 and MILN8, the source is connected to the drain of transistor Q7 and one end of capacitor C1, and the gate is connected to resistor R. 1-6 One end of the transistor Q7; the source of the transistor Q7 is connected to the other end of the capacitor C1 and then grounded; the gate is connected to the DC control power supply V through resistor R2. gc Resistance R 1-1 R 1-2 The other end is connected to a DC power supply V. g1 resistance R 1-3 R 1-4 R 1-5 and R 1-6 The other end is connected to a DC power supply V. g2 One end of resistor R3 is connected to the other end of microstrip line MILN3 and the drain of transistor Q2, and the other end is connected to one end of microstrip line MILN4 and the source of transistor Q2; transistor Q7, capacitor C1 and resistor R2 together constitute a reconfigurable stub, and the isolation within the operating frequency band is adjusted by adjusting the control voltage of transistor Q7 in the reconfigurable stub. The second branch has the same structural parameters as the first branch and is symmetrical about the microstrip line MILN1. The microstrip line MILN8 of the second branch is connected to the Port3 port.

2. The ultra-wideband high-power single-pole double-throw switch circuit with adjustable isolation as described in claim 1, characterized in that: Both the first branch and the second branch can be used as conducting branches or isolating branches. When Vg1 = 0V and Vg2 = -40V, the first branch is a conducting branch and the second branch is an isolating branch; when Vg1 = -40V and Vg2 = 0V, the first branch is an isolating branch and the second branch is a conducting branch.

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