An error correction method and device for data masking and a storage medium
By generating and grouping correction codes, the problems of incorrect data masking judgment and reduced error correction capability are solved, achieving accurate data masking judgment and a simplified transmission process.
Patent Information
- Application Number
- CN202310093549.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-31
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2043-01-31
AI Technical Summary
In existing technologies, the correction code encoding method for determining whether data blocking has occurred is prone to errors in judgment and reduces the amount of data that the correction code can correct.
The target data is acquired to generate a first correction code. At least four bits are selected as the second correction code. The correction code is divided into two groups, each with at least two bits. The code is encoded according to a preset rule so that the XOR value of each group is 0. When the data is masked, it is re-encoded so that the XOR value is 1. The target data and the correction code are written into the storage array. When reading, the XOR value is judged to perform the data error correction process.
It effectively avoids errors in data masking judgment, maintains the error correction capability of all correction codes, avoids the reduction in error correction capability caused by fixed data masking bits, and simplifies the transmission process.
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Figure CN115987304B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer information processing technology, and specifically to an error correction method, apparatus and storage medium for data masking. Background Technology
[0002] For memory chips, data errors may occur during the writing and reading process. To address this issue, error correction codes (ECC) are applied to memory chips.
[0003] For Dynamic Random Access Memory (DRAM) chips, the standard specifies certain functions, such as data masking (DM) and burst chop. Enabling these functions ensures that the number of bits of data written to the chip varies with each write operation. However, error correction codes (ECC) are encoded for all data. To address this issue, the conventional approach is to first perform a read operation when writing new data, retrieving the existing data from the memory cell and then correcting the read data. Next, based on the data masking or burst chop signal, the corresponding data is selected and combined with the newly written data to form a data packet. This data packet is then encoded to obtain the error correction code, and stored in the memory matrix along with the original data. Therefore, for chips with data masking (DM) and burst chop, the entire data writing process involves two steps: read and write. This makes the write process with data masking (DM) or burst chop take longer than a normal write process. For Low-Power Double Data Rate Synchronous Dynamic Random Access Memory (LPDDR), regular writes and writes with data mask (DM) are different commands with different timings, thus satisfying the previously described problem. However, for Conventional Double Data Rate Synchronous Dynamic Random Access Memory (DRAM), there is no distinction between regular writes and writes with data mask (DM). Writes with data mask are the same process as regular writes. In this case, the correction code written is meaningless, and the data should not be corrected based on the correction code when reading data. Therefore, it is necessary to find a way to distinguish between regular writes and data mask (DM) writes when reading data.
[0004] To determine whether data masking has occurred, existing technologies offer two solutions: 1. Determine if data masking has occurred by XORing the correction code. A result of 0 indicates normal data transmission, while a result of 1 indicates data masking. The drawback of this method is that if the correction code is transmitted incorrectly by even one bit, the XOR value will change from 1 to 0, leading to errors in the system's determination of whether data masking has occurred. 2. Set a fixed data mask bit in the correction code and manually assign values to the data mask bit to distinguish whether data masking has occurred. The drawback is that this reduces the number of bits in the correction code capable of error correction, affecting the amount of data that can be corrected. Therefore, a new error correction scheme for data masking is needed to solve the above problems. Summary of the Invention
[0005] The purpose of this application is to provide a method, apparatus, and storage medium for correcting data masking, in order to solve the problem that the encoding method of the correction code for determining whether data masking has occurred in the prior art is prone to errors in judgment and reduces the amount of data that the correction code can correct.
[0006] To achieve the above objectives, this application provides an error correction method for data masking, comprising the steps of: acquiring target data, generating a corresponding first correction code based on the target data, selecting at least four bits from the first correction code as a second correction code, and dividing the second correction code into two groups, with at least two bits of the second correction code in each group.
[0007] The second correction code is encoded according to a preset rule, such that the XOR value between the second correction codes in each group is 0.
[0008] When performing data masking, the second correction code is re-encoded so that the XOR value between the second correction codes in each group is 1.
[0009] Write the target data and the first correction code into the storage array;
[0010] The target data and the corresponding first correction code are read from the storage array, and the XOR value between the second correction codes of each group is obtained. Based on the obtained XOR value, it is determined whether to perform the data error correction process.
[0011] Optionally, the method for determining whether to perform the data correction process based on the obtained XOR value includes:
[0012] The data correction process is performed when at least one bit in the obtained XOR value is 0;
[0013] When all bits in the obtained XOR value are 1, the target data is read directly without performing the data error correction process.
[0014] Optionally, the data error correction process includes:
[0015] The read target data is encoded to generate a third correction code. The first correction code and the third correction code are compared, and the target data is corrected based on the comparison result.
[0016] Optionally, both the first correction code and the third correction code are 8-bit Hamming codes.
[0017] To achieve the above objectives, this application also provides an error correction device for data masking, comprising: a memory; and
[0018] A processor connected to the memory, the processor being configured to:
[0019] Obtain target data, generate a corresponding first correction code based on the target data, select at least four bits from the first correction code as a second correction code, divide the second correction code into two groups, with at least two bits of the second correction code in each group;
[0020] The second correction code is encoded according to a preset rule, such that the XOR value between the second correction codes in each group is 0.
[0021] When performing data masking, the second correction code is re-encoded so that the XOR value between the second correction codes in each group is 1.
[0022] Write the target data and the first correction code into the storage array;
[0023] The target data and the corresponding first correction code are read from the storage array, and the XOR value between the second correction codes of each group is obtained. Based on the obtained XOR value, it is determined whether to perform the data error correction process.
[0024] Optionally, the processor is further configured to: determine whether to perform the data error correction process based on the acquired XOR value, including:
[0025] The data correction process is performed when at least one bit in the obtained XOR value is 0;
[0026] When all bits in the obtained XOR value are 1, the target data is read directly without performing the data error correction process.
[0027] Optionally, the processor is further configured such that the data error correction process includes:
[0028] The read target data is encoded to generate a third correction code. The first correction code and the third correction code are compared, and the target data is corrected based on the comparison result.
[0029] Optionally, the processor is further configured such that both the first correction code and the third correction code are 8-bit Hamming codes.
[0030] To achieve the above objectives, this application also provides a computer storage medium having a computer program stored thereon, wherein the computer program, when executed by a machine, implements the steps of the method described above.
[0031] The embodiments of this application have the following advantages:
[0032] This application provides a method for correcting errors caused by data masking, comprising the following steps: acquiring target data; generating a corresponding first correction code based on the target data; selecting at least four bits from the first correction code as a second correction code; dividing the second correction code into two groups, with at least two bits in each group; encoding the second correction code according to a preset rule, such that the XOR value between the second correction codes in each group is 0; when data masking is performed, re-encoding the second correction code, such that the XOR value between the second correction codes in each group is 1; writing the target data and the first correction code into a storage array; reading the target data and the corresponding first correction code from the storage array, obtaining the XOR value between the second correction codes in each group respectively, and determining whether to perform a data correction process based on the obtained XOR value.
[0033] Using the above method, without setting a fixed data mask bit, each correction code has its own encoding method. Whether data masking occurs is determined by the XOR value of the second correction code selected from the first correction code. At least four bits are selected as the second correction code, and the second correction code is divided into two groups, with at least two bits of the second correction code in each group. This effectively avoids the situation where data masking judgment is incorrect. At the same time, all the first correction codes have error correction capabilities, avoiding the problem of reducing the number of data that the correction code can correct due to the fixed setting of the data mask bit. Attached Figure Description
[0034] To more clearly illustrate the embodiments of this application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely exemplary, and those skilled in the art can derive other embodiments based on the provided drawings without creative effort.
[0035] Figure 1 A flowchart illustrating a data masking error correction method provided in an embodiment of this application;
[0036] Figure 2 This is an example of error correction encoding representation for common Hamming codes.
[0037] Figure 3 An error correction coding table for 8-bit correction codes;
[0038] Figure 4 A first correction code encoding table for a data masking error correction method provided in this application embodiment;
[0039] Figure 5 A flowchart illustrating the processing of target data based on a second correction code in an error correction method for data masking provided in this application embodiment;
[0040] Figure 6 This is a block diagram of a data masking error correction device provided in an embodiment of this application. Detailed Implementation
[0041] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0042] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.
[0043] One embodiment of this application provides an error correction method for data masking, referencing... Figure 1 , Figure 1 The flowchart provided in one embodiment of this application illustrates an error correction method for data masking. It should be understood that the method may also include additional boxes not shown and / or the boxes shown may be omitted, and the scope of this application is not limited in this respect.
[0044] The original error correction coding method is derived from Hamming code. To understand this coding method, let's briefly introduce even parity. When transmitting the data string, an additional bit is added as a check bit. When the number of "1"s in the actual data is odd, this check bit is "1"; otherwise, it is "0". This ensures that the total number of "1"s in the transmitted data string is even. When the receiver receives the data, it checks the number of "1"s. If it is even, the transmission is correct; otherwise, it is an error.
[0045] Suppose the transmitted data is "101". Since there are two "1"s in the data, the parity bit is 0. Therefore, "1010" will be transmitted. If one bit is corrupted during transmission, resulting in "0010", the receiver will detect an odd number of "1"s in the data string, indicating an error. Clearly, even parity has two major drawbacks: 1) it can only detect errors, not correct them; 2) it becomes ineffective when two or more even bits change during transmission.
[0046] With the rapid development of science and technology, the probability of data alteration during data communication transmission is extremely small. Therefore, we assume that changes to two or more bits are impossible. Under this premise, Hamming code effectively solves the two shortcomings of even parity check (1. It can only detect errors but cannot correct them; 2. When two or more even bits change during transmission, parity check becomes ineffective).
[0047] Hamming code is a special type of even parity check; it is a combination of multiple even parity checks. Figure 2 In this 72-bit data string, there are correction codes and data bits. The correction codes are located at powers of 2 and are ultimately interspersed among the data bits before being sent out. Taking P1 as an example, the data bits are assigned values for even parity correction codes corresponding to the dark blocks in row S0. That is, all the data corresponding to row S0 is XORed; if the result is 1 (meaning there are an odd number of 1s), then P1 is assigned a value of 1; if the result is 0 (meaning there are an even number of 1s), then P1 is assigned a value of 0. The remaining correction codes are processed similarly, and the correction codes and data bits, a total of 72 bits, are transmitted together. When the receiver receives this 72-bit data string, it will process it according to… Figure 2 The dark block portion of each row is XORed with the corresponding correction code and data bits to obtain the seven-bit code S0 to S6. If S0 to S6 are all "0", it means that no error occurred during transmission; otherwise, it means that an error occurred.
[0048] This Hamming code error correction encoding table can be used in DRAM to compare read and written data for errors. However, there is another mode in our writing process: data masking mode. In this mode, if the data is error-corrected, a string of error correction codes will be obtained. Passing this correction code along with the data is meaningless. Therefore, the above encoding method has two drawbacks: first, the correction code is interspersed with the data bits during transmission, making the transmission cumbersome; second, the above encoding method cannot determine whether data masking has occurred during the writing process.
[0049] The technical solution provided in this application effectively improves upon its two shortcomings.
[0050] In step 101, target data is acquired, and a corresponding first correction code is generated based on the target data. At least four bits are selected from the first correction code as a second correction code, and the second correction code is divided into two groups, with at least two bits of the second correction code in each group.
[0051] In some embodiments, the first correction code is an 8-bit Hamming code.
[0052] Specifically, addressing the first drawback mentioned above, let's assume the transmitted data consists of 64 bits. The correction code interspersed within the data bits is extracted separately, as shown in the reference... Figure 3 In actual chips, 64-bit data is divided into eight groups of eight bits each, so an additional bit is added to the original seven-bit correction code, increasing it to eight bits, so that each eight-bit correction code forms a byte. During transmission, this one-byte correction code follows the eight bytes of data. This approach solves the problem of cumbersome transmission caused by the correction code being interspersed among the data bits in traditional encoding methods.
[0053] Regarding the second drawback mentioned above, as previously stated, the stored error correction code is meaningless under data masking conditions. Since the error correction code is meaningless in this situation, it can be used to store specific information to indicate that the code represents the data masking condition, rather than the code used during normal writing. Therefore, the encoding must be defined to distinguish between the encoding under data masking and the encoding used during normal writing. This application sets up a special error correction code table, so that the error correction codes during normal encoding follow a specific pattern; under data masking conditions, this pattern is violated.
[0054] refer to Figure 3 If we perform an XOR operation on S0 to S7, it essentially involves XORing all data marked as "1" in the graph. It's important to note that some data may require more than one XOR operation. For example... Figure 3A specific error coding table is set up, and the XOR values of S0 to S7 are calculated. This process means that each data point needs to be XORed with itself four times, and then the results of the four XOR operations on each data point are XORed together. Since the result of each data point XORing itself four times is 0, the final XOR result is also 0 (because there must be an even number of "1" data points), that is, the XOR result of S0 to S7 is 0. When data is masked, the values of S0 to S7 are artificially set to have an odd number of "1"s, so the result of the XOR operation on S0 to S7 is 1, thus distinguishing it from the correction code obtained normally according to the error correction coding table. When performing a read operation, different operations can be selected according to the value of the correction code. The specific processing method is as follows:
[0055] 1) If the correction code matches the characteristics of a data-masked correction code, the data can be read directly. There are two scenarios: If the correction code is off by one bit, it indicates a normal encoding process, but the erroneous data is in the correction code (we only consider the case of one bit error). Therefore, the data can be read directly; if the correction code is correct, it indicates a data-masked situation, and the data can also be read directly.
[0056] 2) If the correction code matches the characteristics of a correction code in normal encoding, then the data will undergo an error correction process. There are two scenarios: If the correction code is off by one bit, it indicates a data masking situation, and the error correction process may lead to errors in the final read data; if the correction code is correct, it indicates a normal encoding process, and the data can undergo the error correction process normally.
[0057] To avoid errors in the above process, this embodiment extracts several bits (as the second correction code) from the 8-bit first correction code (greater than or equal to 4, less than or equal to 8) and divides them into two groups, with each group having at least 2 bits.
[0058] In step 102, the second correction code is encoded based on a preset rule, such that the XOR value between the second correction codes in each group is 0.
[0059] In step 103, when data masking is performed, the second correction code is re-encoded so that the XOR value between the second correction codes in each group is 1.
[0060] Specifically, a specific error correction coding table is set so that the XOR operation of the two sets of second correction codes both return "0". When data masking occurs, the values of the two sets of second correction codes are set so that their XOR operation both return "1", thus distinguishing between data masking and normal coding. The specific processing method for read data is as follows: Figure 4 .
[0061] In step 104, the target data and the first correction code are written into the storage array.
[0062] In step 105, the target data and the corresponding first correction code are read from the storage array, and the XOR value between the second correction codes of each group is obtained. Based on the obtained XOR value, it is determined whether to perform the data error correction process.
[0063] Specifically, taking the 4-digit second correction code as an example, such as Figure 4 As shown, S0 and S1 in the 8-bit first correction code are grouped together, and S2 and S3 are grouped together. The values of S0 and S1 can only be 00 or 11, and the values of S2 and S3 can only be 00 or 11. Based on these rules, the encoding method shown in the diagram can be obtained. XORing S0 and S1 according to the encoding method shown in the diagram and naming this value X0, then X0 must be 0; similarly, XORing S2 and S3 and naming the XOR value X1, then X1 must also be 0. That is, during normal writing, the value of X0X1 is 00. When data masking occurs, S0 and S2 are manually set to 1, and S1 and S3 to 0, then the value of X0X1 is 11. Thus, X0X1 can be used to distinguish it from the correction code obtained normally according to the error correction encoding table. Therefore, when reading data, only the error correction code needs to be checked to determine whether data masking has occurred.
[0064] In some embodiments, the method for determining whether to perform the data correction process based on the acquired XOR value includes:
[0065] The data correction process is performed when at least one bit in the obtained XOR value is 0;
[0066] When all bits in the obtained XOR value are 1, the target data is read directly without performing the data error correction process.
[0067] Specifically, if an error occurs in one bit of the encoding table, X0X1 will be 01 if the error is in encoding S0 or S1, and 10 if the error is in encoding S2 or S3. This can be distinguished from the occurrence of a data masking correction code (X0X1 is 11). See the processing flow for reference. Figure 5 When X0X1 is 10, 01 or 00, the target data undergoes a data correction process; when X0X1 is 11, the target data does not undergo a data correction process and is read directly.
[0068] In some embodiments, the data correction process includes:
[0069] The read target data is encoded to generate a third correction code. The first correction code and the third correction code are compared, and a determination is made based on the comparison result to determine whether the target data should be corrected. In some embodiments, the third correction code is an 8-bit Hamming code. For specific implementation details, please refer to the foregoing introduction to the Hamming code encoding principle, which will not be repeated here.
[0070] Using the above method, without setting a fixed data mask bit, each correction code has its own encoding method. Whether data masking occurs is determined by the XOR value of the second correction code selected from the first correction code. At least four bits are selected as the second correction code, and the second correction code is divided into two groups, with at least two bits in each group. This effectively avoids errors in data masking judgment. In special cases (errors in the encoding table of one correction code), it is still possible to distinguish between normal reading / writing and data masking. At the same time, all the first correction codes have error correction capabilities, avoiding the problem of reduced data correction code error correction capacity caused by setting a fixed data mask bit.
[0071] Furthermore, by separating the correction code from the data string and transmitting it separately, the complexity of the transmission process is reduced.
[0072] Figure 6 A module block diagram of an error correction device for data masking provided in an embodiment of this application. The device includes:
[0073] The memory 201; and the processor 202 connected to the memory 201, the processor 202 being configured to: acquire target data, generate a corresponding first correction code based on the target data, select at least four bits from the first correction code as a second correction code, divide the second correction code into two groups, each group containing at least two bits of the second correction code;
[0074] The second correction code is encoded according to a preset rule, such that the XOR value between the second correction codes in each group is 0.
[0075] When performing data masking, the second correction code is re-encoded so that the XOR value between the second correction codes in each group is 1.
[0076] Write the target data and the first correction code into the storage array;
[0077] The target data and the corresponding first correction code are read from the storage array, and the XOR value between the second correction codes of each group is obtained. Based on the obtained XOR value, it is determined whether to perform the data error correction process.
[0078] In some embodiments, the processor 202 is further configured to: determine whether to perform the data error correction process based on the acquired XOR value, including:
[0079] The data correction process is performed when at least one bit in the obtained XOR value is 0;
[0080] When all bits in the obtained XOR value are 1, the target data is read directly without performing the data error correction process.
[0081] In some embodiments, the processor 202 is further configured such that the data error correction process includes:
[0082] The read target data is encoded to generate a third correction code. The first correction code and the third correction code are compared, and the target data is corrected based on the comparison result.
[0083] In some embodiments, the processor 202 is further configured such that both the first correction code and the third correction code are 8-bit Hamming codes.
[0084] For specific implementation methods, please refer to the aforementioned method embodiments, which will not be repeated here.
[0085] This application may be a method, apparatus, system, and / or computer program product. A computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for performing various aspects of this application.
[0086] Computer-readable storage media can be tangible devices capable of holding and storing instructions for use by an instruction execution device. Computer-readable storage media can be, for example—but not limited to—electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.
[0087] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.
[0088] The computer program instructions used to perform the operations of this application may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk, C++, etc., and conventional procedural programming languages such as the "C" language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuits, such as programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), are personalized by utilizing state information from the computer-readable program instructions. These electronic circuits can execute the computer-readable program instructions to implement various aspects of this application.
[0089] Various aspects of this application are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.
[0090] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processing unit of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.
[0091] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions that execute on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.
[0092] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0093] Note that, unless otherwise explicitly stated, all features disclosed in this specification (including any appended claims, abstract, and drawings) may be replaced by alternative features for achieving the same, equivalent, or similar purpose. Therefore, unless explicitly stated otherwise, each disclosed feature is merely one example of a set of equivalent or similar features. Where used, "further," "preferably," "even further," and "more preferably" are simple starting points for describing another embodiment based on the foregoing embodiments, the combination of which with the foregoing embodiments constitutes the complete configuration of another embodiment. Any combination of several "further," "preferably," "even further," or "more preferably" settings following the same embodiment constitutes yet another embodiment.
[0094] Although this application has been described in detail above with general descriptions and specific embodiments, some modifications or improvements can be made to it, which will be obvious to those skilled in the art. Therefore, all such modifications or improvements made without departing from the spirit of this application fall within the scope of protection claimed in this application.
Claims
1. A method of error correction for data masking, characterized by, The method comprises the following steps: acquiring target data, generating a corresponding first correction code based on the target data, selecting at least four bits from the first correction code as a second correction code, dividing the second correction code into two groups, and at least two of the second correction code in each group, the first correction code is an 8-bit Hamming code, the first correction code is a one-byte correction code obtained by adding one bit to the seven-bit correction code of the Hamming code, and the first correction code is transmitted together with the target data after the target data; encoding the second correction code based on a preset rule and an error correction encoding table, so that the exclusive or value between the second correction code in each group is 0; when data masking is performed, the second correction code is re-encoded based on the error correction encoding table, so that the exclusive or value between the second correction code in each group is 1; write the target data and the first correction code to a storage array; read the target data and the corresponding first correction code from the storage array, acquire the exclusive or value between the second correction code in each group respectively, and judge whether to perform a data correction process based on the acquired exclusive or value.
2. The error correction method against data masking according to claim 1, characterized in that, The method for judging whether to perform the data correction process based on the acquired exclusive or value comprises: when at least one of the acquired exclusive or values is 0, the data correction process is performed; when each of the acquired exclusive or values is 1, the target data is directly read out, and the data correction process is not performed.
3. The error correction method against data masking according to claim 1 or 2, characterized in that, The data correction process comprises: encoding the read target data to generate a third correction code, comparing the first correction code and the third correction code, and judging whether to correct the target data according to the comparison result.
4. The error correction method for data masking according to claim 3, characterized in that: the third correction code is an 8-bit Hamming code.
5. An error correction apparatus for data masking, characterized by, comprise: a memory; and a processor connected with the memory, the processor is configured to: acquire target data, generate a corresponding first correction code based on the target data, select at least four bits from the first correction code as a second correction code, divide the second correction code into two groups, and at least two of the second correction code in each group, the first correction code is an 8-bit Hamming code, the first correction code is a one-byte correction code obtained by adding one bit to the seven-bit correction code of the Hamming code, and the first correction code is transmitted together with the target data after the target data; encoding the second correction code based on a preset rule and an error correction encoding table, so that the exclusive or value between the second correction code in each group is 0; when data masking is performed, the second correction code is re-encoded based on the error correction encoding table, so that the exclusive or value between the second correction code in each group is 1; write the target data and the first correction code to a storage array; read the target data and the corresponding first correction code from the storage array, acquire the exclusive or value between the second correction code in each group respectively, and judge whether to perform a data correction process based on the acquired exclusive or value.
6. The error correction apparatus for data masking according to claim 5, wherein, The processor is further configured to: the method for judging whether to perform the data correction process based on the acquired exclusive or value comprises: when at least one bit of the acquired exclusive-OR value is 0, performing the data correction process; when each bit of the acquired exclusive-OR value is 1, directly reading out the target data without performing the data correction process.
7. Error correction apparatus for data masking according to claim 5 or 6, characterized in that, The processor is further configured to: The data correction process comprises: encoding the read target data to generate a third correction code, comparing the first correction code and the third correction code, and determining whether to correct the target data according to a comparison result.
8. The error correction apparatus for data masking according to claim 7, wherein, The processor is further configured to: The third correction code is an 8-bit Hamming code.
9. A computer storage medium having stored thereon a computer program, characterized in that The computer program, when executed by a machine, implements the steps of the method according to any one of claims 1 to 4.
Citation Information
Patent Citations
Error correction method and device for data shielding and storage medium
CN115412103A