Current detection circuit, current detection device and fast charging device

Abstract

The application provides a current detection circuit, a current detection device and a fast charging device. The current detection circuit comprises a sampling circuit, a full-difference operational amplifier circuit and a level shift circuit. The sampling circuit is connected in parallel to a first input end and a second input end of the full-difference operational amplifier circuit. An output end of the full-difference operational amplifier circuit is connected to an input end of the level shift circuit. An output end of the level shift circuit is connected to an external analog-digital conversion module. The current detection circuit is suitable for the fast charging device.

Description

Technical Field

[0001] This invention relates to the field of current detection technology, and in particular to a current detection circuit, a current detection device, and a fast charging device. Background Technology

[0002] Current detection is essential for most electronic systems. As the application of modern electronic systems becomes more and more widespread, the environments faced by current detection circuits are becoming more and more diverse. Different environments also have different performance requirements for current detection circuits. Currently, current detection for fast charging devices needs to be able to detect small differential voltages and withstand high voltage surges at the detection port. Summary of the Invention

[0003] One or more embodiments of the present invention describe a current detection circuit, a current detection device, and a fast charging device, in order to provide a solution to the problem in the prior art that fast charging devices need to both detect small differential voltages and withstand high voltage surges at the detection port.

[0004] In one aspect, the present invention provides a current detection circuit, the circuit comprising: a sampling circuit, a fully differential operational amplifier circuit, and a level shifting circuit, wherein the sampling circuit is connected in parallel to a first input terminal and a second input terminal of the fully differential operational amplifier circuit, the output terminal of the fully differential operational amplifier circuit is connected to the input terminal of the level shifting circuit, and the output terminal of the level shifting circuit is connected to an external analog-to-digital converter module.

[0005] Furthermore, the fully differential operational amplifier circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor. The first operational amplifier is a fully differential operational amplifier. The first resistor is connected to the non-inverting input terminal of the first operational amplifier. The second resistor is connected in parallel between the non-inverting input terminal and the inverting output terminal of the first operational amplifier. The third resistor is connected to the inverting input terminal of the first operational amplifier. The fourth resistor is connected in parallel between the inverting input terminal and the non-inverting output terminal of the first operational amplifier. The non-inverting output terminal of the first operational amplifier is the output terminal of the fully differential operational amplifier circuit.

[0006] Furthermore, the first resistor, the second resistor, the third resistor, and the fourth resistor are adjustable resistors, with the first resistor having the same resistance value as the third resistor, and the second resistor having the same resistance value as the fourth resistor.

[0007] Furthermore, the level shifting circuit includes a fifth resistor, a sixth resistor, and a second operational amplifier. One end of the fifth resistor is connected to the reference voltage input terminal, and the other end is connected to the inverting input terminal of the second operational amplifier. The sixth resistor is connected in parallel between the inverting input terminal and the output terminal of the second operational amplifier. The non-inverting input terminal of the second operational amplifier is the input terminal of the level shifting circuit, and the output terminal of the second operational amplifier is the output terminal of the level shifting circuit.

[0008] Furthermore, the resistance values ​​of the fifth resistor and the sixth resistor are equal.

[0009] Furthermore, the reference voltage of the second operational amplifier is the same as the common-mode input voltage of the fully differential operational amplifier circuit.

[0010] Furthermore, the sampling circuit includes a seventh resistor or a first MOSFET.

[0011] In another aspect, the present invention provides a current detection device comprising the current detection circuit described in the above embodiments.

[0012] In another aspect, the present invention provides a fast charging device comprising the current detection circuit described in the above embodiments.

[0013] The present invention provides a current detection circuit, a current detection device, and a fast charging device. The current detection circuit includes a sampling circuit, a fully differential operational amplifier circuit, and a level shifting circuit. The sampling circuit is connected in parallel to the first and second input terminals of the fully differential operational amplifier circuit. The output terminal of the fully differential operational amplifier circuit is connected to the input terminal of the level shifting circuit, and the output terminal of the level shifting circuit is connected to an external analog-to-digital converter module. The current detection circuit of the present invention is applicable to fast charging devices.

[0014] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and in order to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1This is a schematic diagram of a current detection circuit provided in an embodiment of the present invention. Detailed Implementation

[0017] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0018] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the meaning consistent with their meaning in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless specifically defined.

[0019] Figure 1 This is a schematic diagram of the current detection circuit provided in an embodiment of the present invention, with reference to... Figure 1 An embodiment of the present invention provides a current detection circuit including: a sampling circuit 10, a fully differential operational amplifier circuit 20, and a level shifting circuit 30. The sampling circuit 10 is connected in parallel to the first input terminal and the second input terminal of the fully differential operational amplifier circuit 20. The output terminal of the fully differential operational amplifier circuit 20 is connected to the input terminal of the level shifting circuit 30. The output terminal of the level shifting circuit 30 is connected to an external analog-to-digital converter module 40.

[0020] Furthermore, the sampling circuit 10 in this embodiment of the invention includes a seventh resistor R7, or a first MOSFET, wherein the equivalent resistance of the first MOSFET is used for subsequent calculation of the output current. The current value I of the detected current I in this embodiment of the invention is I = (V... csp -V csn ) / R7. Where R7 is the resistance value of the seventh resistor R7. (V) csp The voltage value at the first input terminal CSP of the fully differential operational amplifier circuit 20, V csn This is the voltage value at the second input terminal CSN of the fully differential operational amplifier circuit 20.

[0021] Furthermore, the fully differential operational amplifier circuit 20 provided in this embodiment of the invention includes a first operational amplifier OP1, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The first operational amplifier OP1 is a fully differential operational amplifier. The first resistor R1 is connected to the non-inverting input terminal of the first operational amplifier OP1. The second resistor R2 is connected in parallel between the non-inverting input terminal and the inverting output terminal of the first operational amplifier OP1. The third resistor R3 is connected to the inverting input terminal of the first operational amplifier OP1. The fourth resistor R4 is connected in parallel between the inverting input terminal and the non-inverting output terminal of the first operational amplifier OP1. The non-inverting output terminal of the first operational amplifier OP1 is the output terminal of the fully differential operational amplifier circuit 10. In addition, the first operational amplifier OP1 in this embodiment of the invention also includes a common-mode voltage input terminal Ref1.

[0022] The first operational amplifier OP1 has a non-inverting input terminal denoted as Vip1, an inverting input terminal denoted as Vin1, a non-inverting output terminal denoted as Outp1, and an inverting output terminal denoted as Outn1. The first operational amplifier OP1 also includes a common-mode voltage input terminal Ref1.

[0023] It should be noted that the current detection input in this embodiment of the invention is a differential signal, and in order to avoid the influence of the offset inside the first operational amplifier OP1 when the differential input voltage is very small, the first operational amplifier OP1 in this embodiment of the invention is an operational amplifier with chop function; in order to avoid the input voltage of the first input terminal CSP and the second input terminal CSN of the fully differential operational amplifier circuit 20 being too high, the first operational amplifier OP1 in this embodiment of the invention is an operational amplifier that supports high voltage.

[0024] Furthermore, in this embodiment of the invention, the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are adjustable resistors. By adjusting the resistance values ​​of each resistor, the amplification factor of the first operational amplifier OP1 can be adjusted. The resistance values ​​of the first resistor R1 and the third resistor R3 are equal, and the resistance values ​​of the second resistor R2 and the fourth resistor R4 are equal. The voltage output of the fully differential operational amplifier circuit 20 is V. outp1 =(V csp -V csn )*R2 / R1, where V csp The first input terminal of the fully differential operational amplifier circuit 20 represents the input voltage of CSP, Vcsn is the second input terminal of the fully differential operational amplifier circuit 20 representing the input voltage of CSN, R1 is the resistance value of the first resistor R1, and R2 is the resistance value of the second resistor R2.

[0025] Further, the level shifting circuit 30 of this embodiment includes a fifth resistor R5, a sixth resistor R6, and a second operational amplifier OP2. One end of the fifth resistor R5 is connected to the reference voltage input terminal Ref2, and the other end is connected to the inverting input terminal of the second operational amplifier OP2. The sixth resistor R6 is connected in parallel between the inverting input terminal and the output terminal of the second operational amplifier OP2. The non-inverting input terminal of the second operational amplifier OP2 is the input terminal of the level shifting circuit 30, and the output terminal of the second operational amplifier OP2 is the output terminal of the level shifting circuit 30. It should be noted that the input voltage V of the reference voltage input terminal Ref2 in this embodiment is... ref2 The common-mode input voltage of the fully differential operational amplifier circuit 20 is the same as that of the input voltage V at the input terminal Ref1 of the first operational amplifier OP1. ref1 V ref1 =V ref2 .

[0026] In this circuit, the fifth resistor R5 and the sixth resistor R6 have the same resistance value, and the output voltage of the second operational amplifier OP2 is V. out =V ref2 +V outp1 V out This is the input signal from the current detection circuit of this embodiment of the invention to the analog-to-digital converter 40.

[0027] The current detection circuit provided in this embodiment of the invention is well-suited for the operating environment of fast charging devices. It can not only identify voltage signals with very small differentials but also withstand high-voltage surges. Furthermore, the output analog signal is guaranteed to be within the sampling range of the analog-to-digital converter 40, thus improving the performance of the fast charging device.

[0028] In another aspect of the present invention, a current detection device is provided, the current detection device including the current detection circuit in the above embodiments.

[0029] In another aspect of the present invention, a fast charging device is also provided, the fast charging device including the current detection circuit in the above embodiments.

[0030] The present invention provides a current detection circuit, a current detection device, and a fast charging device. The current detection circuit includes a sampling circuit 10, a fully differential operational amplifier circuit 20, and a level shifting circuit 30. The sampling circuit is connected in parallel to the first and second input terminals of the fully differential operational amplifier circuit 20. The output terminal of the fully differential operational amplifier circuit 20 is connected to the input terminal of the level shifting circuit 30, and the output terminal of the level shifting circuit 30 is connected to an external analog-to-digital converter module 40. The current detection circuit of the present invention is applicable to fast charging devices.

[0031] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0032] Those skilled in the art will recognize that, in one or more of the examples above, the functions described in this invention can be implemented using hardware, software, widgets, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium.

[0033] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made on the basis of the technical solution of the present invention should be included within the scope of protection of the present invention.

Claims

1. A current detection circuit, characterized in that, The circuit includes: a sampling circuit, a fully differential operational amplifier circuit, and a level shifting circuit. The sampling circuit is connected in parallel to the first and second input terminals of the fully differential operational amplifier circuit. The output terminal of the fully differential operational amplifier circuit is connected to the input terminal of the level shifting circuit. The output terminal of the level shifting circuit is connected to an external analog-to-digital converter module. The fully differential operational amplifier circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor. The first operational amplifier is a fully differential operational amplifier. The first resistor is connected to the non-inverting input terminal of the first operational amplifier. The second resistor is connected in parallel between the non-inverting input terminal and the inverting output terminal of the first operational amplifier. The third resistor is connected to the inverting input terminal of the first operational amplifier. The fourth resistor is connected in parallel between the inverting input terminal and the non-inverting output terminal of the first operational amplifier. The non-inverting output terminal of the first operational amplifier is the output terminal of the fully differential operational amplifier circuit.

2. The circuit according to claim 1, characterized in that, The first resistor, the second resistor, the third resistor, and the fourth resistor are adjustable resistors, with the first resistor having the same resistance value as the third resistor, and the second resistor having the same resistance value as the fourth resistor.

3. The circuit according to claim 1, characterized in that, The level shifting circuit includes a fifth resistor, a sixth resistor, and a second operational amplifier. One end of the fifth resistor is connected to the reference voltage input terminal, and the other end is connected to the inverting input terminal of the second operational amplifier. The sixth resistor is connected in parallel between the inverting input terminal and the output terminal of the second operational amplifier. The non-inverting input terminal of the second operational amplifier is the input terminal of the level shifting circuit, and the output terminal of the second operational amplifier is the output terminal of the level shifting circuit.

4. The circuit according to claim 3, characterized in that, The fifth resistor and the sixth resistor have the same resistance value.

5. The circuit according to claim 4, characterized in that, The reference voltage of the second operational amplifier is the same as the common-mode input voltage of the fully differential operational amplifier circuit.

6. The circuit according to claim 1, characterized in that, The sampling circuit includes a seventh resistor or a first MOSFET.

7. A current detection device, characterized in that, Includes the current detection circuit as described in any one of claims 1-6.

8. A fast charging device, characterized in that, Includes the current detection circuit as described in any one of claims 1-6.

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