Method for adjusting temperature coefficient of reference current of flash memory

Abstract

The application provides a method for adjusting the temperature coefficient of a memory reference current, comprising: dividing all cells of a memory unit into a first group of cells and a second group of cells according to the read current size, wherein the read current of the first group of cells is greater than the read current of the second group of cells; taking a reference cell as a third group of cells; measuring the temperature coefficient of the second group of cells; finding a MOS transistor with a bit of 0 in the third group of cells as a MOS transistor to be adjusted; adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted, so that the temperature coefficient of the current of the third group of cells is the same as the temperature coefficient of the average current of the second group of cells. The application adjusts the temperature coefficient of the reference cell, so that the temperature coefficient of the current of the tail cell is the same as the temperature coefficient of the current of the reference cell, thereby making the current of the reference cell and the current of the tail cell change synchronously with temperature.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory, in particular to a method for adjusting temperature coefficient of reference current of flash memory. BACKGROUND

[0002] In the flash memory, the reference cell is a flash cell with the same structure and process as the storage cell, which is located in a separate row (or column) in the flash memory, and provides a reference current for the read operation of the storage cell. The reference cell in the prior art is programmed in the same way as the storage array and is programmed as "10". The reference cell has a large current and current temperature coefficient as a whole. The reference cell is composed of multiple cells, and the current temperature coefficient of each cell may be different. The current of the reference cell to the outside is composed of the average of the currents of all cells, and therefore the current temperature coefficient of the reference cell is also related to the average of the currents of all cells and temperature. When the temperature is 1 degree Celsius, the relative change of the current is the current temperature coefficient. If the temperature rises by 1 degree Celsius, the current increases, which is a positive temperature coefficient. If the temperature rises, the current decreases, which is a negative temperature coefficient. If the current increases by 1 degree Celsius, it is considered that the temperature coefficient is large.

[0003] However, a small part of all cells in the storage cell is the tail cell, and the tail cell has a smaller current compared with the reference cell. When the temperature changes, the tail cell has a very small (even reverse) temperature coefficient compared with the reference cell, which causes the current of the reference cell and the current of the tail cell not to change synchronously with the temperature, so that the tail cell overflows the reference current range of the reference cell, causing the reference cell to read out error data in the temperature test, resulting in loss of yield. SUMMARY

[0004] The purpose of the present application is to provide a method for adjusting the temperature coefficient of the reference current of the flash memory, which can adjust the temperature coefficient of the reference cell, so that the current temperature coefficient of the reference cell is the same as that of the tail cell, so that the current of the reference cell and the current of the tail cell change synchronously with the temperature, so that the read current of the tail cell is within the reference current range of the reference cell, and the reference cell does not read out error data in the temperature test, which does not cause loss of yield.

[0005] In order to achieve the above purpose, the present application provides a method for adjusting the temperature coefficient of the reference current of the flash memory, comprising:

[0006] all cells of the memory cell are divided into a first group of cells and a second group of cells according to the read current, wherein the read current of the first group of cells is greater than the read current of the second group of cells, and the reference cell is a third group of cells;

[0007] measuring the temperature coefficient of the second group of cells;

[0008] finding a MOS transistor with bit 0 in the third group of cells as a MOS transistor to be adjusted;

[0009] adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted, so that the temperature coefficient of the current of the third group of cells is the same as the temperature coefficient of the average current of the second group of cells.

[0010] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, the flash memory comprises a memory cell and a reference cell.

[0011] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, in the memory cell, the cells with current greater than a set value are divided into a first group of cells, and the rest are a second group of cells.

[0012] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, the third group of cells includes MOS transistors with bit 0 and MOS transistors with bit 1.

[0013] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, the third group of cells includes MOS transistors with bit 0 and MOS transistors with bit 1, and optionally, before adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted, the temperature coefficient of the current of the third group of cells is opposite to the temperature coefficient of the average current of the second group of cells.

[0014] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, before adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted, the temperature coefficient of the current of the third group of cells is less than the temperature coefficient of the average current of the second group of cells.

[0015] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, the relationship between the gate-source voltage, the threshold voltage and the temperature coefficient of the current of the third group of cells is as follows:

[0016]

[0017] wherein, a mu is a temperature variation coefficient of mobility, a vt is a temperature variation coefficient of threshold voltage, mu is electron mobility, Vgs is gate-source voltage, and Vth is threshold voltage.

[0018] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, the gate-source voltage is changed by changing the control gate read voltage.

[0019] Optionally, in the method for adjusting the temperature coefficient of the reference current of the flash memory, the threshold voltage is changed by changing the programming depth.

[0020] In the method for adjusting the temperature coefficient of the reference current of the memory provided by the present application, all cells of a memory array are divided into a first group of cells and a second group of cells according to current size, wherein the current of the first group of cells is greater than the current of the second group of cells; a reference cell is taken as a third group of cells; the temperature coefficient of the second group of cells is measured; a MOS transistor with a bit of 0 in the third group of cells is taken as a MOS transistor to be adjusted; the gate-source voltage and / or the threshold voltage of the MOS transistor to be adjusted is adjusted so that the temperature coefficient of the current of the third group of cells is the same as the temperature coefficient of the average current of the second group of cells. The temperature coefficient of the reference cell is adjusted so that the temperature coefficient of the current of the reference cell is the same as the temperature coefficient of the current of the tail cell, so that the current of the reference cell and the current of the tail cell change synchronously with temperature, so that the tail cell is kept within the reference current range of the reference cell, correct data is read out when the reference cell is tested at temperature, and yield is improved. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a flow chart of the method for adjusting the temperature coefficient of the reference current of the memory according to an embodiment of the present application;

[0022] Figure 2 is a curve diagram for adjusting the temperature coefficient of the third group of cells by adjusting the control gate voltage according to an embodiment of the present application;

[0023] Figure 3 is a curve diagram for adjusting the temperature coefficient of the third group of cells by adjusting the threshold voltage according to an embodiment of the present application. DETAILED DESCRIPTION

[0024] The specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. The advantages and features of the present application will be more apparent from the following description. It should be noted that the accompanying drawings are very simplified and use non-precise proportions, only to facilitate and clarify the purpose of assisting the description of the embodiments of the present application.

[0025] Hereinafter, the terms "first", "second", etc. are used to distinguish between similar elements, and are not necessarily used to describe a particular order or time sequence. It is to be understood that these terms as used herein can be interchanged where appropriate. Similarly, if the method described herein includes a series of steps, the order of the steps presented herein is not necessarily the only order in which the steps can be performed, and some of the steps described herein can be omitted and / or other steps not described herein can be added to the method.

[0026] Please refer to Figure 1 The present application provides a method for adjusting the temperature coefficient of a reference current of a memory, comprising:

[0027] S11: dividing all cells of a memory unit into a first group of cells and a second group of cells according to current size, wherein the current of the first group of cells is greater than the current of the second group of cells, and all reference cells are taken as a third group of cells;

[0028] S12: measuring the temperature coefficient of the second group of cells;

[0029] S13: finding a MOS transistor with a bit of 0 in the third group of cells as a MOS transistor to be adjusted;

[0030] S14: adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted, so that the temperature coefficient of the current of the third group of cells is the same as the temperature coefficient of the average current of the second group of cells.

[0031] Preferably, the memory comprises memory cells and reference cells, the memory cells are used to store data, and the read data is compared with the reference current of the reference cells, when greater than the reference current, the read data is 1, and when less than the reference current, the read data is 0, so the range of the reference current is very important, which involves the problem of whether the read data is accurate. The structure of the reference cells and the memory cells is the same, and the reference cells are located in a column or a row beside the memory cells. In the embodiment of the present application, the cells with a current greater than a set value in the reference cells are divided into a first group of cells, and the rest are divided into a second group of cells, and the set value here is 12 μA. The specific number of the first group of cells and the second group of cells is not limited.

[0032] Preferably, the third group of cells includes MOS transistors with bit value 0 and MOS transistors with bit value 1. The third group of cells includes several MOS transistors with bit value 0 and several MOS transistors with bit value 1. The programming mode of the bit value 0 and the bit value 1 in the reference cell is the same as that of the memory cell, so there is one or two or even more MOS transistors with bit value 0 and MOS transistors with bit value 1. One or more MOS transistors can be adjusted when adjusting the gate-source voltage of the MOS transistors.

[0033] In the embodiment of the present application, the temperature coefficient of the current of the third group of cells and the temperature coefficient of the average current of the second group of cells are opposite before adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted. Alternatively, the temperature coefficient of the current of the second group of cells is smaller than the temperature coefficient of the average current of the second group of cells before adjusting the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted. The second group of cells is the tail cell of the memory cell, and the number of the second group of cells (tail cell) is small in all cells of the memory cell, so the current and the temperature coefficient of the current of the second group of cells (tail cell) can be inconsistent with the current and the temperature coefficient of the current of the third group of cells. Therefore, the purpose of the embodiment of the present application is to adjust the temperature coefficient of the current of the reference cell (the third group of cells) so that the temperature coefficient of the current of the reference cell as a whole is the same as the temperature coefficient of the current of the second group of cells (tail cell), so that the current of the reference cell and the current of the second group of cells (tail cell) change synchronously with temperature (in this case, the read current of the first group of cells will be within the range of the reference current, so it does not need to be considered specially), so that the second group of cells (tail cell) is kept within the reference current range of the reference cell, and the correct data is read out when the reference cell is tested at temperature, improving the yield. The method adopted is to adjust the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted. Specifically, one embodiment is to change the gate-source voltage by changing the control gate voltage. Because the gate-source voltage is the voltage between the gate and the source, changing the control gate voltage can change the gate-source voltage. Changing the control gate voltage can be changed by an externally applied voltage, and whether to increase or decrease can be determined according to the implementation simulation and experimental results, and it can be achieved through multiple changes to achieve the purpose of the temperature coefficient of the current of the tail cell being the same as the temperature coefficient of the current of the reference cell. For example Figure 2, the horizontal axis is temperature, the vertical axis is reference current, line A is Vcg=4.6V, TC=-12nA / °C; line B is Vcg=3.9V, TC=0; line C is Vcg=3.0V, TC=+10.2nA / °C, wherein Vcg is control voltage, TC is temperature coefficient, it can be seen that line B is a successful temperature coefficient adjustment diagram. Another embodiment is to change the threshold voltage by changing the programming depth, wherein the programming depth can be changed by changing the programming time. Of course, the threshold voltage can also be changed in other ways. For example Figure 3 , line A is Vtp01=4.6V, TC=-19nA / °C; line B is Vtp01=3.9V, TC=0; line C is Vtp01=3.0V, TC=+4.7nA / °C, wherein Vcg is control voltage, TC is temperature coefficient, it can be seen that line B is a successful temperature coefficient adjustment diagram, wherein Vtp01 is threshold voltage, TC is temperature coefficient, it can be seen that line B is a successful temperature coefficient adjustment diagram.

[0034] Preferably, the relationship of the temperature coefficients of the gate-source voltage, the threshold voltage and the current of the second group of cells is as follows:

[0035]

[0036] , wherein α_μ is the temperature variation coefficient of the mobility, α_vt is the temperature variation coefficient of the threshold voltage, μ is the electron mobility, Vgs is the gate-source voltage, and Vth is the threshold voltage. Therefore, it can be seen from the relationship that the temperature coefficient of the current of the reference cell can be adjusted by adjusting the gate-source voltage Vgs and the threshold voltage Vth. The specific calculation process of the relationship is as follows:

[0037]

[0038]

[0039]

[0040] If , then

[0041] , wherein ID is the read current; μ is the electron mobility; Cox is the oxide layer capacitance, which is inversely proportional to the thickness; W / L is the width-length ratio of the transistor, W is the width of the transistor, and L is the length of the transistor; Vgs is the gate-source voltage; Vth is the threshold voltage; Vds is the drain-source voltage; Vth0 is the initial threshold voltage; α_vt is the temperature variation coefficient of the threshold voltage; and α_μ is the temperature variation coefficient of the mobility.

[0042] To sum up, in the method for adjusting the temperature coefficient of the reference current of the memory provided in the embodiments of the present application, all the cells of the reference unit are divided into a first group of cells and a second group of cells according to the current size, wherein the current of the first group of cells is greater than the current of the second group of cells; the cells of the reference unit are taken as a third group of cells; the temperature coefficient of the second group of cells is measured; a MOS tube with a bit of 0 in the third group of cells is taken as a MOS tube to be adjusted; the gate-source voltage and / or the threshold voltage of the MOS tube to be adjusted are adjusted, so that the temperature coefficient of the current of the third group of cells is the same as the temperature coefficient of the average current of the second group of cells. The embodiments of the present application adjust the temperature coefficient of the reference unit, so that the temperature coefficient of the current of the reference unit is the same as the temperature coefficient of the current of the tail cell, so that the current of the reference unit and the current of the tail cell change synchronously with the temperature, so that the tail cell is kept in the reference current range of the reference unit, correct data is read out when the reference unit is tested in temperature, and the yield is improved.

[0043] The above merely describes the preferred embodiments of the present application, and does not limit the present application in any way. Any person skilled in the art can make any equivalent replacement, modification or change to the technical solutions and technical contents disclosed in the present application without departing from the scope of the technical solutions of the present application, and such still falls within the protection scope of the present application.

Claims

1. A method of adjusting a temperature coefficient of a reference current for a flash memory, comprising: The application relates to a flash memory. All cells of a memory unit are divided into a first group of cells and a second group of cells according to read current, wherein the read current of the first group of cells is greater than that of the second group of cells, and a reference cell is taken as a third group of cells; The temperature coefficient of the second group of cells is measured; A MOS transistor with a bit of 0 in the third group of cells is taken as a MOS transistor to be adjusted; The gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted are adjusted so that the temperature coefficient of the current of the third group of cells is the same as that of the average current of the second group of cells.

2. The method of claim 1, wherein the temperature coefficient of the reference current of the flash memory is adjusted by: The flash memory comprises a memory unit and a reference cell.

3. The method of claim 1, wherein the step of adjusting the temperature coefficient of the reference current of the flash memory is performed by adjusting a temperature coefficient of a reference current of a reference current generator of the flash memory. In the memory unit, cells with a current greater than a set value are divided into a first group of cells, and the rest are divided into a second group of cells.

4. The method of claim 1, wherein the step of adjusting the temperature coefficient of the reference current of the flash memory is performed by adjusting a voltage of a reference current source of the flash memory. The third group of cells comprises MOS transistors with bits of 0 and MOS transistors with bits of 1.

5. The method of claim 4, wherein the step of adjusting the temperature coefficient of the reference current of the flash memory is performed by adjusting a temperature coefficient of a reference current of a reference current generator of the flash memory. The third group of cells comprises a plurality of MOS transistors with bits of 0 and a plurality of MOS transistors with bits of 1.

6. The method of claim 1, wherein the temperature coefficient of the reference current of the flash memory is adjusted by: Before the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted are adjusted, the temperature coefficient of the current of the third group of cells is opposite to that of the average current of the second group of cells.

7. The method of claim 1, wherein the temperature coefficient of the reference current of the flash memory is adjusted by: Before the gate-source voltage and / or threshold voltage of the MOS transistor to be adjusted are adjusted, the temperature coefficient of the current of the third group of cells is less than that of the average current of the second group of cells.

8. The method of claim 1, wherein the temperature coefficient of the reference current of the flash memory is adjusted by: The relationship among the gate-source voltage, the threshold voltage and the temperature coefficient of the current of the third group of cells is as follows: Wherein, alpha_mu is the temperature variation coefficient of mobility, alpha_vt is the temperature variation coefficient of threshold voltage, mu is electron mobility, Vgs is gate-source voltage, and Vth is threshold voltage.

9. The method of claim 1, wherein the temperature coefficient of the reference current of the flash memory is adjusted by: The gate-source voltage is changed by changing the control gate read voltage.

10. The method of claim 1, wherein the temperature coefficient of the reference current of the flash memory is adjusted by: The threshold voltage is changed by changing the programming depth.

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