An adaptive range analog signal acquisition circuit and its control method
By using an adaptive range analog signal acquisition circuit and a combination of MOSFETs and resistors to form a voltage divider circuit, the problem of not being able to dynamically adjust the input range in existing technologies is solved, thereby improving signal resolution and sampling accuracy.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-30
- Publication Date
- 2026-03-13
AI Technical Summary
In the existing technology, the control equipment for input detection cannot dynamically adjust the allowed input range of the port, which leads to an increase in error when sampling signals with a relatively small change in the relative range. Furthermore, incorrect wiring may cause irreversible damage and reduce sampling accuracy.
An adaptive range analog signal acquisition circuit was designed. The first, second, and third range selection modules control the conduction and cutoff of the MOS transistor. Combined with series and parallel resistors to form a voltage divider circuit, it provides two range selection modes to adapt to the acquisition of different signal ranges.
It improves signal resolution and sampling accuracy, can dynamically adjust the range according to the input signal, avoids damage caused by incorrect wiring, and meets the sampling circuit requirements of different needs.
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Figure CN116015299B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of signal acquisition technology, and in particular to an adaptive range analog signal acquisition circuit and its control method. Background Technology
[0002] Currently, control devices with input detection on the market require knowing the voltage or current range of the analog sampling signal before selecting a port that matches the sampling parameters. Since the port's allowable input range cannot be dynamically adjusted, using a uniform wide-range sampling circuit to sample signals with relatively small range variations increases errors and significantly reduces sampling accuracy. Furthermore, during system debugging, assembly, and wiring of input detection control devices, incorrect wiring configurations of incompatible input acquisition ports can cause irreversible damage to those ports. Summary of the Invention
[0003] Therefore, it is necessary to provide an adaptive range analog signal acquisition circuit and its control method that provides signal resolution.
[0004] An adaptive range analog signal acquisition circuit includes: a first range selection module, a second range selection module, and a third range selection module. The first and second range selection modules are connected between the circuit input terminal and a series resistor, and the third range selection module is connected between the series resistor and a parallel resistor. The first range selection module controls the conduction of a first MOSFET to control the connection of the first resistor. The input signal resistor is connected in parallel with the first resistor, and then connected in series with the series and parallel resistors to form a voltage divider circuit. The second range selection module controls the conduction of a second MOSFET. The first range selection module controls the second resistor to be connected, forming a low-impedance loop and generating a voltage difference. The voltage difference signal is divided by the series resistor and the parallel resistor. The third range selection module controls the third MOSFET to be connected, thereby controlling the third resistor to be connected. The third resistor and the parallel resistor are connected in parallel and then connected in series with the series resistor to form a voltage divider circuit. The first range selection module is also used to control the first MOSFET to be cut off, the second range selection module is also used to control the second MOSFET to be cut off, and the third range selection module is also used to control the third MOSFET to be cut off. The series resistor and the parallel resistor form a voltage divider circuit.
[0005] Furthermore, the adaptive range analog signal acquisition circuit also includes a voltage follower connected between the series resistor and the parallel resistor, used to output a low impedance signal to the input high impedance signal.
[0006] Furthermore, the adaptive range analog signal acquisition circuit also includes a transient suppression diode connected in parallel with the input signal, used to change the input signal from high impedance to low impedance.
[0007] Furthermore, the first range selection module includes a first low-level signal input terminal, a first MOSFET, and a first transistor; wherein, the first MOSFET is an NMOS transistor, the first transistor is a PNP transistor, the drain of the first MOSFET is connected to the base of the first transistor, the source of the first MOSFET is grounded, the gate of the first MOSFET is connected to the first low-level signal input terminal, the emitter of the first transistor is connected to a 5V power supply, and the collector of the first transistor is connected between the circuit input terminal and the series resistor.
[0008] Furthermore, the second range selection module includes a second low-level signal input terminal and a second MOS transistor; wherein, the second MOS transistor is an NMOS transistor, the second low-level signal input terminal is connected to the gate of the second MOS transistor, the source of the second MOS transistor is grounded, and the drain of the second MOS transistor is connected between the circuit input terminal and the series resistor.
[0009] Furthermore, the third range selection module includes a third low-level signal input terminal and a third MOS transistor; wherein, the third MOS transistor is an NMOS transistor, the third low-level signal input terminal is connected to the gate of the third MOS transistor, the source of the third MOS transistor is grounded, and the drain of the third MOS transistor is connected between a series resistor and a parallel resistor.
[0010] A control method for an adaptive range analog signal acquisition circuit, used to control the adaptive range analog signal acquisition circuit according to any one of claims 1-6, the method comprising the following steps:
[0011] By controlling the first, second, and third MOSFETs to turn off, and after the signal is processed by voltage division through cascade and parallel resistors, the output signal is calculated using the following formula:
[0012]
[0013] Furthermore, the control method for the adaptive range analog signal acquisition circuit includes:
[0014] The first and second MOSFETs are controlled to be off, while the third MOSFET is turned on. The current state is voltage detection mode. After the signal is processed by a voltage divider circuit consisting of a series resistor, a parallel resistor, and a third resistor in parallel, the output signal is calculated using the following formula:
[0015]
[0016] Furthermore, the control method for the adaptive range analog signal acquisition circuit includes:
[0017] The first and third MOSFETs are turned off, while the second MOSFET is turned on. In the current detection mode, the signal passes through a low-impedance loop formed by the second resistor, generating a voltage difference. This voltage difference signal is then divided by a series resistor and a parallel resistor. The output signal is calculated using the following formula:
[0018]
[0019] Furthermore, the control method for the adaptive range analog signal acquisition circuit includes:
[0020] The first MOSFET is turned on, while the second and third MOSFETs are turned off. The current state is resistance detection mode. The input signal resistor and the first resistor form a voltage divider circuit to obtain a voltage signal. After further voltage division by cascade and parallel resistors, the output signal is calculated using the following formula:
[0021]
[0022] The aforementioned adaptive range analog signal acquisition circuit and its control method control the conduction and cutoff of the first, second, and third MOSFETs. Through cascade resistors, parallel resistors, and the selection of the first, second, or third resistor based on the range, this design provides two range selection methods. In the initial state, the large range of 24V can be used for input detection, and the range detection can be adjusted based on the input detection value, thereby improving signal resolution. Attached Figure Description
[0023] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 This is a schematic diagram of an adaptive range analog signal acquisition circuit according to one embodiment;
[0025] Figure 2 This is a circuit diagram of an adaptive range analog signal acquisition system, as shown in a specific embodiment. Detailed Implementation
[0026] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0028] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0029] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0030] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising,” “including,” or “having,” etc., specify the presence of the stated feature, whole, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof.
[0031] In one embodiment, such as Figure 1 and Figure 2As shown, an adaptive range analog signal acquisition circuit is provided, including: a first range selection module 100, a second range selection module 200, and a third range selection module 300. The first range selection module 100 and the second range selection module 200 are connected between the circuit input terminal and the series resistor, and the third range selection module 300 is connected between the series resistor and the parallel resistor. The first range selection module 100 controls the conduction of a first MOSFET to control the connection of a first resistor R7021. The input signal resistor is connected in parallel with the first resistor R7021, and then connected in series with the series resistor R6017 and the parallel resistor R6018 to form a voltage divider circuit. The second range selection module 200 controls the conduction of a second MOSFET. The first range selection module 100 controls the second resistor R7024 to form a low-impedance loop and generate a voltage difference. The voltage difference signal is divided by the series resistor R6017 and the parallel resistor R6018. The third range selection module 300 controls the third MOSFET to turn on, thereby controlling the third resistor R170 to be connected. The third resistor R170 and the parallel resistor R6018 are connected in parallel and then connected in series with the series resistor R6017 to form a voltage divider circuit. The second range selection module 200 is also used to control the first MOSFET to turn off, the third range selection module 300 is also used to control the second MOSFET to turn off, and the third range selection module 300 is also used to control the third MOSFET to turn off. The series resistor R6017 and the parallel resistor R6018 form a voltage divider circuit.
[0032] The first range selection module 100, the second range selection module 200, and the third range selection module 300 can be controlled by high and low input levels. The first, second, and third MOSFETs can be NMOS or PMOS transistors. The circuit input terminal is the signal acquisition input terminal.
[0033] The adaptive range analog signal acquisition circuit described in this embodiment controls the conduction and cutoff of the first MOSFET, the second MOSFET, and the third MOSFET. Through series resistors, parallel resistors, and the first resistor, the second resistor, or the third resistor is selected according to the range. This design provides two range selection methods. In the initial state, the large range of 24V can be used for input detection. The range detection is then adjusted according to the input detection value, thereby improving the signal resolution.
[0034] In one embodiment, such as Figure 1 and Figure 2 As shown, the adaptive range analog signal acquisition circuit further includes a voltage follower 400 connected between a series resistor R6017 and a parallel resistor R6018, used to output a low impedance signal to the input high impedance signal.
[0035] The voltage follower 400 includes a filter capacitor C6012 and an amplifier U52. One end of the filter capacitor C6012 is connected between a series resistor R6017 and a parallel resistor R6018, and the other end is grounded. Port 1 of the amplifier U52 is connected between the series resistor R6017 and the parallel resistor R6018, and port 2 of the amplifier U52 is grounded. Port 3 of the amplifier U52 is connected to port 4 of the amplifier U52 through a resistor R133. Port 4 of the amplifier U52 is connected to the output terminal ADC2_IN2_PA5. Port 5 of the amplifier U52 is connected to a 4.5V power supply, and port 5 of the amplifier U52 is grounded to the 4.5V power supply through a capacitor C75. The capacitance of capacitor C6012 is 0.1uF, the resistance of resistor R133 is 10KΩ, and the capacitance of capacitor C75 is 0.1uF.
[0036] In one embodiment, such as Figure 1 and Figure 2 As shown, the adaptive range analog signal acquisition circuit further includes a transient suppression diode D38 connected in parallel with the input signal, used to change the input signal from high impedance to low impedance.
[0037] like Figure 2 As shown, the "AI_IN4" network connector is the input terminal of the adaptive range analog circuit. A 36V / 600W transient suppression diode is connected in parallel before the circuit input. When the transient suppression diode is subjected to a transient high-energy impact of a peak pulse current greater than 36V, it can change the high impedance of its two poles to low impedance in a speed of 10 to the power of -12 seconds, absorbing the surge power when the signal is abnormal, thereby achieving the function of protecting the input acquisition circuit.
[0038] In one embodiment, such as Figure 2 As shown, the first range selection module 100 includes a first low-level signal input terminal ADC1_IN3_PA6, a first MOSFET Q10, and a first transistor Q7001; wherein, the first MOSFET Q10 is an NMOS transistor, the first transistor Q7001 is a PNP transistor, the drain of the first MOSFET Q10 is connected to the base of the first transistor Q7001, the source of the first MOSFET Q10 is grounded, the gate of the first MOSFET Q10 is connected to the first low-level signal input terminal ADC1_IN3_PA6, the emitter of the first transistor Q7001 is connected to a 5V power supply, and the collector of the first transistor Q7001 is connected between the circuit input terminal and the series resistor R6017.
[0039] It is understandable that the low-level signal input terminal ADC1_IN3_PA6, the first MOSFET Q10, and the first transistor Q7001 are connected by a resistor. For example... Figure 2As shown, the low-level signal input terminal ADC1_IN3_PA6 is connected to the gate of the first MOSFET Q10 through resistor R198. Resistor R197 connects the source of the first MOSFET Q10 to the gate of the first MOSFET Q10. The drain of the first MOSFET Q10 is connected to the base of the first transistor Q7001 through resistor R201. Resistor R200 connects the emitter of the first transistor Q7001 to the base of the first transistor Q7001 through resistor R201. The emitter of the first transistor Q7001 is connected to a 5V power supply through a ferrite bead LB29. The collector of the first transistor Q7001 is connected between the circuit input terminal and the series resistor through resistor R7021. The parameters of the LB29 ferrite bead are 600Ω@100MH, the resistance of resistor R7021 is 1KΩ, the resistance of resistor R200 is 10KΩ, the resistance of resistor R201 is 4.7KΩ, the resistance of resistor R197 is 10KΩ, and the resistance of resistor R198 is 10KΩ.
[0040] In one embodiment, such as Figure 2 As shown, the second range selection module 200 includes a second low-level signal input terminal PA1 / ADC1_IN2 / TIM5_CH2 and a second MOS transistor Q7; wherein, the second MOS transistor Q7 is an NMOS transistor, the second low-level signal input terminal PA1 / ADC1_IN2 / TIM5_CH2 is connected to the gate of the second MOS transistor Q7, the source of the second MOS transistor Q7 is grounded, and the drain of the second MOS transistor Q7 is connected between the circuit input terminal and the series resistor R6017.
[0041] The low-level signal input terminals PA1 / ADC1_IN2 / TIM5_CH2 and the second MOSFET Q7 are connected via resistors. For example, the low-level signal input terminal PA1 / ADC1_IN2 / TIM5_CH2 is connected to the gate of the second MOSFET Q7 through resistor R153. Resistor R153 and the gate of the second MOSFET Q7 are grounded through resistor R150. The drain of the second MOSFET Q7 is connected between the circuit input terminal and the cascade resistor R6017 through resistor R7024. The resistance of resistor R153 is 10Ω, the resistance of resistor R150 is 10KΩ, and the resistance of resistor R7024 is 200Ω.
[0042] In one embodiment, such as Figure 2As shown, the third range selection module 300 includes a third low-level signal input terminal ADC2_IN5_PC4 and a third MOS transistor Q8; wherein, the third MOS transistor Q8 is an NMOS transistor, the third low-level signal input terminal ADC2_IN5_PC4 is connected to the gate of the third MOS transistor Q8, the source of the third MOS transistor Q8 is grounded, and the drain of the third MOS transistor Q8 is connected between a series resistor R6017 and a parallel resistor R6018.
[0043] The third low-level signal input terminal, ADC2_IN5_PC4, is connected to the gate of the third MOSFET Q8 via resistor R176. Resistor R176 and the gate of the third MOSFET Q8 are grounded via resistor R171. The drain of the third MOSFET Q8 is connected between the series resistor R6017 and the parallel resistor R6018 via resistor R170. The resistance of resistor R176 is 10Ω, the resistance of resistor R171 is 10KΩ, and the resistance of resistor R170 is 3KΩ.
[0044] In one embodiment, a control method for an adaptive range analog signal acquisition circuit is provided, characterized in that it is used in the adaptive range analog signal acquisition circuit described in the above embodiment, and the method includes the following steps: controlling the first MOSFET, the second MOSFET, and the third MOSFET to be turned off; after the signal is processed by voltage division by cascade resistors and parallel resistors, the output signal is calculated using the following formula:
[0045]
[0046] The method described in this embodiment is suitable for low-range signal acquisition.
[0047] In one embodiment, a control method for an adaptive range analog signal acquisition circuit further includes the following steps:
[0048] The first and second MOSFETs are controlled to be off, while the third MOSFET is turned on. The current state is voltage detection mode. After the signal is processed by a voltage divider circuit consisting of a series resistor, a parallel resistor, and a third resistor in parallel, the output signal is calculated using the following formula:
[0049]
[0050] The method described in this embodiment is suitable for high-range signal acquisition.
[0051] In one embodiment, a control method for an adaptive range analog signal acquisition circuit further includes the following steps:
[0052] The first and third MOSFETs are turned off, while the second MOSFET is turned on. In the current detection mode, the signal passes through a low-impedance loop formed by the second resistor, generating a voltage difference. This voltage difference signal is then divided by a series resistor and a parallel resistor. The output signal is calculated using the following formula:
[0053]
[0054] The method described in this embodiment is suitable for high-range signal acquisition.
[0055] In one embodiment, a control method for an adaptive range analog signal acquisition circuit further includes the following steps:
[0056] The first MOSFET is turned on, while the second and third MOSFETs are turned off. The current state is resistance detection mode. The input signal resistor and the first resistor form a voltage divider circuit to obtain a voltage signal. After further voltage division by cascade and parallel resistors, the output signal is calculated using the following formula:
[0057]
[0058] The method described in this embodiment is suitable for low-range signal acquisition.
[0059] The control method of the adaptive range analog signal acquisition circuit described above can select the corresponding high or low range for acquisition according to the range of the signal, meet the sampling circuit requirements of different needs, and improve the sampling accuracy.
[0060] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.
[0061] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0062] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.
Claims
1. An adaptive range analog acquisition circuit, comprising: The adaptive range selection module comprises a first range selection module, a second range selection module and a third range selection module, the first range selection module and the second range selection module are connected between a circuit input end and a series resistor, and the third range selection module is connected between the series resistor and a parallel resistor, wherein The first range selection module comprises a first low-level signal input end, a first MOS tube and a first triode; the first MOS tube is an NMOS tube, the first triode is a PNP triode, the drain of the first MOS tube is connected to the base of the first triode, the source of the first MOS tube is grounded, the gate of the first MOS tube is connected to the first low-level signal input end, the emitter of the first triode is connected to a 5V power supply, and the collector of the first triode is connected between the circuit input end and the series resistor; the first range selection module is used to control the first MOS tube to be turned on, so as to control the first resistor to be connected, and the input signal resistor is connected in parallel with the first resistor, and then connected in series with the series resistor and the parallel resistor, thereby forming a voltage dividing circuit; The second range selection module comprises a second low-level signal input end and a second MOS tube; the second MOS tube is an NMOS tube, the second low-level signal input end is connected to the gate of the second MOS tube, the source of the second MOS tube is grounded, and the drain of the second MOS tube is connected between the circuit input end and the series resistor; the second range selection module is used to control the second MOS tube to be turned on, so as to control the second resistor to be connected to form a low-impedance loop and generate a pressure difference, and the pressure difference signal is divided by the series resistor and the parallel resistor; The third range selection module comprises a third low-level signal input end and a third MOS tube; the third MOS tube is an NMOS tube, the third low-level signal input end is connected to the gate of the third MOS tube, the source of the third MOS tube is grounded, and the drain of the third MOS tube is connected between the series resistor and the parallel resistor; the third range selection module is used to control the third MOS tube to be turned on, so as to control the third resistor to be connected, and the third resistor is connected in parallel with the parallel resistor, and then connected in series with the series resistor, thereby forming a voltage dividing circuit; The first range selection module is also used to control the first MOS tube to be turned off, the second range selection module is also used to control the second MOS tube to be turned off, the third range selection module is also used to control the third MOS tube to be turned off, and the series resistor and the parallel resistor form a voltage dividing circuit. The adaptive range selection module further comprises a voltage follower connected between the series resistor and the parallel resistor, and used to output a low-impedance signal from an input high-impedance signal.
2. The self-adapting range analog quantity acquisition circuit according to claim 1, characterized in that, The adaptive range selection module further comprises a transient suppression diode connected in parallel with the input signal, and used to change the input signal from a high impedance to a low impedance. The method for controlling the adaptive range selection module according to any one of claims 1 to 3 comprises the following steps:
3. The self-adapting range analog quantity acquisition circuit according to claim 1, characterized in that, The first MOS tube, the second MOS tube and the third MOS tube are controlled to be turned off, and the output signal calculation formula after the signal is divided by the series resistor and the parallel resistor is as follows: The first MOS tube and the second MOS tube are controlled to be turned off, the third MOS tube is controlled to be turned on, the current state is a voltage detection mode, and the output signal calculation formula after the signal is divided by the loop in which the third resistor and the parallel resistor are connected in parallel and then connected in series with the series resistor is as follows:
4. A control method of an adaptive range analog quantity acquisition circuit, characterized by, The first MOS tube and the second MOS tube are controlled to be turned off, the third MOS tube is controlled to be turned on, the current state is a voltage detection mode, and the output signal calculation formula after the signal is divided by the loop in which the third resistor and the parallel resistor are connected in parallel and then connected in series with the series resistor is as follows: 。 5. The control method of the self-adapting range analog quantity acquisition circuit according to claim 4, characterized in that, 。 6. The control method of the self-adapting range analog quantity acquisition circuit according to claim 4, characterized in that, Control the first MOS tube and the third MOS tube to be off, the second MOS tube is turned on, the current detection mode in the current state, the signal forms a low impedance loop through the second resistance and generates a pressure difference, the pressure difference signal is divided through the series resistance and the parallel resistance, and the output signal calculation formula is: 。 7. The control method of the self-adapting range analog quantity acquisition circuit according to claim 4, characterized in that, Comprise: Control the first MOS tube to be turned on, the second MOS tube and the third MOS tube are turned off, the resistance detection mode in the current state, the input signal resistance and the first resistance form a voltage signal, and then the output signal calculation formula is obtained after the series resistance and the parallel resistance voltage dividing processing: 。
Citation Information
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