A large-size silicon carbide substrate and a method for preparing the same

Abstract

The present invention provides a large-size silicon carbide substrate, wherein the thickness of the silicon carbide substrate is less than 400 microns, the curvature bow value is not greater than ‑1 micron, and Y=‑A / X is satisfied, wherein X is the thickness, Y is the curvature bow value, A is 300-8000, and the warp value is not greater than 3 times the absolute value of the bow value. Compared with the prior art, the present invention can provide a thinner substrate on the one hand, thereby increasing the number of wafers produced by SiC crystals of the same thickness and reducing costs; on the other hand, the requirements of downstream epitaxy and devices for wafer manufacturing processes are guaranteed through specific geometric shapes and the curvature of the atomic planes of the crystal; thirdly, the low-thickness substrate is provided, and the shape warping changes can meet the requirements of the entire industrial chain, and also greatly reduce the thinning cost of the device link.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor materials, and in particular relates to a large-size silicon carbide substrate and a preparation method thereof. Background Art

[0002] The third-generation semiconductor materials refer to wide-bandgap semiconductor materials represented by silicon carbide and gallium nitride, which have the advantages of high breakdown electric field, high thermal conductivity, high electron saturation rate, and strong radiation resistance. Therefore, semiconductor devices made of third-generation semiconductor materials can not only operate stably at higher temperatures and are suitable for high-voltage and high-frequency scenarios, but also achieve higher operating capabilities with less power consumption.

[0003] Compared with Si, SiC has 10 times the breakdown electric field strength, 3 times the band gap, 2 times the maximum operating temperature and more than 2 times the saturated electron drift rate. In addition, SiC also has 3 times the thermal conductivity, which means 3 times the cooling capacity of Si.

[0004] There are two main types of silicon carbide substrates: semi-insulating and conductive. In the semi-insulating silicon carbide market, the current mainstream substrate product specification is 4 inches. In the conductive silicon carbide market, the current mainstream substrate product specification is 6 inches. It can be seen that at present, the substrates in the silicon carbide industry are still mainly 4-6 inches. If the size is increased from 6 inches to 8 inches, the single-chip area of ​​SiC will increase by 77.8%, and the available area will be greatly improved. In addition, large-diameter substrates can effectively reduce the cost of device preparation. Taking a 6-inch diameter substrate as an example, the use of a 6-inch diameter substrate can save about 30% of the device preparation cost relative to a 4-inch diameter substrate.

[0005] As a semiconductor material, silicon carbide wafers must eventually be made into semiconductor devices, such as SBD, MOSFET, etc., before they can be used in daily working conditions. Most of the semiconductor material preparation processes are substrate preparation, epitaxial growth, device manufacturing, and packaging applications. Among them, in the device process, the existing silicon carbide wafers need to enter the photolithography machine when used as devices, but the photolithography machine cannot operate on wafers with too much curvature. Therefore, the existing silicon carbide single crystal wafers are expected to have as small a curvature as possible and require a flat surface.

[0006] Based on this, the thickness of the silicon carbide substrate cannot be too thin, otherwise it is impossible to control its warp and bow value in the epitaxy and device manufacturing process. The thickness of the 6-inch silicon carbide substrate commonly used in the industry is about 350 microns, and the thickness of the 8-inch substrate is about 500 microns. In addition, due to the difficulty of the current silicon carbide growth technology and the short length of a single crystal, the cost is relatively high, which restricts the further reduction of its thickness and its further large-scale application. Summary of the invention

[0007] In view of this, the technical problem to be solved by the present invention is to provide a large-size silicon carbide substrate with a relatively thin thickness and a preparation method thereof.

[0008] The present invention provides a large-size silicon carbide substrate, wherein the thickness of the silicon carbide substrate is less than 400 microns, the curvature bow value is not greater than -1 micron, and Y=-A / X is satisfied, wherein X is the thickness, Y is the curvature bow value, A is 300-8000, and the warp value is not greater than 3 times the absolute value of the bow value.

[0009] Preferably, the size of the silicon carbide substrate is 6 inches, the thickness of the silicon carbide substrate is less than 300 microns, and A is 300-4000.

[0010] Preferably, the size of the silicon carbide substrate is 8 inches, the thickness of the silicon carbide substrate is less than 400 microns, and A is 400-8000.

[0011] The present invention also provides a method for preparing a large-size silicon carbide substrate, comprising:

[0012] S1) obtaining a silicon carbide wafer by cutting or peeling the silicon carbide crystal;

[0013] S2) annealing the silicon carbide wafer to obtain an annealed wafer;

[0014] S3) using a convex suction cup to absorb the second surface of the annealed wafer, and then single-side grinding the first surface of the annealed wafer to obtain a single-side ground wafer;

[0015] S4) annealing the single-sided ground wafer to obtain a single-sided processed wafer;

[0016] S5) using a suction cup with a flat surface to absorb a first surface of the wafer processed on one side, and then grinding a second surface of the wafer processed on one side to obtain a ground wafer;

[0017] S6) annealing the ground wafer to obtain a double-sided processed wafer;

[0018] S7) chemically and mechanically polishing the first surface of the double-sided processed wafer to obtain a large-sized silicon carbide substrate.

[0019] Preferably, the temperature of the annealing treatment in step S2), step S4) and step S6) is independently 1000°C to 1500°C; the time of the heating section of the annealing treatment in step S2), step S4) and step S6) is independently 1.5 to 2.5 hours, and the time of maintaining the high temperature section is independently 4 to 6 hours.

[0020] Preferably, in the step S3), the center of the convex suction cup protrudes 5 to 40 μm, and the diameter of the convex suction cup is larger than the diameter of the silicon carbide wafer; and the vacuum pressure of the adsorption is -20 to -120 kPa.

[0021] Preferably, in the step S3), the rotation speed of the grinding wheel during single-sided grinding is 1800-3000 rpm; the downward feed speed of the grinding wheel is 0.1-0.4 μm / s; the single-sided grinding is specifically performed by first rough grinding and then fine grinding; the grain size of the grinding wheel for rough grinding is 500#-1000#; the grain size of the grinding wheel for fine grinding is 2000#-30000#; the roughness of the first surface of the single-sided ground chip is less than 0.5 μm.

[0022] Preferably, during grinding in step S5), the rotation speed of the grinding wheel is 1800-3000 rpm; the downward feed speed of the grinding wheel is 0.1-0.4 μm / s; the grinding is specifically performed by first rough grinding and then fine grinding; the grain size of the rough grinding wheel is 500#-100#; the grain size of the fine grinding wheel is 2000#-30000#; the roughness of the second surface of the ground wafer is less than 0.5 μm.

[0023] Preferably, the polishing liquid of the chemical mechanical polishing comprises an abrasive, an oxidant and water; the mass of the abrasive is 15% to 25% of the mass of the polishing liquid; the abrasive is aluminum oxide or silicon oxide; the particle size of the aluminum oxide is 80 to 400 nm; the particle size of the silicon oxide is 40 to 300 nm; the mass concentration of the oxidant in the polishing liquid is less than or equal to 7%; and the oxidant is potassium permanganate.

[0024] Preferably, the pressure of the chemical mechanical polishing is 50-124 kg; the rotation speed is 100-120 rpm; the temperature is 45° C.-50° C.; and the flow rate of the polishing liquid is 40-60 mL / min.

[0025] The present invention provides a large-size silicon carbide substrate, wherein the thickness of the silicon carbide substrate is less than 400 microns, the curvature bow value is not greater than -1 micron, and Y=-A / X is satisfied, wherein X is the thickness, Y is the curvature bow value, A is 300-8000, and the warp value is not greater than 3 times the absolute value of the bow value. Compared with the prior art, the present invention can provide a thinner substrate on the one hand, thereby increasing the number of wafers produced by SiC crystals of the same thickness and reducing costs; on the other hand, the requirements of downstream epitaxy and devices for wafer manufacturing processes are guaranteed through specific geometric shapes and the curvature of the atomic planes of the crystal; thirdly, the provision of a low-thickness substrate while the shape warping change can meet the requirements of the entire industry chain, and also greatly reduce the thinning cost of the device link. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1It is a schematic diagram of the structure of a silicon carbide wafer in a free state;

[0027] Figure 2 A schematic diagram of the structure of using a convex suction cup to absorb the second surface of the wafer after annealing;

[0028] Figure 3 is a schematic diagram of single-side grinding of a first surface of a wafer;

[0029] Figure 4 is a schematic diagram of grinding the second surface of the wafer;

[0030] Figure 5 Schematic diagram of the structure of the obtained large-size silicon carbide substrate;

[0031] Figure 6 The surface test results of the silicon carbide substrate TKR78CAW08 obtained in the embodiment provided by the present invention;

[0032] Figure 7 Surface test results of the silicon carbide substrate TKS73DEU10 obtained in the embodiment provided by the present invention. DETAILED DESCRIPTION

[0033] The following will be combined with the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0034] The present invention provides a large-size silicon carbide substrate, wherein the thickness of the silicon carbide substrate is less than 400 microns, the curvature bow value is not greater than -1 micron, and Y=-A / X is satisfied, wherein X is the thickness, Y is the curvature bow value, A is 300-8000, and the warp value is not greater than 3 times the absolute value of the bow value.

[0035] The SiC substrate product provided by the present invention has a thinner thickness and a more curved geometric shape compared to the general technology. Although the substrate is curved, after a layer of SiC epitaxial film is grown on its surface during subsequent epitaxy, both bow and warp will be reduced, thereby meeting the requirements of subsequent device manufacturing through low thickness and specific curvature, and since SiC devices need to be thinned in the later stage of manufacturing, the thickness of SiC wafers in most silicon carbide devices will not exceed 150 microns, or even 100 microns. The present invention provides a low-thickness substrate in the substrate link, and the change in the warping of the shape can meet the requirements of the entire industrial chain, and also greatly reduce the thinning cost of the device link.

[0036] The large-size silicon carbide substrate provided by the present invention can be a 6-inch substrate or an 8-inch substrate.

[0037] When the size of the silicon carbide substrate is 6 inches, the thickness of the silicon carbide substrate is preferably less than 300 microns; A is preferably 300-4000, more preferably 300-2000, and even more preferably 300-1500.

[0038] When the size of the silicon carbide substrate is 8 inches, the thickness of the silicon carbide substrate is preferably less than 400 microns; and A is preferably 400-8000.

[0039] On the one hand, the present invention can provide a thinner substrate, thereby increasing the number of wafers produced with the same thickness of SiC crystals and reducing costs; on the other hand, the requirements of downstream epitaxy and device manufacturing processes for wafers are guaranteed through specific geometric shapes and curvature of the atomic planes of the crystals; thirdly, providing a low-thickness substrate while the change in shape warping can meet the requirements of the entire industry chain and greatly reduce the thinning cost of the device link.

[0040] The present invention also provides a method for preparing the above-mentioned large-size silicon carbide substrate, comprising: S1) obtaining a silicon carbide wafer by cutting or peeling a silicon carbide crystal; S2) annealing the silicon carbide wafer to obtain an annealed wafer; S3) using a convex suction cup to adsorb the second surface of the annealed wafer, and then single-sidedly grinding the first surface of the annealed wafer to obtain a single-sided ground wafer; S4) annealing the single-sided ground wafer to obtain a single-sided processed wafer; S5) using a suction cup with a flat surface to adsorb the first surface of the single-sided processed wafer, and then grinding the second surface of the single-sided processed wafer to obtain a ground wafer; S6) annealing the ground wafer to obtain a double-sided processed wafer; S7) chemically mechanically polishing the first surface of the double-sided processed wafer to obtain a large-size silicon carbide substrate.

[0041] The present invention has no particular limitation on the sources of all raw materials, and any raw materials available on the market can be used.

[0042] In the present invention, the silicon carbide crystal can be any silicon carbide crystal well known to those skilled in the art without any special limitation. In the present invention, it is preferred to adopt the PVT method to grow high-quality silicon carbide crystal.

[0043] The silicon carbide crystal is cut or peeled to obtain a silicon carbide wafer; in the present invention, the silicon carbide wafer is preferably obtained by multi-wire cutting or laser peeling; the thickness of the silicon carbide wafer is preferably less than 400 microns, more preferably less than 300 microns. Figure 1 , Figure 1 Schematic diagram of the structure of a silicon carbide wafer in a free state.

[0044] The silicon carbide wafer is annealed to obtain an annealed wafer; the damage and internal stress of the cutting process can be released by annealing to ensure that the curvature of the substrate atomic surface is as small as possible. The temperature of the annealing treatment is preferably 1000°C to 1500°C, more preferably 1000°C to 1300°C; the annealing treatment includes a heating section and a high temperature section; the time of the heating section is preferably 1.5 to 2.5 hours; the time of the high temperature section is preferably 4 to 6 hours; after the annealing treatment, it is preferably cooled naturally to room temperature to obtain an annealed wafer.

[0045] In the present invention, the two surfaces of the wafer after annealing are respectively the first surface and the second surface, the second surface of the wafer after annealing is sucked by a convex suction cup, and then the first surface of the wafer after annealing is single-sided ground to obtain a single-sided ground wafer; see Figure 2 and Figure 3 , Figure 2 A schematic diagram of the structure of using a convex suction cup to absorb the second surface of the wafer after annealing; Figure 3Schematic diagram of single-sided grinding of the first surface of the wafer; the damaged layer can be removed by single-sided grinding, and the wafer is elastically deformed under the action of suction, with more removal at the center and less at the edge of the wafer, thereby initially forming a geometric surface curved like a C surface; the diameter of the convex suction cup is preferably larger than the diameter of the silicon carbide wafer; the convex suction cup is preferably a suction cup that bulges along a curve from the edge to the center; the center of the convex suction cup is preferably convex by 5 to 40 μm, more preferably convex by 10 to 35 μm, more preferably convex by 15 to 30 μm, and most preferably convex by 10 to 35 μm. The angle between the surface extension direction of the convex suction cup and the horizontal direction is preferably 0.5° to 2°, more preferably 0.7° to 1.8°, more preferably 0.9° to 1.6°, and most preferably 1.2° to 1.4°; the vacuum pressure of the adsorption is preferably -20 to -120 kPa, more preferably -50 to -120 kPa, and more preferably -80 to -100 kPa; thinning and polishing can be achieved by single-sided grinding; the rotation speed of the single-sided grinding wheel is preferably 1800 to 3 000rpm, more preferably 2000-3000pm, more preferably 2200-2800rpm, most preferably 2500rpm; the downward feed speed of the grinding wheel is preferably 0.1-0.4μm / s; in the present invention, the single-sided grinding preferably includes rough grinding and fine grinding, and the purpose of thinning is achieved by rough grinding and polishing is achieved by fine grinding; the particle size of the grinding wheel for rough grinding is preferably 500#-1000#, more preferably 600#-900#, and more preferably 700#-800#; the grinding wheel for rough grinding The downward feed speed is preferably 0.3-0.4 μm / s; the time for rough grinding can be determined according to the thickness of the incoming material and the target thickness; the particle size of the grinding wheel for fine grinding is preferably 2000#-30000#, more preferably 5000#-30000#, more preferably 10000#-30000#, and most preferably 20000#-30000#; the downward feed speed of the grinding wheel during fine grinding is preferably 0.1-0.2 μm / s; the roughness of the first surface of the single-sided ground wafer is less than 0.5 μm.

[0046] The single-sided ground wafer is annealed to obtain a single-sided processed wafer; the damage and internal stress of the cutting process can be released by annealing to ensure that the curvature of the substrate atomic surface is as small as possible. The temperature of the annealing treatment is preferably 1000℃~1500℃, more preferably 1000℃~1300℃; the annealing treatment includes a heating section and a high temperature section; the time of the heating section is preferably 1.5~2.5h; the time of the high temperature section is preferably 4~6h; after the annealing treatment, it is preferably cooled naturally to room temperature to obtain a single-sided processed wafer.

[0047] A first surface of a wafer processed on one side is sucked by a suction cup having a flat surface, and then a second surface of the wafer processed on one side is ground to obtain a ground wafer; see Figure 4 , Figure 4 This is a schematic diagram of grinding the second surface of a wafer; the diameter of the suction cup is larger than the diameter of the wafer, and the suction holes on the suction cup are evenly distributed, so that the adsorption pressure difference between the two surfaces of the wafer exceeds 2 atmospheres to ensure uniform adsorption of the wafer. In the present invention, the vacuum pressure of adsorption is preferably -20 to -120 kPa, more preferably -50 to -120 kPa, and even more preferably -80 to -100 kPa; thinning and polishing of the second surface can be achieved by grinding; the rotation speed of the grinding wheel is preferably 1800 to 3000 rpm, more preferably 2000 to 3000 pm, even more preferably 2200 to 2800 rpm, and most preferably 2500 rpm; the downward feed speed of the grinding wheel is preferably 0.1 to 0.4 μm / s; in the present invention, the grinding preferably includes coarse grinding and fine grinding, and the purpose of thinning is achieved by coarse grinding and polishing is achieved by fine grinding. The particle size of the grinding wheel for rough grinding is preferably 500#~1000#, more preferably 600#~900#, and more preferably 700#~800#; the downward feed speed of the grinding wheel during rough grinding is preferably 0.3~0.4μm / s; the particle size of the grinding wheel for fine grinding is preferably 2000#~30000#, more preferably 5000#~30000#, more preferably 10000#~30000#, and most preferably 20000#~30000#; the downward feed speed of the grinding wheel during fine grinding is preferably 0.1~0.2μm / s; the roughness of the second surface of the ground wafer is less than 0.5μm.

[0048] The ground wafer is annealed to obtain a double-sided wafer; the damage and internal stress of the cutting process can be released by annealing to ensure that the curvature of the substrate atomic surface is as small as possible. The temperature of the annealing treatment is preferably 1000℃~1500℃, more preferably 1000℃~1300℃; the annealing treatment includes a heating section and a high temperature section; the time of the heating section is preferably 1.5~2.5h; the time of the high temperature section is preferably 4~6h; after the annealing treatment, it is preferably cooled naturally to room temperature to obtain a double-sided wafer.

[0049] The first surface of the double-sided processed wafer is subjected to chemical mechanical polishing to obtain a large-sized silicon carbide substrate; Figure 5 , Figure 5The schematic diagram of the structure of the obtained large-size silicon carbide substrate is shown in FIG. 1 , which has a warpage in a free state and retains the influence of the convex suction cup; the polishing liquid used for the chemical mechanical polishing preferably includes an abrasive, an oxidant and water; the mass of the abrasive is preferably 15% to 25% of the mass of the polishing liquid; the abrasive is preferably aluminum oxide or silicon oxide; the particle size of the aluminum oxide is 80 to 400 nm; the particle size of the silicon oxide is 40 to 300 nm; the mass concentration of the oxidant in the polishing liquid is preferably less than or equal to 7%, more preferably 3% to 5%; the oxidant is preferably potassium permanganate; the pH value of the polishing liquid is preferably 3 to 5; in the present invention, the chemical mechanical polishing preferably uses a soft polishing pad made of damping cloth; the pressure of the chemical mechanical polishing is preferably 50 to 124 k g, more preferably 50-104kg, and even more preferably 50-87kg; further preferably, during chemical mechanical polishing, the pressure of the outer ring is different from that of the center, and the pressure of the outer ring is preferably 50-60kg; the pressure of the center is preferably 70-124kg, more preferably 80-104kg, and even more preferably 87kg; the rotation speed of chemical mechanical polishing is preferably 100-120rpm; the temperature is preferably 45°C-50°C; the flow rate of the polishing liquid is preferably 40-60mL / min, more preferably 45-55mL / min, and even more preferably 50mL / min; in the present invention, chemical mechanical polishing is preferably used to make the surface roughness of the first surface less than 0.15nm, so as to obtain a large-sized silicon carbide substrate, and its scratches are completely removed to meet the requirements of epitaxial growth.

[0050] In order to further illustrate the present invention, a large-size silicon carbide substrate and a preparation method thereof provided by the present invention are described in detail below in conjunction with embodiments.

[0051] The reagents used in the following examples are all commercially available.

[0052] Example

[0053] Two 6-inch conductive silicon carbide wafers were used to prepare silicon carbide substrates according to the following method. The obtained silicon carbide substrates were named according to the difference in the thickness of the incoming materials. The silicon carbide substrate obtained from the silicon carbide wafer with an incoming thickness of 290 μm was named TKR78CAW08, and the silicon carbide substrate obtained from the silicon carbide wafer with an incoming thickness of 298 μm was named TKS73DEU10.

[0054] Preparation process:

[0055] S1) growing high-quality silicon carbide crystals by PVT method and obtaining silicon carbide wafers by multi-wire cutting;

[0056] S2) annealing the silicon carbide wafer at a temperature of 1300° C., with a heating period of 2 h and a high temperature period of 5 h; after annealing, naturally cooling to room temperature;

[0057] S3) using a thinning machine to thin and grind the first surface of the annealed cutting blade, first using a rough grinding wheel for processing, and then using a fine grinding wheel for processing, the grinding process is set as follows:

[0058] Suction cup type: center protrusion 25μm suction cup;

[0059] Adsorption vacuum pressure: -80kPa;

[0060] Mechanical polishing parameters: ① Grinding wheel rotation speed: 2500rpm ② Grinding wheel particle size: coarse grinding: 800# fine grinding: 30000# ③ Grinding wheel downward feed speed along Z: coarse grinding feed 0.4μm / s fine grinding feed speed 0.1μm / s; The rough grinding removal in this test was 15μm, and the time was 48s (including the air cutting time, that is, the time when the grinding wheel decelerates before approaching the wafer), and the fine grinding removal was 10μm, and the time was 113s (including the air cutting time).

[0061] S4) annealing the single-side ground wafer at 1300°C, with a heating period of 2 hours and a high temperature period of 5 hours; after annealing, naturally cooling to room temperature;

[0062] S5) using a thinning machine to thin and grind the second surface of the wafer, first using a rough grinding wheel for processing, then using a fine grinding wheel for processing, and then using a single-wafer CMP device for processing.

[0063] The grinding process is as follows:

[0064] Suction cup type: center flat suction cup

[0065] Adsorption vacuum pressure: -80kPa

[0066] Mechanical polishing parameters: ① Grinding wheel rotation speed: 2500rpm; ② Grinding wheel particle size: coarse grinding: 800#; fine grinding: 30000#; ③ Grinding wheel downward feed speed along Z: coarse grinding feed 0.4μm / s; fine grinding feed speed 0.1um / s; The rough grinding removal in this test was 15μm, taking 48s (including air cutting time), and the fine grinding removal was 10μm, taking 113s.

[0067] S6) annealing the double-sided ground wafer at 1300° C. for 2 hours in the heating stage and 5 hours in the high temperature stage; after annealing, naturally cool to room temperature;

[0068] S7) Finally, the first surface is subjected to chemical mechanical polishing, wherein the polishing liquid comprises: an abrasive of aluminum oxide (solid content 17%, particle size concentrated at 200 nm); a dispersant of water; and an oxidant of potassium permanganate (concentration 3% to 5%);

[0069] Polishing pad: soft polishing pad made of damping cloth;

[0070] Chemical mechanical polishing parameters: ① Pressure: 50kg for outer ring, 87kg for center; ② Platen speed: 120rpm, PP speed: 119rpm ③ Temperature: 50℃; ④ pH value 3-5; ⑤ Flow rate 50mL / min; Time is fixed at 8min / piece.

[0071] The performance of the obtained silicon carbide substrate was tested, and the results were shown in Table 1. Figure 6 and Figure 7 The test results were all tested and characterized by Tropel's FM200 flatness measurement equipment, and the test results are shown in Table 1. Figure 6 and Figure 7 As shown. Figure 6 The test results for TKR78CAW08; Figure 7 The test results of TKS73DEU10 are as follows; Figure 6 and Figure 7 It can be explained that there is an inverse relationship between the wafer thickness (x) and the wafer curvature (y), that is, y=-A / X, and the A values ​​of the two wafers are 3038 and 1094 respectively.

[0072] Table 1 SiC substrate test results

[0073] thickness y=-A / X TKR78CAW08 237μm y=-3038 / X TKS73DEU10 244μm y=-1094 / X

[0074] TKR78CAW08 was mailed to the customer for epitaxial verification. After epitaxy, the customer reported that the warpage results of the epitaxial wafer were: Warp = 28.7μm, Bow = 5.8μm. The warpage variation was better than that of substrate wafers produced by other processes.

Claims

1. A method for preparing a large-size silicon carbide substrate, characterized in that: include: S1) obtaining a silicon carbide wafer by cutting or peeling the silicon carbide crystal; S2) annealing the silicon carbide wafer to obtain an annealed wafer; S3) using a convex suction cup to suck the second surface of the annealed wafer, and then single-side grinding the first surface of the annealed wafer to obtain a single-side ground wafer; S4) annealing the single-side ground wafer to obtain a single-side processed wafer; S5) using a suction cup with a flat surface to absorb a first surface of the wafer processed on one side, and then grinding a second surface of the wafer processed on one side to obtain a ground wafer; S6) annealing the ground wafer to obtain a double-sided processed wafer; S7) chemically and mechanically polishing the first surface of the double-sided processed wafer to obtain a large-size silicon carbide substrate; The bow value of the silicon carbide substrate is not greater than -1 micron, and satisfies Y=-A / X, where X is the thickness, Y is the bow value, and the warp value is not greater than 3 times the absolute value of the bow value; The size of the silicon carbide substrate is 6 inches, the thickness of the silicon carbide substrate is less than 300 microns, and A is 300-4000; Alternatively, the size of the silicon carbide substrate is 8 inches, the thickness of the silicon carbide substrate is less than 400 microns, and A is 400-8000; The temperature of the annealing treatment in step S2), step S4) and step S6) is independently 1000°C to 1500°C; the time of the heating section of the annealing treatment in step S2), step S4) and step S6) is independently 1.5 to 2.5 hours, and the time of maintaining the high temperature section is independently 4 to 6 hours; In the step S3), the center of the convex suction cup protrudes 5 to 40 μm, and the diameter of the convex suction cup is larger than the diameter of the silicon carbide wafer; the vacuum pressure of the adsorption is -20 to -120 kPa.

2. The preparation method according to claim 1, characterized in that: In the step S3), the rotation speed of the grinding wheel during single-sided grinding is 1800-3000 rpm; the downward feed speed of the grinding wheel is 0.1-0.4 μm / s; the single-sided grinding is specifically performed by first rough grinding and then fine grinding; the grain size of the grinding wheel for rough grinding is 500#-1000#; the grain size of the grinding wheel for fine grinding is 2000#-30000#; the roughness of the first surface of the single-sided ground wafer is less than 0.5 μm.

3. The preparation method according to claim 1, characterized in that: During the grinding in step S5), the rotation speed of the grinding wheel is 1800-3000 rpm; the downward feed speed of the grinding wheel is 0.1-0.4 μm / s; the grinding is specifically performed by first rough grinding and then fine grinding; the grain size of the rough grinding wheel is 500#-100#; the grain size of the fine grinding wheel is 2000#-30000#; the roughness of the second surface of the ground wafer is less than 0.5 μm.

4. The preparation method according to claim 1, characterized in that: The polishing liquid of the chemical mechanical polishing includes an abrasive, an oxidant and water; the mass of the abrasive is 15% to 25% of the mass of the polishing liquid; the abrasive is aluminum oxide or silicon oxide; the particle size of the aluminum oxide is 80 to 400 nm; the particle size of the silicon oxide is 40 to 300 nm; the mass concentration of the oxidant in the polishing liquid is less than or equal to 7%; and the oxidant is potassium permanganate.

5. The preparation method according to claim 1, characterized in that: The pressure of the chemical mechanical polishing is 50-124 kg; the rotation speed is 100-120 rpm; the temperature is 45° C.-50° C.; and the flow rate of the polishing liquid is 40-60 mL / min.

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