A power converter and a power switch controller for the power converter

Abstract

The present application proposes a power converter and a power switch controller for the power converter. The power switch controller has a first terminal for receiving an input switch drive signal and a second terminal for providing an output switch drive signal. The power switch controller obtains energy from the input switch drive signal received at the first terminal, and is configured to provide an output switch drive signal based on the input switch drive signal. The power switch controller of the present application obtains electrical energy from the input switch drive signal and does not require an internal voltage regulator that withstands high voltage. Since no high-voltage resistant device is required, the technical solution of the present application reduces the design complexity and cost of the power switch controller in a multi-phase power converter.

Description

[0001] Related references

[0002] This application claims priority to and the benefits of patent application No. 17 / 541,591 filed in the United States on December 3, 2021, and incorporates the entire contents of the aforementioned patent application herein. Technical Field

[0003] The present application relates to electronic circuits, and more particularly, to a power converter and a power switch controller for the power converter. Background Art

[0004] Multiphase power converters are widely used in various applications. However, existing multiphase power converters, such as interleaved boost power factor correction ("PFC") converters and interleaved flyback converters, require complex power switch controllers to drive the master and slave phases of the multiphase power converter. Also, different power switch controllers need to be specifically designed for multiphase power converters with different topologies. In addition, a simple and cost-effective solution is needed to power the slave phase power switch controllers and to communicate the master phase drive signals and slave phase drive signals of the multiphase power converter. Summary of the invention

[0005] An embodiment of the present invention relates to a power converter, which includes N power conversion phases, where N is an integer greater than 1, and the power converter includes: N power switch controllers corresponding to the N power conversion phases, each of the N power switch controllers being configured to drive a corresponding phase of the N power conversion phases; a first power switch controller among the N power switch controllers being configured as a main power switch controller to provide a first switch drive signal; for each i traversed from 2 to N, an i-th power switch controller among the N power switch controllers is configured to receive an (i-1)th switch drive signal from an (i-1)th power switch controller at a first terminal of the i-th power switch controller; the i-th power switch controller is further configured to obtain energy from the (i-1)th switch drive signal and provide an i-th switch drive signal at a second terminal of the i-th power switch controller based on the (i-1)th switch drive signal.

[0006] In one embodiment of the present application, for each i traversed from 2 to N, the i-th switch drive signal is obtained by phase shifting the (i-1)-th switch drive signal by T(i-1) / N, and the pulse width of the i-th switch drive signal is equal to the pulse width of the (i-1)-th switch drive signal, where T(i-1) is the switching period of the (i-1)-th switch drive signal.

[0007] In one embodiment of the present application, for each i traversed from 2 to N, the i-th power switch controller further includes: a phase shift control module, coupled to the first terminal of the i-th power switch controller, and used to generate a set control signal and a reset control signal based on the (i-1)th switch drive signal; the set control signal is configured to set the i-th switch drive signal to a logic high level in response to each rising edge of the (i-1)th switch drive signal after a delay of T(i-1) / N; the reset control signal is configured to reset the i-th switch drive signal to a logic low level in response to each falling edge of the (i-1)th switch drive signal after a delay of T(i-1) / N; wherein T(i-1) is the switching period of the (i-1)th switch drive signal.

[0008] In one embodiment of the present application, for each i traversing from 2 to N, the phase shift control module of the i-th power switch controller is further configured to detect the switching period T(i-1) of the (i-1)th switch driving signal.

[0009] In one embodiment of the present application, for each i traversed from 2 to N, the phase shift control module of the i-th power switch controller is further configured to set a phase shift amount T(i-1) / N.

[0010] In one embodiment of the present application, each of the N power conversion phases includes a power switch.

[0011] In one embodiment of the present application, the power switch controller is used to drive a power switch in one power conversion phase of a multi-phase power converter.

[0012] In one embodiment of the present application, there is provided a power switch controller for driving one of the power conversion phases of a multi-phase power converter, the power switch controller comprising: a first terminal for receiving an input switch drive signal, the input switch drive signal being used to drive another power conversion phase in the multi-phase power converter; and a second terminal for providing an output switch drive signal to drive the one of the power conversion phases of the multi-phase power converter; wherein the power switch controller is configured to obtain electrical energy from the input switch drive signal received at its first terminal, and to provide the output switch drive signal based on the input switch drive signal.

[0013] In one embodiment of the present application, there is provided a power converter, comprising: a first power switch controller, which is configured as a main power switch controller to provide a first switch drive signal to drive the main power conversion phase of the power converter; and a second power switch controller, which is configured as a slave power switch controller, and is also configured to receive the first switch drive signal from the main power switch controller and obtain energy from the first switch drive signal; the second power switch controller is further configured to provide a second switch drive signal based on the first switch drive signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The invention may be further understood with reference to the following detailed description and accompanying drawings, in which like reference numerals are provided.

[0015] Figure 1 A power converter 100 according to an exemplary embodiment of the present application is schematically illustrated.

[0016] Figure 2 A power switch controller 200 for driving a power switch in one power conversion phase of a multi-phase power converter according to an embodiment of the present application is schematically shown.

[0017] Figure 3 The phase shift control module 300 according to the embodiment of the present application is schematically shown. According to the embodiment of the present application, the phase shift control module 300 can be used as the phase shift control module 202 of the power switch controller 200 .

[0018] Figure 4 A waveform diagram 400 is shown of several signals in the phase shift control module 300 and the power switch controller 200 according to an embodiment of the present application.

[0019] Figure 5 A power converter 500 according to another embodiment of the present application is schematically shown. DETAILED DESCRIPTION

[0020] The preferred embodiments of the present application illustrated in the accompanying drawings will now be described in detail. Although the present application will be described in conjunction with the preferred embodiments, it should be understood that they are not intended to limit the present application to these embodiments. On the contrary, the present application is intended to cover substitutions, modifications and equivalents that may be included in the spirit and scope of the present application as defined by the appended claims. In addition, in the following detailed description of the present application, many specific details are set forth in order to provide a thorough understanding of the present application. However, it is apparent to a person of ordinary skill in the art that the technical solutions of the present application can be implemented without these specific details. In order to avoid unnecessarily obscuring the present application, known methods, processes, components and circuits are not described in detail here.

[0021] An "embodiment" or "example" means that certain features, structures, or characteristics are included in at least one embodiment of the present application. These "embodiments" or "examples" do not necessarily refer to the same embodiment. In addition, features, structures, or characteristics may be combined in one or more embodiments. In addition, the drawings are provided for illustration purposes and are not necessarily drawn to scale. When an element is described as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or one or more intermediate elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, it means that there are no intermediate elements.

[0022] Figure 1 A power converter 100 according to an exemplary embodiment of the present disclosure is schematically shown. The power converter 100 may include a rectifying unit 101 for rectifying an alternating current ("AC") input signal VAC to output a rectified direct current ("DC") power signal VIN. The power converter 100 also includes N power conversion phases {PHASE(i), i=1, ..., N} coupled in parallel between a first node IN (e.g., a DC input node) and a second node OUT (e.g., an output node). Wherein N is an integer greater than 1 and represents the total number of power conversion phases included in the power converter 100. The total number N can be set and determined by the customer / user according to actual application requirements. That is, the parameter i is a variable that traverses integers from 1 to N. Each of the N power conversion phases {PHASE(i), i=1, 2, ..., N}, and all sub-circuits and elements contained therein are configured to use the reference ground potential at the third node GND of the power converter 100 as the ground potential. Input capacitor C IN1 The output capacitor Co may be coupled between the first node IN and the third node GND of the power converter 100. In one embodiment, the first node IN may be configured to receive the rectified DC power signal VIN. The output capacitor Co may be coupled between the second node OUT and the third node GND of the power converter 100.

[0023] According to an embodiment of the present application, the rectifier unit 101 may exemplarily include four diodes connected to form a full-bridge structure BD1. The first terminal b1 of the full-bridge structure is coupled to the first terminal a1 of the AC power supply through a fuse F1, the second terminal b2 of the full-bridge structure is coupled to the first node IN, the third terminal b3 of the full-bridge structure is coupled to the second terminal a2 of the AC power supply, and the fourth terminal b4 of the full-bridge structure is coupled to the third node GND of the power converter 100. The AC power supply may be configured to provide the AC input signal VAC. The capacitive device CX1 may be coupled between the first terminal b1 and the third terminal b3 of the full-bridge structure BD1.

[0024] According to an embodiment of the present application, for each i traversed from 1 to N, the i-th power conversion phase PHASE(i) in the N power conversion phases {PHASE(i), i=1, 2, ..., N} may include an i-th power stage 103(i) including an i-th power switch Q(i) and a corresponding i-th power switch controller 102(i). The i-th power switch controller 102(i) is used to drive or control the i-th power conversion phase PHASE(i) corresponding thereto. In one embodiment, the i-th power switch controller 102(i) is used to drive or control the i-th power stage 103(i) in the i-th power conversion phase PHASE(i) corresponding thereto. In one embodiment, the i-th power switch controller 102(i) is used to drive the i-th power switch Q(i) in the i-th power conversion phase PHASE(i) corresponding thereto to perform on and off switching. Therefore, it can be understood that the power converter 100 having the N power conversion phases {PHASE(i), i=1, 2, ..., N} includes N power switches {Q(i), i=1, 2, ..., N} and corresponding N power switch controllers {102(i), i=1, 2, ..., N}. Each of the N power switch controllers {102(i), i=1, 2, ..., N} is configured to drive or control a corresponding phase of the N power conversion phases {PHASE(i), i=1, 2, ..., N}. In one embodiment, each of the N power switch controllers {102(i), i=1, 2, ..., N} is configured to drive or control a corresponding power switch of the N power switches {Q(i), i=1, 2, ..., N}. In one embodiment, the first power conversion phase PHASE(1) among the N power conversion phases {PHASE(i), i=1, 2, ..., N} can be configured as a main power conversion phase, and the first power switch controller 102(1) among the N power switch controllers {102(i), i=1, 2, ..., N} can be configured as a main power switch controller to provide a first switch drive signal VG(1). The first switch drive signal VG(1) can be a switching period T (1) The high and low logic switching signals are (1) The MOSFET has a high logic pulse and a low logic pulse therein and can be configured to drive the first power switch Q(1) among N power switches {Q(i), i=1, 2, . . . , N}.

[0025] exist Figure 1In the exemplary embodiment shown, for each i traversing from 1 to N, the i-th power stage 103 (i) of the i-th power conversion phase PHASE (i) can be configured to have a boost power factor correction ("PFC") topology. For example, for each i traversing from 1 to N, the i-th power stage 103 (i) can include an i-th power switch Q (i). The first terminal D of the power switch Q (i) is coupled to the first node IN via the i-th inductive energy storage device L (i) and is coupled to the second node OUT through the i-th diode D (i), the second terminal S of the power switch Q (i) is coupled to the third node GND, and the control terminal G of the power switch Q (i) can be connected to the gate resistor device R G(i) Coupled to the i-th power switch controller 102 (i), in some embodiments, the control terminal G of the power switch Q (i) may also not pass through the gate resistor device R G(i) is coupled to the i-th power switch controller 102 (i). The gate resistor device R G(i) Parasitic resistance may be included. The first power switch controller 102(1) configured as a main power switch controller may include any power switch controller suitable for generating a main switch drive signal (i.e., a first switch drive signal VG(1)) for driving a first power stage 103(1) having a boost PFC topology. For example, a commercially available power switch controller MP44018A manufactured by Core Source Systems may be used as the first power switch controller 102(1). Figure 1In an example, the first power switch controller 102(1) may have a first terminal (e.g., a feedback terminal) FB, a second terminal (e.g., a driver output terminal) DRV(1), a third terminal (e.g., a regulated power supply terminal) VC(1), and a fourth terminal (e.g., a ground terminal) GND(1). The first terminal FB may be configured to receive a feedback signal indicating an output voltage VO from a second node OUT of the power converter 100, the second terminal DRV(1) may be configured to provide a first switch drive signal VG(1), the third terminal VC(1) may be configured to allow coupling to a first capacitive device C(1) to store energy to generate a regulated voltage signal VCC(1), and the voltage signal VCC(1) may be used as an internal power supply voltage of the first power switch controller 102(1), and the fourth terminal GND(1) may be configured to allow connection to a third node GND (or a reference ground potential of the power converter 100). The first power switch controller 102(1) includes at least one voltage feedback loop, which can be configured to generate a first switch drive signal VG(1) based at least in part on a feedback signal received at a first terminal FB. The first power switch controller 102(1) can also include other terminals, such as a fifth terminal (e.g., a current sensing terminal) CS, which can be configured to sense the current flowing through the first power switch Q(1) to generate a current sensing signal. The first power switch controller 102(1) can be further configured to adjust the first switch drive signal VG(1) based on the current sensing signal. The first power switch controller 102(1) can also include a sixth terminal (e.g., a compensation terminal) COMP, which can be configured to allow connection to a compensation network (e.g., including a resistor Rz and a capacitor Cz connected in series, and a capacitor Cp connected in parallel with the resistor Rz and the capacitor Cz connected in series) to improve the stability of the voltage feedback loop. The first power switch controller 102(1) can also include a seventh terminal (e.g., a zero crossing detection ("ZCD") terminal) ZCD(1), which can be configured to allow the first ZCD resistor R ZCD(1) Connected to the first inductive energy storage device L(1) to detect whether the current flowing through the inductive energy storage device L(1) crosses zero (or ideally has a zero current value). The first power switch controller 102(1) may also include an eighth terminal (e.g., a power terminal) MAINSIN, which may be configured to / used to sense the rectified voltage of the rectified AC input signal VAC. Furthermore, the voltage on the MAINSIN terminal may be used to provide input signal anomalies, such as brown-in and brownout protection for the power converter 100 based on the input signal, and to provide feed-forward compensation to the voltage on the COMP terminal. Figure 1 In the example, the eighth terminal MAINSIN is exemplarily described as being connected via the first input resistor RIN1 and the first input diode D IN1 is coupled to the second terminal a2 of the AC power source and connected to the AC power source via the first input resistor R IN1 and the second input diode D IN2 The second input capacitor C is further coupled to the first terminal b1 or the third terminal b3 of the full-bridge structure BD1 to detect the rectified voltage of the rectified AC input signal VAC. IN2 and the second input resistor R IN2 The first input resistor R may be coupled in parallel between the eighth terminal MAINSIN of the power converter 100 and the third node GND. IN1 and the second input resistor R IN2 A resistor voltage divider is formed to input the rectified voltage of the AC input signal VAC to the eighth terminal MAINSIN after voltage division. A person skilled in the art should understand that this is only to provide an example and not to limit.

[0026] For each i traversing from 2 to N (i.e., here i is a variable, which can traverse integers from 2 to N), the i-th power switch controller 102 (i) among the N power switch controllers {102 (i), i = 1, 2, ..., N} can have a first terminal (e.g., a power terminal) G (i), which can be configured to receive the (i-1)th switch drive signal VG (i-1) from the (i-1)th power switch controller 102 (i-1). The i-th power switch controller 102 (i) can also be configured to obtain electrical energy from the (i-1) switch drive signal VG (i-1). In other words, the i-th power switch controller 102 (i) is powered by the (i-1)th switch drive signal VG (i-1), or the working power of the i-th power switch controller 102 (i) is provided by the (i-1)th switch drive signal VG (i-1). For each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), the i-th power switch controller 102(i) among the N power switch controllers {102(i), i=1, 2, ..., N} can be configured / used as a slave power switch controller and can further have a second terminal (e.g., a driver output terminal) DRV(i). The power switch controller 102(i) can also be configured to provide an i-th switch drive signal VG(i) at the second terminal DRV(i) based on the (i-1)-th switch drive signal VG(i-1). A person skilled in the art can understand that for each i traversing from 2 to N (i.e., i is a variable here, which can traverse integers from 2 to N), the (i-1)th switch drive signal VG(i-1) can be regarded as the input switch drive signal of the i-th power switch controller 102(i), and the i-th switch drive signal VG(i) can be regarded as the output switch drive signal of the i-th power switch controller 102(i) and can be used to drive the i-th power switch Q(i) in the i-th power conversion phase PHASE(i). Therefore, in Figure 1In the exemplary embodiment of , it can be understood that for each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), the i-th power switch controller 102 (i) obtains power from the (i-1)th switch drive signal VG (i-1) on the one hand, and generates the i-th switch drive signal VG (i) based on the (i-1)th switch drive signal VG (i-1) from the (i-1)th power switch controller on the other hand. For example, the second power switch controller 102 (2) obtains power from the first switch drive signal VG (1) on the one hand, and generates the second switch drive signal VG (2) based on the first switch drive signal VG (1) from the main power switch controller 102 (1). For each i from 2 to N (i.e., i is a variable that can traverse integers from 2 to N), powering the i-th power switch controller 102(i) in the i-th power control phase PHASE(i) by the (i-1)th switch drive signal VG(i-1) of the (i-1)th power conversion phase PHASE(i-1) has several advantages. The (i-1)th switch drive signal VG(i-1) can be a switching period T (i-1) The high and low logic switching signals are (i-1) There are high logic pulses and low logic pulses in it. Since the switch drive signal VG(i-1) generally has a well-adjusted voltage amplitude, for example, in the range of 10V to 20V, relative to the reference ground GND of the power converter 100, the i-th power switch controller 102(i) that can be configured to obtain electrical energy from the (i-1)th switch drive signal VG(i-1) according to various embodiments of the present application may not need to be provided with an internal voltage regulator that can withstand high voltage. The "high voltage" here may refer to a voltage higher than the voltage amplitude (e.g., 110V to 20V) of the low-side switch drive signal VGL in one example, a voltage higher than 20V to 100V in another example, or a voltage higher than 100V to 1500V in another example. Since no devices that can withstand high voltage are required, the present application reduces the complexity and cost of designing the i-th power switch controller 102(i).

[0027] According to an embodiment of the present disclosure, for each i traversing from 2 to N (i.e., here i is a variable, which can traverse integers from 2 to N), the i-th power switch controller 102 (i) may also have a third terminal (e.g., a regulated power supply terminal) VC (i) and a fourth terminal (e.g., a ground terminal) GND (i). The i-th power switch controller 102 (i) may also be configured to allow the i-th capacitive device C (i) to be connected between its third terminal VC (i) and the fourth terminal GND (i) for storing energy to provide a regulated voltage signal VCC (i). For example, for each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), the i-th capacitive device C(i) is coupled between the third terminal VC(i) and the fourth terminal GND(i) of the i-th power switch controller 102(i), and when the (i-1)-th switch drive signal VG(i-1) provides a regulated voltage signal VCC(i) at the first terminal G(i) of the i-th power switch controller 102(i), the capacitive device C(i) can be charged.

[0028] According to an embodiment of the present application, for each i traversing from 2 to N (i.e., i is a variable here, which can traverse integers from 2 to N), the i-th power switch controller 102 (i) can also be configured to phase shift the (i-1)th switch drive signal VG (i-1) by T (i-1) / N to generate the i-th switch drive signal VG(i). That is, in theory and technology, for each i traversing from 2 to N (i.e., here i is a variable, which can traverse integers from 2 to N), the i-th power switch controller 102(i) can be configured to copy the (i-1)th switch drive signal VG(i-1) and superimpose T on the (i-1)th switch drive signal VG(i-1). (i-1) / N time delay to generate the i-th switch drive signal VG(i). Therefore, for each i traversing from 2 to N (that is, here i is a variable, which can traverse integers from 2 to N), the i-th switch drive signal VG(i) can have a switching period T (i) And in each switching cycle T (i) The high and low logic pulses in the i-th switch drive signal VG(i) are (i) can be substantially equal to the switching period T of the (i-1)th switch driving signal VG(i-1) (i-1) , pulse width t on(i) It can also be basically equal to the pulse width t of the (i-1)th switch on(i) , and each rising edge of the i-th switch drive signal VG(i) has T relative to the (i-1)-th switch drive signal VG(i-1) (i-1)In this specification, for each i from 1 to N, the pulse width t of the i-th switch drive signal VG(i) is on(i) It can refer to each switching cycle T of the i-th switch drive signal VG(i). (i) According to an exemplary embodiment, for each i traversing from 2 to N (i.e., i is a variable that can traverse integers from 2 to N), the i-th power switch controller 102(i) may further include a fifth terminal (e.g., a setting terminal) SET(i), which may be configured to set the i-th switch drive signal VG(i) to have a T value relative to the (i-1)-th switch drive signal VG(i-1). (i-1) / N phase shift (i.e. T (i-1) / N time delay). For example, for each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), the i-th power switch controller 102(i) can be configured to allow a customer or user to set T by connecting an external setting device to the setting terminal SET(i) or by providing a configuration signal to the setting terminal SET(i). (i-1) / N time delay. In this way, except for the first power switch controller 102 (1) as the master power switch controller, the remaining (N-1) power switch controllers {102 (i), i = 2, ..., N} can be slave power switch controllers that are identical to each other (i.e., have the same terminals / pins, the same functions, the same internal circuits and configurations, etc.) that are different from the master power switch controller 102 (1). For example, each slave power switch controller {102 (i), i = 2, ..., N} can include the same power switch controller, which can be formed in a single integrated circuit chip or a single integrated circuit die. The slave power switch controller {102 (i), i = 2, ..., N} can be "universal" to cooperate with other master power switch controllers and be configured as / form any other topology including a cross-multiphase power converter. Therefore, it is referred to as a "universal" power switch controller in the following text of this application. Although the power converter topology may have different topologies according to various application requirements, the above method can greatly facilitate customers / users to form any number of N-phase (N≥2) power converters in actual applications. In addition, such a "universal" power switch controller used as a slave power switch controller, such as the i-th power switch controller 102(i) (i from 2 to N), may not need to have a complex internal circuit to form a regulation feedback loop like the master power switch controller (such as the first power switch controller 102(1) described above). The slave power switch controller can simply copy and phase-shift the (i-1)th switch drive signal VG(i-1) from the previous (i-1) power converter PHASE(i-1) to provide the i-th switch drive signal VG(i) to drive the i-th power switch Q(i) in the current i-th power conversion phase PHASE(i). Therefore, the "universal" power switch controller according to various embodiments of the present invention allows greater flexibility and reduces the design complexity and cost of customer / user configuration of interleaved multi-phase power converters.

[0029] Figure 2 Schematically shows a method for driving a multi-phase power converter according to an embodiment of the present application (for example, Figure 1 The power converter 100 or Figure 5The power switch controller 200 of the power switch of one of the power conversion phases of the power converter 500 shown in the figure can be used as the above-mentioned "universal" power switch controller, which can be "universal" in cooperating with other master power switch controllers and configured as / forming any other topology of the power converter (N≥2) containing N power conversion phases. For example, for each i traversing from 2 to N (i.e., i is a variable here, which can traverse integers from 2 to N), the power switch controller 200 can be configured as the i-th slave power switch controller 102 (i) of the power converter 100. That is, for each i traversing from 2 to N (i.e., i is a variable here, which can traverse integers from 2 to N), the i-th power switch controller 102 (i) of the power converter 100 can include a completely identical power switch controller, such as the power switch controller 200. The power switch controller 200 may be formed in a single integrated circuit chip or a single integrated circuit die, and may be "universal" to cooperate with other main power switch controllers and be configured to / form other cross-multiphase power converters. The power switch controller 200 may have a first terminal (e.g., a power supply terminal) G(i) configured to / for receiving an input switch drive signal VG(i-1), wherein the drive signal VG(i-1) is used to drive a power switch of another power conversion phase. The power switch controller 200 may also have a second terminal (e.g., a driver output terminal) DRV(i), which may be configured to / for providing an output switch drive signal VG(i) to drive the power switch in the current power conversion phase. The power switch controller 200 may also be configured to obtain electrical energy from the input switch drive signal VG(i-1) received at the first terminal G(i), and provide an output switch drive signal VG(i) based on the input switch drive signal VG(i-1). The power switch controller 200 may also have a third terminal (e.g., a regulated power terminal) VC(i) and a fourth terminal (e.g., a ground terminal) GND, and may be further configured to provide a regulated voltage signal (e.g., VCC(i)) when a capacitive device (e.g., C(i)) is coupled between the third terminal VC(i) and the fourth terminal GND(i). The power switch controller 200 may also be configured to phase shift the input switch drive signal VG(i-1) by T (i-1) / N to generate the output switch drive signal VG(i), where T (i-1) is the switching period of the input switch drive signal VG(i-1), and N is the total number of power conversion phases included in the multi-phase power converter. That is, in theory and technology, the power switch controller 200 can be configured to copy the (i-1)th switch drive signal VG(i-1) and superimpose T on the (i-1)th switch drive signal VG(i-1). (i-1)The power switch controller 200 may further include a fifth terminal (e.g., a setting terminal) SET(i), which may be configured to set a phase shift T of the i-th switch drive signal VG(i) relative to the (i-1)-th switch drive signal VG(i-1). (i-1) / N(i.e. T (i-1) / N time delay). For example, Figure 1 In the example, for each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), when the power switch controller 200 is used as the i-th power switch controller 102(i) of the i-th power switch Q(i) of the i-th phase of the multi-phase power converter 100, the power switch controller 200 can be configured to receive the (i-1)th switch drive signal VG(i-1) from the (i-1)th power switch controller 102(i-1) as the input switch drive signal, wherein the (i-1)th power switch controller 102(i-1) is used to drive the (i-1)th power switch Q(i-1) in another power conversion phase (i.e., the (i-1)th phase).

[0030] According to an exemplary embodiment, still referring to Figure 2, the power switch controller 200 may include an internal regulation module 201 coupled between the first terminal G(i) and the third terminal VC(i) of the power switch controller 200, which is configured to convert the input switch drive signal VG(i-1) into a regulated voltage signal VCC(i) when the capacitive energy storage device is coupled between the third terminal and the fourth terminal GND(i). In an embodiment, the internal regulation module 201 may include, for example, a rectifier (e.g., a MOSFET or a diode), which is configured to be unidirectionally conductive in a direction from the first terminal G(i) to the third terminal VC(i) of the power switch controller 200, and reversely blocked (non-conductive) in a direction from the third terminal VC(i) of the power switch controller 200 to the first terminal G(i). In an alternative embodiment, the internal regulation module 201 may include a regulator (e.g., an LDO regulator) instead of a rectifier. Since the input switch drive signal VG(i-1) generally has a voltage amplitude in the range of, for example, 10V to 20V relative to the reference ground at the third node GND of the power converter 100, the power switch controller 200 may not require its internal regulation module 201 to be able to withstand high voltage. The "high voltage" here may refer to a voltage higher than the voltage amplitude of the low-side switch drive signal VGL (e.g., 10V to 20V) in one example, or even higher than 20V to 100V in another example, or higher than 100V to 1500V in another example. For example, the internal regulation module 201 may be composed of low-voltage devices (e.g., having a breakdown voltage lower than the voltage amplitude of the input switch drive signal VG(i-1)). Low-voltage devices not only have the advantages of low cost and small size, but also help reduce design complexity and power consumption.

[0031] According to an exemplary embodiment, still referring to Figure 2 The power switch controller 200 may further include a phase shift control module 202 coupled to the first terminal G(i), which is configured to generate a set control signal G(i)_S and a reset control signal G(i)_R based on the input switch drive signal VG(i-1). The set control signal G(i)_S may be configured to delay T (i-1) / N later, the output switch drive signal VG(i) is set to a logic high level in response to each rising edge of the input switch drive signal VG(i-1). The reset control signal G(i)_R can be configured to delay T (i-1) After T / N time, the output switch drive signal VG(i) is reset to a logic low level in response to each falling edge of the input switch drive signal VG(i-1). (i-1)is the switching period of the input switch drive signal VG(i-1), and N is the total number of power conversion phases included in the multi-phase power converter. That is, in response to each rising edge of the input switch drive signal VG(i-1), the set control signal G(i)_S can be configured to be set once the rising edge of the input switch drive signal VG(i-1) has passed T (i-1) In response to each falling edge of the input switch drive signal VG(i-1), the reset control signal G(i)_R can be configured to reset once the falling edge of the input switch drive signal VG(i-1) has passed T (i-1) / N time, the output switch driving signal VG(i) is reset to a logic low level. According to an embodiment, the phase shift control module 202 may be further coupled to a fifth terminal (e.g., a setting terminal) SET(i), and may be configured to allow a customer / user to set the phase shift amount T by connecting an external setting device to the setting terminal SET(i) or by providing a configuration signal to the setting terminal SET(i). (i-1) / N(i.e. T (i-1) / N time delay). According to an exemplary embodiment, still refer to Figure 2 , the power switch controller 200 may further include a logic control module 203 and a driver 204. The logic control module 203 may be configured to at least directly or indirectly receive a set control signal G(i)_S and a reset control signal G(i)_R and provide an output control signal CTRL(i) based at least in part on the set control signal G(i)_S and the reset control signal G(i)_R. The driver 204 may be powered by a regulated voltage signal VCC(i) and may be configured to amplify the driving capability of the output control signal CTRL(i) to provide an output switch drive signal VG(i). In one embodiment, the logic control module 203 may have a set input terminal S, a reset input terminal R, and a non-inverting output terminal Q. In one embodiment, the set control signal G(i)_S may be directly fed to the set input terminal S of the logic control module 203, and the logic control module 203 may be configured to set the output control signal CTRL(i) (or the output switch drive signal VG(i)) to a logic high level in response to each set pulse 401 of the set control signal G(i)_S. For example only and not limitation, in other embodiments, a simple logic operation (e.g., Figure 2) thereby providing a set signal ST to the set input terminal S of the logic control module 203. For example, in one embodiment, other signals participating in setting the output control signal CTRL(i) (or the output switch drive signal VG(i)) may include a valley control signal Valley(i). For this case, the power switch controller 200 may also include a sixth terminal (e.g., a zero crossing detection terminal) ZCD(i). For each i traversing from 2 to N (i.e., i is a variable here that can traverse integers from 2 to N), when the power switch controller 200 is used as the i-th power switch controller 102(i) of the power converter 100, the sixth terminal ZCD(i) may be connected via, for example, the i-th zero crossing detection resistor R ZCD(i) The i-th inductive energy storage device L(i) coupled to the i-th power stage 103(i). For each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), when the power switch controller 200 is used to act as the i-th power switch controller 102(i) driving the i-th power switch Q(i) of the i-th power conversion phase PHASE(i) of the power converter 100, the sixth terminal ZCD(i) can be configured to / used to sense the zero current flowing through the i-th inductive energy storage device L(i) to provide a zero crossing indication signal, and can be further configured to / used to sense the quasi-resonant voltage valley across the i-th power switch Q(i). The power switch controller 200 may also include a valley lock module 205 coupled to the sixth terminal (e.g., zero crossing detection terminal) ZCD(i) to receive a quasi-resonant voltage valley signal indicating the i-th power switch Q(i). The valley locking module 205 can be configured to lock the number of times the voltage on the i-th power switch Q(i) reaches the quasi-resonant voltage valley to a preset value (for example, the preset value can be from 1 to 7 or more according to actual application requirements) to avoid audible noise caused by the voltage valley value on the i-th power switch Q(i) jumping back and forth. In an alternative embodiment, other signals involved in setting the output control signal CTRL(i) (or the output switch drive signal VG(i)) can include a minimum off time control signal T off_min . Minimum off time control signal T off_min It can be configured to limit the output control signal CTRL(i) (or the output switch drive signal VG(i)) within a switching period T (i) For each i traversing from 2 to N (i.e., i is a variable that can traverse integers from 2 to N), when the power switch controller 200 is used to act as the i-th power switch controller 102(i) driving the i-th power switch Q(i) of the i-th power conversion phase PHASE(i) of the power converter 100, the minimum off-time control signal T off_minIt can help limit the maximum switching frequency of the i-th power switch driven by the output switch drive signal VG(i) and ensure that the discharge time of the i-th inductive energy storage device L(i) is long enough. off_min It also helps to enhance the anti-noise capability and prevent false triggering (for example, in an actual circuit, false triggering of the zero-crossing indication signal may be caused by various reasons such as parasitic capacitance, inductance and resistance). In one embodiment, the reset control signal G(i)_R can be directly fed to the reset input terminal R of the logic control module 203, and the logic control module 203 can be configured to reset the output control signal CTRL(i) (or the output switch drive signal VG(i)) to a logic low level in response to each reset pulse 403 of the reset control signal G(i)_R. For example only and not limitation, in other embodiments, simple logic operations (for example, Figure 2 2 (a logical OR as shown in the example in FIG. 2 ) thereby providing a reset signal RST to the reset input terminal R of the logic control module 203. For example, in one embodiment, other signals involved in resetting the output control signal CTRL(i) (or the output switch drive signal VG(i)) may include a fault indication signal Fault(i). For example, the fault indication signal Fault(i) may indicate any type of abnormal condition of the power converter system (e.g., a power converter 100 using the power switch controller 200 as the i-th power switch controller 102(i), i from 2 to N), such as an overvoltage condition, an overcurrent condition, an overtemperature condition, a system idle condition, etc.

[0032] Figure 3 The phase shift control module 300 according to an embodiment of the present application is schematically shown, which can be used as the phase shift control module 202 of the power switch controller 200. The phase shift control module 300 can include a set control module 301 and a reset control module 302. Figure 4 A waveform diagram 400 according to an embodiment of the present application is shown, showing waveforms of several signals in the phase shift control module 300 and the power switch controller 200 .

[0033] The setting control module 301 may be coupled to the first terminal G(i) of the power switch controller 200 and may be configured to detect a switching period T of the input switch drive signal VG(i-1) (e.g., the (i-1)th switch drive signal VG(i-1) when the power switch controller 200 is used to act as the i-th power switch controller 102(i) of the power converter 100). (i-1) The setting control module 301 can also be configured to delay T (i-1) / N, a set pulse 401 of the set control signal G(i)_S is generated in response to each rising edge of the input switch drive signal VG(i-1). That is, from the moment when each rising edge of the input switch drive signal VG(i-1) arrives, once T (i-1) / N time delay, the setting control module 301 generates a setting pulse 401 of the setting control signal G(i)_S. Each setting pulse 401 of the setting control signal G(i)_S can be configured to set the output switch drive signal VG(i) (for example, the i-th switch drive signal VG(i) when the power switch controller 200 is used as the i-th power switch controller 102(i) of the power converter 100) to a logic high level. That is, each setting pulse 401 of the setting control signal G(i)_S triggers a rising edge of the switch drive signal VG(i). The setting control module 301 can be further coupled to a fifth terminal (for example, a setting terminal) SET(i), and can be configured to allow a customer / user to set the phase shift amount T by connecting an external setting device to the setting terminal SET(i) or by providing a configuration signal to the setting terminal SET(i). (i-1) / N(i.e. T (i-1) / N time delay). As long as the switching cycle T of the input switch drive signal VG(i-1) can be detected, (i-1) And delay T (i-1) After / N time, each set pulse 401_S of the set control signal G(i)_S is generated in response to each rising edge of the input switch driving signal VG(i-1). The set control module 301 may include any appropriate circuit.

[0034] In order to provide Figure 3 In the example shown, the set control module 301 may include a switching cycle detection circuit 303, a phase shift programming circuit 304, and a set pulse generation circuit 305. The switching cycle detection circuit 303 may be configured to receive an input switch drive signal VG(i-1) and detect a switching cycle T of the input switch drive signal VG(i-1). (i-1) , to provide an indication of the switching period T (i-1) The first voltage signal VL_T (i-1) The switching cycle detection circuit 303 may also be configured to provide a first periodic ramp signal V ramp1 , the first periodic ramp signal V ramp1 The ramp voltage amplitude indicates the input switch drive signal VG(i-1) for each switching cycle T (i-1) The time from 0 to T (i-1) time. Figure 3In the example of , the switching cycle detection circuit 303 may include a first pulse generator 3011, which is configured to generate a single pulse 402 in response to each rising edge of the input switch drive signal VG(i-1) to provide a first sampling control signal SH1. Therefore, at each rising edge of the input switch drive signal VG(i-1), the first sampling control signal SH1 has a pulse 402. The switching cycle detection circuit 303 may also include a first delay circuit 3012, which is configured to superimpose a first preset delay time td1 (for example, according to the switching cycle T (i-1) The range is typically 10ns to 100ns and should not exceed the switching period T (i-1) 5% of the minimum value of the delayed input switch drive signal VG(i-1)_td1) to output the delayed input switch drive signal VG(i-1)_td1. The second pulse generator 3013 is configured to generate a single pulse in response to each rising edge of the delayed input switch drive signal VG(i-1)_td1 to provide the first charging control signal CH1. Therefore, at each rising edge of the delayed input switch drive signal VG(i-1)_td1, the first charging control signal CH1 has one pulse. The switching cycle detection circuit 303 may also include a first charging control switch 3014, a first capacitor 3015, and a first current source 3016. The first charging control switch 3014 and the first capacitor 3015 may be connected in parallel between the first current source 3016 and the ground potential (GND), and the first charging control switch 3014 may have a control terminal for receiving the first charging control signal CH1. Therefore, at each rising edge of the delayed input switch driving signal VG(i-1)_td1, a single pulse signal of the first charging control signal CH1 turns on the first charging control switch 3014 to discharge the first capacitor 3015. The voltage signal across the first capacitor 3015 can be used as the first periodic ramp signal V ramp1 The switching cycle detection circuit 303 may further include a first sampling and holding circuit 3017, wherein the first sampling and holding circuit 3017 is configured to receive a first periodic ramp signal V at its input terminal. ramp1 The first sampling and holding circuit 3017 receives the first sampling control signal SH1 at its control terminal and couples the second capacitor 3018 at its output terminal. The first sampling and holding circuit 3017 responds to each pulse 402 of the first sampling control signal SH1 to the first periodic ramp signal V ramp1 This can be understood as that at each rising edge of the input switch drive signal VG(i-1), the first sampling and holding circuit 3017 samples the voltage amplitude of the first periodic ramp signal V ramp1 The voltage amplitude is sampled, and then the sampled voltage amplitude is maintained to provide a first voltage signal VL_T at the output end of the first sample and hold circuit 3017. (i-1) .

[0035] The phase shift programming circuit 304 can be coupled to the switching cycle detection circuit 303 to receive the first voltage signal VL_T (i-1) , and can be further coupled to a fifth terminal (e.g., a setting terminal) SET(i) of the power switch controller 200 to connect to an external setting device or receive a configuration signal. When the power switch controller 200 is used in a multi-phase application with N power conversion phases (e.g., in an N-phase power converter 100), for example, the phase shift programming circuit 304 can be configured to allow a customer / user to set the first voltage signal VL_T (i-1) Divide into N equal parts, thereby providing an indication T (i-1) / N time delayed voltage division signal VL_T (i-1) / N(by Figure 4 ). This is for example only and not for limitation. Figure 3 In the example, the phase shift programming circuit 304 is simply shown as including a circuit with R (i) The customer / user can connect a resistor with a resistance value of R SET(i) The resistance value of the external resistor, where R SET(i) =(N-1)*R (i) It should be understood by those skilled in the art that as long as it allows the customer / user to change the first voltage signal VL_T according to the total number N of power conversion phases included in the power converter using the power switch controller 200, (i-1) Divide into N equal parts and provide voltage division signal VL_T (i-1) / N, the phase shift programming circuit 304 may include any suitable circuit.

[0036] The set pulse generating circuit 305 may be configured to receive the voltage division signal VL_T (i-1) / N and the first periodic ramp signal V ramp1 Whenever the first periodic ramp signal V ramp1 Rising to the voltage division signal VL_T (i-1) / N, the set pulse generating circuit 305 generates a pulse 401 to provide the set control signal G(i)_S. ramp1 Rising to the voltage division signal VL_T (i-1) / N, the setting control signal G(i)_S has a pulse 401 (for setting pulse 401). It will be understood by those skilled in the art that each first periodic ramp signal V ramp1 Rising to the voltage division signal VL_T (i-1) The moment when the amplitude of / N is actually corresponding to the rising edge of each input switch drive signal VG(i-1) being delayed by T (i-1) / N, that is, each rising edge of the input switch drive signal VG(i-1) is phase shifted / delayed by T (i-1) / N moment. Figure 3 In the example of , the set pulse generation circuit 305 may include a first comparator 3051. The first comparator 3051 is configured to have a first terminal (eg Figure 3 The inverting input terminal "-") receives the voltage division signal VL_T (i-1) / N, at its second terminal (e.g. Figure 3 The first periodic ramp signal V is received at the non-inverting input terminal "+" of ramp1 The first periodic ramp signal V ramp1 And the voltage divided signal VL_T (i-1) / N is compared to provide a first comparison signal CMP1 at the output terminal of the first comparator 3051. The set pulse generating circuit 305 may further include a third pulse generator 3052, which is configured to respond to the first comparison signal CMP1 and generate a first periodic ramp signal V ramp1 Rising to the voltage division signal VL_T (i-1) / N, a pulse (eg, used as a set pulse 401) is generated to provide a set control signal G(i)_S.

[0037] The reset control module 302 may be coupled to the first terminal G(i) of the power switch controller 200 and may be configured to detect a pulse width t of the input switch drive signal VG(i-1) (e.g., the (i-1)th switch drive signal VG(i-1) when the power switch controller 200 is used as the i-th power switch controller 102(i) of the power converter 100). on(i-1) The reset control module 302 may be further configured to reset the output switch drive signal VG(i) when each rising edge of the output switch drive signal VG(i) exceeds the pulse width t on(i-1) After a certain time, a reset pulse 403 of the reset control signal G(i)_R is generated in response to each rising edge (or in response to each set pulse 401 of the set control signal G(i)_S). That is, from the moment when each rising edge of the output switch drive signal VG(i) (or each set pulse 401 of the set control signal G(i)_S) arrives, once the pulse width t of the input switch drive signal VG(i-1) has passed, the reset pulse 403 of the reset control signal G(i)_R is generated. on(i-1)After a certain time, the reset control module 302 generates a reset pulse 403 of the reset control signal G(i)_R. Each reset pulse 403_R of the reset control signal G(i) can be configured to reset the output switch drive signal VG(i) (for example, when the power switch controller 200 is used as the i-th power switch controller 102(i) of the power converter 100, the i-th switch drive signal VG(i)) to a logic low level. That is, each reset pulse 403 of the reset control signal G(i)_R triggers a falling edge of the output switch drive signal VG(i). As long as the pulse width t of the input switch drive signal VG(i-1) can be detected, on(i-1) and at a delay of t on(i-1) After a certain time, the reset control module 302 may respond to each rising edge of the output switch driving signal VG(i) and generate a reset pulse 403 of the reset control signal G(i)_R. The reset control module 302 may include any appropriate circuit.

[0038] In order to provide Figure 3 In the example shown, the reset control module 302 may include a pulse width detection circuit 306 and a reset pulse generation circuit 307. The pulse width detection circuit 306 may be configured to receive the input switch drive signal VG(i-1) and detect the pulse width t of the input switch drive signal VG(i-1). on(i-1) To provide an indication pulse width t on(i-1) The second voltage signal VL_t on(i-1) (Depend on Figure 4 ). Figure 3 In the example of , the pulse width detection circuit 306 may include a falling edge trigger pulse generator 3061, which is configured to generate a pulse 404 in response to each falling edge of the input switch drive signal VG(i-1) to provide the second sampling control signal SH2. Therefore, at each falling edge of the input switch drive signal VG(i-1), the second sampling control signal SH2 has a single pulse 404. The pulse width detection circuit 306 may also include a second sample and hold circuit 3062. The second sample and hold circuit 3062 may be configured to receive the first periodic ramp signal V at its input terminal. ramp1 The second sampling and holding circuit 3062 receives the second sampling control signal SH2 at its control terminal and couples the third capacitor 3063 at its output terminal. The second sampling and holding circuit 3062 responds to each pulse 404 of the second sampling control signal SH2 to the first periodic ramp signal V ramp1 This can be understood as that at each falling edge of the input switch drive signal VG(i-1), the second sampling and holding circuit 3062 samples the voltage amplitude of the first periodic ramp signal V ramp1The voltage amplitude is sampled, and then the sampled voltage amplitude is held to provide a second voltage signal VL_t at the output end of the second sample and hold circuit 3062. on(i-1) .

[0039] The reset pulse generating circuit 307 may be configured to receive the output switch driving signal VG(i) or the output control signal CTRL(i) and provide a second periodic ramp signal V ramp2 The second periodic ramp signal V ramp2 The ramp voltage amplitude indicates the time from 0 to T(i) of each switching cycle T(i) of the output switch drive signal VG(i). The reset pulse generating circuit 307 can also be configured to receive a second voltage signal VL_t on(i-1) And in the second periodic ramp signal V ramp2 Rising to the second voltage signal VL_t on(i-1) When the amplitude of the second periodic ramp signal V ramp2 Rising to the second voltage signal VL_t on(i-1) At each moment of the amplitude of , the reset control signal G(i)_R has a pulse (used as the reset pulse 403). A person skilled in the art will understand that each second periodic ramp signal V ramp2 Rising to the second voltage signal VL_t on(i-1) The moment actually corresponds to each rising edge of the output switch drive signal VG(i) delayed by t on(i-1) The moment of each rising edge of the output switch drive signal VG(i) is phase shifted / delayed by t on(i-1) moment.

[0040] exist Figure 3 In the example of , the reset pulse generating circuit 307 may include a second delay circuit 3021, which is configured to superimpose a second preset delay time td2 (e.g., in the range of 10ns to 100ns, and ideally should match the first preset delay time td1, i.e., td2=td1) on the output switch driving signal VG(i) or the output control signal CTRL(i) to output the delayed output switch driving signal VG(i)_td2. The fourth pulse generator 3022 is configured to generate a pulse in response to each rising edge of the delayed output switch driving signal VG(i)_td2 to provide the second charging control signal CH2.

[0041] Therefore, the second charging control signal CH2 has a pulse at each rising edge of the delayed output switch drive signal VG(i)_td2. The reset pulse generating circuit 307 may also include a second charging control switch 3023, a fourth capacitor 3024, and a second current source 3025. The second charging control switch 3023 and the fourth capacitor 3024 may be connected in parallel between the second current source 3016 and the ground, and the second charging control switch 3023 may have a control terminal for receiving the second charging control signal CH2. Therefore, at each rising edge of the delayed output switch drive signal VG(i)_td2, a pulse signal of the second charging control signal CH2 turns on the second charging control switch 3023 to discharge the fourth capacitor 3024. The voltage signal across the fourth capacitor 3024 may be used as a second periodic ramp signal V ramp2 The reset pulse generating circuit 307 may further include a fifth pulse generator 3027. The fifth pulse generator 3027 is configured to respond to the second comparison signal CMP2 and generate a reset pulse whenever the second periodic ramp signal V ramp2 Rising to the second voltage signal VL_t on(i-1) When the amplitude reaches a value greater than , a pulse (eg, used as a reset pulse 403) is generated to provide a reset control signal G(i)_R.

[0042] It should be understood by those skilled in the art that Figure 3 The phase shift control module 300 is described by way of example and is not intended to be limiting. According to the above teachings, many modifications and variations can be made to the phase shift control module. The phase shift control module 300 may include any suitable circuit capable of achieving the following functions: capable of detecting the switching period T (i-1) And delay T (i-1) After a time of t / N, each rising edge of the input switch driving signal VG(i-1) is responded to to generate each set pulse 401 of the set control signal G(i)_S, and the pulse width t of the input switch driving signal VG(i-1) can be detected. on(i-1) And when the input switch driving signal VG(i-1) passes through the pulse width t on(i-1) After a certain time, each reset pulse 403 of the reset control signal G(i)_R is generated in response to each rising edge of the output switch driving signal VG(i) (or in response to each set pulse 401 of the set control signal G(i)_S). A person skilled in the art should also understand that the above description refers to Figure 3 The related terms "first", "second", "third", "fourth", and "fifth" do not refer to any order / sequence, but are only used to distinguish different circuit components and different signals. For example, "first" and "second" are used to distinguish the first periodic ramp signal V ramp1 and the second periodic ramp signal V ramp2, the first voltage signal VL_T (i-1) and the second voltage signal VL_t on(i-1) , a first sampling and holding circuit 3017 and a second sampling and holding circuit 3062, a first delay circuit 3012 and a second delay circuit 3021, a first comparator 3051 and a second comparator 3026, a first sampling control signal SH1 and a second sampling control signal SH2, a first charging control switch 3014 and a second charging control switch 3023, a first current source 3016 and a second current source 3025, a first charging control signal CH1 and a second charging control signal CH2; "first", "second", "third" and "fourth" are used to distinguish the first capacitor 3015, the second capacitor 3018, the third capacitor 3063 and the fourth capacitor 3024; "first", "second", "third", "fourth" and "fifth" are used to distinguish the first pulse generator 3011, the second pulse generator 3013, the third pulse generator 3052, the fourth pulse generator 3022 and the fifth pulse generator 3027.

[0043] Figure 5 A power converter 500 according to another exemplary embodiment of the present invention is schematically shown, which uses a "universal" power switch controller (such as the power switch controller 200) as a slave power switch controller to work in conjunction with a master power switch controller 502 (1). The power converter 500 may include a rectifier unit 501 for rectifying an alternating current ("AC") input signal VAC to output a rectified direct current ("DC") power signal VIN. The power converter 500 also includes N power conversion phases {PHASE(i), i=1, ..., N} connected in parallel between a first node (e.g., a DC input node) IN and a second node (e.g., an output node) OUT, where N is an integer greater than 1, which represents the total number of power conversion phases included in the power converter 500, and the total number N can be set and determined by the customer / user according to actual application requirements. That is, the parameter i is a variable that traverses integers from 1 to N. All sub-circuits and components included in each of the N power conversion phases {PHASE(i), i=1, 2, ..., N} are configured to use the reference ground potential at the third node GND of the power converter 500 as the ground potential of each power conversion phase PHASE(i). IN1 The output capacitor Co may be coupled between the first node IN and the third node GND of the power converter 500. In one embodiment, the first node IN may be configured to receive the rectified DC power signal VIN. The output capacitor Co may be coupled between the second node OUT and the third node GND of the power converter 500.

[0044] exist Figure 5In the example of FIG. 5 , the rectifying unit 501 may exemplarily include four diodes connected to form a full-bridge structure BD1, wherein a first terminal b1 of the full-bridge structure is coupled to an inductive device (eg, a transformer) L CM1 The first winding of the full-bridge structure is connected to the first node IN, and the third terminal b3 of the full-bridge structure is connected to the inductive device L. CM1 The fourth terminal b4 of the full-bridge structure is coupled to the third node GND of the power converter 500. For the rectifier unit 501, the first terminal a1 of the AC source can be coupled to the second winding of the inductive device LCM1 via the fuse F1, the second terminal a2 of the AC source can be coupled to the first winding of the inductive device LCM1, the capacitive device CX1 can be coupled between the first terminal a1 and the second terminal a2 of the AC source, and another capacitive device CX2 can be coupled between the first terminal b1 and the third terminal b3 of the full-bridge structure BD1. The AC power source can be configured to provide an AC input signal VAC.

[0045] Similar to the power converter 100, for each i traversing from 1 to N, the i-th power conversion phase PHASE(i) of the N power conversion phases {PHASE(i), i=1, 2, ..., N} of the power converter 500 may include an i-th power stage 503(i), the i-th power stage 503(i) having an i-th power switch Q(i) and a corresponding i-th power switch controller 502(i) for driving the i-th power switch Q to perform on or off switching. The i-th power switch controller 502(i) is configured to drive or control the i-th power conversion phase PHASE(i). In one embodiment, the i-th power switch controller 502(i) is configured to drive or control the i-th power stage 503(i). In one embodiment, the i-th power switch controller 502(i) is configured to drive or control the i-th power switch Q(i). Therefore, it can be understood that the power converter 500 having N power converter phases {PHASE(i), i=1, 2, ..., N} may include N power switches {Q(i), i=1, 2, ..., N} and N power switch controllers {502(i), i=1, 2, ..., N}, wherein one of the N power switch controllers {502(i), i=1, 2, ..., N} is configured to drive or control a corresponding one of the N power conversion phases {PHASE(i), i=1, 2, ..., N}. In one embodiment, one of the N power switch controllers {502(i), i=1, 2, ..., N} is configured to drive or control a corresponding one of the N power switches {Q(i), i=1, 2, ..., N}. In one embodiment, the first power conversion phase PHASE(1) among the N power conversion phases {PHASE(i), i=1, 2, ..., N} can be configured as the main power conversion phase, and the first power switch controller 502(1) among the N power switch controllers {502(i), i=1, 2, ..., N} can be configured as the main power switch controller to provide a first switch drive signal VG(1). The first switch drive signal VG(1) can be a switching period T (1) The high and low logic switching signals are (1) The MOSFET has a high logic pulse and a low logic pulse therein and can be configured to drive the first power switch Q(1) among N power switches {Q(i), i=1, 2, . . . , N}.

[0046] exist Figure 5In the exemplary embodiment shown, for each i traversing from 1 to N, the i-th power stage 503 (i) in the i-th power conversion phase PHASE (i) can be configured to have a flyback topology. For example, for each i traversing from 1 to N, the i-th power stage 503 (i) can include an i-th power switch, the i-th power switch having a first terminal D coupled to the first node IN via the primary winding w1 of the i-th inductive energy storage device L (i), and also having a second terminal S coupled to the third node GND and connected to the gate resistor device R via (or not via) the gate resistor device R G(i) is coupled to the control terminal G of the i-th power switch controller 502 (i). The gate-controlled resistor device R G(i) In one embodiment, for each i from 1 to N, the first terminal D of the i-th power switch Q(i) can also be coupled to the node NP via the i-th primary diode DP(i), which is connected in parallel between the first node IN and the node NP via the second input capacitor C IN2 and the second input resistor R IN2 is coupled to the first node IN of the power converter 500. For each i traversing from 1 to N, the secondary winding w2 of the i-th inductive energy storage device L(i) can be connected to the power converter 500 via, for example, the i-th secondary diode D S(i) is coupled to a second node OUT of the power converter 500. The first power switch controller 502(1) configured as a main power switch controller may include any power switch controller suitable for generating a main switch drive signal (i.e., a first switch drive signal VG(1)) required by the first power stage 503(i) having a flyback topology. For example, commercial power switch controllers MPX2001 / 2 / 3, HFC0300, HFC0310, HFC0500, HFC0650 manufactured by Core Source Systems may be used as the first power switch controller 502(1). Figure 5In the example of , the first power switch controller 502(1) may have a first terminal (e.g., feedback terminal) FB, a second terminal (e.g., driver output terminal) DRV(1), a third terminal (e.g., regulated power supply terminal) VC(1), and a fourth terminal (e.g., ground terminal) GND. The first terminal FB may be configured to receive a feedback signal indicating an output voltage (also labeled VO for simplicity) from a second node OUT of the power converter 500, the second terminal DRV(1) may be configured to provide a first switch drive signal VG(1), the third terminal VC(1) may be configured to allow coupling to an auxiliary winding w3 of the first inductive energy storage device L(1) for harvesting energy to generate a regulated voltage signal VCC(1) used as an internal power supply voltage of the first power switch controller 502(1), and the fourth terminal GND may be configured to allow coupling to a reference ground potential of the power converter 500. The diode DVC can be coupled between the third terminal VC(1) of the first power switch controller 502(1) and the auxiliary winding w3 of the first inductive energy storage device L(1) to prevent reverse charging from the third terminal VC(1) to the auxiliary winding w3. The first power switch controller 502(1) can include at least a voltage feedback loop, which can be configured to generate a first switch drive signal VG(1) based at least in part on a feedback signal received at the first terminal FB. The first power switch controller 502(1) can also include other terminals, such as a fifth terminal (e.g., a current sensing terminal) CS, which can be configured to / used to sense the current flowing through the first power switch Q(1) and generate a current sensing signal. For this case, the first current detection resistor R S1 The second current detection resistor R S2 The first power switch controller 502(1) may be coupled between the second terminal S of the first power switch Q(1) and the third node GND of the power converter 500. The first power switch controller 502(1) may also be configured to adjust the first switch drive signal VG(1) based on the current detection signal. The first power switch controller 502(1) may also include a sixth terminal (e.g., a zero crossing detection (“ZCD”) terminal) ZCD(1), which may be configured to allow, for example, a first ZCD resistor R ZCL(1) The auxiliary winding w3 is coupled to the first inductive energy storage device L(1) to detect whether the current flowing through the first inductive energy storage device L(1) crosses zero. ZCR(1) Can be coupled between diode DVC and the first ZCD resistor R ZCL(1)The first power switch controller 502 (1) may further include a seventh terminal (e.g., a power terminal) HV, which may be configured to detect a rectified voltage of the AC input signal VAC, and the voltage HV on the seventh terminal may be used to provide brown-in and brownout protection, high voltage startup, and supercapacitor (X-cap) discharge functions for the power converter 500 based on the input signal for AC-DC applications. Figure 1 In the example, the seventh terminal HV is exemplarily described as being connected to the first input resistor R IN1 and the first input diode D IN1 Coupled to the inductive device L CM1 The first winding and further through the first input resistor R IN1 and the second input diode D IN2 The first terminal b1 or the third terminal b3 coupled to the full-bridge structure BD1 is used to detect the rectified voltage of the rectified AC input signal VAC. It should be understood by those skilled in the art that this is only to provide an example and not to be limiting.

[0047] exist Figure 5 In the exemplary embodiment shown, for each i traversing from 2 to N (i.e., here i is a variable that can traverse integers from 2 to N), the i-th power switch controller 502(i) among the N power switch controllers {502(i), i=1, 2, ..., N} can be configured / used as a slave power switch controller and can communicate with Figure 1 The i-th power switch controller 102(i) described has the same structure and similar functions. Therefore, for each i traversing from 2 to N (i.e., i is a variable here, which can traverse integers from 2 to N), all descriptions of the i-th power switch controller 102(i) of the power converter 100 are applicable to the i-th power switch controller 502(i) of the power converter 500, and will not be repeated here.

[0048] Obviously, according to the above teachings, many modifications and variations can be made to the present application. Therefore, it should be understood that within the scope of the attached claims, the present invention can be implemented in ways other than the description. Of course, it should be understood that the above disclosure only relates to the preferred embodiments of the present application, and many modifications can be made to it without departing from the inventive concept and scope defined by the attached claims. Because the present application only discloses its preferred embodiments, it is obvious that those skilled in the art can consider and implement various modified technical solutions without departing from the inventive concept and scope described in the attached claims.

[0049] In some embodiments, for each i traversed from 1 to N, Figure 1 The diode D (i) and Figure 5 DP (i) and DS (i) It can be a controllable rectifier switch. The power switch Q(i) in the power stage 103(i) and 503(i) can be a controllable semiconductor device other than a MOSFET. Those skilled in the art can also understand that in addition to the flyback and boost PFC topologies shown in the aforementioned embodiments, other interleaved multi-phase power converters that can use the "universal" power switch controller 200 as a slave power switch controller are also within the scope of protection of the present application.

Claims

1. A power converter comprising N power conversion phases, where N is an integer greater than 1, the power converter comprising: N power switch controllers corresponding to the N power conversion phases, each of the N power switch controllers being configured to drive a corresponding one of the N power conversion phases; A first power switch controller among the N power switch controllers is configured as a main power switch controller to provide a first switch driving signal; For each i traversed from 2 to N, the i-th power switch controller among the N power switch controllers is configured to receive the (i-1)th switch drive signal from the (i-1)th power switch controller at the first terminal of the i-th power switch controller; the i-th power switch controller is further configured to obtain energy from the (i-1)th switch drive signal and provide the i-th switch drive signal at the second terminal of the i-th power switch controller based on the (i-1)th switch drive signal.

2. The power converter according to claim 1, wherein: For each i traversing from 2 to N, the i-th power switch controller is also configured to phase shift the (i-1)th switch drive signal by T(i-1) / N to generate the i-th switch drive signal, wherein T(i-1) is the switching period of the (i-1)th switch drive signal.

3. The power converter according to claim 1, wherein: For each i traversed from 2 to N, the i-th switch drive signal is obtained by phase shifting the (i-1)-th switch drive signal by T(i-1) / N, and the pulse width of the i-th switch drive signal is equal to the pulse width of the (i-1)-th switch drive signal, where T(i-1) is the switching period of the (i-1)-th switch drive signal.

4. The power converter according to claim 1, wherein: For each i traversing from 2 to N, the i-th power switch controller further includes a third terminal and a fourth terminal, and when the capacitive energy storage device is coupled between the third terminal and the fourth terminal, the i-th power switch controller is configured to provide a regulated voltage signal.

5. The power converter according to claim 4, characterized in that For each i traversed from 2 to N, the i-th power switch controller further includes: an internal regulation module coupled between the first terminal and the third terminal of the i-th power switch controller, and when the capacitive energy storage device is coupled between the third terminal and the fourth terminal, the internal regulation module is configured to convert the (i-1)th switch drive signal into the regulated voltage signal.

6. The power converter according to claim 1, wherein: For each i traversed from 2 to N, the i-th power switch controller further includes: A phase shift control module is coupled to the first terminal of the i-th power switch controller and is used to generate a set control signal and a reset control signal based on the (i-1)th switch drive signal; the set control signal is configured to set the i-th switch drive signal to a logic high level in response to each rising edge of the (i-1)th switch drive signal after a delay of T(i-1) / N; the reset control signal is configured to reset the i-th switch drive signal to a logic low level in response to each falling edge of the (i-1)th switch drive signal after a delay of T(i-1) / N; wherein T(i-1) is a switching period of the (i-1)th switch drive signal.

7. The power converter according to claim 6, characterized in that For each i traversing from 2 to N, the phase shift control module of the i-th power switch controller is further configured to detect the switching period T(i-1) of the (i-1)th switch driving signal.

8. The power converter according to claim 7, characterized in that For each i traversing from 2 to N, the phase shift control module of the i-th power switch controller is further configured to set a phase shift amount T(i-1) / N.

9. The power converter according to claim 6, characterized in that For each i traversed from 2 to N, the phase shift control module of the i-th power switch controller includes: a setting control module, coupled to the first terminal of the i-th power switch controller, for detecting a switching period T(i-1) of the (i-1)th switch drive signal, and further configured to generate each setting pulse of the setting control signal in response to each rising edge of the (i-1)th switch drive signal after a delay of T(i-1) / N, wherein each setting pulse of the setting control signal is configured to set the i-th switch drive signal to a logic high level; and A reset control module, coupled to the first terminal of the i-th power switch controller, is used to detect the pulse width ton(i-1) of the (i-1)th switch drive signal, and is further configured to generate each reset pulse of the reset control signal in response to each rising edge of the i-th switch drive signal after the pulse width ton(i-1) time, wherein each reset pulse of the reset control signal is configured to reset the i-th switch drive signal to a logic low level.

10. The power converter according to claim 6, wherein: For each i traversed from 2 to N, the i-th power switch controller further includes: The setting terminal is coupled to the phase shift control module and is configured to be connected to an external setting device or receive a configuration signal to set the phase shift amount T(i-1) / N.

11. The power converter according to claim 1, wherein: For each i traversed from 2 to N, the i-th power switch controller further includes: A setting terminal is configured to set a phase shift of T(i-1) / N for the i-th switch drive signal relative to the (i-1)-th switch drive signal, wherein T(i-1) is the switching period of the (i-1)-th switch drive signal.

12. A power switch controller for driving one power conversion phase of a multi-phase power converter, the power switch controller comprising: a first terminal for receiving an input switch drive signal for driving another power conversion phase in the multi-phase power converter; as well as a second terminal for providing an output switch drive signal to drive said one power conversion phase of said multi-phase power converter; The power switch controller is configured to obtain electric energy from an input switch drive signal received at a first terminal thereof, and to provide the output switch drive signal based on the input switch drive signal.

13. The power switch controller according to claim 12, wherein: The power switch controller is also configured to generate the output switch drive signal by phase shifting the input switch drive signal by T(i-1) / N, where T(i-1) is the switching period of the input switch drive signal, and N is an integer greater than 1, representing the total number of power conversion phases included in the multi-phase power converter.

14. The power switch controller of claim 13, wherein for each i traversing from 2 to N, one of the power conversion phases of the multi-phase power converter is the i-th power conversion phase of the multi-phase power converter, and another power conversion phase of the multi-phase power converter is the (i-1)-th power conversion phase of the multi-phase power converter.

15. The power switch controller according to claim 12, wherein: The power switch controller includes a third terminal and a fourth terminal, and when a capacitive energy storage device is coupled between the third terminal and the fourth terminal, the power switch controller is configured to provide a regulated voltage signal.

16. The power switch controller of claim 15, further comprising: an internal regulation module coupled between the first terminal and the third terminal of the power switch controller; When the capacitive energy storage device is coupled between the third terminal and the fourth terminal, the internal regulation module is configured to convert the input switch drive signal into the regulated voltage signal.

17. The power switch controller of claim 12, further comprising: a phase shift control module, coupled to the first terminal and configured to generate a set control signal and a reset control signal based on an input switch drive signal; The set control signal is configured to set the output switch drive signal to a logic high level in response to each rising edge of the input switch drive signal after a delay of T(i-1) / N; the reset control signal is configured to reset the output switch drive signal to a logic low level in response to each falling edge of the input switch drive signal after a delay of T(i-1) / N; wherein T(i-1) is the switching period of the input switch drive signal, and wherein N is an integer greater than 1, representing the total number of power conversion phases included in the multi-phase power converter.

18. The power switch controller of claim 12, further comprising: A setting terminal is configured to set a phase shift of T(i-1) / N for the output switch drive signal relative to the input switch drive signal, where T(i-1) is the switching period of the input switch drive signal, and N is an integer greater than 1, representing the total number of power conversion phases included in the multi-phase power converter.

19. A power converter comprising: a first power switch controller configured as a main power switch controller to provide a first switch drive signal for driving a main power conversion phase of the power converter; as well as The second power switch controller is configured as a slave power switch controller and is further configured to receive a first switch drive signal from the main power switch controller and obtain energy from the first switch drive signal; the second power switch controller is further configured to provide a second switch drive signal based on the first switch drive signal.

20. The power converter of claim 19, further comprising: The third power switch controller is configured to receive the second switch drive signal and obtain energy from the second switch drive signal, and is further configured to provide a third switch drive signal based on the second switch drive signal.

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