A surface acoustic wave temperature compensation filter wafer using plasma cutting

Abstract

The application provides a surface acoustic wave temperature compensation filter wafer cut by plasma, which can be cut by a plasma cutting process, and meanwhile, the plasma cutting process cannot damage other areas of the chip, and defects caused by the plasma cutting can be clearly checked in a subsequent automatic optical inspection process, and the surface acoustic wave temperature compensation filter wafer cut by plasma is characterized in that the filter wafer comprises a base material layer, a temperature compensation layer, a piezoelectric film layer, a functional layer and a cutting path protection layer, and the cutting path protection layer is a metal layer surrounding a single chip unit.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of filter wafer, and particularly relates to a surface acoustic wave temperature compensation filter wafer using plasma cutting. BACKGROUND

[0002] For filter chips, the current general method of using a grinding wheel to cut the filter wafer, but due to the process of grinding wheel cutting will cause a large amount of edge collapse, so the filter chip in the design will usually leave a part of the area to avoid the influence of edge collapse on the functional area, resulting in waste of wafer material. Therefore, with the development of plasma cutting technology, some filter wafers have been cut using plasma cutting method; since the plasma cutting method is to use plasma chemical etching to cut the wafer, which is based on the process of etching and separating the substrate by gas phase chemical reaction, so at the design end of the product, the chip structure of the wafer needs to be specifically designed for the process to ensure that the etching chemical reaction is successfully completed, and other areas are not affected by etching. SUMMARY

[0003] In order to solve the problem of specific design of wafer chip structure for plasma cutting process mentioned in the above content to ensure that the etching chemical reaction is successfully completed and the other areas of the chip are not affected by etching, the present application provides a surface acoustic wave temperature compensation filter wafer using plasma cutting, which can use the plasma cutting process to complete the cutting, and can ensure that the plasma cutting process will not damage other areas of the chip, and can ensure that the defects caused by plasma cutting can be clearly checked in the subsequent automatic optical inspection process.

[0004] The technical scheme is as follows:

[0005] A surface acoustic wave temperature compensation filter wafer using plasma cutting, characterized in that: the filter wafer comprises: a substrate layer, a temperature compensation layer, a piezoelectric film layer, a functional layer, and a cutting path protection layer; the cutting path protection layer is a metal layer surrounding a single chip unit.

[0006] Further, the thickness of the metal layer is 0.5-5um, the width of the metal layer is 2-8um, the gap between the cutting path protection layer and the cutting path protection layer of the adjacent chip unit is 20-50um, the material of the cutting path protection layer is any one of Al, Cu and Ni, and the cutting path protection layer is deposited on the surface of the substrate layer by physical vapor deposition.

[0007] Further, the material of the substrate layer is silicon-based, and the thickness thereof is 500-700um.

[0008] Furthermore, the temperature compensation layer has a multi-layer structure, which consists of a first silicon oxide layer, a fluorinated silicon oxide layer, and a second silicon oxide layer from bottom to top.

[0009] Furthermore, the thickness of the first silicon oxide layer is 100~200nm, the thickness of the fluorinated silicon oxide layer is 100~300nm, and the thickness of the second silicon oxide layer is 50~200nm. After the temperature compensation layer is formed into a uniform thin film on the surface of the substrate layer by plasma-enhanced vapor deposition, the temperature compensation layer in the dicing area is etched and peeled off by a dry etching process to expose the substrate surface.

[0010] Furthermore, the functional layer includes an interdigitated circuit layer and pads, wherein the interdigitated circuit layer is made of Al. One or more composite layers of Cu, Au, and Pt are used. The interdigitated circuit layer is deposited onto the surface of the piezoelectric thin film layer by physical vapor deposition, and then the circuit structure is manufactured by wet etching. The pads are made of a metal composite layer, which consists of Al, Ti, Ni, Cu, and Au from bottom to top, with thicknesses of Al: 2~4 μm, Ti: 100~500 nm, Ni: 200~1000 nm, Cu: 300~1000 nm, and Au: 100~500 nm, respectively. The metal circuits of the interdigitated circuit layer are connected to the pads through metal leads in the interdigitated circuit layer. There are four or more pads in a single chip unit, and the shape of the pads is a rectangle with semicircular ends. The straight side of the rectangle is 20~100 μm, the diameter of the semicircles at both ends is 50~100 μm, and the gap between the outermost edge of the pad and the edge of the diced chip is greater than 50 μm.

[0011] Furthermore, the piezoelectric thin film layer is made of lithium tantalate, and the thickness of the piezoelectric thin film layer is 1000~5000nm. The piezoelectric thin film layer is grown in the interdigitated circuit layer region of the corresponding chip by plasma-enhanced chemical vapor deposition.

[0012] The beneficial effects of this invention are as follows:

[0013] 1. This invention adds a protective layer to the dicing path, a metal layer of a certain thickness that does not react with the etching gas. The thickness of the metal layer can be adjusted according to the height of the internal structure of the chip, thereby achieving adhesion to the thermoplastic film on the wafer surface. At the same time, since the metal layer does not chemically react with the etching gas, it can prevent the etching from continuing. Moreover, the dicing equipment will have higher detection sensitivity when detecting the generation of etching reactants to determine the end point of dicing. Thus, during the plasma dicing process, the filter wafer can be protected from damage to other areas of the chip, while the etching rate and etching effect can achieve the expected results. It can also ensure that defects caused by plasma dicing can be clearly detected during subsequent automatic optical inspection, reducing wafer material waste and lowering production costs.

[0014] 2. This invention also improves the design of the temperature compensation layer, changing it from a traditional single-layer silicon oxide to a composite layer of silicon oxide and fluorinated silicon oxide. First, based on the superior physical properties of fluorinated oxide, it is expected to reduce the temperature coefficient by 60-70%, enabling the filter to achieve better temperature compensation and sound wave transmission characteristics. Then, in the design of the composite layer, a silicon oxide layer is made on both the upper and lower layers of the fluorinated oxide. On the one hand, it can prevent the diffusion of fluorine during the use of the product, and on the other hand, it can protect the other layer structures during the fabrication of the fluorinated oxide layer. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall structure of the present invention;

[0016] Figure 2 This is a top view of the overall structure of the present invention;

[0017] Figure 3 This is a schematic diagram of the temperature compensation layer in this invention. Detailed Implementation

[0018] The present invention will be further described below with reference to embodiments.

[0019] The following embodiments are used to illustrate the present invention, but should not be used to limit the scope of protection of the present invention. The conditions in the embodiments can be further adjusted according to specific conditions, and simple improvements to the method of the present invention under the premise of the concept of the present invention are all within the scope of protection claimed by the present invention.

[0020] like Figure 1 and Figure 2 As shown, a surface acoustic wave temperature-compensated filter wafer using plasma cutting is disclosed. The filter wafer includes: a substrate layer 1, a temperature compensation layer 2, a piezoelectric thin film layer 3, a functional layer, and a dicing protection layer 5.

[0021] The dicing protection layer 5 is specifically a metal layer surrounding a single chip unit. The thickness of the metal layer is 0.5~5um, the width of the metal layer is 2~8um, the gap between the dicing protection layer and the dicing protection layer of the adjacent chip unit is 20~50um, the material of the dicing protection layer is any one of Al, Cu, and Ni, and the dicing protection layer is deposited onto the surface of the substrate layer using physical vapor deposition.

[0022] The typical dicing method involves first attaching a thermoplastic film to the front of the wafer, then applying a protective solution and pre-grooving the dicing channels on the back, and finally etching from the pre-grooved area on the back of the wafer using a plasma-enhanced dry etching (PED) system. However, towards the very end of the etching process, since the wafer has already been cut and separated, the etching gas, during isotropic etching, continues to etch into the wafer surface along the bonding surface between the front and thermoplastic films. Because the wafer surface has many circuit layers and very tall solder balls or copper pillars pre-fabricated on the metal pads near the dicing channels, the surface morphology is very complex. Therefore, the thermoplastic film's coverage at the edges of the dicing channels is poor, and the etching gas continues to etch into the wafer along the gaps or voids in the surface coating, damaging other areas of the chip and affecting product performance. This invention adds a protective layer to the dicing path, a metal layer of a certain thickness that does not react with the etching gas. The thickness of the metal layer can be adjusted according to the height of the chip's internal structure, thereby achieving adhesion to the thermoplastic film on the wafer surface. Simultaneously, because the metal layer does not chemically react with the etching gas, it prevents the etching process from continuing. Furthermore, the dicing equipment has higher detection sensitivity when determining the dicing end point by detecting the generation of etching reactants. This ensures that the plasma dicing process does not damage other areas of the chip during the filter wafer, while achieving the expected etching rate and effect. It also ensures that subsequent automated optical inspection can clearly detect defects caused by plasma dicing, reducing wafer material waste and lowering production costs.

[0023] The substrate layer 1 is made of silicon and has a thickness of 500~700um.

[0024] like Figure 3 As shown, the temperature compensation layer 2 has a multilayer structure, consisting of a first silicon oxide layer 21, a fluorinated silicon oxide layer 22, and a second silicon oxide layer 23 from bottom to top. The thickness of the first silicon oxide layer is 100-200 nm, the thickness of the fluorinated silicon oxide layer is 100-300 nm, and the thickness of the second silicon oxide layer is 50-200 nm. The temperature compensation layer is formed as a uniform thin film on the surface of the substrate layer by plasma-enhanced vapor deposition, and then a dry etching process is used to etch and peel off the temperature compensation layer in the etched area to expose the substrate surface.

[0025] The main structure of a surface acoustic wave (SAW) filter is an interlocking finger-strip transducer, with each structure containing 100-300 fingers. The fingers are relatively thin and long, with an aspect ratio generally above 80. This structure requires strict adherence to a specific periodicity; for example, in a 2GHz filter, the finger width is 0.7µm, with tolerances controlled within + / -50nm. The higher the frequency, the thinner the finger width. Since the physical properties of the piezoelectric crystal change with temperature, the frequency response characteristics of the filter also change, necessitating temperature compensation. Traditional temperature compensation schemes for filters typically use an oxide dielectric layer, which can reduce the temperature coefficient by 40-50%. In this invention, the temperature compensation layer is changed from the traditional single-layer silicon oxide to a composite layer of silicon oxide and fluorinated silicon oxide. Firstly, based on the superior physical properties of fluorinated silicon oxide, it is expected to reduce the temperature coefficient by 60-70%, resulting in better temperature compensation and acoustic wave transmission characteristics. Secondly, the composite layer design involves fabricating a silicon oxide layer above and below the fluorinated silicon oxide layer. This serves two purposes: firstly, it prevents fluorine diffusion during use; secondly, it protects the other layers during the fabrication of the fluorinated silicon oxide layer.

[0026] The functional layer includes an interdigitated circuit layer 41 and pads 42. The interdigitated circuit layer is made of Al material. One or more composite layers of Cu, Au, and Pt are used. The interdigitated circuits are deposited onto the surface of the piezoelectric thin film layer by physical vapor deposition, and then fabricated using a wet etching process. The pads are made of a metal composite layer, which consists of Al, Ti, Ni, Cu, and Au from bottom to top, with thicknesses of Al: 2~4 μm, Ti: 100~500 nm, Ni: 200~1000 nm, Cu: 300~1000 nm, and Au: 100~500 nm, respectively. The metal circuits of the interdigitated circuit layer are connected to the pads via metal leads in the interdigitated circuits. The number of pads in a single chip unit is four or more, and the shape of the pads is a rectangle with semicircular ends. The straight side of the rectangle is 20~100 μm, the diameter of the semicircles at both ends is 50~100 μm, and the gap between the outermost edge of the pad and the edge of the diced chip is greater than 50 μm.

[0027] The piezoelectric thin film layer 3 is made of lithium tantalate, and the thickness of the piezoelectric thin film layer is 1000~5000nm. The piezoelectric thin film layer is grown in the interdigitated circuit layer region of the corresponding chip by plasma-enhanced chemical vapor deposition.

[0028] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A surface acoustic wave temperature-compensated filter wafer prepared by plasma cutting, characterized in that: The filter wafer includes: a substrate layer, a temperature compensation layer, a piezoelectric thin film layer, a functional layer, and a dicing protection layer; the dicing protection layer is specifically a metal layer that surrounds a single chip unit. The gap between the dicing protective layer and the dicing protective layer of the adjacent chip unit is 20~50um; the material of the dicing protective layer is any one of Al, Cu, and Ni; The thickness of the metal layer is adjusted according to the height of the internal structure of the chip, thereby achieving the adhesion effect with the thermoplastic film on the wafer surface. The wafer dicing method is as follows: First, a thermoplastic film is attached to the front side of the wafer, then a protective liquid is applied and the dicing groove is pre-grooved from the back side, and finally, the pre-grooved area on the back side of the wafer is etched in a plasma-enhanced dry etching equipment. The temperature compensation layer has a multi-layer structure, which consists of a first silicon oxide layer, a fluorinated silicon oxide layer, and a second silicon oxide layer from bottom to top.

2. The surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 1, characterized in that: The thickness of the metal layer is 0.5~5um, and the width of the metal layer is 2~8um.

3. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 1, characterized in that: The substrate layer is made of silicon and has a thickness of 500~700um.

4. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 1, characterized in that: The thickness of the first silicon oxide layer is 100~200nm, the thickness of the fluorinated silicon oxide layer is 100~300nm, and the thickness of the second silicon oxide layer is 50~200nm.

5. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 1, characterized in that: The piezoelectric thin film layer is made of lithium tantalate, and the thickness of the piezoelectric thin film layer is 1000~5000nm.

6. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 1, characterized in that: The functional layer includes an interdigitated circuit layer and pads. The interdigitated circuit layer is made of one or more composite layers selected from Al, Cu, Au, and Pt. The pads are made of a metal composite layer, which consists of Al, Ti, Ni, Cu, and Au from bottom to top, with thicknesses of Al: 2~4 μm, Ti: 100~500 nm, Ni: 200~1000 nm, Cu: 300~1000 nm, and Au: 100~500 nm, respectively. There are multiple pads in a single chip unit, and the shape of the pads is a rectangle with semicircles at both ends. The straight side of the rectangle is 20~100 μm, the diameter of the semicircles at both ends is 50~100 μm, and the gap between the outermost edge of the pad and the edge of the diced chip is greater than 50 μm.

7. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 2, characterized in that: The cut-out protective layer is deposited onto the surface of the substrate layer using physical vapor deposition.

8. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 4, characterized in that: The temperature compensation layer is formed as a uniform thin film on the surface of the substrate layer by plasma-enhanced vapor deposition. Then, a dry etching process is used to etch and peel off the temperature compensation layer in the cutting area to expose the substrate surface.

9. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 6, characterized in that: The interdigitated circuit layer is deposited onto the surface of the piezoelectric thin film layer by physical vapor deposition, and then the circuit structure is manufactured by wet etching process; the metal circuits and pads of the interdigitated circuit layer are connected by metal leads in the interdigitated circuit layer.

10. A surface acoustic wave temperature-compensated filter wafer using plasma cutting according to claim 6, characterized in that: The piezoelectric thin film layer is grown in the interdigitated circuit layer region of the corresponding chip using a plasma-enhanced chemical vapor deposition method.

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