A Digital Sampling Method of Single Voltage Sensor Based on Hierarchical Model Predictive Control

Abstract

The present application discloses a digital sampling method based on hierarchical model predictive control for a single voltage sensor. The state space equation of the cascaded H-bridge converter topology is established, and the current and voltage error values at the next sampling point under various switching states are predicted according to the state space equation. A subtraction estimator is established to estimate the voltage information of each DC side through a single voltage sensor. According to the allowable current error, DC side voltage error, and the switch sequence that can cooperate with sampling as the boundaries, the filtering conditions for the first-layer, second-layer, and third-layer switch sequences are designed in sequence to obtain the optimal switch output form for the next sampling interval. According to the characteristics of the cascaded H-bridge topology, the present invention designs a subtraction estimator to observe the voltage changes of each DC side of the cascaded H-bridge. Under the condition of ensuring normal control operation, the DC side voltage sensors required for each DC side in the traditional method are reasonably reduced, saving the hardware cost and improving the reliability of the system.

Description

Technical Field

[0001] The present invention relates to the fields of power electronics and power systems, and specifically to a single-voltage-sensor digital sampling method based on hierarchical model predictive control. Background Technique

[0002] The cascaded H-bridge rectifier (CHBR) has been proposed for a wide range of applications, including solid-state transformers (SSTs), transformer-based traction systems, static synchronous compensators (STATCOMs), etc. The CHBR is known for its high flexibility, modularity, scalability, etc. Hierarchical model predictive control (MPC) has gained popularity by eliminating the optimization of the overall cost function of the control objective and the design stage of the relevant weight factors in traditional MPC. By sequentially selecting appropriate switches layer by layer to achieve multiple control objectives, the selection criterion for each layer of hierarchical MPC is directly determined by the desired performance index, rather than some irrelevant values.

[0003] To achieve balanced control of the direct current (DC) link voltage, each DC link voltage has traditionally been detected by a corresponding voltage sensor. The cost of DC sensors increases with the increase in the number of batteries. In recent years, many estimation strategies for reducing the number of voltage sensors have been proposed. Reducing sensors can save costs and improve the reliability of the system. In addition, the sensorless method can be used as an inexpensive and convenient technology to backup and provide monitoring information, and can maintain normal operation even when some sensors fail.

[0004] To reduce the sensors on the DC side of the CHBR, some literature has proposed using the least squares method to decouple the voltage information measured by the AC side sensors to obtain the voltage information of each DC side branch. Although this method can normally estimate the DC side voltage information, it has a large amount of calculation and is not easy to implement. Summary of the Invention

[0005] Aiming at the above problems, the present invention proposes a single-voltage-sensor scheme to estimate the DC side voltage in combination with a subtraction estimator. At the same time, taking advantage of the hierarchical MPC itself, a third-layer switch sequence screening strategy is designed to force the generation of a single-level step phenomenon, so as to achieve the goal of estimating the DC side voltage with a small amount of calculation. The specific technical solutions are as follows:

[0006] A single-voltage-sensor digital sampling method based on hierarchical model predictive control, comprising the following steps:

[0007] Step 1: Establish the state space equation of the cascaded H-bridge converter topology, and predict the inductor current and the DC side voltage error values at the next sampling point under each switch state according to the state space equation;

[0008] Step 2: Using the AC-side voltage of the cascaded H-bridge collected by a single voltage sensor and the known switching information sent by the controller, and based on the voltage relationship between the AC side and the DC side of the cascaded H-bridge, a subtraction estimator is established to estimate the real-time voltage of each DC side;

[0009] Step 3: According to the allowed current error, DC-side voltage error, and the switch sequence that can be coordinated with sampling as the boundary, a hierarchical model predictive control strategy is formulated, and the filtering conditions for the first-layer, second-layer, and third-layer switch sequences are designed in sequence to obtain the optimal switch output form for the next sampling interval.

[0010] Further, in the above Step 1, the inductor current i(k + 1) and the DC-side capacitor voltage v dcx (k + 1) at the next sampling point, i.e., at time k + 1, are obtained through Equation (1):

[0011]

[0012] where i(k) is the inductor current at time k, T sa is the sampling time, v g (k) is the grid-side voltage at time k, L and R are the inductor and equivalent resistance of the filter respectively; C x is the DC-side capacitor of the x-th module of the cascaded H-bridge; v ab (k) is the AC-side output voltage of the entire cascaded H-bridge at time k, v dcx (k) and i dcx (k) represent the DC-side voltage and current of the x-th module at time k respectively; N is the number of modules of the cascaded H-bridge; G x (k) is the switching function of the x-th module at time k, satisfying

[0013]

[0014] where S xbp 、S xbn 、S xap are the four switching signals of the x-th H-bridge respectively;

[0015] Making v ab (k) satisfy the following relational expression to obtain

[0016] v ab (k) = G T (k)V dc (k) (3)

[0017] where the matrix G(k) and V dc (k) are specifically as follows:

[0018]

[0019] Furthermore, each DC-side voltage information in step 2 is obtained by formula (4):

[0020]

[0021] where is the estimated DC-side voltage;

[0022] When there is exactly one non-zero element in the known switching sequence G(k)-G(k - 1), the estimated DC-side voltage can directly correspond to the difference between the single voltage sensor sampling value v ab at the adjacent moment, so as to achieve real-time estimation of the DC-side voltage.

[0023] Further, for the hierarchical model predictive control strategy in step 3, in the first layer, the switching states that satisfy formula (5) are selected and retained according to the allowed current error Δi limit |i

[0024] - i(k + 1)| < Δi ref (5) limit (5)

[0025] where i(k + 1) is the inductor current value at the next moment predicted by each switching state through formula (1), and i ref is the reference current value obtained through the overall voltage loop;

[0026] In the second layer, the switching states that satisfy formula (6) are further selected and retained according to the allowed voltage error Δv limit ∑|v

[0027] - v ref - v dcx (k + 1)| < Δv limit (6)

[0028] where v dcx (k + 1) is the DC-side voltage value at the next moment predicted by each switching state through formula (6), and v ref is the given DC reference voltage value;

[0029] In the third layer, the switching sequence that can trigger the DC-side voltage estimation in step 2 is selected, that is, there is exactly one non-zero element in G(k + 1)-G(k) in formula (4), and it further cooperates with the estimation of the DC-side voltage; finally, after a conventional one-beat delay, the switching sequence is output to control the cascaded H-bridge system.

[0030] The beneficial effects of the present invention are as follows: According to the characteristics of the cascaded H-bridge topology, the present invention designs a subtraction estimator to observe the voltage changes of each DC side of the cascaded H-bridge. Under the condition of ensuring normal control operation, the DC side voltage sensors required for each DC side in the traditional method are reasonably reduced, saving hardware costs and improving the reliability of the system. At the same time, it also provides a backup monitoring means with different principles for the operation of the converter, and can continue to maintain the normal operation of the converter in the case of a failure of the DC side voltage sensor of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic diagram of the principle of a single-voltage-sensor digital sampling method based on hierarchical model predictive control provided by an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0032] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments.

[0033] As Figure 1 shown, the sampling method of the present invention no longer needs to sample each DC side voltage, and only needs to sample the output voltage v of the cascaded H-bridge AC side through a single voltage sensor ab , and then the DC side voltage value can be estimated in real time through a subtraction estimator. At the same time, in the hierarchical model predictive control, the first two layers first screen the switching sequences that meet the rated inductor current error and the rated voltage error, and then the third-layer switch further screens out the single-step level changes that can be detected by the subtraction estimator, cooperating with the rapid update of the subtraction estimator. The method of the present invention reasonably reduces the DC side voltage sensors required for each DC side in the traditional method, saves hardware costs, and improves the reliability of the system.

[0034] Aiming at the above problems, the present invention studies and analyzes the relationship between the AC side voltage of the cascaded H-bridge converter and the voltage information of each DC side, proposes a single-voltage-sensor scheme to estimate the DC side voltage in combination with a subtraction estimator, and at the same time utilizes the advantages of the hierarchical MPC itself to design a third-layer switching sequence screening strategy to force the generation of a single-level step phenomenon, realizing the goal of estimating the DC side voltage with a small amount of calculation. A single-voltage-sensor digital sampling method based on hierarchical model predictive control includes the following steps:

[0035] Step 1: Establish the state space equation of the cascaded H-bridge converter topology, and predict the inductor current at the next sampling point and the DC side voltage error values under each switching state according to the state space equation;

[0036] The inductor current i(k + 1) and the DC side capacitor voltage v at time k + 1dcx (k + 1) is obtained through Equation (1):

[0037]

[0038] where i(k) is the inductor current at time k, T sa is the sampling time, v g (k) is the grid-side voltage at time k, and L and R are the inductor and equivalent resistance of the filter respectively; R x , C x and v x are the equivalent DC-side load, DC-side capacitor and AC-side output voltage of the x-th module of the cascaded H-bridge respectively; v ab (k) is the AC-side output voltage of the entire cascaded H-bridge at time k, v dcx (k) and i dcx (k) represent the DC-side voltage and current of the x-th module at time k respectively; N is the number of cascaded H-bridge modules; G x (k) is the switching function of the x-th module at time k, satisfying

[0039]

[0040] where S xbp , S xbn , S xap , S xan are the four switching signals of the x-th H-bridge respectively;

[0041] Furthermore, v ab (k) is obtained by satisfying the following relational expression

[0042] v ab (k) = G T (k)V dc (k) (3)

[0043] where the matrix G(k) and V dc (k) are specifically as follows:

[0044] G(k) = [G1(k) G2(k) … G N (k)] T

[0045] V dc (k) = [v dc1 (k) v dc2 (k) … v dcN (k)] T

[0046] Step 2: Establish a subtraction estimator to estimate the voltage information of each DC side through a single voltage sensor.

[0047] Each DC-side voltage can be obtained by the following formula:

[0048]

[0049] When there is exactly one non-zero element in the known switching sequence (G(k) - G(k - 1)), the estimated DC-side voltage can directly correspond to the difference between the sampled values v of the single voltage sensor at adjacent instants ab so as to achieve real-time estimation of the DC-side voltage.

[0050] Step 3: Design the filtering conditions for the first-layer, second-layer, and third-layer switching sequences in turn based on the allowed current error, DC-side voltage error, and the switch sequence that can cooperate with sampling, to obtain the optimal switching output form for the next sampling interval.

[0051] In the hierarchical model predictive control strategy, in the first layer, according to the allowed current error Δi limit screen out the switching sequences that may be applied to the next sampling moment from all possible switching sequences; in the second layer, according to the allowed DC-side voltage error Δv limit screen out the switching sequences that also meet the voltage error from the remaining switching sequences; finally, in the third layer, select the switching sequence that can trigger the DC-side voltage estimation in Step 2, that is, only the switching function of one H-bridge changes, to further cooperate with the estimation of the DC-side voltage. Specifically as follows:

[0052] In the first layer, according to the allowed current error Δi limit screen and retain the switching states that satisfy Equation (5):

[0053] |i ref - i(k + 1)| < Δi limit (5)

[0054] where i(k + 1) is the inductor current value at the next moment predicted by each switching state through Equation (1), and i ref is the reference current value obtained through the overall voltage loop;

[0055] In the second layer, according to the allowed voltage error Δv limit further screen and retain the switching states that satisfy Equation (6):

[0056] ∑|v ref - v dcx (k + 1)| < Δv limit (6)

[0057] where v dcx (k + 1) is the DC-side voltage value at the next moment predicted by each switching state through Equation (6), and vref is the given DC reference voltage value;

[0058] Select the switch sequence in the third layer that can trigger the DC-side voltage estimation in Step 2, that is, there is exactly one non-zero element in G(k + 1) - G(k) in Equation (4), and further cooperate with the DC-side voltage estimation; finally, after a conventional one-beat delay, output the switch sequence to control the cascaded H-bridge system.

Claims

1. A digital sampling method for a single voltage sensor based on hierarchical model predictive control, characterized in that It includes the following steps: Step 1: Establish the state-space equation of the cascaded H-bridge converter topology, and predict the inductor current at the next sampling point and the DC-side voltage error values under each switching state according to the state-space equation; Step 2: Use the AC-side voltage of the cascaded H-bridge collected by a single voltage sensor and the known switching information sent by the controller, and establish a subtraction estimator to estimate the real-time voltage of each DC side according to the voltage relationship between the AC side and the DC side of the cascaded H-bridge; Step 3: Develop a hierarchical model predictive control strategy with the allowable current error, DC-side voltage error, and switch sequence that can be coordinated with sampling as the boundaries, and design the filtering conditions for the first-layer, second-layer, and third-layer switch sequences in turn to obtain the optimal switch output form for the next sampling interval; The next sampling point in step 1, that is, the inductor current i(k + 1) and the DC-side capacitor voltage v dcx (k + 1) is obtained by Equation (1): where \(i(k)\) is the inductor current at time \(k\), \(T\) sa is the sampling time, \(v\) g (k) is the grid-side voltage at time \(k\), \(L\) and \(R\) are the inductor and equivalent resistance of the filter respectively; \(C\) x is the DC-side capacitor of the \(x\)-th module of the cascaded H-bridge; \(v\) ab (k) is the AC-side output voltage of the entire cascaded H-bridge at time \(k\), \(v\) dcx (k) and \(i\) dcx (k) represent the DC-side capacitor voltage and current of the \(x\)-th module at time \(k\) respectively; \(N\) is the number of modules of the cascaded H-bridge; \(G\) x (k) is the switching function of the \(x\)-th module at time \(k\), satisfying Among them, S xbp , S xbn , S xap , S xan are respectively the four switching signals of the x-th H-bridge; Make v ab (k) satisfy the following relational expression to obtain v ab (k) = G T (k)V dc (k)(3) Among them, the matrices G(k) and V dc (k) are as follows: The DC-side voltage information in Step 2 is obtained through Equation (4): Among them, is the estimated voltage on the DC side; When there is exactly one non-zero element in the known switching sequence G(k)-G(k-1), the estimated DC-side voltage can directly correspond to the difference between the sampled values v of the single voltage sensor at adjacent instants ab so as to achieve real-time estimation of the DC-side voltage.

2. The digital sampling method of a single voltage sensor based on hierarchical model predictive control according to claim 1, characterized in that In the hierarchical model predictive control strategy in step 3, in the first layer, according to the allowed current error △i limit Filter and retain the switching states that satisfy equation (5): |i ref -i(k + 1)| < Δi limit (5) Among them, i(k + 1) is the inductor current value at the next moment predicted by each switch state through formula (1), and i ref is the reference current value obtained through the overall voltage loop; In the second layer, according to the allowed voltage error △v limit Further screen and retain the switching states that satisfy Equation (6): ∑|v ref -v dcx (k + 1)|<△v limit (6) Among them, v dcx (k + 1) is the predicted next - moment DC - side voltage value of each switch state obtained through formula (6), and v ref is the given DC reference voltage value; Select the switch sequence in the third layer that can trigger the DC-side voltage estimation in Step 2, that is, there is only one non-zero element in G(k + 1) - G(k) in Equation (4), and further cooperate with the estimation of the DC-side voltage; finally, output the switch sequence after a conventional one-beat delay to control the cascaded H-bridge system.

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