A method of forming a semiconductor structure
By forming film layers on the initial mask layer and adjusting etching parameters during the semiconductor structure formation process, the loading effect caused by different film deposition thicknesses is solved, thereby improving the uniformity of the etching pattern and wafer performance.
Patent Information
- Application Number
- CN202310104995.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-29
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2043-01-29
AI Technical Summary
During semiconductor thin film etching, the loading effect caused by different film deposition thicknesses and different volatility of by-products affects the uniformity of the etched pattern and wafer performance.
By forming a first film layer and a second film layer on the initial first mask layer and the initial second mask layer respectively, measuring and adjusting the etching rate and etching time, and repeating the measurement and adjustment multiple times until the height difference of the formed mask layers is within the preset range, the loading effect caused by the different deposition thickness is eliminated.
It effectively eliminates the load effect and improves the wafer's electrical performance and pattern uniformity.
Smart Images
Figure CN116110782B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of semiconductor manufacturing, and in particular, to a forming method of a semiconductor structure. BACKGROUND
[0002] In the process of etching a semiconductor film, a phenomenon of uneven groove height may occur. This phenomenon is caused by the different thicknesses of film deposition and the different volatilities of by-products, which is a load effect. This load effect may affect the uniformity of the etched pattern, and thus affect the accurate positioning of the etching position in the subsequent process, and further affect the performance of the wafer. SUMMARY
[0003] Therefore, the present disclosure provides a forming method of a semiconductor structure.
[0004] According to a first aspect of the present disclosure, a forming method of a semiconductor structure is provided, which comprises:
[0005] providing a substrate comprising a first region and a second region, forming an initial first mask layer on the substrate in the first region, and forming an initial second mask layer on the substrate in the second region, wherein the initial first mask layer and the initial second mask layer have different heights;
[0006] forming a first film layer on the initial first mask layer, and forming a second film layer on the initial second mask layer;
[0007] etching the first region and the second region, and measuring the heights of the initial first mask layer, the first film layer, the initial second mask layer, and the second film layer during the etching process;
[0008] adjusting the etching rate and etching time of the initial first mask layer, the first film layer, the initial second mask layer, and the second film layer according to the difference between the sum of the heights of the initial first mask layer and the first film layer and the sum of the heights of the initial second mask layer and the second film layer;
[0009] repeating the steps of measuring and adjusting multiple times until the initial first mask layer is formed into a first mask layer, the initial second mask layer is formed into a second mask layer, the first mask layer and the second mask layer both reach a preset height, and the height difference between the two is within a preset range.
[0010] In some embodiments, the first mask layer and the second mask layer both reach a preset height, and the height difference between the two is within a preset range, which comprises that the preset range is less than 10 nm.
[0011] In some embodiments, the initial first mask layer and the initial second mask layer have different heights, including that the height of the initial first mask layer is less than the height of the initial second mask layer.
[0012] In some embodiments, the height difference between the initial first mask layer and the initial second mask layer is greater than 50 nm.
[0013] In some embodiments, the height of the first film layer is greater than the height of the second film layer.
[0014] In some embodiments, before etching the first region and the second region, the height sum of the initial first mask layer and the first film layer is less than the height sum of the initial second mask layer and the second film layer.
[0015] In some embodiments, before etching the first region and the second region, the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer ranges from 20 nm to 30 nm.
[0016] In some embodiments, during the etching process, the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer gradually decreases.
[0017] In some embodiments, the steps of repeatedly measuring and adjusting are performed until the initial first mask layer is formed into a first mask layer, the initial second mask layer is formed into a second mask layer, the first mask layer and the second mask layer both reach a preset height, and the height difference between the two is within a preset range, including:
[0018] Etching to remove the second film layer and part of the first film layer;
[0019] Etching the remaining first film layer and the initial second mask layer, and measuring the heights of the first film layer, the initial first mask layer, and the initial second mask layer during the etching process;
[0020] According to the difference between the height sum of the initial first mask layer and the first film layer and the height of the initial second mask layer, adjusting the etching rate and etching time of the first film layer and the initial second mask layer;
[0021] Repeating the steps of measuring and adjusting multiple times until the first film layer and part of the initial second mask layer are etched away, and the height difference between the initial first mask layer and the remaining initial second mask layer is within a preset range.
[0022] etching the initial first mask layer and the remaining initial second mask layer until the initial first mask layer forms a first mask layer and the initial second mask layer forms a second mask layer, both of which reach a preset height and have a height difference within a preset range.
[0023] In some embodiments, the etching rate of the second film layer and the first film layer is the same during the etching to remove the second film layer and part of the first film layer.
[0024] In some embodiments, the etching rate of the first film layer is less than the etching rate of the initial second mask layer during the etching of the remaining first film layer and the initial second mask layer.
[0025] In some embodiments, the etching rate of the initial first mask layer and the initial second mask layer is the same during the etching of the initial first mask layer and the remaining initial second mask layer.
[0026] In some embodiments, the etching rate of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer ranges from 300 nm / min to 400 nm / min.
[0027] In some embodiments, the adjusting of the etching rate and etching time of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer comprises adjusting the etching rate and etching time by regulating etching process parameters, wherein the etching process parameters include gas ratio, power and reaction chamber pressure.
[0028] In some embodiments, the first film layer and the second film layer are both photoresist layers.
[0029] In some embodiments, the first region is an array region and the second region is a scribe lane region.
[0030] In the embodiments of the present disclosure, the height difference of the initial first mask layer and the initial second mask layer before etching can be compensated by forming the first film layer and the second film layer on the initial first mask layer and the initial second mask layer respectively, and the etching rate and etching time of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer are repeatedly regulated according to the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer during the etching process, so that the height difference of the finally formed first mask layer and second mask layer is within a preset range. In this way, not only the load effect caused by different deposition thicknesses can be eliminated, but also the improvement of wafer electrical performance and wafer pattern uniformity is facilitated. BRIEF DESCRIPTION OF DRAWINGS
[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the accompanying drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description only represent some embodiments of the present disclosure, and for those skilled in the field, other drawings can be obtained from these drawings without creative effort.
[0032] Figure 1 A flowchart of a forming method of a semiconductor structure provided by the embodiments of the present disclosure;
[0033] Figures 2a to 2e A device structure schematic diagram of a semiconductor structure in a forming process provided by the embodiments of the present disclosure;
[0034] Figure 3 A process flowchart of an etching process.
[0035] Explanation of reference signs:
[0036] 10-substrate; 11-first region; 12-second region;
[0037] 21-first isolation layer; 22-anti-reflection layer; 23-second isolation layer; 24-spacer layer; 25-sacrificial layer;
[0038] 31-initial first mask layer; 32-initial second mask layer; 310-first mask layer; 320-second mask layer;
[0039] 41-first film layer; 42-second film layer. DETAILED DESCRIPTION
[0040] The exemplary embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. While the exemplary embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure can be embodied in various forms without being limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art.
[0041] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to one skilled in the art that the present disclosure can be practiced without one or more of these specific details. In other instances, well-known features have not been described in detail in order to avoid obscuring the present disclosure. As such, the present embodiments are not described in the most detailed possible terms, but rather in terms of general function aspects, although the general function aspects can include more specific aspects when necessary.
[0042] In the drawings, the size of layers, regions, elements, and the like can be exaggerated for clarity. Like reference numbers in different drawings can indicate like elements.
[0043] It will be understood that when an element or layer is referred to as being "on", "adjacent", "connected" or "coupled" to another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on", "directly adjacent", "directly connected" or "directly coupled" to another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure and, similarly, a second element, component, region, layer or section discussed below could be termed a first element, component, region, layer or section without departing from the teachings of the present disclosure.
[0044] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
[0045] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0046] In order to thoroughly understand the present disclosure, detailed steps and detailed structures will be proposed in the following description in order to illustrate the technical solutions of the present disclosure. In addition to these detailed descriptions, the preferred embodiments of the present disclosure can have other implementations.
[0047] In the existing manufacturing process, a spin-on hardmask (SOH) is formed in the array (ARRAY) region and the cut lane (OVL) region. After spin-coating, the spin-on hardmask is subjected to etch back to thin the spin-on hardmask to the required thickness. However, the thickness difference of the spin-on hardmask in the two regions is still large after etch back. The large thickness difference will affect the uniformity of the ARRAY region and the OVL region pattern, thereby affecting the accurate positioning of the etching position in the subsequent process, and further affecting the performance of the wafer.
[0048] The embodiments of the present disclosure also provide a method for forming a semiconductor structure. For details, please refer to the accompanying drawings Figure 1 As shown in the figure, the method comprises the following steps:
[0049] Step 101: providing a substrate comprising a first region and a second region, forming an initial first mask layer on the substrate in the first region, and forming an initial second mask layer on the substrate in the second region, the initial first mask layer and the initial second mask layer being different in height;
[0050] Step 102: forming a first film layer on the initial first mask layer and a second film layer on the initial second mask layer;
[0051] Step 103: etching the first region and the second region, measuring the heights of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer during etching; adjusting the etching rate and etching time of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer according to the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer; repeating the steps of measuring and adjusting multiple times until the initial first mask layer is formed into a first mask layer, the initial second mask layer is formed into a second mask layer, the first mask layer and the second mask layer both reach a preset height, and the height difference between the two is within a preset range.
[0052] The method for forming a semiconductor structure provided by the embodiments of the present disclosure will be further described in detail below in combination with specific embodiments.
[0053] Figures 2a to 2e The device structure schematic diagram of the semiconductor structure provided by the embodiments of the present disclosure in the forming process.
[0054] First, referring to Figure 2a , a substrate 10 is provided, which includes a first region 11 and a second region 12, an initial first mask layer 31 is formed on the substrate 10 in the first region 11, and an initial second mask layer 32 is formed on the substrate 10 in the second region 12, the initial first mask layer 31 and the initial second mask layer 32 being different in height.
[0055] In an embodiment, the substrate 10 can be a silicon substrate, a germanium substrate, a silicon germanium substrate, a silicon carbide substrate, an SOI (Silicon On Insulator) substrate, or a GOI (Germanium On Insulator) substrate, etc., and can also be a substrate including other elemental semiconductors or compound semiconductors, such as a glass substrate or a III-V compound substrate (e.g., a gallium nitride substrate or a gallium arsenide substrate, etc.), and can also be a stacked structure, such as Si / SiGe, etc., and can also be other epitaxial structures, such as SGOI (Silicon Germanium On Insulator), etc. In addition, the substrate 10 can be a substrate after ion doping, and can be P-type doped or N-type doped; and a plurality of peripheral devices, such as field effect transistors, capacitors, inductors, and / or pn junction diodes, etc., can also be formed in the substrate 10, but are not shown because they are not related to the present application.
[0056] In an embodiment, the first region 11 is an array region, and the second region 12 is a scribe lane region.
[0057] Referring to Figure 2a , a first isolation layer 21, an anti-reflection layer 22, and a second isolation layer 23 are sequentially formed on the substrate 10 in the first region 11 and the second region 12 as mask layers for subsequent processes. The material of the first isolation layer 21 includes amorphous carbon (ACL) or polysilicon, the material of the anti-reflection layer 22 includes nitride, such as silicon oxynitride or silicon nitride, and the material of the second isolation layer 23 includes oxide, such as silicon oxide. In the embodiment of the present disclosure, the first isolation layer 21 is an amorphous carbon layer, the anti-reflection layer 22 is a silicon oxynitride layer, and the second isolation layer 23 is a silicon oxide layer.
[0058] In actual operation, the first isolation layer 21, the anti-reflection layer 22, and the second isolation layer 23 can be formed using one or more thin film deposition processes; specifically, the deposition processes include but are not limited to a chemical vapor deposition (CVD) process, a plasma enhanced chemical vapor deposition (PECVD) process, an atomic layer deposition (ALD) process, or a combination thereof.
[0059] Continuing to refer to Figure 2aA plurality of sacrificial layers 25 are formed on the second isolation layer 23, and the sacrificial layers 25 are spaced apart from each other.
[0060] The sacrificial layers 25 include a spin-on hard mask layer and a silicon oxynitride layer which are sequentially arranged. In other embodiments, the sacrificial layers 25 can also include only a spin-on hard mask layer.
[0061] In actual operation, a spin-on hard mask material layer and a silicon oxynitride material layer can be first formed on the second isolation layer 23, and then the spin-on hard mask material layer and the silicon oxynitride material layer are patterned to form the sacrificial layers which are spaced apart.
[0062] Because of the performance requirements of the product, a pattern with a larger trench density needs to be formed in the first region, i.e., the array region, and a pattern with a smaller trench density needs to be formed in the second region and the scribe lane region. Therefore, the density of the sacrificial layers in the first region is large, and the density of the sacrificial layers in the second region is small.
[0063] Continuing to refer to Figure 2a A spacer layer 24 covering the sacrificial layers 25 and the second isolation layer 23 is formed. The material of the spacer layer 24 includes an oxide, such as silicon oxide.
[0064] In actual operation, the spacer layer 24 can be formed using one or more thin film deposition processes; specifically, the deposition processes include but are not limited to a chemical vapor deposition (CVD) process, a plasma-enhanced chemical vapor deposition (PECVD) process, an atomic layer deposition (ALD) process, or a combination thereof.
[0065] Next, an initial first mask layer 31 is formed on the spacer layer 24 of the first region 11, and an initial second mask layer 32 is formed on the spacer layer 24 of the second region 12.
[0066] The material of the initial first mask layer 31 and the initial second mask layer 32 includes a spin-on hard mask.
[0067] In actual operation, the initial first mask layer 31 and the initial second mask layer 32 can be formed using one or more thin film deposition processes; specifically, the deposition processes include but are not limited to a chemical vapor deposition (CVD) process, a plasma-enhanced chemical vapor deposition (PECVD) process, an atomic layer deposition (ALD) process, or a combination thereof.
[0068] In an embodiment, the initial first mask layer 31 and the initial second mask layer 32 have different heights, including that the height of the initial first mask layer 31 is less than the height of the initial second mask layer 32.
[0069] In an embodiment, the height difference between the initial first mask layer 31 and the initial second mask layer 32 is greater than 50 nm.
[0070] The first region and the second region have different load effects due to different film deposition thicknesses and different volatilities of byproducts, so that the height difference between the initial first mask layer and the initial second mask layer is large, and the large height difference affects the yield of the semiconductor structure, and thus the large height difference needs to be eliminated.
[0071] Next, referring to Figure 2b , step 102 is performed to form a first film layer 41 on the initial first mask layer 31 and a second film layer 42 on the initial second mask layer 32.
[0072] In actual operation, the first film layer 41 and the second film layer 42 can be formed by using one or more film deposition processes; specifically, the deposition processes include but are not limited to a chemical vapor deposition (CVD) process, a plasma enhanced chemical vapor deposition (PECVD) process, an atomic layer deposition (ALD) process, or a combination thereof.
[0073] In an embodiment, the height of the first film layer 41 is greater than the height of the second film layer 42.
[0074] Because the height of the initial first mask layer is less than the height of the initial second mask layer, setting the height of the first film layer to be greater than the height of the second film layer can reduce the difference between the height sum of the first mask layer and the first film layer and the height sum of the second mask layer and the second film layer, so that the height difference between the first region and the second region can be reduced during subsequent etching, and the uniformity of the pattern can be improved.
[0075] In an embodiment, before the first region 11 and the second region 12 are etched, the height sum of the initial first mask layer 31 and the first film layer 41 is less than the height sum of the initial second mask layer 32 and the second film layer 42.
[0076] Before the first region 11 and the second region 12 are etched, the difference between the height sum of the initial first mask layer 31 and the first film layer 41 and the height sum of the initial second mask layer 32 and the second film layer 42 ranges from 20 nm to 30 nm.
[0077] After the first film layer and the second film layer are formed, the first film layer and the second film layer can compensate for the height difference, so that the overall height difference is reduced from greater than 50 nm before the first film layer and the second film layer are deposited to 20 nm to 30 nm after the first film layer and the second film layer are deposited.
[0078] In an embodiment, the first film layer 41 and the second film layer 42 are both photoresist layers.
[0079] The photoresist has good flowability, and the compensation effect on the height difference of the pattern is better.
[0080] In other embodiments, the first film layer and the second film layer can also be other materials with good flowability.
[0081] Next, referring to Figures 2c to 2e , step 103 is performed to etch the first region 11 and the second region 12, and measure the heights of the initial first mask layer 31, the first film layer 41, the initial second mask layer 32, and the second film layer 42 during etching; according to the difference between the height sum of the initial first mask layer 31 and the first film layer 41 and the height sum of the initial second mask layer 32 and the second film layer 42, adjust the etching rate and etching time of the initial first mask layer 31, the first film layer 41, the initial second mask layer 32, and the second film layer 42; repeat the steps of measurement and adjustment multiple times until the initial first mask layer 31 is formed into a first mask layer 310, the initial second mask layer 32 is formed into a second mask layer 320, and the first mask layer 310 and the second mask layer 320 both reach a preset height and the height difference between them is within a preset range.
[0082] In an embodiment, the first mask layer 310 and the second mask layer 320 both reach a preset height and the height difference between them is within a preset range, including that the preset range is less than 10 nm.
[0083] In the embodiments of the present disclosure, the height difference between the first region and the second region can be reduced from an initial value greater than 50 nm to a value less than 10 nm, so that the load effect caused by different deposition thicknesses can be eliminated, and the performance of the wafer and the uniformity of the wafer pattern can be improved.
[0084] In an embodiment, during the etching process, the difference between the height sum of the initial first mask layer 31 and the first film layer 41 and the height sum of the initial second mask layer 32 and the second film layer 42 gradually decreases.
[0085] The difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer gradually decreases, so that the height difference between the initial first mask layer and the initial second mask layer gradually decreases during the etching process, so that the height difference between the finally formed first mask layer and the second mask layer is within the preset range.
[0086] In an embodiment, the step of repeatedly measuring and adjusting is performed until the initial first mask layer 31 is formed into a first mask layer 310, the initial second mask layer 32 is formed into a second mask layer 320, the first mask layer 310 and the second mask layer 320 both reach a preset height, and the height difference between the first mask layer 310 and the second mask layer 320 is within a preset range, including:
[0087] etching the second film layer 42 and part of the first film layer 41;
[0088] etching the remaining first film layer 41 and the initial second mask layer 32, and measuring the heights of the first film layer 41, the initial first mask layer 31, and the initial second mask layer 32 during the etching process;
[0089] adjusting the etching rate and etching time of the first film layer 41 and the initial second mask layer 32 according to the height difference between the heights of the initial first mask layer 31 and the first film layer 41 and the height of the initial second mask layer 32;
[0090] repeating the steps of measuring and adjusting until the first film layer 41 and part of the initial second mask layer 32 are etched away, and the height difference between the initial first mask layer 31 and the remaining initial second mask layer 32 is within a preset range;
[0091] etching the initial first mask layer 31 and the remaining initial second mask layer 32 until the initial first mask layer 31 is formed into a first mask layer 310, the initial second mask layer 32 is formed into a second mask layer 320, the first mask layer 310 and the second mask layer 320 both reach a preset height, and the height difference between the first mask layer 310 and the second mask layer 320 is within a preset range.
[0092] Specifically, first referring to Figure 2c etching the first region 11 and the second region 12 to remove the second film layer 42 and part of the first film layer 41.
[0093] In an embodiment, the etching rate of the second film layer 42 and the first film layer 41 is the same during the etching process of removing the second film layer 42 and part of the first film layer 41.
[0094] Because the materials of the first film layer and the second film layer are the same, the etching rate of the first film layer is the same as that of the second film layer under the same etching conditions.
[0095] Next, referring to Figure 2dThe first film layer 41 and the initial second mask layer 32 are etched, and the height of the first film layer 41, the initial first mask layer 31 and the initial second mask layer 32 during etching is measured; the etching rate and etching time of the first film layer 41 and the initial second mask layer 32 are adjusted according to the difference between the height of the initial first mask layer 31 and the first film layer 41 and the height of the initial second mask layer 32; the steps of measuring and adjusting are repeated for several times until the first film layer 41 and part of the initial second mask layer 32 are removed by etching, and the height difference between the initial first mask layer 31 and the remaining initial second mask layer 32 is within a preset range.
[0096] In an embodiment, during the etching of the remaining first film layer 41 and the initial second mask layer 32, the etching rate of the first film layer 41 is less than that of the initial second mask layer 32.
[0097] Because the height sum of the initial first mask layer 31 and the first film layer 41 is less than that of the initial second mask layer 32 and the second film layer 42 before etching, and because the etching rate of the first film layer 41 and the second film layer 42 is the same when the second film layer 42 and part of the first film layer 41 are removed by etching, the height of the first film layer 41 removed by etching is the same as that of the second film layer 42, so that in the case of removing the same height of film layer in the first area and the second area, the height sum of the initial first mask layer 31 and the remaining first film layer 41 is less than that of the initial second mask layer. Thus, in order to reduce the height difference between the initial first mask layer 31 and the initial second mask layer 32 after the remaining first film layer 41 and part of the initial second mask layer 32 are removed by etching, the etching rate of the first film layer 41 must be less than that of the initial second mask layer 32, so that more initial second mask layer 32 is removed by etching than the first film layer 41, further reducing the height difference between the initial first mask layer 31 and the remaining initial second mask layer 32.
[0098] Next, referring to Figure 2e The initial first mask layer 31 and the remaining initial second mask layer 32 are etched until the initial first mask layer 31 forms a first mask layer 310, the initial second mask layer 32 forms a second mask layer 320, and the first mask layer 310 and the second mask layer 320 both reach a preset height, and the height difference between them is within a preset range.
[0099] In an embodiment, during the etching of the initial first mask layer 31 and the remaining initial second mask layer 32, the etching rate of the initial first mask layer 31 and the initial second mask layer 32 is the same.
[0100] Because the material of the initial first mask layer and the initial second mask layer is the same, the etching rate of the initial first mask layer and the etching rate of the initial second mask layer are the same under the same etching condition.
[0101] In an embodiment, the etching rate of the initial first mask layer 31, the first film layer 41, the initial second mask layer 32 and the second film layer 42 ranges from 300 nm / min to 400 nm / min.
[0102] When the etching rate is within the range, the etching time and the etching quality can be guaranteed, so as to avoid wasting too much etching time due to too slow etching rate, and avoiding affecting the etching quality due to too fast etching rate.
[0103] In an embodiment, the adjusting the etching rate and the etching time of the initial first mask layer 31, the first film layer 41, the initial second mask layer 32 and the second film layer 42 comprises: adjusting the etching rate and the etching time by regulating the etching process parameters, wherein the etching process parameters comprise gas ratio, power and reaction chamber pressure.
[0104] The gas ratio can be the ratio of the flow rates of hydrogen, oxygen and nitrogen.
[0105] Figure 3 The process flow chart of the etching process.
[0106] As Figure 3As shown, after the initial first mask layer, the initial second mask layer, the first film layer and the second film layer are deposited, an initial etching rate of the initial first mask layer, the initial second mask layer, the first film layer and the second film layer is determined, and the etching process parameters are adjusted to achieve the etching rate. During the etching process, the heights of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer are measured, and the etching rate and the etching time are adjusted according to the feedback of the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer. As known from the foregoing, the process of multiple measurements and adjustments actually occurs during the synchronous etching of the remaining first film layer and the initial second mask layer, and the height sum of the initial first mask layer and the remaining first film layer is less than the height of the initial second mask layer. Therefore, during the etching process, if it is found through measurement that the difference between the height sum of the first film layer and the initial first mask layer and the height of the initial second mask layer is large, the etching rate of the initial second mask layer is increased and / or the etching rate of the first film layer is decreased through adjustment of the process parameters, so as to reduce the difference between the height sum of the first film layer and the initial first mask layer and the height of the initial second mask layer. Through the process of multiple measurements and adjustments, the height difference between the finally formed first mask layer and the second mask layer is within the preset range.
[0107] In the embodiments of the present disclosure, the height difference between the initial first mask layer and the initial second mask layer before etching can be compensated by forming the first film layer and the second film layer on the initial first mask layer and the initial second mask layer respectively, and the etching rate and the etching time of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer are repeatedly adjusted multiple times according to the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer during the etching process, so that the height difference between the finally formed first mask layer and the second mask layer is within the preset range. In this way, not only the load effect caused by different deposition thicknesses can be eliminated, but also the performance of the wafer and the uniformity of the wafer pattern can be improved.
[0108] The above merely describes preferred embodiments of the present disclosure but is not intended to limit the protection scope of the present disclosure. Any modification, equivalent replacement and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A method of forming a semiconductor structure, characterized by, The method comprises: providing a substrate comprising a first region and a second region, forming an initial first mask layer on the substrate in the first region, forming an initial second mask layer on the substrate in the second region, the initial first mask layer and the initial second mask layer having different heights; forming a first film layer on the initial first mask layer, and forming a second film layer on the initial second mask layer; etching the first region and the second region, and measuring the heights of the initial first mask layer, the first film layer, the initial second mask layer, and the second film layer during etching; adjusting the etching rate and etching time of the initial first mask layer, the first film layer, the initial second mask layer, and the second film layer according to the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer; repeating the steps of measuring and adjusting multiple times until the initial first mask layer is formed into a first mask layer, the initial second mask layer is formed into a second mask layer, the first mask layer and the second mask layer both reach a preset height, and the height difference between the two is within a preset range.
2. The method of claim 1, wherein the first mask layer and the second mask layer both reach a preset height, and the height difference between the two is within a preset range, and the preset range is less than 10 nm.
3. The method of claim 1, wherein the initial first mask layer and the initial second mask layer have different heights, and the height of the initial first mask layer is less than the height of the initial second mask layer.
4. The method of claim 3, wherein the height difference between the initial first mask layer and the initial second mask layer is greater than 50 nm.
5. The method of claim 1, wherein the height of the first film layer is greater than the height of the second film layer.
6. The method of claim 5, wherein before etching the first region and the second region, the height sum of the initial first mask layer and the first film layer is less than the height sum of the initial second mask layer and the second film layer.
7. The method of claim 6, wherein before etching the first region and the second region, the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer ranges from 20 nm to 30 nm.
8. The method of claim 1, wherein during etching, the difference between the height sum of the initial first mask layer and the first film layer and the height sum of the initial second mask layer and the second film layer gradually decreases.
9. The method of claim 6, wherein The step of repeating the measuring and adjusting until the initial first mask layer is formed into a first mask layer, the initial second mask layer is formed into a second mask layer, and the first mask layer and the second mask layer both reach a preset height and the height difference between them is within a preset range, comprises: etching to remove the second film layer and part of the first film layer; etching the remaining first film layer and the initial second mask layer, and measuring the height of the first film layer, the initial first mask layer and the initial second mask layer during etching; adjusting the etching rate and etching time of the first film layer and the initial second mask layer according to the height difference between the initial first mask layer and the first film layer and the height of the initial second mask layer; repeating the measuring and adjusting until the first film layer and part of the initial second mask layer are etched away, and the height difference between the initial first mask layer and the remaining initial second mask layer is within a preset range; etching the initial first mask layer and the remaining initial second mask layer until the initial first mask layer is formed into a first mask layer, the initial second mask layer is formed into a second mask layer, and the first mask layer and the second mask layer both reach a preset height and the height difference between them is within a preset range.
10. The method of claim 9, wherein during etching to remove the second film layer and part of the first film layer, the etching rate of the second film layer and the first film layer is the same.
11. The method of claim 9, wherein during etching the remaining first film layer and the initial second mask layer, the etching rate of the first film layer is less than that of the initial second mask layer.
12. The method of claim 9, wherein during etching the initial first mask layer and the remaining initial second mask layer, the etching rate of the initial first mask layer and the initial second mask layer is the same.
13. The method of claim 1, wherein the etching rate of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer ranges from 300 nm / min to 400 nm / min.
14. The method of claim 1, wherein adjusting the etching rate and etching time of the initial first mask layer, the first film layer, the initial second mask layer and the second film layer comprises adjusting the etching rate and etching time by adjusting etching process parameters, wherein the etching process parameters include gas ratio, power and reaction chamber pressure.
15. The method of claim 1, wherein the first film layer and the second film layer are both photoresist layers.
16. The method of claim 1, wherein the first region is an array region and the second region is a scribe lane region.
Citation Information
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