A turn-off time generation circuit and a chip

By designing a shutdown time generation circuit in the Buck power supply system, and using the positive and inverting input voltage generation module and comparator module to adaptively adjust the shutdown time, the problem of unstable switching frequency in fixed shutdown time mode is solved, and a more stable switching frequency and simplified design is achieved.

CN116111989BActive Publication Date: 2025-06-20SHANGHAI AWINIC TECH CO LTD
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Patent Information

Application Number
CN202310121763.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-15
Publication Date
2025-06-20
Estimated Expiration
2043-02-15

AI Technical Summary

Technical Problem

In the existing fixed shutdown time mode, changes in the input voltage or output voltage cause changes in the switching cycle of the Buck power supply system, unstable control frequency, and affect the system control effect.

Method used

A shutdown time generation circuit is designed, including a regular input voltage generation module, an inverting input voltage generation module and a comparator module. Through these modules, the comparison voltage related to the changes in the input voltage and output voltage are generated, and the shutdown time is adaptively adjusted to keep the switching frequency stable.

Benefits of technology

By adaptively adjusting the shutdown time, maintaining the relatively stable switching frequency, simplifying the design complexity and cost of DC-DC converters, while reducing the safety risks of the system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application provides a turn-off time generation circuit and a chip. The turn-off time generation circuit is applied to a DC-DC converter and includes: a non-inverting input voltage generation module, an inverting input voltage generation module, and a comparator module; the input end of the non-inverting input voltage generation module receives the input voltage from the DC-DC converter; the non-inverting input voltage generation module is used to generate a first comparison voltage proportional to the input voltage; the inverting input voltage generation module is used to generate a second comparison voltage proportional to the difference between the input voltage and the output voltage of the DC-DC converter by using an inverting voltage that is the inverse of the voltage at the SW terminal of the DC-DC converter; the comparator module is used to receive the first comparison voltage and the second comparison voltage, and output the output signal of the turn-off time generation circuit based on the result of comparing the first comparison voltage and the second comparison voltage. This circuit has the advantages of simple circuit structure and low cost, etc.
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Description

Technical Field

[0001] This application relates to the field of semiconductor integrated circuit technology, and particularly to a turn-off time generation circuit and a chip. Background Art

[0002] With the development of portable electronic products, the direct current-direct current converter (DC-DC converter) has become an essential power supply component for various electronic products such as computers and mobile phones due to its high conversion efficiency. After years of development, the DC-DC loop control technology has also evolved from fixed-frequency control technology to variable-frequency control technology. Typical fixed-frequency control technologies include voltage-mode and current-mode control technologies. The variable-frequency control technology, that is, the currently popular ripple control loop technology, mainly includes the constant on time (COT) mode, the constant off time (COF) mode, and the hysteresis mode control technology.

[0003] In the existing constant off time mode, the off time Toff of each cycle is kept unchanged, and the Buck power supply system is adjusted by changing the on time Ton. For example, when the load changes suddenly, resulting in a decrease in the output voltage Vout, the system will keep the Toff time unchanged and extend the Ton time to adjust Vout; for another example, when the input voltage Vin becomes higher, the system will keep the Toff time unchanged and shorten the Ton time to ensure the correct duty cycle.

[0004] In the existing constant off time mode, when the input voltage Vin or the output voltage Vout changes, it will cause the switching period of the Buck power supply system to change. Excessive changes in the period will make the on and off control frequencies of the Buck power supply system unstable, which is not conducive to the control development of the system. Summary of the Invention

[0005] Aiming at the above problems of the prior art, the purpose of this application is to provide a turn-off time generation circuit and a chip with a simple circuit structure, which can adaptively adjust the turn-off time according to the changes in the input voltage and the output voltage, so as to maintain the relative stability of the switching frequency.

[0006] To solve the above problems, this application provides a turn-off time generation circuit, which is applied to a DC-DC converter. The turn-off time generation circuit includes a positive-phase input voltage generation module, an inverted-phase input voltage generation module, and a comparator module;

[0007] The input terminal of the positive-phase input voltage generation module receives the input voltage from the DC-DC converter; the positive-phase input voltage generation module is used to generate a first comparison voltage proportional to the input voltage;

[0008] The inverting input voltage generation module is used to generate a second comparison voltage proportional to the difference between the input voltage and the output voltage of the DC-DC converter by using an inverting voltage that is inverse to the voltage at the SW terminal of the DC-DC converter;

[0009] The comparator module is used to receive the first comparison voltage and the second comparison voltage, and output the output signal of the shutdown time generation circuit based on the result of comparing the first comparison voltage and the second comparison voltage.

[0010] In some embodiments, the positive-phase input voltage generation module includes an input voltage voltage division module and a first comparison voltage generation module;

[0011] The input terminal of the input voltage voltage division module receives the input voltage; the input voltage voltage division module is used to divide the input voltage to obtain a first divided voltage and output it to the first comparison voltage generation module;

[0012] The input terminal of the first comparison voltage generation module receives the first divided voltage output by the input voltage voltage division module; the first comparison voltage generation module is used to charge the load capacitor in the first comparison voltage generation module by using the first divided voltage to generate a first comparison voltage proportional to the input voltage.

[0013] In some embodiments, the input voltage voltage division module includes a first voltage division resistor and a second voltage division resistor connected in series. One end of the first voltage division resistor that is not connected to the second voltage division resistor is connected to the input voltage, and one end of the second voltage division resistor that is not connected to the first voltage division resistor is grounded; the input terminal of the first comparison voltage generation module is connected to the common terminal of the first voltage division resistor and the second voltage division resistor.

[0014] In some embodiments, the first comparison voltage generation module includes an operational amplifier, a load resistor, an NMOS transistor, a first PMOS transistor, a second PMOS transistor, and a load capacitor;

[0015] The positive-phase input terminal of the operational amplifier is connected to the common terminal of the first voltage division resistor and the second voltage division resistor, the inverting input terminal of the operational amplifier is connected to the first end of the load resistor, and the output terminal of the operational amplifier is connected to the gate of the NMOS transistor;

[0016] The first end of the load resistor is also connected to the source of the NMOS transistor, and the second end of the load resistor is grounded;

[0017] The drain of the NMOS transistor is connected to the drain and gate of the first PMOS transistor, and the gate of the second PMOS transistor;

[0018] The gate of the first PMOS transistor is also connected to the gate of the second PMOS transistor, the drain of the first PMOS transistor is also connected to the gate of the second PMOS transistor, and the source of the first PMOS transistor is connected to the source of the second PMOS transistor;

[0019] The drain of the second PMOS transistor is connected to the upper plate of the load capacitor;

[0020] The upper plate of the load capacitor is also connected to the positive input terminal of the comparator module, and the lower plate of the load capacitor is grounded.

[0021] In some embodiments, the inverting input voltage generating module includes an inverting voltage generating module and a second comparison voltage generating module;

[0022] The input terminal of the inverting voltage generating module receives the input voltage from the DC-DC converter or the voltage at the SW terminal of the DC-DC converter; the inverting voltage generating module is configured to generate an inverting voltage that is inverted with respect to the voltage at the SW terminal of the DC-DC converter and output it to the second comparison voltage generating module;

[0023] The input terminal of the second comparison voltage generating module receives the inverting voltage output by the inverting voltage generating module; the second comparison voltage generating module is configured to filter the inverting voltage through an RC filter circuit to generate a second comparison voltage that is proportional to the difference between the input voltage and the output voltage of the DC-DC converter.

[0024] Optionally, the inverting voltage generating module includes a first switching transistor and a second switching transistor;

[0025] The first end of the first switching transistor is connected to the input voltage of the DC-DC converter, and the second end of the first switching transistor is connected to the input terminal of the second comparison voltage generating module;

[0026] The first end of the second switching transistor is connected to the input terminal of the second comparison voltage generating module, and the second end of the second switching transistor is grounded.

[0027] Optionally, the inverting voltage generating module includes a first inverter;

[0028] The input terminal of the first inverter is connected to the voltage of the SW terminal of the DC-DC converter, and the output terminal of the first inverter is connected to the input terminal of the second comparison voltage generation module.

[0029] In some embodiments, the second comparison voltage generation module includes a third voltage dividing resistor and a fourth voltage dividing resistor connected in series, as well as a filtering resistor and a filtering capacitor;

[0030] One end of the third voltage dividing resistor that is not connected to the fourth voltage dividing resistor is connected to the output terminal of the inverted voltage generation module, and one end of the fourth voltage dividing resistor that is not connected to the third voltage dividing resistor is grounded;

[0031] The first end of the filtering resistor is connected to the common terminal of the third voltage dividing resistor and the fourth voltage dividing resistor, and the second end of the filtering resistor is connected to the upper plate of the filtering capacitor;

[0032] The upper plate of the filtering capacitor is also connected to the inverting input terminal of the comparator module, and the lower plate of the filtering capacitor is grounded.

[0033] In some embodiments, the comparator module includes a comparator, a second inverter, and a third inverter;

[0034] The output terminal of the non-inverting input voltage generation module is connected to the non-inverting input terminal of the comparator, and the output terminal of the inverting input voltage generation module is connected to the inverting input terminal of the comparator; the comparator is configured to receive the first comparison voltage and the second comparison voltage, compare the first comparison voltage and the second comparison voltage, and generate an output signal of the turn-off time generation circuit based on the comparison result;

[0035] The input terminal of the second inverter receives the output signal of the turn-off time generation circuit, the output terminal of the second inverter is connected to the input terminal of the third inverter, and the output terminal of the third inverter is used to output the output signal of the turn-off time generation circuit.

[0036] In a second aspect, an embodiment of the present application provides a chip applied to a DC-DC converter, and the chip includes the turn-off time generation circuit as described above.

[0037] Due to the above technical solutions, the present application has the following beneficial effects:

[0038] The turn-off time generation circuit according to the embodiments of the present application generates a first comparison voltage proportional to the input voltage through a non-inverting input voltage generation module. The inverting input voltage generation module directly generates a second comparison voltage proportional to the difference between the input voltage and the output voltage by using an inverting voltage that is inverted with respect to the voltage at the SW terminal. The comparator module outputs a turn-off time pulse signal that is adaptively adjusted according to the comparison results of the first comparison voltage and the second comparison voltage, so that the switching period and switching frequency of the overall system remain relatively stable. The turn-off time generation circuit according to the embodiments of the present application has the advantages of simpler circuit structure, reliable performance, and low design and development costs, thereby simplifying the design complexity and cost of the DC-DC converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings required for the embodiments or the description of the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0040] Figure 1 The schematic diagram of the turn-off time generation circuit provided according to some embodiments is shown;

[0041] Figure 2 The schematic diagram of the voltage relationship between the voltage at the SW terminal and the output voltage Vout provided according to some embodiments is shown;

[0042] Figure 3 The schematic diagram of the voltage relationship between the voltage at the SW terminal and the equivalent voltage Vox of the output voltage provided according to some embodiments is shown;

[0043] Figure 4 The timing diagram of the turn-off time signal Toff_over provided according to some embodiments is shown;

[0044] Figure 5 The schematic diagram of the turn-off time generation circuit provided according to an embodiment of the present application is shown;

[0045] Figure 6 The schematic diagram of the turn-off time generation circuit provided according to another embodiment of the present application is shown;

[0046] Figure 7 The schematic diagram of the voltage relationship between the inverting voltage Vr and the equivalent voltage Vn of the difference between the input voltage and the output voltage provided according to an embodiment of the present application is shown;

[0047] Figure 8 The structural diagram of the turn-off time generation circuit provided according to an embodiment of the present application is shown. Detailed implementation manners

[0048] To enable those skilled in the art to better understand the solutions of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only some of the embodiments of this application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts shall fall within the scope of protection of this application.

[0049] It should be noted that the terms "first", "second", etc. in the description and claims of this application and the above-mentioned accompanying drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of this application described here can be implemented in an order different from those illustrated or described here. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, device, product or equipment that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or equipment.

[0050] The turn-off time generation circuit provided in the embodiments of this application can be but is not limited to being applied to the Buck power supply system of the COF architecture in a DC-DC converter. In the existing COF mode, when the input voltage Vin or the output voltage Vout changes, the switching frequency of the system will change, and generally it is desired that the switching frequency of the overall system is fixed. Therefore, a circuit needs to be designed that can change the Toff time in proportion according to the ratio of Vin and Vout, so as to keep the switching frequency relatively stable. That is, Toff = k * (Vin - Vout) / Vin, where k is a proportionality coefficient.

[0051] It should be noted that the above application to the DC-DC converter is only an example, and the turn-off time generation circuit provided in the embodiments of this application can also be applied to other scenarios, and the embodiments of this application do not limit this.

[0052] Refer to the attached drawings of the specification Figure 1 , which shows the schematic diagram of a turn-off time generation circuit provided according to some embodiments. As Figure 1 shown, the turn-off time generation circuit mainly consists of 5 parts: Vin voltage division circuit, SW voltage division and filtering circuit, Vn generation circuit, Vp generation circuit and comparator circuit.

[0053] Regarding Figure 1The Vin voltage dividing circuit therein, specifically, the Vin voltage dividing circuit includes a voltage dividing resistor R4 and R5 connected in series with each other, and an operational amplifier. One end of R4 not connected to R5 is connected to the input voltage Vin, and one end of R5 not connected to R4 is grounded (connected to the ground wire GND); the non-inverting input terminal of the operational amplifier is connected to the common terminal of R4 and R5, the inverting input terminal of the operational amplifier is connected to the first end of the load resistor Rx in the Vp generating circuit, and the output terminal of the operational amplifier is connected to the gate of the N-channel (N-Channel) metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOS) (abbreviated as NMOS transistor) Q4 in the Vp generating circuit. The Vin voltage dividing circuit is mainly used to divide Vin to generate a voltage Vix = Vin * K1, where K1 = R5 / (R4 + R5). The purpose of generating the Vix voltage is to generate a current Iix = Vix / Rx that is proportional to Vin.

[0054] Regarding Figure 1 The Vp generating circuit therein, specifically, the Vp generating circuit includes a load resistor Rx, an NMOS transistor Q4, a P-channel (P-Channel) metal-oxide-semiconductor field-effect transistor (abbreviated as PMOS transistor) Q5, a PMOS transistor Q6, a PMOS transistor Q11, an NMOS transistor Q12, and a load capacitor Cx. The first end of the load resistor Rx is also connected to the source of the NMOS transistor Q4, and the second end of the load resistor Rx is grounded; the drain of the NMOS transistor Q4 is respectively connected to the drain and gate of the PMOS transistor Q5, the gate of the PMOS transistor Q6, and the gate of the PMOS transistor Q11. Then, a current Iix = Vix / Rx that is proportional to Vin can be generated in the load resistor Rx in the Vp generating circuit.

[0055] The gate of the PMOS transistor Q5 is also respectively connected to the gate of the PMOS transistor Q6 and the gate of the PMOS transistor Q11. The drain of the PMOS transistor Q5 is also connected to the gate of the PMOS transistor Q6 and the gate of the PMOS transistor Q11. The source of the PMOS transistor Q5 is respectively connected to the source of the PMOS transistor Q6 and the source of the PMOS transistor Q11; the drain of the PMOS transistor Q6 is connected to the load resistor R6 in the Vn generating circuit, thereby introducing the generated current Iix into the Vn generating circuit to generate a voltage related to Vin - Vout.

[0056] The drain of PMOS transistor Q11 is connected to the drain and gate of NMOS transistor Q12, as well as the upper plate of load capacitor Cx. The source of NMOS transistor Q12 is connected to GND through a switching transistor. The upper plate of load capacitor Cx is also connected to the positive input terminal of the comparator circuit, and the lower plate of load capacitor Cx is grounded. That is to say, when an input voltage Vin is applied, the Iix current passes through the Vp generation circuit, and the load capacitor Cx can be charged, thereby generating a voltage Vp = Vgs + Iix*t / Cx = Vgs + K1*Vin*t / (Rx*Cx), where Vgs is the initial voltage.

[0057] In Figure 1 the illustrated embodiment, in order to generate a voltage value Vn related to Vin - Vout, it is necessary to first generate an equivalent voltage Vox of Vout. Figure 1 The purpose of the SW voltage division and filtering circuit in the illustrated embodiment is to generate an equivalent voltage Vox of Vout = Vout*K2, where K2 = R2 / (R1 + R2).

[0058] In practical applications, for the entire Buck power supply system, when it is operating normally, the relationship between the voltage at the SW terminal and the output voltage Vout is as Figure 2 shown. From Figure 2 it can be seen that after the voltage VSW at the SW terminal passes through the LC filtering circuit, Vout can be obtained, and the average voltage Vout_avg of Vout = Vin*Ton / (Ton + Toff) = Vin*D, where Ton represents the conduction time and Toff represents the turn-off time.

[0059] When the integrated circuit (IC) does not have a Vout pin, an equivalent voltage Vox close to Vout can be generated through an RC filtering circuit. Specifically, the relationship between the voltage at the SW terminal and Vox is as Figure 3 shown. From Figure 3 it can be seen that after the voltage VSW at the SW terminal passes through the RC filtering circuit, the equivalent voltage Vox of Vout can be obtained, and the average voltage Vox_avg of Vox = Vin*Ton / (Ton + Toff) = Vin*D.

[0060] It can be seen that both the LC filtering circuit and the RC filtering circuit can obtain the average voltage of the voltage at the SW terminal. Therefore, through the RC filtering circuit, the equivalent value Vox of Vout can be obtained. If the voltage at the SW terminal is applied to the RC filtering circuit after being divided by a voltage dividing resistor, then Vox can be equivalent to the voltage division of the same ratio of Vout.

[0061] Regarding Figure 1The SW voltage dividing and filtering circuit therein. Specifically, the SW voltage dividing and filtering circuit includes a voltage dividing resistor R1 and a voltage dividing resistor R2 connected in series with each other, as well as a filtering resistor R3 and a filtering capacitor C1. One end of R1 that is not connected to R2 is connected to the SW terminal, and one end of R2 that is not connected to R1 is grounded; the first end of the filtering resistor R3 is connected to the common terminal of R1 and R2, and the other end is connected to the non-inverting input terminal of the operational amplifier in the Vn generation circuit; the upper plate of the filtering capacitor C1 is connected to the non-inverting input terminal of the operational amplifier in the Vn generation circuit, and the lower plate is grounded.

[0062] Since the IC itself often does not have a Vout pin, but the IC needs to generate a Toff time related to Vout, the SW filtering circuit can be used to equivalently generate the Vout voltage. If the voltage at the SW terminal is voltage-divided and then passes through the filtering circuit, it can be equivalent to an equiproportional voltage division of Vout, and finally the voltage of Vox = Vout * K2 = Vout * R2 / (R1 + R2) can be obtained.

[0063] Regarding Figure 1 The Vn generation circuit therein. Specifically, the Vn generation circuit includes an operational amplifier, a load resistor Rx, an NMOS transistor Q1, a PMOS transistor Q2, a PMOS transistor Q3, an NMOS transistor Q7, a load resistor R6, an NMOS transistor Q8, an NMOS transistor Q9, and a PMOS transistor Q10. The inverting input terminal of the operational amplifier is connected to the first end of the load resistor Rx, and the output terminal is connected to the gate of the NMOS transistor Q1; the first end of the load resistor Rx is also connected to the source of the NMOS transistor Q1, and the second end of the load resistor Rx is grounded; the drain of the NMOS transistor Q1 is respectively connected to the drain and gate of the PMOS transistor Q2, the gate of the PMOS transistor Q3, and the gate of the PMOS transistor Q10.

[0064] The gate of PMOS transistor Q2 is also connected to the gates of PMOS transistor Q3 and PMOS transistor Q10 respectively. The drain of PMOS transistor Q2 is also connected to the gates of PMOS transistor Q3 and PMOS transistor Q10. The source of PMOS transistor Q2 is connected to the sources of PMOS transistor Q3 and PMOS transistor Q10 respectively. The drain of PMOS transistor Q3 is connected to the drain of NMOS transistor Q7. The drain of NMOS transistor Q7 is also connected to the first end of load resistor R6. The gate of NMOS transistor Q7 is also connected to the first end of load resistor R6. The source of NMOS transistor Q7 is grounded. The drain of PMOS transistor Q10 is connected to the gate, the gate and the drain of NMOS transistor Q8 and NMOS transistor Q9 respectively. The sources of NMOS transistor Q8 and NMOS transistor Q9 are both grounded. The drain of NMOS transistor Q8 is connected to the second end of load resistor R6. The second end of load resistor R6 is connected to the drain of PMOS transistor Q6 in the Vp generation circuit. The second end of load resistor R6 is also connected to the inverting input terminal of the comparator circuit.

[0065] The purpose of the Vn generation circuit is to generate a voltage related to Vin - Vout. Since the Vox voltage proportional to Vout has been generated based on the SW voltage division and filtering circuit, then a current Iox = Vox / Rx proportional to Vout can be generated in the load resistor Rx in the Vn generation circuit, and then subtracted from Iix, so as to obtain the current difference Iix - Iox = Vix / Rx - Vox / Rx. That is to say, when the input voltage Vin is applied, the Iix current and the Iox current pass through the Vn generation circuit, and a voltage Vn = Vgs + R6*(Iix - Iox) = Vgs + R6*(Vix / Rx - Vox / Rx) = Vgs + R6*(K1*Vin - K2*Vout) / Rx can be generated, where Vgs is the initial voltage.

[0066] In practical applications, the resistance values of R1, R2, R4 and R5 can be selected such that K1 = K2 = K. Therefore, Vn = Vgs + R6*K*(Vin - Vout) / Rx can be obtained. Similarly, Vp = Vgs + K*Vin*t / (Rx*Cx) can be obtained.

[0067] Regarding Figure 1 the comparator circuit in, specifically, the comparator circuit includes a comparator, a first inverter and a second inverter. The comparator is used to receive the Vp and Vn voltages and compare Vp and Vn. When Vp > Vn, the turn-off time signal flips to H and the turn-off time ends. As Figure 4 shown, Figure 4The timing diagram of the turn-off time signal Toff_over provided according to some embodiments is shown. It can be seen that when Vp > Vn, Toff_over changes from low to high. Therefore, when Vp = Vn:

[0068] Vgs + K * Vin * t / (Rx * Cx) = Vgs + R6 * K * (Vin - Vout) / Rx

[0069] Further derivation gives:

[0070] Toff = R6 * Cx * (Vin - Vout) / Vin = R6 * Cx * (1 - D)

[0071] where D = Vout / Vin. Furthermore, the switching period T = Toff / (1 - D) = R6 * Cx can be obtained. It can be seen that the switching period T is only related to R6 and Cx, and has nothing to do with Vin and Vout. Therefore, the switching frequency Fsw = 1 / T also has nothing to do with Vin and Vout and can remain basically stable. The disadvantage of this circuit is that the circuit structure is relatively complex, especially the Vn generation circuit, with a high development cost, and there may also be certain security risks in the system due to the complex circuit structure.

[0072] To solve the above problems, an embodiment of the present application provides a turn-off time generation circuit, which can avoid using the Vn generation circuit, simplify the circuit structure, and reduce the security risk of the overall system to a certain extent.

[0073] Refer to the attached drawings of the specification Figure 5 , which shows the schematic diagram of a turn-off time generation circuit provided by an embodiment of the present application. This turn-off time generation circuit can be applied to a DC-DC converter. As Figure 5 shown, this turn-off time generation circuit may include a non-inverting input voltage generation module 510, an inverting input voltage generation module 520, and a comparator module 530. The input end of the non-inverting input voltage generation module 510 receives the input voltage Vin from the DC-DC converter, and the output end of the non-inverting input voltage generation module 510 is connected to the non-inverting input end of the comparator module 530; the output end of the inverting input voltage generation module 520 is connected to the inverting input end of the comparator module 530.

[0074] The non-inverting input voltage generation module 510 can be used to generate a first comparison voltage Vp proportional to the input voltage Vin; the inverting input voltage generation module 520 can be used to generate a second comparison voltage Vn proportional to the difference Vin - Vout between the input voltage Vin and the output voltage Vout of the DC-DC converter by using an inverting voltage that is inverted with respect to the voltage at the SW terminal of the DC-DC converter.

[0075] The positive input terminal of the comparator module 530 receives the first comparison voltage Vp output by the positive input voltage generation module 510, and the negative input terminal receives the second comparison voltage Vn output by the negative input voltage generation module 520; the comparator module 530 can be used to output the output signal Toff of the turn-off time generation circuit through the output terminal based on the comparison result of the first comparison voltage Vp and the second comparison voltage Vn.

[0076] For the turn-off time generation circuit according to the embodiment of the present application, the positive input voltage generation module generates a first comparison voltage proportional to the input voltage, the negative input voltage generation module directly generates a second comparison voltage proportional to the difference between the input voltage and the output voltage by using an inverted voltage that is inverted with respect to the voltage at the SW terminal, and the comparator module outputs a turn-off time pulse signal that is adaptively adjusted according to the comparison result of the first comparison voltage and the second comparison voltage, so that the switching period and switching frequency of the overall system are kept relatively stable. The turn-off time generation circuit according to the embodiment of the present application has the advantages of simpler circuit structure, reliable performance, and low design and development cost, etc., and thus can simplify the design complexity and cost of the DC-DC converter, and reduce the safety risk of the overall system to a certain extent.

[0077] In an embodiment of the present application, referring to the attached Figure 6 description, the positive input voltage generation module 510 may include an input voltage voltage division module 511 and a first comparison voltage generation module 512; the input terminal of the input voltage voltage division module 511 receives the input voltage; the input voltage voltage division module 511 is used to divide the input voltage to obtain a first divided voltage and output it to the first comparison voltage generation module 512; the input terminal of the first comparison voltage generation module 512 receives the first divided voltage output by the input voltage voltage division module 511; the first comparison voltage generation module 512 is used to charge the load capacitor in the first comparison voltage generation module 512 by using the first divided voltage to generate a first comparison voltage proportional to the input voltage.

[0078] During operation, the input voltage Vin of the DC-DC converter is input to the input voltage voltage division module 511, and the input voltage voltage division module 511 divides the input voltage to obtain a first divided voltage Vix and outputs it to the first comparison voltage generation module 512. The first comparison voltage generation module 512 charges the load capacitor in the first comparison voltage generation module 512 by using the first divided voltage Vix to generate a first comparison voltage Vp proportional to the input voltage Vin and outputs it to the comparator module 530.

[0079] As Figure 6As shown, the inverting input voltage generation module 520 may include an inverting voltage generation module 521 and a second comparison voltage generation module 522; the input end of the inverting voltage generation module 521 may receive the input voltage from the DC-DC converter, or may also receive the voltage at the SW terminal of the DC-DC converter; the inverting voltage generation module 521 is used to generate an inverting voltage that is opposite in phase to the voltage at the SW terminal, and output it to the second comparison voltage generation module 522. The input end of the second comparison voltage generation module 522 may receive the inverting voltage output by the inverting voltage generation module 521; the second comparison voltage generation module 522 is used to filter the received inverting voltage through an RC filter circuit to generate a second comparison voltage proportional to the difference between the input voltage and the output voltage of the DC-DC converter.

[0080] In practical applications, if it is not necessary to generate the equivalent voltage Vox of the output voltage Vout, but directly generate a voltage Vn related to the difference Vin - Vout between the input voltage Vin and the output voltage Vout, the circuit structure will be greatly simplified. Therefore, an inverting voltage Vr can be generated first, such that the waveform of Vr is completely opposite to the voltage VSW at the SW terminal. As Figure 7 shown, that is, when VSW is high, Vr is low, and when VSW is low, Vr is high. Then, the Vr signal is filtered through an RC filter to obtain

[0081] Vn_avg = Vin * Toff / (Toff + Ton) = Vin * (1 - D) = Vin - Vout

[0082] It can be seen that as long as the RC filter circuit is modified, the equivalent voltage Vn of Vin - Vout can be directly generated without first generating the equivalent voltage Vox of Vout and then generating the equivalent voltage Vn of Vin - Vout based on this equivalent voltage Vox.

[0083] During operation, the inverting voltage generation module 521 may generate an inverting voltage Vr that is opposite in phase to the voltage at the SW terminal of the DC-DC converter based on the input voltage of the DC-DC converter by using two switching transistors, and output it to the second comparison voltage generation module 522; alternatively, the inverting voltage generation module 521 may also generate an inverting voltage Vr that is opposite in phase to the voltage at the SW terminal of the DC-DC converter by adding an inverter based on the voltage at the SW terminal of the DC-DC converter, and output it to the second comparison voltage generation module 522. The second comparison voltage generation module 522 may filter the received inverting voltage Vr through an RC filter circuit to generate a second comparison voltage Vn proportional to the difference Vin - Vout between the input voltage Vin and the output voltage Vout of the DC-DC converter, and output it to the comparator module 530.

[0084] It can be understood that in the embodiments of the present application, an inverted voltage that is inverted with respect to the SW terminal voltage of the DC-DC converter is generated by using two switching transistors based on the input voltage of the DC-DC converter, or by using an inverter based on the SW terminal voltage of the DC-DC converter. Furthermore, a voltage proportional to Vin-Vout is generated through an RC filter circuit, with a simple circuit structure, reliable performance, and low design and development costs.

[0085] As Figure 6 shown, the positive input terminal of the comparator module 530 receives the first comparison voltage Vp output by the first comparison voltage generation module 512, and the negative input terminal of the comparator module 530 receives the second comparison voltage Vn output by the second comparison voltage generation module 522. After receiving the first comparison voltage Vp and the second comparison voltage Vn, the comparator module 530 can compare the first comparison voltage Vp and the second comparison voltage Vn, and based on the comparison result, output the output signal Toff of the off-time generation circuit from the output terminal.

[0086] In a specific embodiment of the present application, referring to the attached Figure 8 drawings of the specification, the input voltage dividing module 511 includes a first dividing resistor R4 and a second dividing resistor R5 connected in series. One end of the first dividing resistor R4 that is not connected to the second dividing resistor R5 is connected to the input voltage Vin, and one end of the second dividing resistor R5 that is not connected to the first dividing resistor R4 is grounded; the input terminal of the first comparison voltage generation module 512 is connected to the common terminal of the first dividing resistor R4 and the second dividing resistor R5.

[0087] During operation, the first dividing resistor R4 and the second dividing resistor R5 can divide the voltage of Vin to generate a voltage of Vix = Vin*K1, where K1 = R5 / (R4 + R5), and output it to the first comparison voltage generation module 512. The purpose of generating the Vix voltage is to generate a current Iix = Vix / Rx that is proportional to Vin.

[0088] As Figure 8 shown, the first comparison voltage generation module 512 includes an operational amplifier, a load resistor Rx, an NMOS transistor Q1, a first PMOS transistor Q2, a second PMOS transistor Q3, and a load capacitor Cx. Among them, the positive input terminal of the operational amplifier is connected to the common terminal of the first dividing resistor R4 and the second dividing resistor R5 in the input voltage dividing module 511, the negative input terminal of the operational amplifier is connected to the first end of the load resistor Rx, and the output terminal of the operational amplifier is connected to the gate of the NMOS transistor Q1. The first end of the load resistor Rx is also connected to the source of the NMOS transistor Q1, and the second end of the load resistor Rx is grounded. Then, during operation, a current Iix = Vix / Rx that is proportional to Vin can be generated in the load resistor Rx of the first comparison voltage generation module 512.

[0089] Among them, the drain of the NMOS transistor Q1 is respectively connected to the drain and gate of the first PMOS transistor Q2, and the gate of the second PMOS transistor Q3. The gate of the first PMOS transistor Q2 is also connected to the gate of the second PMOS transistor Q3, the drain of the first PMOS transistor Q2 is also connected to the gate of the second PMOS transistor Q3, and the source of the first PMOS transistor Q2 is connected to the source of the second PMOS transistor Q3. The drain of the second PMOS transistor Q3 is connected to the upper plate of the load capacitor Cx. The upper plate of the load capacitor Cx is also connected to the positive input terminal of the comparator module 530, and the lower plate of the load capacitor Cx is grounded.

[0090] During operation, when the input voltage Vin is applied, the Iix current passes through the first comparison voltage generation module 512, and the load capacitor Cx can be charged, thereby generating a first comparison voltage Vp proportional to the input voltage Vin, where Vp = Iix*t / Cx = K1*Vin*t / (Rx*Cx), and it is output to the comparator module 530.

[0091] As Figure 8 shown, the inverting voltage generation module 521 includes a first switching transistor K1 and a second switching transistor K2. The first end of the first switching transistor K1 is connected to the input voltage Vin of the DC-DC converter, and the second end of the first switching transistor K1 is connected to the input terminal of the second comparison voltage generation module 522; the first end of the second switching transistor K2 is connected to the input terminal of the second comparison voltage generation module 522, and the second end of the second switching transistor K2 is grounded.

[0092] During operation, when the upper bridge is conducting and the lower bridge is cut off, SW = Vin, the first switching transistor K1 is turned off and the second switching transistor K2 is turned on, then Vr = Vin. When the upper bridge is cut off and the lower bridge is conducting, SW = GND, the first switching transistor K1 is turned on and the second switching transistor K2 is turned off, and Vr = GND. That is, an inverting voltage Vr opposite to the voltage at the SW terminal is generated and output to the second comparison voltage generation module 522.

[0093] It can be understood that based on the input voltage of the DC-DC converter in the embodiment of the present application, an inverting voltage opposite to the voltage at the SW terminal can be generated through two switching transistors, and the circuit structure is simple.

[0094] As Figure 8 shown, the second comparison voltage generation module 522 includes a third voltage dividing resistor R1 and a fourth voltage dividing resistor R2 connected in series, as well as a filtering resistor R3 and a filtering capacitor C1. The end of the third voltage dividing resistor R1 that is not connected to the fourth voltage dividing resistor R2 is connected to the output terminal of the inverting voltage generation module 521, that is, connected to the second end of the first switching transistor K1 and the first end of the second switching transistor K2 respectively. The end of the fourth voltage dividing resistor R2 that is not connected to the third voltage dividing resistor R1 is grounded.

[0095] One end of the filtering resistor R3 is connected to the common end of the third voltage-dividing resistor R1 and the fourth voltage-dividing resistor R2, and the other end of the filtering resistor R3 is connected to the upper plate of the filtering capacitor C1; the upper plate of the filtering capacitor C1 is also connected to the inverting input terminal of the comparator module 530, and the lower plate of the filtering capacitor C1 is grounded.

[0096] During operation, the inverting voltage Vr generated by the inverting voltage generation module 521 can generate a second comparison voltage Vn = K2 * (Vin - Vout) proportional to the difference between the input voltage Vin and the output voltage Vout through the voltage-dividing resistors and the RC filtering circuit in the second comparison voltage generation module 522, where K2 = R2 / (R1 + R2), and output it to the comparator module 530.

[0097] It should be noted that the resistance values of the voltage-dividing resistors R1, R2, R4, and R5 in the embodiments of the present application can be selected according to actual situations, and the embodiments of the present application do not limit this. Preferably, the resistance values of R1, R2, R4, and R5 can be selected such that K1 = K2 = K. Therefore, Vp = K * Vin * t / (Rx * Cx) can be obtained, and similarly, Vn = K * (Vin - Vout) can be obtained.

[0098] It can be understood that based on the inverting voltage of the SW terminal voltage in the embodiments of the present application, a voltage proportional to Vin - Vout can be generated through the voltage-dividing resistors and the RC filtering circuit, greatly simplifying the circuit structure.

[0099] As Figure 8 shown, the comparator module 530 includes a comparator, a second inverter, and a third inverter. The non-inverting input terminal of the comparator is connected to the output terminal of the non-inverting input voltage generation module 510, that is, connected to the upper plate of the load capacitor Cx in the first comparison voltage generation module 512; the inverting input terminal of the comparator is connected to the output terminal of the inverting input voltage generation module 520, that is, connected to the upper plate of the filtering capacitor C1 in the second comparison voltage generation module 522. The comparator is used to receive the first comparison voltage and the second comparison voltage, compare the first comparison voltage and the second comparison voltage, and generate an output signal of the turn-off time generation circuit based on the comparison result and output it to the second inverter.

[0100] The input terminal of the second inverter can be connected to the output terminal of the comparator. The input terminal of the second inverter can receive the output signal of the turn-off time generation circuit output by the comparator. The output terminal of the second inverter is connected to the input terminal of the third inverter, and the output terminal of the third inverter is used to output the output signal of the turn-off time generation circuit.

[0101] During operation, the comparator can receive the first comparison voltage Vp sent by the first comparison voltage generation module 512 and the second comparison voltage Vn sent by the second comparison voltage generation module 522, compare the first comparison voltage Vp and the second comparison voltage Vn, and generate an output signal of the turn-off time generation circuit based on the comparison result. After being inverted by the second inverter and the third inverter, the output signal is output from the output terminal of the third inverter.

[0102] Specifically, when the comparator determines that Vp > Vn, the turn-off time signal flips to H, and the turn-off time ends. Therefore, when Vp = Vn:

[0103] K*Vin*t / (Rx*Cx) = K*(Vin - Vout)

[0104] Further derivation gives:

[0105] Toff = Rx*Cx*(Vin - Vout) / Vin = Rx*Cx*(1 - D)

[0106] Where D = Vout / Vin, and then the switching period T = Toff / (1 - D) = Rx*Cx. It can be seen that the switching period T is only related to Rx and Cx, and has nothing to do with Vin and Vout. Therefore, the switching frequency Fsw = 1 / T is also only related to Rx and Cx, and has nothing to do with Vin and Vout, which can ensure the stability of the switching frequency.

[0107] It can be understood that the embodiment of the present application can implement a turn-off time pulse signal Toff = k*(Vin - Vout) / Vin related to the ratio (Vin - Vout) / Vin of Vin and Vout. This pulse signal can change the turn-off time Toff proportionally according to the ratio of Vin and Vout, so as to maintain the relative stability of the switching frequency.

[0108] In another specific embodiment of the present application, the inverted voltage generation module 521 can also only include a first inverter. The input terminal of the first inverter is connected to the voltage of the SW terminal of the DC-DC converter, and the output terminal of the first inverter is connected to the input terminal of the second comparison voltage generation module 522. That is to say, by directly adding the SW terminal voltage to the inverter, voltage inversion can be realized to generate an inverted voltage Vr that is inverted with respect to the voltage of the SW terminal of the DC-DC converter and output to the second comparison voltage generation module 522. It can be understood that by adopting the method of directly adding the SW terminal voltage to the inverter in the embodiment of the present application, the circuit structure can be further simplified.

[0109] It should be noted that the other parts of this implementation method are the same as those in the Figure 8 embodiment shown, and will not be repeated here in the embodiment of the present application. This implementation method and theFigure 8 The illustrated embodiments are merely two examples of the inverted voltage generation module 521. In practical applications, the inverted voltage generation module 521 may include but is not limited to the above embodiments. The embodiments of the present application are not specifically limited herein and may be determined according to specific circumstances, all within the protection scope of the present application.

[0110] An embodiment of the present application further provides a chip, which can be applied to a DC-DC converter. The chip may include the turn-off time generation circuit provided in any of the embodiments as Figures 5 to 8 illustrated.

[0111] It should be noted that the embodiments in this specification are described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. For the methods disclosed in the embodiments, since they correspond to the systems disclosed in the embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the system part.

[0112] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0113] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A turn-off time generation circuit, applied to a DC-DC converter, characterized in that, The turn-off time generation circuit includes a non-inverting input voltage generation module, an inverting input voltage generation module, and a comparator module; The input terminal of the non-inverting input voltage generation module receives the input voltage from the DC-DC converter; the non-inverting input voltage generation module is used to generate a first comparison voltage proportional to the input voltage; The inverting input voltage generation module is used to generate a second comparison voltage proportional to the difference between the input voltage and the output voltage of the DC-DC converter by using an inverting voltage that is inverted with respect to the voltage at the SW terminal of the DC-DC converter; The comparator module is used to receive the first comparison voltage and the second comparison voltage, and based on the result of comparing the first comparison voltage and the second comparison voltage, output the output signal of the turn-off time generation circuit; Among them, the non-inverting input voltage generation module includes an input voltage voltage division module and a first comparison voltage generation module; The input terminal of the input voltage voltage division module receives the input voltage; the input voltage voltage division module is used to divide the input voltage to obtain a first divided voltage and output it to the first comparison voltage generation module; The input terminal of the first comparison voltage generation module receives the first divided voltage output by the input voltage voltage division module; the first comparison voltage generation module is used to charge the load capacitor in the first comparison voltage generation module by using the first divided voltage to generate a first comparison voltage proportional to the input voltage; The inverting input voltage generation module includes an inverting voltage generation module and a second comparison voltage generation module; The input terminal of the inverting voltage generation module receives the input voltage from the DC-DC converter or receives the voltage at the SW terminal of the DC-DC converter; the inverting voltage generation module is used to generate an inverting voltage that is inverted with respect to the voltage at the SW terminal of the DC-DC converter and output it to the second comparison voltage generation module; The input terminal of the second comparison voltage generation module receives the inverting voltage output by the inverting voltage generation module; the second comparison voltage generation module is used to filter the inverting voltage through an RC filter circuit to generate a second comparison voltage proportional to the difference between the input voltage and the output voltage of the DC-DC converter.

2. The turn-off time generation circuit according to claim 1, characterized in that, The input voltage voltage division module includes a first voltage division resistor and a second voltage division resistor connected in series. One end of the first voltage division resistor that is not connected to the second voltage division resistor is connected to the input voltage, and one end of the second voltage division resistor that is not connected to the first voltage division resistor is grounded; the input terminal of the first comparison voltage generation module is connected to the common terminal of the first voltage division resistor and the second voltage division resistor.

3. The turn-off time generation circuit according to claim 2, characterized in that, The first comparison voltage generation module includes an operational amplifier, a load resistor, an NMOS transistor, a first PMOS transistor, a second PMOS transistor, and a load capacitor; The non-inverting input terminal of the operational amplifier is connected to the common terminal of the first voltage-dividing resistor and the second voltage-dividing resistor, the inverting input terminal of the operational amplifier is connected to the first end of the load resistor, and the output terminal of the operational amplifier is connected to the gate of the NMOS transistor; The first end of the load resistor is also connected to the source of the NMOS transistor, and the second end of the load resistor is grounded; The drain of the NMOS transistor is respectively connected to the drain and gate of the first PMOS transistor, and the gate of the second PMOS transistor; The gate of the first PMOS transistor is also connected to the gate of the second PMOS transistor, the drain of the first PMOS transistor is also connected to the gate of the second PMOS transistor, and the source of the first PMOS transistor is connected to the source of the second PMOS transistor; The drain of the second PMOS transistor is connected to the upper plate of the load capacitor; The upper plate of the load capacitor is also connected to the non-inverting input terminal of the comparator module, and the lower plate of the load capacitor is grounded.

4. The turn-off time generation circuit according to claim 1, characterized in that, The inverting voltage generation module includes a first switching transistor and a second switching transistor; The first end of the first switching transistor is connected to the input voltage of the DC-DC converter, and the second end of the first switching transistor is connected to the input terminal of the second comparison voltage generation module; The first end of the second switching transistor is connected to the input terminal of the second comparison voltage generation module, and the second end of the second switching transistor is grounded.

5. The turn-off time generation circuit according to claim 1, characterized in that, The inverting voltage generation module includes a first inverter; The input terminal of the first inverter is connected to the voltage of the SW terminal of the DC-DC converter, and the output terminal of the first inverter is connected to the input terminal of the second comparison voltage generation module.

6. The turn-off time generation circuit according to claim 1, characterized in that, The second comparison voltage generation module includes a third voltage-dividing resistor and a fourth voltage-dividing resistor connected in series, as well as a filtering resistor and a filtering capacitor; The end of the third voltage-dividing resistor not connected to the fourth voltage-dividing resistor is connected to the output terminal of the inverting voltage generation module, and the end of the fourth voltage-dividing resistor not connected to the third voltage-dividing resistor is grounded; The first end of the filtering resistor is connected to the common terminal of the third voltage-dividing resistor and the fourth voltage-dividing resistor, and the second end of the filtering resistor is connected to the upper plate of the filtering capacitor; The upper plate of the filtering capacitor is also connected to the inverting input terminal of the comparator module, and the lower plate of the filtering capacitor is grounded.

7. The turn-off time generation circuit according to claim 1, characterized in that, The comparator module includes a comparator, a second inverter, and a third inverter; The output terminal of the non-inverting input voltage generation module is connected to the non-inverting input terminal of the comparator, and the output terminal of the inverting input voltage generation module is connected to the inverting input terminal of the comparator; the comparator is used to receive the first comparison voltage and the second comparison voltage, compare the first comparison voltage and the second comparison voltage, and generate the output signal of the turn-off time generation circuit based on the comparison result; The input terminal of the second inverter receives the output signal of the turn-off time generation circuit, the output terminal of the second inverter is connected to the input terminal of the third inverter, and the output terminal of the third inverter is used to output the output signal of the turn-off time generation circuit.

8. A chip, applied to a DC-DC converter, characterized in that,The chip includes the turn-off time generation circuit described in any one of claims 1-7.

Citation Information

Patent Citations

  • Self-excited step-down type dc-dc converter

    JP1997051672A