Integrated circuit efficient test mode reselection method and apparatus based on joint classification
By optimizing the test vector set using K-means clustering and the mRMR algorithm, and combining it with an SVM classifier to select the optimal test set, the problem of test vector redundancy in integrated circuit testing is solved, resulting in shorter testing time and lower costs.
Patent Information
- Application Number
- CN202310154645.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-02-17
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2043-02-17
AI Technical Summary
The test vector redundancy problem in integrated circuit testing leads to excessively long testing time and increased costs.
An effective test mode reselection method for integrated circuits based on joint classification is adopted. The test vector set is preprocessed by K-means clustering and mRMR algorithm to delete useless test vectors, and the optimal test set is selected by SVM classifier.
Reduce test vector redundancy, shorten test time, improve the testing efficiency of faulty chips, and effectively reduce test costs.
Smart Images

Figure CN116125252B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of integrated circuit testing, and more particularly to an integrated circuit effective test mode reselection method and device based on joint classification. BACKGROUND
[0002] With the rapid development of modern semiconductor technology, the research and manufacturing technology of very large scale integrated circuits (VISI) is becoming more and more mature. A common chip, even composed of hundreds of millions of transistors, is becoming a reality. As of the end of 2020, the rate of change in chip performance has increased by 69% compared to the past, and the verification of test programs is an important part of development.
[0003] For integrated circuit testing, the main process is as follows:
[0004] 1. Analyze and model the internal structure of the circuit to be tested, and use the test vector generation tool (Automatic Test Pattern Generation, ATPG) to generate test vectors for the circuit. In this process, the circuit is required to achieve a high fault coverage rate.
[0005] 2. After obtaining the test vectors, input the test vector set into the automatic test equipment ATE, and test each circuit to be tested. If the test vector hits any fault, it means that the chip has a problem and cannot be used. If the chip passes all test vectors, it means that the chip passes the test and has no fault, and the chip can be put into use.
[0006] Currently, the cost of automatic test equipment ATE is high, and the technology is high, and the cost of upgrading is huge. However, with the rapid development of CMOS technology, the larger the chip manufacturing scale, the more test vectors the automatic test equipment (ATE) can use to cope with, which directly leads to a sharp increase in the number of test vectors in testing, greatly increasing the power consumption of the chip and the risk of damage to the chip during testing. For example, Chinese patent publication No. CN112083321A discloses a circuit test method, storage medium and device based on a hidden Markov model, which reorders the test vectors to reduce the flipping between test vectors, thereby avoiding high circuit temperature and reducing the risk of damaging the chip, and improving the reliability of the test. However, when generating test vectors, many test vectors will detect multiple identical faults, that is, many test vectors contain a lot of repeated information, which leads to the problem of test vector redundancy, resulting in long test time and low efficiency, and rising test costs. Only by fully utilizing existing equipment and optimizing the test set can the test vector redundancy be reduced, the test time be reduced, the test efficiency of faulty chips be improved, and the test cost be effectively reduced. SUMMARY
[0007] The technical problem to be solved by the present application is how to reduce test vector redundancy, reduce test time, improve the test efficiency of faulty chips and effectively reduce test cost in the integrated circuit test process.
[0008] The present application solves the above technical problems by the following technical means: an integrated circuit effective test mode reselection method based on joint classification, which comprises the following steps:
[0009] Step one: generating a test vector set of the circuit by using a test vector generation tool;
[0010] Step two: injecting faults into the circuit to determine whether the circuit has faults, and taking the result as a target result;
[0011] Step three: pre-processing the test vector set by K-means clustering, deleting useless test vectors, and performing the mRMR algorithm under different weighting conditions on the remaining test vectors without weighting, and calculating the MIQ value of each test vector each time the mRMR algorithm is executed, and rearranging the test vectors in descending order according to the MIQ value to obtain multiple groups of candidate feature subsets;
[0012] Step four: inputting the multiple groups of candidate feature subsets into the SVM classifier, taking the candidate feature subset with the highest classification accuracy and the lowest dimension as the optimal test set, and performing circuit test, comparing the test result with the target result, if they are the same, adopting the optimal test set for subsequent circuit test, if they are different, returning to step three to reselect features until the test result is the same as the target result or the preset iteration number is reached.
[0013] Beneficial effects: the present application pre-processes the test vector set by K-means clustering, deletes useless test vectors, and selects multiple groups of candidate feature subsets by using the mRMR algorithm, and inputs the multiple groups of candidate feature subsets into the SVM classifier, takes the candidate feature subset with the highest classification accuracy and the lowest dimension as the optimal test set, thereby greatly reducing test vector redundancy, reducing test time, improving the test efficiency of faulty chips, and effectively reducing test cost.
[0014] Further, the test vector generation tool in step one is ATPG.
[0015] Further, the step two comprises:
[0016] Injecting faults into the circuit, inputting the test vector set into the automatic test equipment ATE, testing each to-be-tested circuit, if the test vector hits any fault, it means that the to-be-tested circuit has a fault; if the to-be-tested circuit passes all test vectors, it means that the to-be-tested circuit passes the test and has no fault, and taking the fault discrimination result as the target result.
[0017] Further, the step three comprises:
[0018] The test vector set is preprocessed by K-means clustering, useless test vectors are deleted, and the correlation I(x i ; c) between each remaining test vector and the target category c is calculated. If the test vector with the maximum correlation I(x i ; c) is greater than or equal to the correlation threshold μ, the mRMR algorithm is executed, and the test vectors are reordered in descending order according to the MIQ values to obtain a set of candidate feature subsets. If the test vector with the maximum correlation I(x i ; c) is less than the correlation threshold μ, the mRMR algorithm with the introduction of the feature correlation redundancy weight factor α is executed, the MIQ values are calculated after weighting each test vector, the test vectors are reordered in descending order according to the MIQ values, and multiple sets of candidate feature subsets are obtained by recalculating the MIQ values of the test vectors under different weighting values and reordering the test vectors in descending order.
[0019] Further, the target category is the set of test vectors remaining after the deletion of useless test vectors by K-means clustering.
[0020] Further, the K-means clustering comprises:
[0021] Step 311: Selecting k test vectors from n test vectors as clustering centers;
[0022] Step 312: According to the remaining n-k test vectors, calculating the distance of each test vector to the clustering center, assigning each test vector to the nearest clustering center, and forming k clusters;
[0023] Step 313: Calculating the mean of each test vector in the current cluster as the clustering center of the cluster, and obtaining k new clustering centers;
[0024] Step 314: Returning to execute steps 312 to 313 until the clustering result does not change, and then stopping the clustering;
[0025] Step 315: According to the preset condition, screening the test vectors, and deleting the useless test vectors.
[0026] Further, the step three further comprises:
[0027] The greater the MIQ value, the stronger the correlation between the test vector and the target category c, and the smaller the redundancy between the test vectors. Therefore, the test vectors with MIQ values lower than the preset value are deleted, and the remaining test vectors are reordered in descending order according to the MIQ values.
[0028] Further, the correlation threshold μ is calculated as follows:
[0029] The correlation threshold is obtained by the formula where N is the total number of test vectors after removing the useless test vectors after K-means clustering.
[0030] Further, if the test vector with the maximum correlation is less than the correlation threshold, the mRMR algorithm with the introduction of the feature correlation redundancy weight factor α is executed, the MIQ value is calculated after weighting each test vector, and the test vectors are reordered in descending order according to the MIQ value to obtain a set of candidate feature subsets, and the MIQ value is recalculated for the test vectors under different weighting values and the test vectors are reordered in descending order to obtain multiple sets of candidate feature subsets, including:
[0031] Step 321: When I(x i ; c) < μ, the MIQ value is recalculated after weighting each test vector;
[0032] Step 322: The test vectors after recalculating the MIQ value are sorted in descending order according to the MIQ value to obtain a set of candidate feature subsets;
[0033] Step 323: Return to execute steps 321 to 322, reweight each test vector, recalculate the MIQ value corresponding to the test vector under different weighting values, and obtain multiple sets of candidate feature subsets.
[0034] The application also provides an integrated circuit effective test mode reselection device based on joint classification, which comprises:
[0035] A test vector set generation module generates a test vector set of the circuit by using a test vector generation tool;
[0036] A fault judgment module is used for fault injection of the circuit, judges whether the circuit has a fault, and serves as a target result;
[0037] A data preprocessing module is used for preprocessing the test vector set by K-means clustering, removing useless test vectors, and executing the mRMR algorithm under multiple weighting conditions without weighting and multiple times on the remaining test vectors, calculating the MIQ value of each test vector each time the mRMR algorithm is executed, and reordering the test vectors in descending order according to the MIQ value to obtain multiple sets of candidate feature subsets;
[0038] The training module is configured to input a plurality of candidate feature subsets into the SVM classifier respectively, select a candidate feature subset with the highest classification accuracy and the lowest dimension as an optimal test set, perform circuit test, compare the test result with the target result, and if the test result is the same as the target result, adopt the optimal test set for subsequent circuit test, and if the test result is different from the target result, return to the data preprocessing module to perform feature selection again until the test result is the same as the target result or a preset iteration number is reached.
[0039] Further, the test vector generation tool in the test vector set generation module is ATPG.
[0040] Further, the fault judgment module is further configured to:
[0041] The circuit is subjected to fault injection, and the test vector set is input into the automatic test equipment (ATE), each circuit under test is tested, if the test vector hits any fault, it indicates that the circuit under test has a fault, if the circuit under test passes all test vectors, it indicates that the circuit under test passes the test and has no fault, and the fault discrimination result is taken as the target result.
[0042] Further, the data preprocessing module is further configured to:
[0043] The test vector set is preprocessed by K-means clustering, useless test vectors are deleted, and the correlation I(x i ; c) between each remaining test vector and the target category c is calculated, if the test vector with the maximum correlation I(x i ; c) is greater than or equal to a correlation threshold μ, the mRMR algorithm is executed, the test vectors are rearranged in descending order according to the size of the MIQ value to obtain a candidate feature subset, and if the test vector with the maximum correlation I(x i ; c) is less than the correlation threshold μ, the mRMR algorithm with the introduction of a feature correlation redundancy weight factor α is executed, the MIQ value is calculated after each test vector is weighted, the test vectors are rearranged in descending order according to the size of the MIQ value to obtain a candidate feature subset, and the MIQ value is recalculated for the test vectors under different weighting values and the test vectors are rearranged in descending order to obtain a plurality of candidate feature subsets.
[0044] Further, the target category is a set of test vectors remaining after the K-means clustering deletes useless test vectors.
[0045] Further, the K-means clustering comprises:
[0046] Step 311: Selecting k test vectors from n test vectors as clustering centers;
[0047] Step 312: according to the remaining n-k test vectors, the distance of each test vector to the cluster center is calculated, each test vector is assigned to the nearest cluster center, and k clusters are formed;
[0048] Step 313: for the clustered results, the mean value of each test vector in the current cluster is calculated as the cluster center of the cluster, and k new cluster centers are obtained;
[0049] Step 314: return to execute step 312 to step 313 until the clustering result does not change, and the clustering stops;
[0050] Step 315: for the test vectors in the clustering result, the test vectors are screened according to the preset condition, and the useless test vectors are deleted.
[0051] Further, the data preprocessing module is also used for:
[0052] The greater the MIQ value, the stronger the correlation between the test vector and the target category c, and the smaller the redundancy between the test vectors, and then the test vectors with MIQ values lower than the preset value are deleted, and the remaining test vectors are reordered in descending order according to the size of the MIQ value.
[0053] Further, the correlation threshold μ is calculated in the following way:
[0054] The correlation threshold is obtained by the formula , wherein N is the total number of test vectors remaining after deleting useless test vectors after K-means clustering.
[0055] Further, if the test vector with the maximum correlation is less than the correlation threshold, the mRMR algorithm with the introduction of the feature correlation redundancy weight factor α is executed, the MIQ value is calculated after weighting each test vector, and a set of candidate feature subsets is obtained by reordering the test vectors in descending order according to the size of the MIQ value, and the MIQ value of the test vector under different weighting values is recalculated and the test vector is reordered in descending order to obtain multiple sets of candidate feature subsets, including:
[0056] Step 321: when I(x i ; c) < μ, the MIQ value is recalculated after weighting each test vector;
[0057] Step 322: sort the test vectors after recalculating the MIQ value, and arrange them in descending order according to the size of the MIQ value to obtain a set of candidate feature subsets;
[0058] Step 323: return to execute step 321 to step 322, reweight each test vector, and recalculate the MIQ value of the test vector under different weighting values to obtain multiple sets of candidate feature subsets.
[0059] The present application has the advantages of:
[0060] (1) The present application pre-processes the test vector set by K-means clustering, deletes useless test vectors, and selects multiple groups of candidate feature subsets by using the mRMR algorithm, which are respectively input into the SVM classifier. The candidate feature subset with the highest classification accuracy and the lowest dimension is selected as the optimal test set, thereby greatly reducing the test vector redundancy, reducing the test time, improving the test efficiency of the faulty chip, and effectively reducing the test cost.
[0061] (2) The present application clusters and filters the features in the original test set by k-means clustering, deletes part of the useless test vectors, and simplifies the original test set, thereby avoiding the exhaustive search of the original test vector set during the selection of the subsequent test vectors, and improving the test efficiency.
[0062] (3) In the application process of the mRMR algorithm, the feature correlation threshold is set, the weakly correlated features are focused, the redundancy of the weakly correlated features is measured by different weights according to the correlation threshold, the optimal test vector set is selected by calculating the information entropy (MIQ) of each feature, and the selection of the feature set is further modified and improved by using the SVM classifier. In the whole process, the purpose of minimizing the test set and reordering the features in the test set is achieved, and the accuracy of the test mode selection is strengthened.
[0063] (4) The present application can more objectively achieve the test purpose of reducing the number of test modes and discovering faults earlier in the test process, is completely based on software, does not require additional hardware devices, reduces the test cost, and is practical. BRIEF DESCRIPTION OF DRAWINGS
[0064] Figure 1 The flowchart of the integrated circuit effective test mode reselection method based on joint classification disclosed by the embodiments of the present application. DETAILED DESCRIPTION
[0065] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and completely below in combination with the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.
[0066] Embodiment 1
[0067] The application provides an integrated circuit effective test mode reselection method based on joint classification, and the main idea is to comprehensively consider the redundancy of test vectors under the premise of not changing the fault coverage accuracy, to eliminate the redundancy of test vectors and reorder the test vectors according to the MIQ value of each test vector, so as to reduce the test time, improve the test efficiency and reduce the test cost. According to the characteristics and working process of the automatic test equipment (ATE), it can be known that the faults that can be detected by the test vector in the integrated circuit are fixed and will not change due to the change of the test vector sequence. However, different test vectors may hit the same fault, and a fault may be detected by multiple test vectors, so the method of eliminating the redundant test vectors and adjusting the loading sequence of the optimized test vectors can be used to preferentially load more test vectors with higher MIQ values, so that the fault coverage of the original test set can be basically maintained, and the fault detection time can be significantly shortened and the test efficiency can be improved. The main process of the method is as follows:
[0068] S1: generating a test vector set for the circuit according to the circuit description language by using a test vector generation tool (Automatic Test Pattern Generation, ATPG);
[0069] S2: injecting faults into the circuit, inputting the test vector set into the automatic test equipment (ATE), and testing each to-be-tested circuit, if the test vector hits any fault, it indicates that the to-be-tested circuit has a fault; if the to-be-tested circuit passes all test vectors, it indicates that the to-be-tested circuit passes the test and has no fault, and the fault discrimination result is taken as the target result;
[0070] S3: pre-processing the test vector set by K-means clustering, and deleting useless test vectors, and the K-means clustering has the following specific process:
[0071] Step 311: selecting k test vectors from n test vectors as clustering centers;
[0072] Step 312: calculating the distance from each test vector to the clustering center according to the remaining n-k test vectors, assigning each test vector to the nearest clustering center, and forming k clusters;
[0073] Step 313: calculating the mean of each test vector in the current cluster as the clustering center of the cluster, and obtaining k new clustering centers;
[0074] Step 314: returning to execute steps 312 to 313 until the clustering result does not change, and then stopping the clustering;
[0075] Step 315: According to the preset condition, the test vectors in the clustering result are screened, and the useless test vectors are deleted. In practical application, the useless vectors often appear in some categories obtained after classification, so the preset condition is to delete some test vectors of this category which are far away from the clustering center, and to retain the remaining test vectors. Then, other test vectors which are far away from the clustering center and hit the same fault are useless test vectors, and are deleted, wherein the distance is a standard of far away from the clustering center, and is preset according to actual situation.
[0076] Then, for the remaining test vectors after the above clustering and deletion of test vectors not meeting the preset condition, the correlation I(x i ; c) between each test vector and the target category c is calculated, and the calculation method is through the formula The correlation threshold μ is obtained, wherein N is the total number of test vectors remaining after deletion of useless test vectors after K-means clustering. The target category is a set of test vectors remaining after deletion of useless test vectors after K-means clustering.
[0077] If the test vector with the maximum correlation I(x i ; c) is greater than or equal to the correlation threshold μ, the mRMR algorithm is executed to calculate the MIQ value, the greater the MIQ value, the stronger the correlation between the test vector and the target category c, and the smaller the redundancy between the test vectors, then the test vectors with the MIQ value lower than the preset value are deleted, so that the test vectors with weak correlation and large redundancy are deleted, and the remaining test vectors are reordered in descending order according to the size of the MIQ value, to obtain a group of candidate feature subsets.
[0078] If the test vector with the maximum correlation I(x i ; c) is less than the correlation threshold μ, the mRMR algorithm with the introduction of the feature correlation redundancy weight factor α is executed, the MIQ value is calculated after each test vector is weighted, and a group of candidate feature subsets are obtained by reordering the test vectors in descending order according to the size of the MIQ value. The MIQ value is recalculated for the test vectors under different weighting values, and a plurality of groups of candidate feature subsets are obtained by reordering the test vectors in descending order. The specific process includes:
[0079] Step 321: When I(x i ; c) < μ, the MIQ value is recalculated after each test vector is weighted;
[0080] Step 322: The test vectors after recalculation of the MIQ value are sorted in descending order according to the size of the MIQ value, to obtain a group of candidate feature subsets;
[0081] Step 323: return to execute steps 321 to 322, reweight each test vector, recalculate the MIQ value corresponding to the test vector under different weighting values, reacquire the candidate feature subset, and obtain multiple groups of candidate feature subsets.
[0082] S4: multiple groups of candidate feature subsets are respectively input into the SVM classifier, the candidate feature subset with the highest classification accuracy and the lowest dimension is taken as the optimal test set, circuit testing is performed, the test result is compared with the target result, if the same, the optimal test set is adopted, and the optimal test set is used for testing the circuit subsequently, if different, S3 is returned to reselect features, until the test result is the same as the target result or a preset iteration number is reached. The optimal test set is input into the automatic test equipment (ATE).
[0083] Through the above technical scheme, the test vector set is preprocessed by K-means clustering, and useless test vectors are deleted, and multiple groups of candidate feature subsets are selected by using the mRMR algorithm, the multiple groups of candidate feature subsets are respectively input into the SVM classifier, the candidate feature subset with the highest classification accuracy and the lowest dimension is taken as the optimal test set, so that the test vector redundancy is greatly reduced, the test time is reduced, the test efficiency of the fault chip is improved, and the test cost is effectively reduced.
[0084] Embodiment 2
[0085] The application also provides an integrated circuit effective test mode reselection device based on joint classification, the device comprising:
[0086] A test vector set generation module generates a test vector set of the circuit by using a test vector generation tool;
[0087] A fault judgment module is used for fault injection on the circuit, and judges whether the circuit has a fault or not, and serves as a target result;
[0088] A data preprocessing module is used for preprocessing the test vector set by K-means clustering, deleting useless test vectors, and performing the mRMR algorithm on the remaining test vectors without weighting and multiple times under different weighting conditions. The MIQ value of each test vector is calculated each time the mRMR algorithm is executed, the test vectors are rearranged in descending order according to the MIQ value to obtain multiple groups of candidate feature subsets.
[0089] The training module is configured to input a plurality of candidate feature subsets into the SVM classifier respectively, select a candidate feature subset with the highest classification accuracy and the lowest dimension as an optimal test set, perform circuit test, compare the test result with the target result, and if the test result is the same as the target result, adopt the optimal test set for subsequent circuit test, and if the test result is different from the target result, return to the data preprocessing module to perform feature selection again until the test result is the same as the target result or a preset iteration number is reached.
[0090] Specifically, the test vector generation tool in the test vector set generation module is ATPG.
[0091] Specifically, the fault judgment module is further configured to:
[0092] The circuit is subjected to fault injection, and the test vector set is input into an automatic test equipment (ATE), each circuit under test is tested, if the test vector hits any fault, it indicates that the circuit under test has a fault, if the circuit under test passes all test vectors, it indicates that the circuit under test passes the test and has no fault, and the fault discrimination result is taken as the target result.
[0093] Specifically, the data preprocessing module is further configured to:
[0094] The test vector set is preprocessed by K-means clustering, useless test vectors are deleted, and the correlation I(x i ; c) between each remaining test vector and the target category c is calculated, if the test vector with the maximum correlation I(x i ; c) is greater than or equal to a correlation threshold μ, the mRMR algorithm is executed, the test vectors are reordered in descending order according to the size of the MIQ value to obtain a candidate feature subset, and if the test vector with the maximum correlation I(x i ; c) is less than the correlation threshold μ, the mRMR algorithm with a feature correlation redundancy weight factor α is executed, the MIQ value is calculated after each test vector is weighted, the test vectors are reordered in descending order according to the size of the MIQ value to obtain a candidate feature subset, and the MIQ value is recalculated for the test vectors under different weighting values and the test vectors are reordered in descending order to obtain a plurality of candidate feature subsets.
[0095] More specifically, the target category is a set of test vectors remaining after the K-means clustering deletes useless test vectors.
[0096] More specifically, the K-means clustering includes:
[0097] Step 311: Selecting k test vectors from n test vectors as clustering centers;
[0098] Step 312: according to the remaining n-k test vectors, the distance of each test vector to the cluster center is calculated, each test vector is assigned to the nearest cluster center, and k clusters are formed;
[0099] Step 313: for the clustered results, the mean of each test vector in the current cluster is calculated as the cluster center of the cluster, and k new cluster centers are obtained;
[0100] Step 314: return to execute step 312 to step 313 until the clustering result does not change, then stop clustering;
[0101] Step 315: according to the preset condition, the test vectors are screened for the test vectors in the clustering result, and the useless test vectors are deleted.
[0102] More specifically, the data preprocessing module is also used for:
[0103] The greater the MIQ value, the stronger the correlation between the test vector and the target category c, and the smaller the redundancy between the test vectors, then the test vectors with MIQ value lower than the preset value are deleted, and the test vectors are reordered in descending order according to the size of the MIQ value.
[0104] More specifically, the correlation threshold μ is calculated as:
[0105] The correlation threshold is obtained by formula , wherein N is the total number of test vectors remaining after deleting useless test vectors after K-means clustering.
[0106] More specifically, if the test vector with the maximum correlation is less than the correlation threshold, the mRMR algorithm with the introduction of feature correlation redundancy weight factor α is executed, the MIQ value is calculated after weighting each test vector, and a set of candidate feature subsets is obtained by reordering the test vectors in descending order according to the size of the MIQ value, the MIQ value of the test vector under different weighting values is recalculated, and a plurality of candidate feature subsets are obtained by reordering the test vectors in descending order, including:
[0107] Step 321: when I(x i ; c) < μ, the MIQ value is recalculated after weighting each test vector;
[0108] Step 322: sort the test vectors after recalculating the MIQ value, and arrange them in descending order according to the size of the MIQ value to obtain a set of candidate feature subsets;
[0109] Step 323: return to execute step 321 to step 322, reweight each test vector, recalculate the MIQ value of the test vector under different weighting values, and obtain a plurality of candidate feature subsets by reacquiring the candidate feature subsets.
[0110] The above examples are only used to illustrate the technical solutions of the present application, but not to limit the present application; although the present application has been described in detail with reference to the foregoing examples, those ordinarily skilled in the art should understand: the technical solutions recorded in the foregoing examples can be modified, or some technical features can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A method for reselecting effective test modes for integrated circuits based on joint classification, characterized in that, The method includes: Step 1: Use a test vector generation tool to generate a test vector set for the circuit; Step 2: Inject faults into the circuit to determine if a fault exists and use this as the target result; Inject faults into the circuit by inputting the test vector set into the automated test equipment (ATE) and testing each circuit under test. If any fault is hit by a test vector, it indicates that the circuit under test has a fault; If the circuit under test passes all test vectors, it indicates that the circuit under test has passed the test and no fault has occurred. Use the fault determination result as the target result. Step 3: Preprocess the test vector set using K-means clustering, removing useless test vectors. For the remaining test vectors, execute the mRMR algorithm both unweighted and with different weights. Calculate the MIQ value for each test vector during each mRMR execution. Rearrange the test vectors in descending order of their MIQ values to obtain multiple candidate feature subsets. The specific process is as follows: The test vector set is preprocessed using K-means clustering to remove useless test vectors, and the correlation I(x) between each remaining test vector and the target class c is calculated. i c) If the correlation I(x) i c) If the largest test vector is greater than or equal to the relevance threshold μ, then the mRMR algorithm is executed, and the test vectors are rearranged in descending order according to the MIQ value to obtain a set of candidate feature subsets; if the relevance I(x i c) If the largest test vector is less than the relevance threshold μ, the mRMR algorithm with a feature relevance redundancy weighting factor α is executed. Each test vector is weighted, and the MIQ value is calculated. The test vectors are then rearranged in descending order according to their MIQ values to obtain a set of candidate feature subsets. The MIQ values are recalculated for test vectors with different weighting values, and the test vectors are rearranged in descending order to obtain multiple sets of candidate feature subsets. A larger MIQ value indicates a stronger correlation between the test vector and the target category c, and less redundancy between test vectors. Therefore, test vectors with MIQ values lower than a preset value are deleted, and the remaining test vectors are rearranged in descending order according to their MIQ values. The relevance threshold μ is calculated using the formula... Obtain the relevance threshold, where N is the total number of test vectors remaining after deleting useless test vectors following K-means clustering; Step 4: Input multiple candidate feature subsets into the SVM classifier. Select the candidate feature subset with the highest classification accuracy and the lowest dimensionality as the optimal test set for circuit testing. Compare the test results with the target results. If they are the same, the optimal test set is adopted and the circuit is subsequently tested using the optimal test set. If they are different, return to step 3 to reselect features until the test results are the same as the target results or the preset number of iterations is reached.
2. The integrated circuit effective test mode reselection method based on joint classification according to claim 1, characterized in that, The test vector generation tool in step one is ATPG.
3. The integrated circuit effective test mode reselection method based on joint classification according to claim 1, characterized in that, The target category is the set of test vectors remaining after K-means clustering removes useless test vectors.
4. The method for reselecting effective test modes of integrated circuits based on joint classification according to claim 1, characterized in that, The K-means clustering includes: Step 311: Select k test vectors from the n test vectors as cluster centers; Step 312: Based on the remaining nk test vectors, calculate the distance from each test vector to the cluster center, and assign each test vector to the nearest cluster center to form k clusters; Step 313: For the clustering results, calculate the mean of each test vector in each current cluster, and use it as the cluster center of that cluster to obtain k new cluster centers; Step 314: Return to steps 312 and 313 until the clustering results remain unchanged, at which point the clustering process stops; Step 315: For the test vectors in the clustering results, filter the test vectors according to preset conditions and delete the useless test vectors.
5. The method for reselecting effective test modes of integrated circuits based on joint classification according to claim 1, characterized in that, If the test vector with the highest relevance is less than the relevance threshold, the mRMR algorithm with a feature relevance redundancy weighting factor α is executed. Each test vector is weighted, and the MIQ value is calculated. The test vectors are then rearranged in descending order according to their MIQ values to obtain a set of candidate feature subsets. The MIQ values are recalculated for test vectors with different weighting values, and the test vectors are rearranged in descending order to obtain multiple sets of candidate feature subsets, including: Step 321: When I(x) i When c) < μ, recalculate the MIQ value after weighting each test vector; Step 322: Sort the test vectors after recalculating the MIQ values in descending order of MIQ values to obtain a subset of candidate features; Step 323: Return to steps 321 to 322, reweight each test vector, recalculate the MIQ value corresponding to the test vector under different weighting values, re-obtain the candidate feature subset, and obtain multiple sets of candidate feature subsets.
6. An integrated circuit effective test mode reselection device based on joint classification, characterized in that, The device includes: The test vector set generation module uses a test vector generation tool to generate the test vector set for the circuit. The fault diagnosis module is used to inject faults into the circuit to determine whether the circuit has a fault, and to take the fault diagnosis result as the target result. To inject faults into the circuit, the test vector set is input into the automated test equipment (ATE). Each circuit under test is tested. If any fault is hit by the test vector, it means that the circuit under test has a fault. If the circuit under test passes all test vectors, it means that the circuit under test has passed the test and there is no fault. The fault diagnosis result is taken as the target result. The data preprocessing module is used to preprocess the test vector set using K-means clustering, remove useless test vectors, and execute the mRMR algorithm on the remaining test vectors, both unweighted and with different weights. Each execution of the mRMR algorithm calculates the MIQ value for each test vector, and the test vectors are rearranged in descending order according to their MIQ values to obtain multiple candidate feature subsets. The data preprocessing module also includes: The test vector set is preprocessed using K-means clustering to remove useless test vectors, and the correlation I(x) between each remaining test vector and the target class c is calculated. i c) If the correlation I(x) i c) If the largest test vector is greater than or equal to the relevance threshold μ, then the mRMR algorithm is executed, and the test vectors are rearranged in descending order according to the MIQ value to obtain a set of candidate feature subsets; if the relevance I(x i c) If the largest test vector is less than the relevance threshold μ, the mRMR algorithm with a feature relevance redundancy weighting factor α is executed. Each test vector is weighted, and the MIQ value is calculated. The test vectors are then rearranged in descending order according to their MIQ values to obtain a set of candidate feature subsets. The MIQ values are recalculated for test vectors with different weighting values, and the test vectors are rearranged in descending order to obtain multiple sets of candidate feature subsets. A larger MIQ value indicates a stronger correlation between the test vector and the target category c, and less redundancy between test vectors. Therefore, test vectors with MIQ values lower than a preset value are deleted, and the remaining test vectors are rearranged in descending order according to their MIQ values. The relevance threshold μ is calculated using the formula... Obtain the relevance threshold, where N is the total number of test vectors remaining after deleting useless test vectors following K-means clustering; The training module is used to input multiple candidate feature subsets into the SVM classifier. The candidate feature subset with the highest classification accuracy and lowest dimensionality is selected as the optimal test set for circuit testing. The test results are compared with the target results. If they are the same, the optimal test set is adopted and the circuit is subsequently tested using the optimal test set. If they are different, the system returns to the data preprocessing module to reselect features until the test results are the same as the target results or the preset number of iterations is reached.
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