FPGA-based configurable general slope processing method

Abstract

The application discloses a configurable general slope processing method based on FPGA. The method realizes the calculation of the slope by parameterizing the configuration of a sensor target surface, sub-aperture arrangement and sub-aperture size. When the parameterized configuration slope memory module is configured, only the memory space of image width*2 bits is needed, the consumption of on-chip resources is greatly reduced, and the stability and robustness of the system are increased. The application has high portability and can be applied to multiple engineering projects.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of adaptive optical system, and particularly relates to a configurable general slope processing method based on FPGA. BACKGROUND

[0002] The adaptive optical system compensates the wavefront aberration by detecting the wavefront aberration of the system in real time, controlling the optical element of the system in real time and compensating the wavefront distortion in real time. The adaptive optical system mainly comprises a wavefront sensor, a wavefront processor and a wavefront corrector. The wavefront sensor is responsible for collecting the wavefront phase information, and different types of wavefront sensors are generated according to different detection methods and principles, such as a shearing interferometer sensor, a curvature sensor and a Shack-Hartmann sensor. The Shack-Hartmann sensor is a kind of wavefront sensor widely used in the AO system, and has the advantages of simple structure, few peripheral components, good flexibility and high light energy utilization rate.

[0003] The present application adopts the Shack-Hartmann wavefront sensor, and the incident light forms a sub-spot in the sensor imaging system after passing through the microlens array. The shift amount of the light spot position is measured in real time by the wavefront processor. The measurement of the wavefront slope is an important part of the wavefront processor. The calculation of the wavefront slope is related to the arrangement of the sub-aperture, the target surface of the sensor and the size of the sub-aperture. Therefore, different target surfaces of the system, different sub-aperture arrangements and different sub-aperture sizes need to be redesigned and the slope module needs to be programmed. The present application proposes a configurable general slope processing method based on FPGA for different target surfaces, different sub-aperture arrangements and different sub-aperture sizes. The method can parameterize the configuration of the sub-aperture arrangement, the sub-aperture pixel size and the target surface size for different systems. The method can be applied to different systems, and in order to reduce the resources of the system, the memory resources of the slope processing based on FPGA are reduced to the target surface width*2bit. The method can still be well applied to the Hartmann image with more than K-level resolution, and greatly reduces the system integration and debugging time. The portability of the method is high and easy to implement.

[0004] The present application has great significance for the signal processing of the adaptive optical system. The method can greatly reduce the system debugging time, shorten the research and development cycle, make the adaptive optical system very flexible, and realize the slope processing calculation of different target surfaces, different sub-aperture arrangements and different sub-aperture sizes by parameterization configuration. The method meets the real-time requirement and has important significance for the control problem of the adaptive optical system. SUMMARY

[0005] The application aims at different target surface sizes, different sub-aperture arrangements and different sub-aperture sizes in an adaptive optical system, and proposes a configurable general slope processing method based on FPGA.

[0006] The application adopts the technical scheme of a configurable general slope processing method based on FPGA, which solves the problems of different target surface sizes, different sub-aperture arrangements and different sub-aperture sizes, and adopts a general slope processing method.

[0007] Step 1: parameterize configuration of a target surface (Width*Width), sub-aperture arrangement (ARG_SUB) and sub-aperture size (Subhole_pixel);

[0008] Step 2: design a memory size of the slope processing module as Width*2bit; determine a sub-aperture effective signal (SUB_VALID), a sub-aperture pixel row end signal (SUB_PIX_END) and a sub-aperture end signal (SUB_END) through FPGA logic processing and sub-aperture size, and also determine an X-direction address (Sub_Xaddr) and a Y-direction address (Sub_Yaddr) of the sub-aperture according to the above signals;

[0009] Step 3: calculate gxmul_sig according to a pixel gray value of a sensor, the X-direction address (Sub_Xaddr) and the Y-direction address (Sub_Yaddr) of the sub-aperture, accumulate gxmul_sig to gxacc_sig, accumulate gxacc_sig when the sub-aperture is effective, and clear when the last pixel in the last sub-aperture in a pixel row is effective;

[0010] Step 4: according to gxacc_sig, when the sub-aperture pixel row end signal arrives, assign gxacc_sig to xacc_pre_sig; then at the end of the sub-aperture pixel row, assign xacc_pre_sig to xacc_sec_sig, subtract xacc_sec_sig from xacc_pre_sig to obtain xacc_thr_sig;

[0011] Step 5: judging whether it is the first pixel line of each sub-aperture line through a signal, if it is the first pixel line, xacc_lastlv_sig is 0, otherwise the signal remains;

[0012] Step 6: adding the output of step 4 and the output of step 5 to obtain xacc_fou_sig;

[0013] Step 7: delaying xacc_fou_sig through a shift register to obtain xacc_lastlv_sig;

[0014] Step 8: when the sub-aperture end signal (SUB_END) is obtained, xacc_fou_sig is assigned to xacc_ram_sig, the calculation of the y-direction accumulation sum and iacc accumulation sum is consistent with the above process, and the above steps are repeated;

[0015] Step 9: sending xacc_ram_sig and yacc_ram_sig into a division module to finally obtain the division results slop_x and slop_y.

[0016] The principle of the present application is that:

[0017] A configurable general slope processing method based on FPGA, as shown in Figure 1 The real-time image data is input through a wavefront sensor, the sub-aperture effective signal (SUB_VALID) is determined according to the image target width (Width), the sub-aperture size (Subhole_pixel) and the sub-aperture arrangement (ARG_SUB), the sub-aperture pixel line end signal (SUB_PIX_END) is determined, all sub-aperture end signals (SUB_END) are determined through the sub-aperture size (Subhole_pixel), the X-direction address of the sub-aperture (Sub_Xaddr) is determined according to the signals, the Y-direction address of the sub-aperture (Sub_Yaddr) is determined, and finally the slope data is calculated according to the above signals.

[0018] The processing machine of the adaptive optical system comprises a slope processing module, at this time, the ARG_SUB (sub-aperture arrangement), the Width*Width (image target surface), and the Subhole_pixel (sub-aperture pixel size) in the slope processing module are parameterized, the above parameters are loaded by the upper computer, the memory of the slope processing module is designed, the SUB_VALID (sub-aperture effective signal), the SUB_PIX_END (sub-aperture pixel row end signal), and the SUB_END (sub-aperture end signal) are determined, the data of the sensor is traversed by the FPGA in the form of pixel clock row scanning according to the above signals, the xacc_ram_sig (X direction cumulative sum), the yacc_ram_sig (Y direction cumulative sum), and the iacc_ram_sig (cumulative sum of the whole frame image) are calculated, the division calculation is performed, and finally the slope (x_slop, y_slop) of the sub-aperture is calculated. The slope of the sub-aperture is calculated in this way, the resources of the system can be greatly reduced during design, the development cycle of the system is reduced, the flexibility of the system is increased through the parameterized configuration, and the system can be applied to different adaptive optical systems by only modifying the optical parameters.

[0019] Compared with the prior art, the present application has the following advantages:

[0020] (1) The slope processing module is configured by parameters in the present application, the flexibility of the system is greatly increased, and the development cycle of the developer is greatly reduced.

[0021] (2) The sub-aperture effective signal, the sub-aperture pixel row end signal, and the sub-aperture end signal are determined by hardware in the present application, and the memory resources of the slope processing module are greatly reduced.

[0022] (3) The present application adopts a pipeline mode for calculation, improves the real-time performance of the system, and lays a foundation for subsequent recovery and control of the adaptive optical system.

[0023] (4) In the slope processing design, the size of the required memory resources is only related to the width of the image, and this method can greatly reduce the memory resources, shorten the development cycle, and also enable the system to obtain higher resolution.

[0024] (5) The present application has good universality, can be well applied to actual engineering projects, and is easy to implement. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 The working process of the present application is a configurable and universal slope processing method based on FPGA;

[0026] Figure 2A sub-aperture arrangement diagram for an adaptive optical system;

[0027] Figure 3 An example diagram for designing a slope memory;

[0028] Figure 4 A timing diagram for slope processing. DETAILED DESCRIPTION

[0029] The present application is further illustrated below in conjunction with the accompanying drawings and detailed description.

[0030] Figure 2 A sub-aperture arrangement diagram for a real adaptive optical system wavefront detector is shown, the sensor target surface size is 864*864 pixels, the sub-aperture size is 60 pixels, the sub-aperture arrangement is 14*14, the sensor frame frequency is 1600 Hz, according to the optical parameter information, the memory size of the slope module is determined to be 864*2bit, as shown in Figure 3 Data 1 represents the sub-aperture effective signal (SUB_VALID), data 2 represents the sub-aperture pixel row end signal (SUB_PIX_END), and finally the sub-aperture end signal (SUB_END) is designed according to the FPGA logic processing. At the same time, the X direction address (Sub_Xaddr) and the Y direction address (Sub_Yaddr) are determined according to the pixel size of the sub-aperture, the sensor data is scanned row by row through the pixel clock according to the above signals, the X direction cumulative sum (xacc_ram_sig), the Y direction cumulative sum (yacc_ram_sig) and the gray scale sum (iacc_ram_sig) in the sub-aperture are calculated. According to the cumulative sum, the division operation is realized, and finally the slopes (x_slop, y_slop) of all sub-apertures are determined.

[0031] A configurable general slope processing method based on FPGA is adopted Figure 1 The processing flow of the slope module of the adaptive optical system is shown, the Hartmann image data is calculated for slope, and the specific determination method and implementation steps are as follows:

[0032] Step 1: parameterize the target surface (Width*Width), the sub-aperture arrangement (ARG_SUB), and the sub-aperture size (Subhole_pixel);

[0033] Step 2: The memory size of the slope processing module is designed as Width*2bit; the sub-aperture effective signal (SUB_VALID), the sub-aperture pixel row end signal (SUB_PIX_END), the sub-aperture end signal (SUB_END) are determined through FPGA logic processing and sub-aperture size, and the X direction address (Sub_Xaddr) and Y direction address (Sub_Yaddr) of the sub-aperture are also determined according to the above signals;

[0034] Step 3: According to the pixel gray value of the sensor, the X direction address (Sub_Xaddr) and Y direction address (Sub_Yaddr) of the sub-aperture, the gxmul_sig is calculated, the gxmul_sig is accumulated to the gxacc_sig, and the gxacc_sig is accumulated when the sub-aperture is effective; the last pixel in the last sub-aperture in a pixel row is effective, and the gxacc_sig is cleared;

[0035] Step 4: According to the gxacc_sig, when the sub-aperture pixel row end signal arrives, the gxacc_sig is assigned to the xacc_pre_sig; then at the end of the sub-aperture pixel row, the xacc_pre_sig is assigned to the xacc_sec_sig, and the xacc_thr_sig is obtained by subtracting the xacc_pre_sig from the xacc_sec_sig;

[0036] Step 5: Whether it is the first pixel row of each sub-aperture row is determined through the signal, if it is the first pixel row, the xacc_lastlv_sig is 0, otherwise the signal is kept;

[0037] Step 6: The xacc_fou_sig is obtained by adding the output of step 4 and the output of step 5;

[0038] Step 7: The xacc_fou_sig is delayed through the shift register to obtain the xacc_lastlv_sig;

[0039] Step 8: When the sub-aperture end signal (SUB_END) arrives, the xacc_fou_sig is assigned to the xacc_ram_sig, the y direction accumulation and the calculation of the sub-aperture gray value iacc are consistent with the above process, and the above steps are repeated;

[0040] Step 9: The xacc_ram_sig and yacc_ram_sig are sent into the division module, and finally the division results slop_x and slop_y are obtained.

[0041] According to the proposed method, the slope of the sub-aperture is calculated, such as Figure 4The time sequence diagram for calculating the slope is shown, the method can greatly reduce the memory resources, and realizes the transplantation of the system through the configurable mode.

[0042] In conclusion, the application can realize the configurable parameterized slope calculation, when the adaptive optical system is changed, only the parameters required by the parameterized configuration are needed to complete the slope acquisition. The robustness and flexibility of the mode are very strong. At the same time, the signal processing aspect of the adaptive optical system has important significance.

Claims

1. A configurable universal slope processing method based on FPGA, characterized by: The slope of the subaperture is calculated based on the sensor parameters, optical parameters, subaperture arrangement, and subaperture pixel size of the adaptive optics system. The specific steps are as follows: Step 1: Parameterize the target surface, sub-aperture arrangement, and sub-aperture size; Step 2: Design the memory size of the slope processing module to Width 2bit; determine the subaperture valid signal and the subaperture pixel row end signal, determine the subaperture end signal through FPGA logic processing and subaperture size, and also determine the X-direction address and Y-direction address of the subaperture based on the above signals; Step 3: Calculate gxmul_sig based on the pixel grayscale value of the sensor, the X-direction address and the Y-direction address of the sub-aperture, and add gxmul_sig to gxacc_sig. Gxacc_sig is accumulated when the sub-aperture is valid; clear it to zero when the last pixel in the last sub-aperture in a pixel row is valid. Step 4: According to gxacc_sig, when the sub-aperture pixel row end signal arrives, assign gxacc_sig to xacc_pre_sig; then at the end of the sub-aperture pixel row, assign xacc_pre_sig to xacc_sec_sig, and subtract them to obtain xacc_thr_sig; Step 5: Determine whether it is the first pixel row of each sub-aperture row through the signal. If it is the first pixel row, xacc_lastlv_sig is 0, otherwise the signal remains unchanged. Step 6: Add the output of step 4 and the output of step 5 to obtain xacc_fou_sig; Step 7: Delay xacc_fou_sig through the shift register to obtain xacc_lastlv_sig; Step 8: When the sub-aperture ends, assign xacc_fou_sig to the X-direction cumulative sum xacc_ram_sig. The calculation of the Y-direction cumulative sum yacc_ram_sig and the image grayscale cumulative sum iacc_ram_sig is consistent with the above process. Repeat the above steps. Step 9: Send the accumulated sum xacc_ram_sig in the x-direction and the accumulated sum yacc_ram_sig in the y-direction to the division module, and finally obtain the division results slop_x and slop_y, and finally calculate the slope of the sub-aperture (x_slop, y_slop).

2. The configurable universal slope processing method based on FPGA according to claim 1, characterized in that: This method is only related to the target surface of the sensor when designing the memory of the slope module.

3. The configurable universal slope processing method based on FPGA according to claim 1, characterized in that: This method realizes the slope calculation of the system by loading different parameters such as target surface, sub-aperture arrangement and sub-aperture size through the host computer.

4. The configurable universal slope processing method based on FPGA according to claim 1, characterized in that: This method can easily realize system transplantation through parameterized modification.

5. The configurable universal slope processing method based on FPGA according to claim 1, characterized in that: When designing the memory of the slope module, it is only related to the target surface of the system. When designing the system, real-time calculation of the K-level system can be achieved.

6. The configurable universal slope processing method based on FPGA according to claim 1, characterized in that: This method adopts a pipeline approach with a delay of one pixel row cycle, which meets the real-time requirements of the system.

7. The configurable universal slope processing method based on FPGA according to claim 1, characterized in that: In the design of sub-aperture effective signal, sub-aperture pixel row end signal and sub-aperture end signal, FPGA-based logic design is adopted to increase the flexibility of the system.

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