A method for preventing over-reach tripping of a multi-point fault in a multi-power supply power distribution network

Abstract

The application discloses a method for preventing grade jumping trip of multi-point fault of multi-power distribution network, after detecting the fault, real-time calculation and record of the fault power direction, when the fault occurs in the positive direction of protection, sending the blocking signal to the bus side, when the fault occurs in the reverse direction of protection, sending the blocking signal to the tie side, when the detected fault power direction element only has a single direction, keeping the blocking signal output unchanged, when the positive direction of the fault power element and the reverse direction of the fault power element are detected at the same time, according to the power element direction and the received signal, adjusting the blocking signal output, not receiving the blocking signal, blocking release or receiving the blocking signal but exceeding the total timeout, the protection action outlet. The scheme is simple in configuration and clear in structure, through the fault power direction element judgment and the protection blocking signal, the relay blocking signal and the release blocking signal interaction, the selectivity of the protection action is ensured, the fast positioning and reliable isolation function of the multi-point fault of the multi-power distribution network are realized.

Description

Technical Field

[0001] This invention belongs to the field of power system technology, specifically relating to a method for preventing cascading tripping in multi-point faults in multi-source power distribution networks. Background Technology

[0002] Low-current grounding systems refer to three-phase systems where the neutral point is ungrounded or grounded through an arc-suppression coil and high impedance. Also known as indirect neutral-point grounding systems, they are characterized by high power supply reliability and minimal impact on equipment during faults, and are widely used in domestic power distribution networks. In low-current grounding systems, when a single-phase ground fault occurs, the line voltages between the three phases remain symmetrical, allowing continued operation for a period. However, due to the increased voltage of the healthy phase after a single-phase ground fault, weak points in the insulation may be broken down and discharged, leading to multi-point grounding faults. Simultaneously, due to the harsh working environment of power distribution networks, most lines are exposed for extended periods, making them susceptible to natural disasters such as strong winds, rain, and lightning, as well as external damage from birds, trees, motor vehicles, and theft, leading to multi-point short-circuit faults.

[0003] Traditional anti-cascading tripping systems can only handle cascading tripping in single-source radial power supply networks. In single-source radial power supply networks, the superior-subordinate relationship between each line is clear relative to the power source. However, in multi-source distribution networks, the superior-subordinate relationship between each line is not fixed and changes with the operating mode and the location of the fault. This places higher demands on fault location and interlocking logic. Moreover, traditional anti-cascading tripping systems only consider single-point fault handling and do not consider the complex situations of multi-point faults and developmental faults. Summary of the Invention

[0004] The technical problem to be solved by the embodiments of the present invention is to provide a method for preventing cascading tripping in multi-point faults in multi-power distribution networks, which ensures the selectivity of protection actions without sacrificing the speed of the upper-level protection action, and realizes the function of rapid location and reliable isolation of multi-point faults in multi-power distribution networks.

[0005] To achieve the above objectives, the present invention provides a method for preventing cascading tripping in multi-point faults in multi-power distribution networks, the method comprising the following steps:

[0006] (1) Collect system voltage and current data in real time and cache the system voltage data;

[0007] (2) After the fault is detected and the protection is activated, the fault power direction element is calculated and recorded, and the protection fault timing is started;

[0008] (3) When the fault occurs in the positive direction of the protection, a blocking signal is sent to the bus side; when the fault occurs in the reverse direction of the protection, a blocking signal is sent to the tie side.

[0009] (4) Calculate and record the fault power direction element in real time, and prevent incorrect power direction judgment during conversion faults;

[0010] (5) When the detected faulty power direction element has only one direction, the blocking signal output remains unchanged. When the positive direction of the faulty power element and the opposite direction of the faulty power element are detected at the same time, the blocking signal output is adjusted according to the power element direction and the received signal.

[0011] (6) After a protection fault is detected, if no lockout signal is received, the lockout is released, or a lockout signal is received but the total timeout period is exceeded, the protection action output will be activated and the transmission of protection lockout signals will be stopped.

[0012] As an improvement to this solution, the protection communication interface is configured in two areas with three configuration modes: bus side, tie side, and disabled. The bus side port exchanges information with the bus side ports of other protections on the bus, and the tie side port exchanges information with the tie side ports of the protection on the opposite side of the tie line. Unused communication ports are configured as disabled. If one area is the bus side or tie side and the other area is disabled, then the protection is a load. The interface function definition corresponds to the system wiring method, and the configuration is clear, simple, and not prone to errors.

[0013] As an improvement to this scheme, the power direction calculation method is as follows:

[0014] (1) Using the current transformer data and bus voltage transformer data at the installation location, when the system voltage is low, the directional element is selected with the cached memory voltage to eliminate the data dead zone of the directional element during a three-phase short circuit.

[0015] (2) The current transformer is arranged with the polarity end close to the busbar and the non-polarity end short-circuited to ensure that the current flowing into the busbar is negative and the current flowing out of the busbar is positive.

[0016] (3) The power direction element is connected at 90° and starts in phase. The phase comparison element is Uab^Ic, Ubc^Ia, Uca^Ib;

[0017] As an improvement to this solution, the duration T1 of the fault power direction element is confirmed to prevent the power direction element from jittering and causing incorrect judgment during a transitional fault.

[0018] This is an improvement to the original solution: the output logic for the protection action after a fault is as follows:

[0019] (1) When the fault power direction element is detected to be in the positive direction, no communication side blocking signal is received;

[0020] (2) When the reverse direction of the fault power direction element is detected, no bus-side blocking signal is received;

[0021] (3) If a blocking signal is received but the total timeout period has expired, the switch failure to operate will cause the entire system to trip.

[0022] As an improvement to this scheme, there are three types of signals for protecting the communication port: protection blocking signal, relay blocking signal, and unlocking signal.

[0023] As an improvement to this scheme, the logic for sending and stopping the protection interlocking signal is as follows:

[0024] (1) When the fault occurs in the positive direction of the anti-over-level trip protection device, a protection blocking signal is sent to the bus side port. When the fault occurs in the reverse direction of the anti-over-level trip protection device, a protection blocking signal is sent to the tie side port. The protection blocking signal is sent for at least T2 duration to prevent the protection blocking signal jitter from causing blocking failure and resulting in system over-level trip.

[0025] (2) When the fault occurs in both the forward and reverse directions of the anti-over-level trip protection device, and the bus side port no longer receives the protection blocking signal or the relay blocking signal, the protection blocking signal shall be stopped from being sent to the bus side port. When the connection side no longer receives the protection blocking signal or the relay blocking signal, the protection blocking signal shall be stopped from being sent to the connection side port.

[0026] (3) When the bus side port receives the unlocking signal, stop sending the protection lockout signal to the bus side port. When the tie side port receives the unlocking signal, stop sending the protection lockout signal to the tie side port to prevent the switch failure to operate and cause the entire system to trip.

[0027] (4) When one side port is set to "disabled", it will not receive protection lockout signals;

[0028] (5) After the switch where the anti-over-level trip protection device is located fails to operate for an extended period of time, the protection blocking signal sent to the bus side port and the protection blocking signal sent to the tie side port shall be stopped to prevent the switch failure to operate from causing the entire system to trip over-level.

[0029] As an improvement to this scheme, the logic for sending and stopping relay blocking signals is as follows:

[0030] (1) When the fault occurs in the positive direction of the anti-overlapping trip protection device, when it receives the protection blocking signal or the relay blocking signal of the tie side port, it sends the relay blocking signal to the bus side port. When the fault occurs in the opposite direction of the anti-overlapping trip protection device, when it receives the protection blocking signal or the relay blocking signal of the bus side port, it sends the relay blocking signal to the tie side port.

[0031] (2) When the fault occurs in both the forward and reverse directions of the anti-over-level trip protection device, and the bus side port no longer receives the protection blocking signal or the relay blocking signal, the relay blocking signal shall be stopped from being sent to the bus side port. When the tie side no longer receives the protection blocking signal or the relay blocking signal, the relay blocking signal shall be stopped from being sent to the tie side port.

[0032] (3) When the bus side port receives the unlock signal, it stops sending the relay lock signal to the bus side port. When the tie side port receives the unlock signal, it stops sending the relay lock signal to the tie side port.

[0033] (4) When one side port is set to "disabled", it will not receive relay blocking signals;

[0034] (5) After the overcurrent protection of the anti-overcurrent tripping protection device is activated, it stops sending relay blocking signals to the bus side port and stops sending relay blocking signals to the tie side port to prevent the switch from failing to operate and causing the entire system to trip.

[0035] As an improvement to this scheme, the logic for sending and stopping the unlocking signal is as follows:

[0036] (1) After the switch failure protection timeout, a release blocking signal is sent to the bus side port and the tie side port to prevent the switch failure from causing the entire system to trip.

[0037] (2) When the fault current disappears, the protection action returns and stops sending the unlocking signal.

[0038] Compared to existing technologies, this solution has the following advantages: The protection communication interface is configured with two zones and three configuration modes, with interface function definitions corresponding to system wiring methods, making configuration clear, simple, and less prone to errors; when the system voltage is low, the power direction element uses a cached memory voltage, eliminating the data dead zone of the direction element during three-phase short circuits; the fault power direction duration T1 is confirmed to prevent the power direction element from jittering and causing incorrect judgments during transitional faults; the protection blocking signal is sent for at least duration T2 to prevent blocking failure due to protection blocking signal jitter, leading to cascading tripping of the system; after the total timeout period, the transmission of the protection blocking signal stops and a release blocking signal is sent to prevent switch failure from causing cascading tripping of the entire system; the anti-cascading tripping system of this invention uses the fault power direction element judgment and the interaction of protection blocking signals, relay blocking signals, and release blocking signals to ensure the selectivity of protection actions without sacrificing the speed of protection action, achieving rapid location and reliable isolation of multi-point faults in multi-power distribution networks. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the process structure of the present invention;

[0041] Figure 2 This is a reference diagram of the anti-over-level tripping system according to Embodiment 1 of the present invention. Detailed Implementation

[0042] The following description of the embodiments is taken with reference to the accompanying drawings, which illustrate specific embodiments in which the invention can be implemented.

[0043] Example: Figure 1 The method for preventing cascading tripping in multi-point faults in multi-source power distribution networks, as shown, includes:

[0044] (1) Collect system voltage and current data in real time and cache the system voltage data;

[0045] (2) After the fault is detected and the protection is activated, the fault power direction element is calculated and recorded, and the protection fault timing is started;

[0046] (3) When a fault occurs in the positive direction of the protection element, a blocking signal is sent to the bus side; when a fault occurs in the reverse direction of the protection, a blocking signal is sent to the tie side.

[0047] (4) Calculate and record the fault power direction element in real time, and prevent incorrect power direction judgment during conversion faults;

[0048] (5) When the detected faulty power direction element has only one direction, the blocking signal output remains unchanged. When the positive direction of the faulty power element and the opposite direction of the faulty power element are detected at the same time, the blocking signal output is adjusted according to the power element direction and the received signal.

[0049] (6) After a protection fault is detected, if no lockout signal is received, the lockout is released, or a lockout signal is received but the total timeout period is exceeded, the protection action output will be activated and the transmission of protection lockout signals will be stopped.

[0050] The protection communication interface is configured in two zones with three configuration modes: bus side, tie side, and disabled. The bus side port exchanges information with the bus side ports of other protections on the bus, and the tie side port exchanges information with the tie side ports of the protection on the opposite side of the tie line. Unused communication ports are configured as disabled. If one zone is the bus side or tie side and the other zone is disabled, then the protection is a load. The interface function definition corresponds to the system wiring method, and the configuration is clear, simple, and not prone to errors.

[0051] The method for calculating power direction is as follows:

[0052] (1) Use the current transformer data and bus voltage transformer data at the installation location;

[0053] (2) The current transformer is arranged with the polarity end close to the busbar and the non-polarity end short-circuited to ensure that the current flowing into the busbar is negative and the current flowing out of the busbar is positive.

[0054] (3) The power direction element is connected at 90° and starts in phase. The phase comparison element is Uab^Ic, Ubc^Ia, Uca^Ib;

[0055] (4) When the system voltage is low, the directional element is selected with the cached memory voltage to eliminate the data dead zone of the directional element when the three-phase short circuit occurs.

[0056] The duration T1 of the fault power direction is confirmed to prevent the power direction element from jittering and causing incorrect judgment during a transitional fault.

[0057] The output logic for the protection action after a fault is as follows:

[0058] (1) When the fault power direction element is detected to be in the positive direction, no communication side blocking signal is received;

[0059] (2) When the reverse direction of the fault power direction element is detected, no bus-side blocking signal is received;

[0060] (3) If a blocking signal is received but the total timeout period has expired, the switch failure to operate will cause the entire system to trip.

[0061] There are three types of signals that protect the transmission of the communication port: protection blocking signal, relay blocking signal, and unlocking signal.

[0062] The logic for sending and stopping the protection interlock signal is as follows:

[0063] (1) When the fault occurs in the positive direction of the anti-over-level trip protection device, a protection blocking signal is sent to the bus side port. When the fault occurs in the reverse direction of the anti-over-level trip protection device, a protection blocking signal is sent to the tie side port. The protection blocking signal is sent for at least T2 duration to prevent the protection blocking signal jitter from causing blocking failure and resulting in system over-level trip.

[0064] (2) When the fault occurs in both the forward and reverse directions of the anti-over-level trip protection device, and the bus side port no longer receives the protection blocking signal or the relay blocking signal, the protection blocking signal shall be stopped from being sent to the bus side port. When the connection side no longer receives the protection blocking signal or the relay blocking signal, the protection blocking signal shall be stopped from being sent to the connection side port.

[0065] (3) When the busbar side port receives the unlock signal, it stops sending the protection lock signal to the busbar side port. When the tie side port receives the unlock signal, it stops sending the protection lock signal to the tie side port.

[0066] (4) When one side port is set to "disabled", it will not receive protection lockout signals;

[0067] (5) After the switch where the anti-over-level trip protection device is located fails to operate for an extended period of time, the protection blocking signal sent to the bus side port and the protection blocking signal sent to the tie side port shall be stopped to prevent the switch failure to operate from causing the entire system to trip over-level.

[0068] The logic for transmitting and stopping relay interlocking signals is as follows:

[0069] (1) When the fault occurs in the positive direction of the anti-over-level trip protection device, when the protection blocking signal or the relay blocking signal is received at the connection side port, the relay blocking signal is sent to the bus side port. When the fault occurs in the opposite direction of this protection, when the protection blocking signal or the relay blocking signal is received at the bus side port, the relay blocking signal is sent to the connection side port.

[0070] (2) When the fault occurs in both the forward and reverse directions of the anti-over-level trip protection device, and the bus side port no longer receives the protection blocking signal or the relay blocking signal, the relay blocking signal shall be stopped from being sent to the bus side port. When the tie side no longer receives the protection blocking signal or the relay blocking signal, the relay blocking signal shall be stopped from being sent to the tie side port.

[0071] (3) When the bus side port receives the unlock signal, it stops sending the relay lock signal to the bus side port. When the tie side port receives the unlock signal, it stops sending the relay lock signal to the tie side port.

[0072] (4) When one side port is set to "disabled", it will not receive relay blocking signals;

[0073] (5) After the overcurrent protection of the anti-overcurrent tripping protection device is activated, it stops sending relay blocking signals to the bus side port and stops sending relay blocking signals to the tie side port to prevent the switch from failing to operate and causing the entire system to trip.

[0074] The logic for sending and stopping the unlock signal is as follows:

[0075] (1) After the switch failure protection timeout, a release blocking signal is sent to the bus side port and the tie side port to prevent the switch failure from causing the entire system to trip.

[0076] (2) When the fault current disappears, the protection action returns and stops sending the unlocking signal.

[0077] Figure 2 To configure a tripping protection system with 3 power supply points and 7 protections, the network communication ports K1, K4, K5, and K7 are configured as "bus side" and "disabled" respectively, and the network communication ports K2, K3, and K6 are configured as "bus side" and "tethering side" respectively. K3 is a sectionalizing switch. The port connected to bus M1 is configured as "bus side", and the port connected to bus M2 is configured as "tethering side". The protection action time is 20ms, the switch failure time is 100ms, and the total timeout time is twice the switch failure time, 200ms. At 0ms, a fault occurs at F6 (AB). 10ms later, a fault occurs at F3 (BC). The switch at K5 fails to operate.

[0078] When a fault occurs at F6, K3, K5, and K6 detect the fault power in the positive direction, while K1, K2, K4, and K7 detect the fault power in the reverse direction. K5 sends a protection blocking signal to the bus side M2. Upon receiving the blocking signal, K3 and K4 on M2 block the output. K3 sends both a protection blocking signal and a relay blocking signal to the bus side M1. Upon receiving the blocking signal, K1 and K2 on M1 block the output. K2 sends both a protection blocking signal and a relay blocking signal to the tie-side switch K6. Upon receiving the blocking signal, K6 blocks the output. K6 then sends both a protection blocking signal and a relay blocking signal to the bus side M3. Upon receiving the blocking signal, K7 on M3 blocks the output.

[0079] 10ms later, a BC fault occurs at F3. K2 and K6 detect the fault power in the positive direction, while K1, K3, K4, and K7 detect the fault power in the reverse direction. K2 sends a protection blocking signal to the bus side M1. K1 and K3 on M1 block the output after receiving the blocking signal. K3 sends a protection blocking signal and a relay blocking signal to the bus side M2. K4 on M2 blocks the output after receiving the blocking signal. K6 sends a protection blocking signal to the bus side M3. K7 on M3 blocks the output after receiving the blocking signal.

[0080] K5 detects a fault power in the positive direction and receives no blocking signal. The protection trips at 20ms. At 100ms, K5 detects a failed circuit breaker trip and sends a release blocking signal to busbar M1. K3 and K4 on M1 receive the release blocking signal and trip their protection at 120ms. At 10ms, K2 detects both the positive and negative directions of the fault power and receives a blocking signal from busbar K3, but does not receive a blocking signal from tie-side K6. The protection trips at 30ms. At 10ms, K2 detects both the positive and negative directions of the fault power and stops sending blocking signals to tie-side K6. K6 detects the positive direction of the fault power and trips its protection at 30ms. After 120ms, the circuit breakers at K2, K3, K4, and K6 are in the open position, the fault is successfully isolated, and K1 and K7 continue to receive blocking signals, ensuring selective operation.

[0081] The technical means disclosed in this invention are not limited to those disclosed in the above embodiments, but also include technical solutions composed of any combination of the above technical features.

Claims

1. A method for preventing cascading tripping in multi-point faults in multi-power distribution networks, characterized in that, The method includes the following steps: (1) Collect system voltage and current data in real time and cache the system voltage data; (2) After the fault is detected and the protection is activated, the output of the fault power direction element is calculated and recorded, and the protection fault timing is started; (3) When the fault occurs in the positive direction of the protection, a blocking signal is sent to the bus side; when the fault occurs in the reverse direction of the protection, a blocking signal is sent to the tie side. (4) Calculate and record the output of the fault power direction element in real time, and prevent incorrect power direction judgment during conversion faults; (5) When the detected faulty power direction element has only one direction, the blocking signal output remains unchanged. When the faulty power element is detected in both the positive and negative directions, the blocking signal output is adjusted according to the power element direction and the received signal. (6) After a protection fault is detected, if no lockout signal or lockout release signal is received, or if a lockout signal is received but the total timeout period is exceeded, the protection action output will be activated and the transmission of protection lockout signals will be stopped. The protection communication interface is configured in two zones and has three configuration modes: bus side, tie side, and disabled. The bus side port exchanges information with the bus side ports of other protections on the bus, and the tie side port exchanges information with the tie side ports of the protections on the opposite side of the tie line. Unused communication ports are configured as disabled. If one zone is the bus side or tie side and the other zone is disabled, then the protection communication interface is a load. The interface function definition corresponds to the system wiring method.

2. The method for preventing cascading tripping in multi-point faults in multi-power distribution networks according to claim 1, characterized in that, In step (4), the power direction is calculated as follows: (1) Using the current transformer data and bus voltage transformer data at the installation location, when the system voltage is low, the directional element is selected with the cached memory voltage to eliminate the data dead zone of the directional element during a three-phase short circuit. (2) The current transformer is positioned so that the polarity end is close to the busbar and the non-polarity end is short-circuited and grounded to ensure that the current flowing into the busbar is negative and the current flowing out of the busbar is positive. (3) The power direction element is connected at 90° and starts according to phase; the phase comparison element is... , , .

3. The method for preventing cascading tripping in multi-point faults in multi-power distribution networks according to claim 1, characterized in that, In step (4), the duration T1 of the fault power direction is confirmed to prevent the power direction element from jittering during a transitional fault, which could lead to incorrect judgment.

4. The method for preventing cascading tripping in a multi-point fault network according to claim 1, characterized in that, In step (6), the output logic for the protection action after the fault is as follows: (1) When the fault power direction element is detected to be in the positive direction, no intercom blocking signal is received; (2) When the reverse direction of the fault power direction element is detected, no bus-side blocking signal is received; (3) If a blocking signal is received but the total timeout period has expired, the switch failure to operate will cause the entire system to trip.

5. The method for preventing cascading tripping in a multi-point fault distribution network according to claim 1, characterized in that, There are three types of signals that protect the transmission of the communication port: protection blocking signal, relay blocking signal, and unlocking signal.

6. A method for preventing cascading tripping in multi-point faults in multi-power distribution networks according to claim 1 or 5, characterized in that, In step (6), the action logic for sending and stopping the protection interlocking signal is as follows: (1) When the fault occurs in the positive direction of the anti-over-level trip protection device, a protection blocking signal is sent to the bus side port. When the fault occurs in the opposite direction of the anti-over-level trip protection device, a protection blocking signal is sent to the tie side port. The protection blocking signal is sent for at least T2 duration to prevent the protection blocking signal jitter from causing blocking failure and resulting in system over-level trip. (2) When the fault occurs in both the forward and reverse directions of the protection device for over-tripping, and the bus side port no longer receives the protection blocking signal or the relay blocking signal, the protection blocking signal shall be stopped from being sent to the bus side port. When the connection side no longer receives the protection blocking signal or the relay blocking signal, the protection blocking signal shall be stopped from being sent to the connection side port. (3) When the busbar side port receives the unlock signal, it stops sending the protection lock signal to the busbar side port; when the tie side port receives the unlock signal, it stops sending the protection lock signal to the tie side port. (4) When one side port is set to "disabled", it will not receive protection lockout signals; (5) After the switch where the anti-over-level trip protection device is located fails to operate for an extended period of time, the protection blocking signal to the bus side port and the protection blocking signal to the tie side port shall be stopped to prevent the switch failure to operate from causing the entire system to trip over-level.

7. A method for preventing cascading tripping in multi-point faults in multi-power distribution networks according to claim 1 or 5, characterized in that, The logic for transmitting and stopping relay interlocking signals is as follows: (1) When the fault occurs in the forward direction of the anti-overpass trip protection device, when it receives the protection blocking signal or the relay blocking signal of the tie side port, it sends the relay blocking signal to the bus side port. When the fault occurs in the reverse direction of the anti-overpass trip protection device, when it receives the protection blocking signal or the relay blocking signal of the bus side port, it sends the relay blocking signal to the tie side port. (2) When the fault occurs in both the forward and reverse directions of the anti-over-level trip protection device, and the bus side port no longer receives the protection blocking signal or the relay blocking signal, the relay blocking signal shall be stopped from being sent to the bus side port. When the connection side no longer receives the protection blocking signal or the relay blocking signal, the relay blocking signal shall be stopped from being sent to the connection side port. (3) When the bus side port receives the unlock signal, it stops sending the relay lock signal to the bus side port; when the tie side port receives the unlock signal, it stops sending the relay lock signal to the tie side port. (4) When one side port is set to "disabled", it will not receive relay blocking signals; (5) After the overcurrent protection of the anti-overcurrent tripping protection device is activated, it stops sending relay blocking signals to the bus side port and stops sending relay blocking signals to the tie side port to prevent the switch from failing to operate and causing the entire system to trip.

8. A method for preventing cascading tripping in multi-point faults in multi-power distribution networks according to claim 1 or 5, characterized in that, The logic for sending and stopping the unlock signal is as follows: (1) After the switch failure protection timeout, a release blocking signal is sent to the bus side port and a release blocking signal is sent to the tie side port to prevent the switch failure from causing the entire system to trip. (2) When the fault current disappears, the protection action returns and stops sending the unlocking signal.

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