Circuit board structure
By designing a ring-shaped barrier around the conductive via in the circuit board and combining it with a low-dielectric material, the problems of impedance mismatch and electromagnetic interference were solved, achieving high-frequency signal integrity and high-speed transmission.
Patent Information
- Application Number
- CN202210751679.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-11-15
- Filing Date
- 2022-06-29
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2042-06-29
AI Technical Summary
The design of coaxial vias in existing circuit boards has impedance mismatch and electromagnetic interference shielding gaps, which affect the integrity of high-frequency signals.
A closed structure is formed by using a ring-shaped baffle around the conductive via, combined with a dielectric layer design with low dielectric constant and low dielectric loss, to reduce energy loss and noise interference.
It effectively prevents energy loss, reduces noise interference, improves signal integrity, and supports high-frequency and high-speed signal transmission.
Smart Images

Figure CN116133231B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a substrate structure, and more particularly to a circuit board structure. Background Technology
[0002] In existing circuit boards, the design of coaxial vias requires one or more insulating layers between the inner and outer conductor layers for insulation. These insulating layers are formed through lamination. Therefore, impedance mismatch and electromagnetic interference (EMI) shielding gaps appear at the two ends of the coaxial via, thus affecting the integrity of high-frequency signals. Summary of the Invention
[0003] This invention relates to a circuit board structure that can effectively prevent energy loss and reduce noise interference, and can provide better signal integrity.
[0004] According to an embodiment of the present invention, a circuit board structure includes a first dielectric layer, a first internal circuit layer, a second internal circuit layer, a conductive connection layer, a second dielectric layer, two third dielectric layers, a third internal circuit layer, a fourth internal circuit layer, two conductive vias, a first annular barrier, a second annular barrier, two fourth dielectric layers, a first external circuit layer, a second external circuit layer, a third annular barrier, and a fourth annular barrier. The first dielectric layer has a first surface and a second surface opposite to each other, and an opening penetrating the first dielectric layer and connecting the first surface and the second surface. A first internal circuit layer is disposed on the first surface of the first dielectric layer. A second internal circuit layer is disposed on the second surface of the first dielectric layer. A conductive connection layer covers the inner wall of the opening of the first dielectric layer and connects the first internal circuit layer and the second internal circuit layer. The second dielectric layer fills the opening of the first dielectric layer. A third dielectric layer covers the first internal circuit layer, the second internal circuit layer, and the second dielectric layer, respectively. The third internal circuit layer and the fourth internal circuit layer cover the third dielectric layer, respectively. The conductive via penetrates both the third and second dielectric layers and electrically connects the third and fourth internal circuit layers. A first and second annular baffle are respectively disposed within the third dielectric layer, surrounding the conductive via and electrically connecting the third and first internal circuit layers, and the fourth and second internal circuit layers. The fourth dielectric layer covers both the third and fourth internal circuit layers. A first and second external circuit layers cover the fourth dielectric layer. The third and fourth annular baffles are respectively disposed within the fourth dielectric layer and electrically connect the first external circuit layer and the third internal circuit layer, and the second external circuit layer and the fourth internal circuit layer.
[0005] According to an embodiment of the present invention, a circuit board structure includes two circuit board units and a connection structure layer. Each circuit board unit includes a first dielectric layer, a first internal circuit layer, a second internal circuit layer, a conductive connection layer, a second dielectric layer, two third dielectric layers, a third internal circuit layer, a fourth internal circuit layer, two conductive vias, a first annular barrier, a second annular barrier, two fourth dielectric layers, a first external circuit layer, a second external circuit layer, a third annular barrier, and a fourth annular barrier. The first dielectric layer has a first surface and a second surface opposite to each other, and an opening penetrating the first dielectric layer and connecting the first surface and the second surface. A first internal circuit layer is disposed on the first surface of the first dielectric layer. A second internal circuit layer is disposed on the second surface of the first dielectric layer. A conductive connection layer covers the inner wall of the opening of the first dielectric layer and connects the first internal circuit layer and the second internal circuit layer. The second dielectric layer fills the opening of the first dielectric layer. A third dielectric layer covers the first internal circuit layer, the second internal circuit layer, and the second dielectric layer, respectively. The third internal circuit layer and the fourth internal circuit layer cover the third dielectric layer, respectively. The conductive via penetrates the third and second dielectric layers and electrically connects the third and fourth internal circuit layers. A first and second annular baffle are respectively disposed within the third dielectric layer, surrounding the conductive via and electrically connecting the third and first internal circuit layers, and the fourth and second internal circuit layers. The fourth dielectric layer covers both the third and fourth internal circuit layers. A first and second external circuit layer cover the fourth dielectric layer. The third and fourth annular baffles are respectively disposed within the fourth dielectric layer and electrically connect the first and third external circuit layers, and the second and fourth external circuit layers. At least a portion of one of the third and fourth annular baffles corresponds to the conductive via. The connection structure layer includes a connection layer and multiple conductive joints. The connection layer is located between circuit board units and covers the first external circuit layer of each circuit board unit, while the conductive joints connect to the first external circuit layer of each circuit board unit, thereby mating the circuit board units together.
[0006] Based on the above, in the circuit board structure design of the present invention, the first and second annular baffles surround the conductive vias and electrically connect the third internal circuit layer to the first internal circuit layer and the fourth internal circuit layer to the second internal circuit layer. The third and fourth annular baffles electrically connect the first external circuit layer to the third internal circuit layer and the second external circuit layer to the fourth internal circuit layer. This design makes the annular baffles present a closed boundary structure, which not only reduces electromagnetic interference (EMI) and completely covers the signal of the conductive vias, but also effectively prevents energy loss and reduces noise interference compared to the prior art where a single row of blind vias with gaps is set around the conductive vias, thus providing better signal integrity. Attached Figure Description
[0007] Figure 1A This is a top view schematic diagram of a circuit board structure according to an embodiment of the present invention;
[0008] Figure 1B It is along Figure 1A A schematic cross-sectional view of line II;
[0009] Figure 1C It is along Figure 1A A schematic cross-sectional view of line II-II;
[0010] Figure 2A and Figure 2B This is a cross-sectional schematic diagram of a circuit board structure at a first position and a second position according to another embodiment of the present invention;
[0011] Figure 3 It includes Figure 2A A partial cross-sectional schematic diagram of an electronic device with a circuit board structure;
[0012] Figure 4 This is a partial cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention;
[0013] Figure 5 This is a partial cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention;
[0014] Figure 6 This is a partial cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention;
[0015] Figure 7 It includes Figure 5 A partial cross-sectional schematic diagram of an electronic device with a circuit board structure.
[0016] Explanation of reference numerals in the attached figures
[0017] 10a, 10b: Electronic devices;
[0018] 20: Electronic components;
[0019] 22: Pad;
[0020] 30: Connector;
[0021] 100a, 100b, 100c, 200a, 200b, 200c: Circuit board structure;
[0022] 110: First dielectric layer;
[0023] 113: Second dielectric layer;
[0024] 115: Third dielectric layer;
[0025] 117: Fourth dielectric layer;
[0026] 120: First internal circuit layer;
[0027] 125: Second internal circuit layer;
[0028] 127: Conductive connection layer;
[0029] 130: Third internal circuit layer;
[0030] 132: Signal line;
[0031] 134: Grounding line;
[0032] 140: Fourth internal circuit layer;
[0033] 142: Signal lines;
[0034] 144: Grounding line;
[0035] 150: Conductive via;
[0036] 152: Through hole;
[0037] 154: Conductive material layer;
[0038] 156: Hole-filling material;
[0039] 157: Upper surface;
[0040] 159: Lower surface;
[0041] 160: First ring retaining wall;
[0042] 165: Second ring retaining wall;
[0043] 170: First external circuit layer;
[0044] 172: Signal lines;
[0045] 174: Grounding line;
[0046] 180, 180': Second outer circuit layer;
[0047] 182: Signal lines;
[0048] 184: Grounding line;
[0049] 190, 192: Third ring retaining wall;
[0050] 195, 197: Fourth ring retaining wall;
[0051] 210: Connecting structure layer;
[0052] 212: Connection layer;
[0053] 214: First conductive joint;
[0054] 216: Second conductive joint;
[0055] H: Opening;
[0056] L11, L21, L31, L41: Signal paths;
[0057] L12, L13, L14, L22, L23, L24, L32, L42, L51, L52: Grounding paths;
[0058] P1: First position;
[0059] P2: Second position;
[0060] S1: First surface;
[0061] S2: Second surface. Detailed Implementation
[0062] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.
[0063] Figure 1A This is a top view schematic diagram of a circuit board structure according to an embodiment of the present invention. Figure 1B It is along Figure 1A A schematic cross-sectional view of line II. Figure 1C It is along Figure 1A A schematic cross-sectional view of line II-II. It should be noted that... Figure 1B This is a cross-sectional view of the circuit board structure located at the first position P1, and Figure 1C This is a cross-sectional view of the circuit board structure located at the second position P2.
[0064] Please refer to Figure 1A , Figure 1B as well as Figure 1C In this embodiment, the circuit board structure 100a includes a first dielectric layer 110, a second dielectric layer 113, two third dielectric layers 115, two fourth dielectric layers 117, a first internal circuit layer 120, a second internal circuit layer 125, a conductive connection layer 127, a third internal circuit layer 130, a fourth internal circuit layer 140, two conductive vias 150, a first annular barrier 160, a second annular barrier 165, a first external circuit layer 170, a second external circuit layer 180, a third annular barrier 190, and a fourth annular barrier 195.
[0065] In detail, in this embodiment, the first dielectric layer 110 has a first surface S1 and a second surface S2 opposite to each other, and an opening H penetrating the first dielectric layer 110 and connecting the first surface S1 and the second surface S2. A first internal circuit layer 120 is disposed on the first surface S1 of the first dielectric layer 110. A second internal circuit layer 125 is disposed on the second surface S2 of the first dielectric layer 110. A conductive connection layer 127 covers the inner wall of the opening H of the first dielectric layer 110 and connects the first internal circuit layer 120 and the second internal circuit layer 125. A second dielectric layer 113 fills the opening H of the first dielectric layer 110 and is flush with the first internal circuit layer 120 and the second internal circuit layer 125. Here, the first dielectric layer 110 can use a general dielectric material, wherein the dielectric constant of the first dielectric layer 110 can be less than 5.0, and the dielectric loss (Df) of the first dielectric layer 110 can be less than 0.02, thereby providing appropriate impedance matching. The dielectric constant of the second dielectric layer 113 can be lower than 5.0, while the dielectric loss (Df) of the second dielectric layer 113 is greater than 0 and less than 0.025, in order to provide proper insulation and impedance matching, and also reduce dielectric loss.
[0066] Furthermore, in this embodiment, the third dielectric layer 115 covers the opposite sides of the first internal circuit layer 120, the second internal circuit layer 125, and the second dielectric layer 113. The third internal circuit layer 130 and the fourth internal circuit layer 140 cover the third dielectric layer 115. The conductive via 150 penetrates the third dielectric layer 115 and the second dielectric layer 113, and electrically connects the third internal circuit layer 130 and the fourth internal circuit layer 140. More specifically, in this embodiment, each conductive via 150 includes a through-hole 152, a conductive material layer 154, and a via-filling material 156. The through-hole 152 penetrates the third dielectric layer 115 and the second dielectric layer 113, while the conductive material layer 154 covers the inner wall of the through-hole 152 and electrically connects the third internal circuit layer 130 and the fourth internal circuit layer 140. The via material 156 fills the through hole 152, and the third internal circuit layer 130 and the fourth internal circuit layer 140 respectively cover the upper surface 157 and the lower surface 159 of the via material 156 that are opposite to each other.
[0067] Furthermore, in this embodiment, the first annular barrier 160 and the second annular barrier 165 are respectively disposed within the third dielectric layer 115, surrounding the conductive via 150 and electrically connecting the third internal circuit layer 130 and the first internal circuit layer 120, and the fourth internal circuit layer 140 and the second internal circuit layer 125. The fourth dielectric layer 117 covers the third internal circuit layer 130 and the fourth internal circuit layer 140 respectively. The first external circuit layer 170 and the second external circuit layer 180 cover the fourth dielectric layer 117 respectively. The third annular barrier 190 and the fourth annular barrier 195 are respectively disposed within the fourth dielectric layer 117 and electrically connect the first external circuit layer 170 and the third internal circuit layer 130, and the second external circuit layer 180 and the fourth internal circuit layer 140. Here, the third dielectric layer 115 and the fourth dielectric layer 117 can be, for example, photoimageable dielectric (PID) materials, pre-preg, or Ajinomoto build-up film (ABF). The dielectric constants of the third dielectric layer 115 and the fourth dielectric layer 117 can be lower than 4.2, while the dielectric loss (Df) of the third dielectric layer 115 and the fourth dielectric layer 117 is greater than 0 and less than 0.01.
[0068] In particular, in this embodiment, the third internal circuit layer 130, the conductive via 150, and the fourth internal circuit layer 140 define two signal paths L11, while the first external circuit layer 170, the third annular barrier 190, the third internal circuit layer 130, the first annular barrier 160, the first internal circuit layer 120, the conductive connection layer 127, the second internal circuit layer 125, the second annular barrier 165, the fourth internal circuit layer 140, the fourth annular barrier 195, and the second external circuit layer 180 define a ground path L12, and the ground path L12 surrounds the signal path L11.
[0069] To go further, please refer to Figure 1BThe first external wiring layer 170 includes a ground line 174 (i.e., the first ground line). The second external wiring layer 180 includes a ground line 184 (i.e., the second ground line). The third internal wiring layer 130 includes a signal line 132 (i.e., the first signal line) and a ground line 134 (i.e., the third ground line). The fourth internal wiring layer 140 includes a signal line 142 (i.e., the second signal line) and a ground line 144 (i.e., the fourth ground line). The signal line 132, the conductive via 150, and the signal line 142 define a signal path L11, while the ground line 174, the third annular barrier 190, the ground line 134, the first annular barrier 160, the first internal wiring layer 120, the conductive connection layer 127, the second internal wiring layer 125, the second annular barrier 165, the ground line 144, the fourth annular barrier 195, and the second ground line 184 define a ground path L12. Since the signal path L11 is surrounded by the ground path L12 and is enclosed, a good high-frequency and high-speed loop can be formed.
[0070] In addition, please refer to Figure 1C Grounding path L14 is defined by grounding line 174, third ring-shaped barrier 190, grounding line 134, first ring-shaped barrier 160, and first internal circuit layer 120. Grounding path L14 surrounds signal line 132 in a closed loop, thus forming a good high-frequency, high-speed loop. Furthermore, grounding path L13 is defined by second internal circuit layer 125, second ring-shaped barrier 165, grounding line 144, fourth ring-shaped barrier 195, and grounding line 184. Grounding path L13 surrounds signal line 142 in a closed loop, thus forming a good high-frequency, high-speed loop.
[0071] In short, in this embodiment, the signal path L11 defined by signal line 132, conductive via 150, and signal line 142 is surrounded by a grounding path L12 defined by grounding line 174, third ring barrier 190, grounding line 134, first ring barrier 160, first internal circuit layer 120, conductive connection layer 127, second internal circuit layer 125, second ring barrier 165, grounding line 144, fourth ring barrier 195, and second grounding line 184. That is, a well-sealed grounding path L12 is provided around the signal path L11, which can transmit high-frequency and high-speed signals such as 5G, thereby forming a good high-frequency and high-speed loop, resulting in better signal integrity for the circuit board structure 100 of this embodiment. Here, high frequency refers to a frequency greater than 1 GHz; and high speed refers to a data transmission speed greater than 100 Mbps.
[0072] Furthermore, since the first annular barrier 160, the second annular barrier 165, the third annular barrier 190, and the fourth annular barrier 195 are closed boundary structures, they can completely cover the signal of the conductive via 150. Compared to the prior art where a single row of blind vias with gaps is set around the conductive via, the circuit board structure 100a of this embodiment can effectively prevent energy loss and reduce noise interference, and can have better signal integrity. In addition, the conductive via 150, the conductive connection layer 127, and the second dielectric layer 113 define a coaxial via, wherein the second dielectric layer 113 is located between the conductive via 150 and the conductive connection layer 127. Compared to the prior art where the internal and external conductor layers of the coaxial via are blocked by a layer-addition method of pressing insulating layers, the manufacturing method of the circuit board structure 100a of this embodiment can avoid the problem of impedance mismatch affecting the integrity of high-frequency signals.
[0073] Figure 2A and Figure 2B This is a cross-sectional schematic diagram of a circuit board structure according to another embodiment of the present invention at a first position and a second position. Please refer to [the previous text]. Figure 2A To improve the application of the circuit board structure 100b, the third annular barrier 192 in this embodiment can be provided corresponding to the conductive via 150. Here, the first external circuit layer 170 includes a signal line 172 and a ground line 174. The signal line 172, the third annular barrier 192, the signal line 132, the conductive via 150, and the signal line 142 define the signal path L21. The ground line 174, the third annular barrier 190, the ground line 134, the first annular barrier 160, the first internal circuit layer 120, the conductive connection layer 127, the second internal circuit layer 125, the second annular barrier 165, the ground line 144, the fourth annular barrier 195, and the ground line 184 define the ground path L22. Since the signal path L21 is surrounded by the ground path L22 and is enclosed, a good high-frequency, high-speed loop can be formed.
[0074] Please refer to Figure 2B The grounding path L24 is defined by the grounding line 174, the third ring-shaped barrier 190, the grounding line 134, the first ring-shaped barrier 160, and the first internal circuit layer 120 of the circuit board structure 100b. The grounding path L24 surrounds the signal line 132, forming a closed loop, thus creating a good high-frequency, high-speed circuit. Furthermore, the grounding path L23 is defined by the second internal circuit layer 125, the second ring-shaped barrier 165, the grounding line 144, the fourth ring-shaped barrier 195, and the grounding line 184 of the circuit board structure 100b. The grounding path L23 surrounds the signal line 142, forming a closed loop, thus creating a good high-frequency, high-speed circuit.
[0075] Figure 3 It includes Figure 2A This is a partial cross-sectional schematic diagram of an electronic device with a circuit board structure. In this embodiment, the electronic device 10a includes, for example, the circuit board structure described above. Figure 2A The circuit board structure 100b and electronic component 20 are included, wherein the electronic component 20 is electrically connected to the circuit board structure 100b and includes a plurality of pads 22. Furthermore, the electronic device 10a of this embodiment also includes a plurality of connectors 30 disposed between the first external circuit layer 170 of the circuit board structure 100b and the pads 22 of the electronic component 20, wherein the electronic component 20 is electrically connected to the circuit board structure 100b via the connectors 30. Here, the connectors 30 are, for example, solder balls, but are not limited thereto. In application, an antenna structure can be provided on the other side of the circuit board structure 100b opposite to the electronic component 20, which can solve the problem of signal interference in the same plane, reduce signal energy loss and noise interference, thereby improving signal transmission reliability.
[0076] Figure 4 This is a partial cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention. Please also refer to... Figure 2A as well as Figure 4 In this embodiment, the circuit board structure 200a includes two circuit board units and a connecting structure layer 210, wherein each circuit board unit is... Figure 2A The circuit board structure 100b is described above. The first external circuit layer 170 of the circuit board structure 100b includes signal line 172 (i.e., the first signal line) and ground line 174 (i.e., the first ground line). The second external circuit layer 180 includes ground line 184 (i.e., the second ground line). The third internal circuit layer 130 includes signal line 132 (i.e., the third signal line) and ground line 134 (i.e., the third ground line). The fourth internal circuit layer 140 includes signal line 142 (i.e., the fourth signal line) and ground line 144 (i.e., the fourth ground line). The connection structure layer 210 includes a connection layer 212 and a plurality of conductive joints (including a plurality of first conductive joints 214 and a plurality of second conductive joints 216). The connection layer 212 is located between the two circuit board structures 100b and covers the first external circuit layer 170 of each circuit board structure 100b. The first conductive joints 214 and the second conductive joints 216 are connected to the first external circuit layer 170 of each circuit board structure 100b, thereby mating the circuit board structures 100b together. Here, the first conductive joint 214 is provided corresponding to the conductive via 150 of the circuit board structure 100b and is connected to the signal line 172. The second conductive joint 216 surrounds the first conductive joint 214 and is connected to the ground line 174.
[0077] In this embodiment, when the upper circuit board structure 100b is located at the first position P1 and the lower circuit board structure 100b is located at the first position P1, and the circuit board structure 100b is docked with the circuit board structure 100b, the signal line 142, conductive via 150, signal line 132, third annular barrier 192 corresponding to conductive via 150, signal line 172, first conductive joint 214 of the upper circuit board structure 100b, and the signal line 172, third annular barrier 192 corresponding to conductive via 150, signal line 132, conductive via 150, and signal line 142 of the lower circuit board structure 100b define two signal paths L31. The grounding line 184, fourth ring barrier 195, grounding line 144, second ring barrier 165, second internal circuit layer 125, conductive connection layer 127, first internal circuit layer 120, first ring barrier 160, grounding line 134, third ring barrier 190, grounding line 174, and second conductive joint 216 of the upper circuit board structure 100b, and the grounding line 174, third ring barrier 190, grounding line 134, first ring barrier 160, first internal circuit layer 120, conductive connection layer 127, second internal circuit layer 125, second ring barrier 165, grounding line 144, fourth ring barrier 195, and grounding line 184 of the lower circuit board structure 100b define a grounding path L32, which surrounds the signal path L31. Because the signal path L31 is surrounded and enclosed by the grounding path L32, a good high-frequency, high-speed loop can be formed.
[0078] Figure 5 This is a partial cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention. Please refer to... Figure 5 In this embodiment, the circuit board structure 200b includes two circuit board units and a connecting structure layer 210, wherein the circuit board unit is... Figure 2B The circuit board structure 100b and circuit board structure 100c are shown in the figure. Here, circuit board structure 100c is related to... Figure 2A The circuit board structure 100b is similar, except that the second external circuit layer 180' in this embodiment also includes a signal line 182 (i.e., the second signal line), and the fourth annular barrier 197 and the third annular barrier 192 are provided with corresponding conductive vias 150.
[0079] When the upper circuit board structure 100c is located at the first position P1 and the lower circuit board structure 100b is located at the second position P2, and the circuit board structure 100c and the circuit board structure 100b are connected together, the signal line 182 of the upper circuit board structure 100c, the fourth annular barrier 197 corresponding to the conductive through hole 150, the signal line 142, the conductive through hole 150, the signal line 132, the third annular barrier 192 corresponding to the conductive through hole 150, the signal line 172, the first conductive joint 214, the signal line 172 of the lower circuit board structure 100b, the third annular barrier 192 corresponding to the conductive through hole 150, and the signal line 132 define two signal paths L41. The upper circuit board structure 100c includes grounding line 184, fourth ring barrier 195, grounding line 144, second ring barrier 165, second internal circuit layer 125, conductive connection layer 127, first internal circuit layer 120, first ring barrier 160, grounding line 134, third ring barrier 190, grounding line 174, and second conductive joint 216. The lower circuit board structure 100b includes grounding line 174, third ring barrier 190, grounding line 134, first ring barrier 160, and first internal circuit layer 120, defining grounding path L42 (i.e., the first grounding path). The first grounding path L42 surrounds the signal path L41. Because the signal path L41 is surrounded by the grounding path L42 and is enclosed, a good high-frequency, high-speed loop can be formed.
[0080] Furthermore, the second internal circuit layer 125, the second annular barrier 165, the ground line 144, the fourth annular barrier 195, and the ground line 184 of the lower circuit board structure 100b define the ground path L43 (i.e., the second ground path), and the ground path L43 surrounds the signal line 142 of the circuit board structure 100b in a closed manner, thus forming a good high-frequency and high-speed loop.
[0081] Figure 6 This is a partial cross-sectional schematic diagram of a circuit board structure according to an embodiment of the present invention. Please refer to... Figure 6 In this embodiment, the circuit board structure 200c includes two circuit board units and a connecting structure layer 210, wherein each circuit board unit is... Figure 1C The circuit board structure 100a is shown in the figure.
[0082] When the upper circuit board structure 100a is located at the second position P2 and the lower circuit board structure 100a is located at the second position P2, and the circuit board structure 100a is connected to the circuit board structure 100a, the second internal circuit layer 125, the second annular barrier 165, the grounding line 144, the fourth annular barrier 195, and the grounding line 184 of the upper circuit board structure 100a define the grounding path L51, and the grounding path L51 surrounds the signal line 142, forming a closed enclosure, thus forming a good high-frequency high-speed loop.
[0083] Furthermore, the first internal circuit layer 120, the first annular barrier 160, the ground line 134, the third annular barrier 190, the ground line 174, the second conductive junction 216, the line 174, the third annular barrier 190, the ground line 134, the first annular barrier 160, and the first ground internal circuit layer 120 of the upper circuit board structure 100a define a grounding path L52, which surrounds the signal line 132 in a closed loop, thus forming a good high-frequency, high-speed loop. In addition, the second internal circuit layer 125, the second annular barrier 165, the ground line 144, the fourth annular barrier 195, and the ground line 184 of the lower circuit board structure 100a define a grounding path L51, which surrounds the signal line 142 in a closed loop, thus forming a good high-frequency, high-speed loop.
[0084] It should be noted that the docking methods mentioned in the above embodiments all involve docking the first external circuit layers of two circuit board structures together. However, in other docking embodiments not shown, the first external circuit layer of one circuit board structure may be docked to the second external circuit layer of another circuit board structure; or, the second external circuit layers of two circuit board structures may be docked together. All of the above fall within the scope of protection of this invention.
[0085] Figure 7 It includes Figure 5 This is a partial cross-sectional schematic diagram of an electronic device with a circuit board structure. Please refer to... Figure 7 In this embodiment, the electronic device 10b includes, for example, the above-mentioned... Figure 5The circuit board structure 200b and electronic component 20 are included, wherein the electronic component 20 is electrically connected to the circuit board structure 200b and includes a plurality of pads 22. Furthermore, the electronic device 10b of this embodiment also includes a plurality of connectors 30 disposed between the second external circuit layer 180' of the circuit board structure 200b and the pads 22 of the electronic component 20, wherein the electronic component 20 is electrically connected to the circuit board structure 200b via the connectors 30. Here, the connectors 30 are, for example, solder balls, but are not limited thereto. In application, an antenna structure can be provided on the other side of the circuit board structure 200b opposite to the electronic component 20, which can solve the problem of signal interference in the same plane, reduce signal energy loss and noise interference, thereby improving signal transmission reliability.
[0086] In summary, in the circuit board structure design of this invention, the first and second annular baffles surround the conductive vias and electrically connect the third internal circuit layer to the first internal circuit layer and the fourth internal circuit layer to the second internal circuit layer. The third and fourth annular baffles electrically connect the first external circuit layer to the third internal circuit layer and the second external circuit layer to the fourth internal circuit layer. This design makes the annular baffles present a closed boundary structure, which not only reduces electromagnetic interference (EMI) and completely covers the signal of the conductive vias, but also effectively prevents energy loss and reduces noise interference compared to the existing technology that sets a single row of blind vias with gaps around the conductive vias, thus providing better signal integrity.
[0087] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A circuit board structure, characterized in that, include: A first dielectric layer has a first surface and a second surface opposite to each other, and an opening that penetrates the first dielectric layer and connects the first surface and the second surface; A first internal circuit layer is disposed on the first surface of the first dielectric layer; A second internal circuit layer is disposed on the second surface of the first dielectric layer; A conductive connection layer covers the inner wall of the opening in the first dielectric layer and connects the first internal circuit layer and the second internal circuit layer. The second dielectric layer fills the opening in the first dielectric layer; Two third dielectric layers respectively cover the first internal circuit layer, the second internal circuit layer, and the second dielectric layer; The third internal circuit layer and the fourth internal circuit layer respectively cover the two third dielectric layers; Two conductive vias penetrate the two third dielectric layers and the second dielectric layer, and electrically connect the third internal circuit layer and the fourth internal circuit layer; The first and second annular baffles are respectively disposed within the two third dielectric layers, surround the two conductive vias, and electrically connect the third internal circuit layer to the first internal circuit layer and the fourth internal circuit layer to the second internal circuit layer. Two fourth dielectric layers respectively cover the third internal circuit layer and the fourth internal circuit layer; The first external circuit layer and the second external circuit layer respectively cover the two fourth dielectric layers; and The third and fourth ring-shaped baffles are respectively disposed within the two fourth dielectric layers and electrically connected to the first external circuit layer and the third internal circuit layer, as well as the second external circuit layer and the fourth internal circuit layer.
2. The circuit board structure according to claim 1, characterized in that, The third internal circuit layer, the two conductive vias, and the fourth internal circuit layer define two signal paths, while the first external circuit layer, the third annular barrier, the third internal circuit layer, the first annular barrier, the first internal circuit layer, the conductive connection layer, the second internal circuit layer, the second annular barrier, the fourth internal circuit layer, the fourth annular barrier, and the second external circuit layer define a ground path, and the ground path surrounds the two signal paths.
3. The circuit board structure according to claim 2, characterized in that, The first external wiring layer includes a first ground line, the second external wiring layer includes a second ground line, the third internal wiring layer includes a first signal line and a third ground line, and the fourth internal wiring layer includes a second signal line and a fourth ground line. The first signal line, the two conductive vias, and the second signal line define the two signal paths, while the first ground line, the third annular barrier, the third ground line, the first annular barrier, the first internal wiring layer, the conductive connection layer, the second internal wiring layer, the second annular barrier, the fourth ground line, the fourth annular barrier, and the second ground line define the grounding path.
4. The circuit board structure according to claim 1, characterized in that, Each of the two conductive vias includes a through-hole, a conductive material layer, and a via-filling material. The through-hole penetrates the two third dielectric layers and the second dielectric layer. The conductive material layer covers the inner wall of the through-hole and electrically connects the third internal circuit layer and the fourth internal circuit layer. The via-filling material fills the through-hole, and the third internal circuit layer and the fourth internal circuit layer respectively cover the upper and lower surfaces of the via-filling material that are opposite to each other.
5. The circuit board structure according to claim 1, characterized in that, At least a portion of the third annular retaining wall and the fourth annular retaining wall are provided corresponding to the two conductive through holes.
6. A circuit board structure, characterized in that, include: Two circuit board units, each of the two circuit board units comprising: A first dielectric layer has a first surface and a second surface opposite to each other, and an opening that penetrates the first dielectric layer and connects the first surface and the second surface; A first internal circuit layer is disposed on the first surface of the first dielectric layer; A second internal circuit layer is disposed on the second surface of the first dielectric layer; A conductive connection layer covers the inner wall of the opening in the first dielectric layer and connects the first internal circuit layer and the second internal circuit layer. The second dielectric layer fills the opening in the first dielectric layer; Two third dielectric layers respectively cover the first internal circuit layer, the second internal circuit layer, and the second dielectric layer; The third internal circuit layer and the fourth internal circuit layer respectively cover the two third dielectric layers; Two conductive vias penetrate the two third dielectric layers and the second dielectric layer, and electrically connect the third internal circuit layer and the fourth internal circuit layer; The first and second annular baffles are respectively disposed within the two third dielectric layers, surround the two conductive vias, and electrically connect the third internal circuit layer to the first internal circuit layer and the fourth internal circuit layer to the second internal circuit layer. Two fourth dielectric layers respectively cover the third internal circuit layer and the fourth internal circuit layer; The first external circuit layer and the second external circuit layer respectively cover the two fourth dielectric layers; and A third and a fourth annular barrier are respectively disposed within the two fourth dielectric layers and electrically connected to the first external circuit layer and the third internal circuit layer, as well as the second external circuit layer and the fourth internal circuit layer. At least a portion of the third and fourth annular barriers corresponds to the two conductive vias. A connection structure layer includes a connection layer and a plurality of conductive joints. The connection layer is located between the two circuit board units and covers the first external circuit layer of each of the two circuit board units, while the plurality of conductive joints are connected to the first external circuit layer of each of the two circuit board units, thereby mating the two circuit board units together.
7. The circuit board structure according to claim 6, characterized in that, Each of the two circuit board units has a first external circuit layer including a first signal line and a first ground line, a second external circuit layer including a second signal line and a second ground line, a third internal circuit layer including a third signal line and a third ground line, and a fourth internal circuit layer including a fourth signal line and a fourth ground line. The plurality of conductive joints include a plurality of first conductive joints and a plurality of second conductive joints. The plurality of first conductive joints are disposed corresponding to the two conductive vias of each of the two circuit board units and connected to the first signal line, while the plurality of second conductive joints surround the plurality of first conductive joints and are connected to the first ground line.
8. The circuit board structure according to claim 7, characterized in that, When the two circuit board units are mated together, two signal paths are defined by the fourth signal line, the two conductive vias, the third signal line, the third annular barrier corresponding to the two conductive vias, the first signal line, the plurality of first conductive joints of one of the two circuit board units, the first signal line, the third annular barrier corresponding to the two conductive vias, the third signal line, the two conductive vias, and the fourth signal line of the other circuit board unit. Meanwhile, the second ground line, the fourth annular barrier, the fourth ground line, and the second annular barrier of one of the two circuit board units define two signal paths. The first internal circuitry layer, the second internal circuitry layer, the conductive connection layer, the first internal circuitry layer, the first annular barrier, the third grounding line, the third annular barrier, the first grounding line, the plurality of second conductive joints, the first grounding line of the other of the two circuit board units, the third annular barrier, the third grounding line, the first annular barrier, the first internal circuitry layer, the conductive connection layer, the second internal circuitry layer, the second annular barrier, the fourth grounding line, the fourth annular barrier, and the second grounding line define a grounding path, and the grounding path surrounds the two signal paths.
9. The circuit board structure according to claim 7, characterized in that, Part of the third annular barrier and part of the fourth annular barrier are configured corresponding to the two conductive vias. When the two circuit board units are connected together, the second signal line of one of the two circuit board units, the fourth annular barrier corresponding to the two conductive vias, the fourth signal line, the two conductive vias, the third signal line, the third annular barrier corresponding to the two conductive vias, the first signal line, the plurality of first conductive joints, the first signal line of the other of the two circuit board units, the third annular barrier corresponding to the two conductive vias, and the third signal line define two signal paths. The second grounding line, the fourth annular barrier, the fourth grounding line, and the second annular barrier of one of the two circuit board units... The second internal circuit layer, the conductive connection layer, the first internal circuit layer, the first annular barrier, the third ground line, the third annular barrier, the first ground line, the plurality of second conductive joints, the first ground line of the other of the two circuit board units, the third annular barrier, the third ground line, the first annular barrier, and the first internal circuit layer define a first ground path, and the first ground path surrounds the two signal paths. The second internal circuit layer, the second annular barrier, the fourth ground line, the fourth annular barrier, and the second ground line of the other of the two circuit board units define a second ground path, and the second ground path surrounds the fourth signal line of the other of the two circuit board units.
10. The circuit board structure according to claim 7, characterized in that, When the two circuit board units are connected together, the second ground line, the fourth ring-shaped barrier, the fourth ground line, the second ring-shaped barrier, and the second internal circuit layer of each of the two circuit board units define a first grounding path, and the first grounding path surrounds the fourth signal line. The first internal circuit layer, the first ring-shaped barrier, the third ground line, the third ring-shaped barrier, and the first ground line of each of the two circuit board units define a second grounding path, and the second grounding path surrounds the third signal line.
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