Method of forming a semiconductor structure and semiconductor structure
By forming initial protective and shielding structures on the bitline structure and utilizing the selectivity of the etching selective layer, the contour of the bitline structure sidewalls can be precisely controlled, solving the problem of inaccurate control over the height of the bitline structure sidewall covering the isolation structure, thus improving product yield and reliability.
Patent Information
- Application Number
- CN202110907578.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-08-09
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2041-08-09
AI Technical Summary
In the manufacturing process of dynamic random access memory, the height of the bit line structure sidewall covering the isolation structure cannot be precisely controlled, and the bit line structure sidewall may be damaged during the etching of the isolation structure, affecting the product yield and reliability.
By forming an initial protective structure and a shielding structure on the bitline structure, and by using the selectivity of the etching selective layer to precisely control the contour of the bitline structure sidewalls, different materials and processes such as atomic layer deposition and spin coating are used to form the shielding structure. The etching selectivity is adjusted to remove part of the initial protective structure, thus forming a protective structure with a second height.
It achieves precise control over the sidewall profile of the bit line structure, improves product yield and reliability, and provides a foundation for the research and development and mass production of semiconductor structures with lower precision.
Smart Images
Figure CN116133365B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of semiconductor technology, and in particular, to a forming method of a semiconductor structure and the semiconductor structure. BACKGROUND
[0002] With the increasing integration of dynamic random access memory (DRAM), the control accuracy of the DRAM process is required to be higher and higher.
[0003] At present, in the DRAM process, the height of the sidewall of the bit line structure covering the isolation structure cannot be accurately controlled, and the sidewall of the bit line structure may be damaged when etching the isolation structure, which brings great risk to the subsequent process and seriously affects the yield and reliability of the product. SUMMARY
[0004] The following is a summary of the subject matter of the detailed description of the present disclosure. This summary is not intended to limit the scope of protection of the claims.
[0005] The present disclosure provides a forming method of a semiconductor structure and the semiconductor structure.
[0006] A first aspect of the present disclosure provides a forming method of a semiconductor structure, the forming method comprising:
[0007] providing an initial structure, the initial structure comprising a substrate and a bit line structure spaced apart on the substrate;
[0008] forming an initial protection structure, the initial protection structure covering at least part of the sidewall of the bit line structure, the initial protection structure having a first height in a direction parallel to the bit line structure;
[0009] forming a shielding structure, the shielding structure covering at least part of the sidewall of the initial protection structure;
[0010] The shielding structure is an etching selection layer, and at least part of the initial protection structure exposed by the shielding structure is removed to form a protection structure having a second height.
[0011] According to some embodiments of the present disclosure, the initial protection structure is also formed on the top surface of the bit line structure and the surface of the substrate, and after forming the initial protection structure, before forming the shielding structure, the forming method further comprises:
[0012] removing the initial protection structure covering the surface of the substrate and removing the initial protection structure on the top surface of the bit line structure.
[0013] According to some embodiments of the present disclosure, the forming a shielding structure comprises:
[0014] depositing a third material to fill the trenches between the bit line structures partially, forming the shielding structure, the shielding structure having a second height in a direction parallel to the bit line structures.
[0015] According to some embodiments of the disclosure, the forming the shielding structure includes:
[0016] removing the initial protection structure exposed by the shielding structure, exposing sidewalls of the bit line structures above the second height.
[0017] According to some embodiments of the disclosure, the forming method further includes:
[0018] removing the shielding structure, exposing the protection structure and a top surface of the substrate.
[0019] According to some embodiments of the disclosure, the forming the initial protection structure includes:
[0020] depositing a first material to form the initial protection structure with a first thickness, the initial protection structure covering the bit line structures and a top surface of the substrate, the initial protection structure having a first density.
[0021] According to some embodiments of the disclosure, the forming the shielding structure includes:
[0022] depositing a second material to form the shielding structure with a second thickness, the shielding structure covering the initial protection structure, the shielding structure having a second density.
[0023] the first thickness is greater than the second thickness, and the first density is greater than the second density.
[0024] According to some embodiments of the disclosure, the forming the shielding structure includes:
[0025] adopting a first process to etch and remove the shielding structure and part of the initial protection structure, the initial protection structure remaining having a second height in a direction parallel to the bit line structures.
[0026] According to some embodiments of the disclosure, the first process has a greater etching selectivity ratio for the second material than for the first material.
[0027] According to some embodiments of the present disclosure, the first process is an anisotropic etching, an extending direction of the bit line structure is a vertical direction, and a setting direction of the substrate is a horizontal direction. The first process has a larger etching speed in the vertical direction than in the horizontal direction.
[0028] According to some embodiments of the present disclosure, the providing an initial structure comprises:
[0029] A substrate is provided, and the substrate comprises an active region.
[0030] A bit line structure is formed on the substrate.
[0031] According to some embodiments of the present disclosure, the forming a bit line structure on the substrate comprises:
[0032] A contact portion is formed, and the contact portion is in contact with the active region.
[0033] A conductive portion is formed, and the conductive portion covers a top surface of the contact portion.
[0034] An isolation portion is formed, and the isolation portion covers a top surface of the conductive portion.
[0035] According to some embodiments of the present disclosure, the protection structure covers at least a sidewall of the contact portion and a sidewall of the conductive portion.
[0036] According to some embodiments of the present disclosure, the forming method further comprises:
[0037] An insulating structure is formed, and the insulating structure covers a top surface of the bit line structure, a sidewall exposed by the bit line structure, and the protection structure.
[0038] A second aspect of the present disclosure provides a semiconductor structure, comprising: an initial structure comprising a substrate and a bit line structure spaced apart on the substrate;
[0039] A protection structure covers part of a sidewall of the bit line structure, and the protection structure has a second height in a direction parallel to the bit line structure.
[0040] According to some embodiments of the present disclosure, the substrate comprises an active region, the bit line structure comprises a contact portion, a conductive portion, and an isolation portion which are sequentially stacked on the substrate, and the contact portion is in contact with the active region of the substrate.
[0041] The protection structure covers at least a sidewall of the contact portion and a sidewall of the conductive portion.
[0042] According to some embodiments of the present disclosure, the semiconductor structure further comprises:
[0043] An insulating structure covers the top surface of the bit line structure, the sidewall exposed by the bit line structure, and the protection structure.
[0044] The forming method of the semiconductor structure and the semiconductor structure provided by the embodiments of the present disclosure increase a shielding structure in the process of the semiconductor structure, use the shielding structure as an etching selection layer, and define the profile of the sidewall of the bit line structure by adjusting the etching selection ratio of the initial protection structure and the shielding structure.
[0045] Other aspects can become apparent from the following detailed description, when taken in conjunction with the drawings, and the description being given with reference thereto. BRIEF DESCRIPTION OF DRAWINGS
[0046] The accompanying drawings incorporated in and forming a part of the specification illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the embodiments of the present disclosure. In the drawings:
[0047] Figure 1 is a flowchart of a forming method of a semiconductor structure according to an exemplary embodiment;
[0048] Figure 2 is a flowchart of a forming method of a semiconductor structure according to an exemplary embodiment;
[0049] Figure 3 is a flowchart of a forming method of a semiconductor structure according to an exemplary embodiment;
[0050] Figure 4 is a flowchart of a forming method of a semiconductor structure according to an exemplary embodiment;
[0051] Figure 5 is a flowchart of a forming method of a semiconductor structure according to an exemplary embodiment;
[0052] Figure 6 is a flowchart of a forming method of a semiconductor structure according to an exemplary embodiment;
[0053] Figure 7 is a schematic diagram of an initial structure provided in a forming method of a semiconductor structure according to an exemplary embodiment;
[0054] Figure 8 is a schematic diagram of forming an initial protection structure in a forming method of a semiconductor structure according to an exemplary embodiment;
[0055] Figure 9 Fig. 1 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing removal of part of an initial protection structure;
[0056] Figure 10 Fig. 2 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of a shielding structure;
[0057] Figure 11 Fig. 3 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing removal of exposed initial protection structure using the shielding structure as an etch selectivity layer;
[0058] Figure 12 Fig. 4 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing removal of the shielding structure;
[0059] Figure 13 Fig. 5 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of an initial protection structure;
[0060] Figure 14 Fig. 6 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of a shielding structure;
[0061] Figure 15 Fig. 7 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of a protection structure using a first process to etch the shielding structure and the initial protection structure; Figure 14 Fig. 8 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of a protection structure using a first process to etch the shielding structure and the initial protection structure;
[0062] Figure 16 Fig. 9 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing etching of the shielding structure and the initial protection structure using a first process;
[0063] Figure 17 Fig. 10 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of a protection structure using a first process to etch the shielding structure and the initial protection structure;
[0064] Figure 18 Fig. 11 is a schematic diagram illustrating a method of forming a semiconductor structure according to an example embodiment, showing formation of a protection structure using a first process to etch the shielding structure and the initial protection structure.
[0065] Reference numerals:
[0066] 100, initial structure; 110, substrate; 111, active region; 120, bit line structure; 121, contact portion; 122, conductive portion; 123, isolation portion;
[0067] 200, protection structure; 210, initial protection structure.
[0068] 300, shielding structure;
[0069] 400. insulating structure. DETAILED DESCRIPTION
[0070] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments will be described clearly and completely below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present disclosure. It should be noted that the embodiments in the present disclosure and the features in the embodiments can be combined with each other in any manner without conflict.
[0071] In the prior method for forming a semiconductor structure, the method for forming a protection structure on a sidewall of a bit line structure is as follows:
[0072] An initial structure is provided, and the initial structure includes a substrate and a bit line structure which is arranged on the substrate in a spaced manner.
[0073] An initial protection structure is formed, and the initial protection structure covers the bit line structure and exposes the substrate.
[0074] Part of the initial protection structure is etched to expose the substrate.
[0075] However, in the related art, the precision of etching to remove part of the initial protection structure is difficult to control, which may cause damage to the sidewall of the bit line structure, and brings great risk to subsequent processes, and seriously affects the yield and reliability of products.
[0076] An exemplary embodiment of the present disclosure provides a method for forming a semiconductor structure, as shown in Figure 1 Figure 1 A flow chart of a method for forming a semiconductor structure according to an exemplary embodiment of the present disclosure is shown, Figures 7-18 The schematic diagrams for each stage of the method for forming a semiconductor structure are shown below in combination with Figures 7-18 The method for forming a semiconductor structure is introduced.
[0077] The present embodiment is not limited to a semiconductor structure, and the semiconductor structure will be taken as a dynamic random access memory (DRAM) as an example for introduction below, but the present embodiment is not limited thereto, and the semiconductor structure in the present embodiment can also be other structures.
[0078] As shown in Figure 1 A method for forming a semiconductor structure according to an exemplary embodiment of the present disclosure includes the following steps:
[0079] Step S110: Provide an initial structure, which includes a substrate and bit line structures spaced on the substrate.
[0080] like Figure 7 As shown, the initial structure 100 includes a substrate 110 and bit line structures 120 disposed on the substrate 110. The bit line structures 120 are arranged in parallel at intervals, exposing a portion of the top surface of the substrate 110. The sidewalls of the bit line structures 120 and the exposed top surface of the substrate 110 form a trench.
[0081] The substrate 110 is a semiconductor substrate containing silicon material. For example, the semiconductor substrate can be a silicon substrate, a silicon-germanium substrate, or an SOI (silicon on insulator) substrate.
[0082] Step S120: Form an initial protective structure, the initial protective structure at least covering part of the sidewall of the bit line structure, the initial protective structure having a first height in a direction parallel to the bit line structure.
[0083] like Figure 8 , Figure 9 As shown, an initial protective structure 210 can be formed by atomic layer deposition (ALD) process. The material of the initial protective structure 210 may include silicon oxide (SiO2), silicon nitride (SiN), or silicon oxynitride (SiON).
[0084] In a direction parallel to the bit line structure 120, the initial protection structure 210 has a first height, which may be the same height as or lower than the height of the bit line structure 120.
[0085] Step S130: Form a shielding structure that at least covers part of the sidewall of the initial protective structure.
[0086] like Figure 10 , Figure 14 As shown, the shielding structure 300 covers all or part of the sidewalls of the initial protective structure 210.
[0087] Step S140: The masking structure is an etchable selective layer, which at least partially removes the initial protective structure exposed by the masked structure to form a protective structure with a second height.
[0088] like Figure 12As shown, by selecting the etching selectivity ratio of the shielding structure 300 and the initial protective structure 210, the shielding structure 300 and the initial protective structure 210 can be etched to remove part of the initial protective structure 210. The retained initial protective structure 210 forms the protective structure 200, which has a second height lower than the first height. That is, the protective structure 200 covers the sidewall of the bit line structure 120 at the second height.
[0089] In this embodiment, a shielding structure is used as an etching selective layer. By selecting the etching selectivity ratio between the shielding structure and the initial protective structure, part of the initial protective structure is removed to form a protective structure covering the sidewalls of the second height of the bit line structure. This achieves precise control over the sidewall contour of the bit line structure, ensuring the integrity of the sidewall contour. This provides a foundation for the development and mass production of semiconductor structures with smaller precision, and can guarantee the yield and reliability of semiconductor structures with minute precision.
[0090] According to an exemplary embodiment, this embodiment provides a method for forming a semiconductor structure, comprising the following steps:
[0091] Step S210: Provide an initial structure, which includes a substrate and bit line structures spaced on the substrate.
[0092] Step S220: Form an initial protective structure, which is formed on the sidewalls of the bit line structure, the top surface of the bit line structure, and the surface of the substrate.
[0093] Step S230: Remove the initial protective structure covering the substrate surface and remove the initial protective structure on the top surface of the bit line structure. The retained initial protective structure has a first height in a direction parallel to the bit line structure, and the initial protective structure covers the sidewall of the first height of the bit line structure.
[0094] Step S240: Form a shielding structure that at least covers part of the sidewall of the initial protective structure.
[0095] Step S250: The shielding structure is an etchable selective layer, which at least partially removes the initial protective structure exposed by the shielded structure to form a protective structure with a second height.
[0096] The implementation of step S210 in this embodiment is the same as that of step S110 in the above embodiment. The implementation of steps S240 and S250 in this embodiment is the same as that of steps S130 and S140 in the above embodiment. Therefore, they will not be described again here.
[0097] In step S220 of this embodiment, as follows Figure 8 As shown, refer to Figure 7The initial protection structure 210 is formed on the sidewall of the bit line structure 120, the top surface of the bit line structure 120 and the surface of the substrate 110. The initial protection structure 210 can be formed by an atomic layer deposition (ALD) process, and the material of the initial protection structure 210 can include silicon oxide (SiO2), silicon nitride (SiN) or silicon oxynitride (SiON). The initial protection structure 210 covers the bit line structure 120 and the top surface of the exposed substrate 110.
[0098] In step S230 of the embodiment, as shown in FIG. 2B, the initial protection structure 210 covering the surface of the substrate 110 and the top surface of the bit line structure 120 is removed by a dry etching process. In the etching process, part of the initial protection structure 210 covering the top of the sidewall of the bit line structure 120 is removed together with the initial protection structure 210 covering the top surface of the bit line structure 120. The remaining initial protection structure 210 has a first height in a direction parallel to the bit line structure 120, and the initial protection structure 210 covers the sidewall of the bit line structure 120 with the first height. Figure 9 Figure 8 In step S230 of the embodiment, as shown in FIG. 2B, the initial protection structure 210 covering the surface of the substrate 110 and the top surface of the bit line structure 120 is removed by a dry etching process. In the etching process, part of the initial protection structure 210 covering the top of the sidewall of the bit line structure 120 is removed together with the initial protection structure 210 covering the top surface of the bit line structure 120. The remaining initial protection structure 210 has a first height in a direction parallel to the bit line structure 120, and the initial protection structure 210 covers the sidewall of the bit line structure 120 with the first height.
[0099] In the embodiment, the initial protection structure covering the bit line structure and the top surface of the exposed substrate is formed, and then part of the initial protection structure is removed by an etching process to expose the top surface of the substrate for subsequent processes of the semiconductor structure. The initial protection structure covering the top surface of the substrate is removed together with part of the initial protection structure covering the top surface of the bit line structure and the sidewall of the bit line structure. The remaining initial protection structure has a first height in a direction parallel to the bit line structure, and the initial protection structure covers the sidewall of the bit line structure with the first height. The substrate is exposed for subsequent processes of the semiconductor structure.
[0100] According to an example embodiment, the embodiment provides a method for forming a semiconductor structure, including the following steps:
[0101] In step S310, an initial structure is provided, and the initial structure includes a substrate and bit line structures arranged on the substrate.
[0102] In step S320, an initial protection structure is formed on the sidewall of the bit line structure, the top surface of the bit line structure and the surface of the substrate.
[0103] In step S330, the initial protection structure covering the surface of the substrate and the initial protection structure covering the top surface of the bit line structure are removed. The remaining initial protection structure has a first height in a direction parallel to the bit line structure, and the initial protection structure covers the sidewall of the bit line structure with the first height.
[0104] In step S330, the initial protection structure covering the surface of the substrate and the initial protection structure covering the top surface of the bit line structure are removed. The remaining initial protection structure has a first height in a direction parallel to the bit line structure, and the initial protection structure covers the sidewall of the bit line structure with the first height. Figure 9 As shown, when removing the initial protective structure 210 covering the surface of the substrate 110 and removing the initial protective structure 210 on the top surface of the bit line structure 120 in step S330, the outline of the top part of the sidewall of the retained initial protective structure 210 may be etched and damaged.
[0105] Step S340: Deposit a third material to partially fill the trenches between the bit line structures to form a shielding structure, the shielding structure having a second height in a direction parallel to the bit line structures.
[0106] like Figure 10 As shown, in this embodiment, when forming the shielding structure 300, the height of the shielding structure 300 is adjusted so that the outline of the initial protective structure 210 covered by the formed shielding structure 300 is complete, exposing the damaged parts of the initial protective structure 210.
[0107] For example, such as Figure 10 As shown, refer to Figure 9 The third material portion can be filled into the trench between the bit line structures 120 by spin coating to form a shielding structure 300. The shielding structure 300 has a second height and covers the top surface of the substrate 110 and the sidewall of the bit line structure 120 of the second height. The second height is lower than the first height.
[0108] The third material can be a carbon-containing material, such as spin-on-carbon (SOC) or photoresist (PR). In this embodiment, the third material is spin-on-carbon (SOC).
[0109] Step S350: Remove the initial protective structure exposed by the obscured structure to expose the sidewalls of the bitline structure above the second height, forming a protective structure with a second height.
[0110] In step S350 of this embodiment, as follows Figure 11 As shown, an etching process with a high selectivity to the third material is selected to remove the initial bit line structure 210 exposed by the shielded structure 300, while retaining the initial bit line structure covered by the shielded structure 300 as the protective structure 200. The protective structure 200 has a second height, and the side profile of the protective structure 200 is complete.
[0111] In this embodiment, the height of the initial protective structure to be retained is defined by adjusting the height of the filling shielding structure, so that the outline of the formed protective structure is complete, thereby defining the side outline of the alignment line structure and improving the product yield and reliability.
[0112] In this exemplary embodiment, step S350 is followed by:
[0113] Step S360: removing the shielding structure to expose the top surface of the substrate and the protective structure.
[0114] As shown in FIG. 3B, the shielding structure 300 is peeled off from the trenches between the bit line structures 120 to expose the top surface of the substrate 110 and the protective structure 200, so as to facilitate subsequent processes of the semiconductor structure. Figure 12 Figure 11 According to one exemplary embodiment, the present embodiment provides a method for forming a semiconductor structure, comprising the following steps:
[0115] According to one exemplary embodiment, the present embodiment provides a method for forming a semiconductor structure, comprising the following steps:
[0116] Step S410: providing an initial structure, the initial structure comprising a substrate and bit line structures spaced apart on the substrate.
[0117] Step S420: depositing a first material to form an initial protective structure with a first thickness, the initial protective structure covering the bit line structures and the top surface of the substrate, the initial protective structure having a first density, the initial protective structure having a first height in a direction parallel to the bit line structures.
[0118] As shown in FIG. 2B, the first material can be deposited by an atomic layer deposition (ALD) process to form the initial protective structure 210 (see FIG. 2C) with the first thickness t1 covering the bit line structures 120 and the top surface of the substrate 110, and the temperature and deposition rate of the first material are adjusted to make the initial protective structure 210 have the first density. In the present embodiment, the initial protective structure 210 covers the bit line structures 120, and the initial protective structure 210 has the first height equal to the height of the bit line structures 120. Figure 8 Figure 15 As shown in FIG. 2B, the first material can be deposited by an atomic layer deposition (ALD) process to form the initial protective structure 210 (see FIG. 2C) with the first thickness t1 covering the bit line structures 120 and the top surface of the substrate 110, and the temperature and deposition rate of the first material are adjusted to make the initial protective structure 210 have the first density. In the present embodiment, the initial protective structure 210 covers the bit line structures 120, and the initial protective structure 210 has the first height equal to the height of the bit line structures 120.
[0119] The first material can be one of silicon oxide (SiO2), silicon nitride (SiN), or silicon oxynitride (SiON), or a mixture of two or more thereof.
[0120] Step S430: depositing a second material to form a shielding structure with a second thickness, the shielding structure covering the initial protective structure, the shielding structure having a second density; the first thickness is greater than the second thickness, and the first density is greater than the second density.
[0121] As shown in FIG. 3B, the shielding structure 300 is peeled off from the trenches between the bit line structures 120 to expose the top surface of the substrate 110 and the protective structure 200, so as to facilitate subsequent processes of the semiconductor structure. Figure 14 Figure 8 As shown in FIG. 3B, the shielding structure 300 is peeled off from the trenches between the bit line structures 120 to expose the top surface of the substrate 110 and the protective structure 200, so as to facilitate subsequent processes of the semiconductor structure. Figure 15 ), and the second density is adjusted by adjusting the temperature and deposition rate of the second material to form the blocking structure 300 with the second density, and the first thickness t1 is greater than the second thickness t2 (see Figure 15 ), and the first density is greater than the second density.
[0122] The second material can be one of silicon oxide (SiO2), silicon nitride (SiN), or silicon oxynitride (SiON), or a mixture of two or more thereof, and the second material can be the same as or different from the first material.
[0123] Step S440: etching and removing the blocking structure and part of the initial protection structure by a first process, and the remaining initial protection structure has a second height in a direction parallel to the bit line structure.
[0124] In step S440 of the embodiment, the blocking structure 300 and part of the initial protection structure 210 are etched and removed by a first process. The first process has a greater etching selectivity for the second material than for the first material. The first process is an anisotropic etching process, with the extension direction of the bit line structure 120 as the vertical direction and the setting direction of the substrate 100 as the horizontal direction. The first process has a greater etching speed in the vertical direction than in the horizontal direction.
[0125] In the embodiment, the process of etching and removing the blocking structure 300 and part of the initial protection structure 210 by the first process includes: first, as shown in Figure 16 , referring to Figure 14 , the part of the blocking structure 300 is etched and removed by the first process, exposing the initial protection structure 210 covering the top surface of the bit line structure 120 and the initial protection structure 210 covering the top surface of the substrate 110. Then, as shown in Figure 17 , referring to Figure 18 , the remaining blocking structure 300 and exposed initial protection structure 210 are etched by the first process. Since the first process has a greater etching speed in the vertical direction than in the horizontal direction, during the process of etching and removing the blocking structure 300 by the first process, in the vertical direction, as shown in Figure 18 , Figure 12 , the blocking structure 300 covering the sidewall of the initial protection structure 210 is gradually etched and removed from top to bottom, and the sidewall of the initial protection structure 210 is gradually exposed from top to bottom. The first process etches and removes the exposed initial protection structure 210, removing the initial protection structure 210 covering the top surface of the bit line structure 120, the initial protection structure 210 covering the top surface of the substrate 110, and part of the initial protection structure 210 covering the top sidewall of the bit line structure 120.
[0126] In this embodiment, by adjusting the etching time of the first process and the etching selectivity ratio of the first and second materials, the shielding structure and part of the initial protective structure are removed to expose the top surface of the substrate. The retained initial protective structure covers the sidewall of the bit line structure. The initial protective structure has a second height, thereby defining the side profile of the bit line structure.
[0127] According to an exemplary embodiment, this embodiment is a description of providing an initial structure in step S110 of the above embodiment.
[0128] The steps to provide an initial structure are as follows:
[0129] S111: Provides a substrate, which includes an active region.
[0130] like Figure 7 As shown, the substrate 110 can be made of a silicon-containing semiconductor material, which can be one or more of silicon, germanium, silicon-germanium compounds, and silicon-carb compounds. A plurality of active regions 111 are distributed in the substrate 110.
[0131] S112: Forming bit line structures on the substrate.
[0132] like Figure 7 As shown, a bitline structure 120 is formed on a substrate 110, including: forming a contact portion 121 on the substrate 110, the bottom surface of the contact portion 121 being in contact with an active region 111, the material of the contact portion 121 including polysilicon; forming a conductive portion 122, the conductive portion 122 covering the top surface of the contact portion 121, the material of the conductive portion 122 including one or more of conductive metals, conductive metal nitrides, and conductive alloys, for example, the conductive metal can be titanium, tantalum, or tungsten; forming an isolation portion 123, the isolation portion 123 covering the top surface of the conductive portion 122, the material of the isolation portion 123 including materials with good insulating properties such as silicon nitride or silicon oxynitride, the isolation portion 123 covering the conductive portion 122, serving to protect the conductive portion 122.
[0133] According to some embodiments of this disclosure, the formed protective structure at least covers the sidewalls of the contact portion and the sidewalls of the conductive portion.
[0134] like Figure 12 , Figure 13 As shown, the protective structure 200 has a second height in a direction parallel to the bit line structure 120. The second height is higher than the sum of the heights of the contact portion 121 and the conductive portion 122 of the bit line structure 120. The protective structure 200 covers the sidewalls of the contact portion 121 and the sidewalls of the conductive portion 122, preventing the conductive metal in the conductive portion 121 from penetrating and thus protecting the bit line structure 120.
[0135] According to one example embodiment, the present embodiment provides a method for forming a semiconductor structure, comprising the following steps:
[0136] Step S510: providing an initial structure, the initial structure comprising a substrate and a bit line structure spaced apart on the substrate.
[0137] Step S520: forming an initial protection structure, the initial protection structure covering at least part of the sidewall of the bit line structure, the initial protection structure having a first height in a direction parallel to the bit line structure.
[0138] Step S530: forming a shielding structure, the shielding structure covering at least part of the sidewall of the initial protection structure.
[0139] Step S540: the shielding structure is an etching selection layer, at least part of the initial protection structure exposed by the shielding structure is removed to form a protection structure having a second height.
[0140] Step S550: forming an insulating structure, the insulating structure covering the top surface of the bit line structure, the sidewall exposed by the bit line structure and the protection structure.
[0141] The steps S510-S540 of the present embodiment and the implementation of the steps S110-S140 of the above-mentioned embodiment are the same, and will not be described here.
[0142] In the step S550 of the present embodiment, as shown in Figure 13 , referring to Figure 12 , the insulating structure 400 can be formed by depositing an insulating material through an atomic layer deposition (ALD) process, the insulating structure 400 covering the top surface of the bit line structure 120, the sidewall exposed by the bit line structure 120 and the protection structure 200.
[0143] The semiconductor structure provided by one example embodiment of the present disclosure comprises an initial structure 100 and a protection structure 200, as shown in Figure 12 , Figure 13 , the initial structure 100 comprises a substrate 110 and a bit line structure 120 spaced apart on the substrate 110, and the protection structure 200 covers part of the sidewall of the bit line structure 120, the protection structure 200 having a second height in a direction parallel to the bit line structure 120.
[0144] The semiconductor structure of the present embodiment has an accurate and complete profile of the sidewall of the bit line structure, and has high yield and reliability.
[0145] According to one example embodiment, most of the semiconductor structure of the present embodiment is the same as the above-mentioned embodiment, and the difference between the present embodiment and the above-mentioned embodiment is that, as shown in Figure 12、 Figure 13 As shown in FIG. 1, the substrate 110 comprises an active region 111, the bit line structure 120 comprises a contact portion 121, a conductive portion 122 and an isolation portion 123 which are sequentially stacked on the substrate 110, the contact portion 121 is in contact with the active region 111 of the substrate 110, and the protection structure 200 covers at least the sidewall of the contact portion 121 and the sidewall of the conductive portion 122.
[0146] According to an example embodiment, the semiconductor structure of the present embodiment is the same as the above-mentioned embodiments in most aspects, and the difference between the present embodiment and the above-mentioned embodiments is that, as shown in FIG. 2, the semiconductor structure further comprises an insulation structure 400, the insulation structure 400 covers the top surface of the bit line structure 120, the sidewall exposed by the bit line structure 120 and the protection structure 200. Figure 13 As shown in FIG. 2, the semiconductor structure further comprises an insulation structure 400, the insulation structure 400 covers the top surface of the bit line structure 120, the sidewall exposed by the bit line structure 120 and the protection structure 200.
[0147] The semiconductor structure of the present embodiment, the protection structure covers the sidewall of the second height of the bit line structure, the sidewall profile of the bit line structure is accurate and integral, which provides a basis for the research and mass production of the semiconductor structure in the direction of smaller accuracy, and can ensure the yield and reliability of the semiconductor structure with small accuracy.
[0148] The embodiments or implementations in the present specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between the embodiments can be mutually referred to.
[0149] In the description of the present specification, the description of the terms “embodiment”, “example embodiment”, “some implementations”, “illustrative implementation”, “example” and the like means that the specific features, structures, materials or characteristics described in connection with the implementation or example are included in at least one implementation or example of the present disclosure.
[0150] In the present specification, the illustrative description of the above-mentioned terms does not necessarily refer to the same implementation or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more implementations or examples in a suitable manner.
[0151] In the description of the present disclosure, it should be noted that the terms “center”, “upper”, “lower”, “left”, “right”, “vertical”, “horizontal”, “inner”, “outer” and the like indicate the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.
[0152] It can be understood that the terms "first", "second" and the like used in the present disclosure can be used in the present disclosure to describe various structures, but these structures are not limited by these terms. These terms are only used to distinguish the first structure from the other structure.
[0153] In one or more drawings, identical elements are denoted by like reference numerals. For the purpose of clarity, not every component can be called out in every drawing. Furthermore, some components can not be shown in some drawings to avoid confusion. For the sake of brevity, some structures obtained after several steps can be described in one figure. Many specific details of the present disclosure are described below in order to provide a thorough understanding of the present disclosure. However, as will be readily understood by one skilled in the art, the present disclosure can be practiced without incorporating these specific details.
[0154] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.
Claims
1. A method for forming a semiconductor structure, characterized in that, The method for forming the semiconductor structure includes: An initial structure is provided, the initial structure including a substrate and bit line structures spaced apart on the substrate; An initial protective structure is formed, the initial protective structure at least covering a portion of the sidewalls of the bit line structure, and the initial protective structure has a first height in a direction parallel to the bit line structure; A shielding structure is formed, which at least covers a portion of the sidewall of the initial protective structure; Using the shielding structure as the etch select layer, at least partially remove the initial protective structure exposed by the shielding structure to form a protective structure with a second height; The initial protective structure is also formed on the top surface of the bit line structure and the surface of the substrate. After forming the initial protective structure and before forming the shielding structure, the forming method further includes: removing the initial protective structure covering the surface of the substrate and removing the initial protective structure from the top surface of the bit line structure.
2. The method for forming a semiconductor structure according to claim 1, characterized in that, The formation of the shielding structure includes: A third material is deposited to partially fill the trenches between the bit line structures, forming the shielding structure, which has a second height in a direction parallel to the bit line structures.
3. The method for forming a semiconductor structure according to claim 2, characterized in that, The step of using the shielding structure as the etch select layer to at least partially remove the initial protective structure exposed by the shielding structure includes: Remove the initial protective structure exposed by the shielding structure to expose the sidewalls of the bitline structure above the second height.
4. The method for forming a semiconductor structure according to claim 3, characterized in that, The forming method further includes: Remove the shielding structure to expose the top surface of the protective structure and the substrate.
5. The method for forming a semiconductor structure according to claim 1, characterized in that, The formation of the initial protective structure includes: A first material is deposited to form the initial protective structure of a first thickness, the initial protective structure covering the bit line structure and the top surface of the substrate, the initial protective structure having a first density.
6. The method for forming a semiconductor structure according to claim 5, characterized in that, The formation of the shielding structure includes: A second material is deposited to form the shielding structure of a second thickness, the shielding structure covering the initial protective structure, the shielding structure having a second density; The first thickness is greater than the second thickness, and the first density is greater than the second density.
7. The method for forming a semiconductor structure according to claim 6, characterized in that, The step of using the shielding structure as the etch select layer to at least partially remove the initial protective structure exposed by the shielding structure includes: The first process is used to etch away the shielding structure and part of the initial protective structure, and the retained initial protective structure has a second height in a direction parallel to the bit line structure.
8. The method for forming a semiconductor structure according to claim 7, characterized in that, The etching selectivity of the first process for the second material is greater than that for the first material.
9. The method for forming a semiconductor structure according to claim 7, characterized in that, The first process is anisotropic etching, with the extension direction of the bit line structure as the vertical direction and the substrate setting direction as the horizontal direction. The etching rate of the first process in the vertical direction is greater than the etching rate in the horizontal direction.
10. The method for forming a semiconductor structure according to claim 1, characterized in that, The provision of the initial structure includes: A substrate is provided, the substrate including an active region; A bit line structure is formed on the substrate.
11. The method for forming a semiconductor structure according to claim 10, characterized in that, The formation of the bit line structure on the substrate includes: A contact portion is formed, which contacts the active region; A conductive portion is formed, which covers the top surface of the contact portion; An isolation portion is formed, which covers the top surface of the conductive portion.
12. The method for forming a semiconductor structure according to claim 11, characterized in that, The protective structure at least covers the sidewalls of the contact portion and the sidewalls of the conductive portion.
13. The method for forming a semiconductor structure according to claim 1, characterized in that, The forming method further includes: An insulating structure is formed, which covers the top surface of the bit line structure, the exposed sidewalls of the bit line structure, and the protective structure.
14. A method for forming a semiconductor structure, characterized in that, The method for forming the semiconductor structure includes: An initial structure is provided, the initial structure including a substrate and bit line structures spaced apart on the substrate; An initial protective structure is formed, the initial protective structure at least covering a portion of the sidewalls of the bit line structure, and the initial protective structure has a first height in a direction parallel to the bit line structure; A shielding structure is formed, which at least covers a portion of the sidewall of the initial protective structure; Using the shielding structure as the etch select layer, at least partially remove the initial protective structure exposed by the shielding structure to form a protective structure with a second height; The formation of the initial protective structure includes: A first material is deposited to form the initial protective structure of a first thickness, the initial protective structure covering the bit line structure and the top surface of the substrate, the initial protective structure having a first density.
15. A semiconductor structure, characterized in that, The semiconductor structure is formed by the forming method according to any one of claims 1-14, and the semiconductor structure comprises: An initial structure, the initial structure comprising a substrate and bit line structures spaced apart on the substrate; A protective structure that covers a portion of the sidewall of the bitline structure, the protective structure having a second height in a direction parallel to the bitline structure.
16. The semiconductor structure according to claim 15, characterized in that, The substrate includes an active region, and the bit line structure includes a contact portion, a conductive portion and an isolation portion stacked sequentially on the substrate, wherein the contact portion is in contact with the active region of the substrate; The protective structure at least covers the sidewalls of the contact portion and the sidewalls of the conductive portion.
17. The semiconductor structure according to claim 15, characterized in that, The semiconductor structure also includes: An insulating structure that covers the top surface of the bit line structure, the exposed sidewalls, and the protective structure.
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