Chip-to-chip interconnect architecture in semiconductors

Abstract

A PCB bridge, used to interconnect two or more semiconductor chips for data communication, comprises: a plurality of metal strips; and a dielectric material disposed between the plurality of metal strips. The PCB bridge is used in a vertical direction within a semiconductor module to interconnect two or more semiconductor chips. By adjusting the dielectric material and trace width of the PCB bridge, the vertical direction of the PCB bridge provides flexible impedance matching. By matching the impedance to the source, the vertical direction of the PCB bridge prevents signal reflections. The trace length of the PCB bridge is limited by the spacing between the two semiconductor chips, which further limits the inductance of the PCB bridge traces.

Description

Technical Field

[0001] The present invention relates generally to semiconductor devices and more particularly to chip-to-chip interconnections between different semiconductor chips. Background Art

[0002] Chip-to-chip interconnects are functional blocks that provide data communication between two different semiconductor chips assembled into a module. Interconnects may also be required in PCBs, PCB substrates, ICs, photonic ICs, and other components requiring data communication interconnects. Chip-to-chip interconnects create a connection between two chips to achieve maximum power transfer and ultra-high bandwidth transmission. Chip-to-chip interconnects typically consist of different control blocks that provide a seamless connection between the connection pads on the two chips. This is achieved using high-speed or high-density parallel architectures optimized to support a variety of advanced 2D, 2.5D, and 3D packaging technologies.

[0003] Chip-to-chip interconnect is a key structure in the industry trend towards single-chip SoC design and multi-chip SoC design. This approach alleviates the growing concerns about high cost / low yield at small process nodes and provides additional product modularity and flexibility.

[0004] In order to achieve good chip-to-chip interconnection, transmission lines are required to achieve maximum power transfer and ultra-high bandwidth transmission. Transmission lines can be modeled using generalized lumped elements. The generalized lumped element model of a transmission line can be used to calculate the characteristic impedance, phase velocity, and the two parts of the propagation constant (phase and attenuation). Figure 21 As shown in Figure 1, the model uses an infinitesimal section of a transmission line with four elements. Here, the series resistance, series inductance, shunt conductance, and shunt capacitance are all normalized per unit length (indicated by the "prime" symbol).

[0005] L = series inductance per unit length, expressed in H / m, representing the total self-inductance of the conductor.

[0006] C = shunt capacitance per unit length, expressed in F / m, which represents the capacitance due to the close proximity of conductors.

[0007] R = series resistance per unit length, expressed in Ω / m, representing the resistivity losses due to the finite conductivity of the conductor.

[0008] G = parallel conductance per unit length, expressed in S / m, representing the dielectric loss of the material.

[0009] For lossless transmission lines, series resistance and parallel conductance can be neglected. The model can be simplified to an LC connection. The LC connection forms an LC low-pass filter that cuts off high-frequency signals and limits the transmission bandwidth. At the same time, impedance matching is required in the LC connection to minimize signal reflections or maximize power transfer. In DC circuits, the source and load should be equal. In AC circuits, the source should be equal to the load or the complex conjugate of the load, depending on the goal.

[0010] These two issues dominate the communication performance of the interconnect.

[0011] PCBs typically use two types of transmission lines: microstrip and stripline. Each transmission line consists of a signal trace and (multiple) reference planes. Due to the transmission line geometry, the signal trace and reference planes must be treated as a single unit. Furthermore, the signal trace and reference planes should never be separated, as microstrip and stripline transmission lines have unique EM field distributions that define their properties. The EM field distribution of microstrip and stripline transmission lines can be modified by selecting the PCB material (dielectric constant and loss tangent) and adjusting the guided wave wavelength, propagation velocity, and characteristic impedance. These parameters ultimately alter the EM field distribution, thereby changing the transmission line properties.

[0012] In current packaging technology, wire bonding is one of the most common methods for interconnecting two chips. Au wire or Cu wire is the most common bonding wire, which is attached to the wire bonding pad by using ultrasonic energy or thermosonic energy. This creates good adhesion and forms an ohmic contact between the bonding wire and the bonding pad. However, since the dielectric between the bonding wires is air and the wire-to-wire distance is fixed, this means that the capacitance between the two bonding wires is generally fixed. This limits the signal bandwidth and makes it difficult to achieve good impedance matching between the source and the load. In general, wire bonding technology provides a high degree of interconnect flexibility, but poor impedance matching. In addition, in wire bonding solutions, the wire diameter is limited by the size of the bonding pad. In addition, in order to build different architectures, such as step difference or for tilted bonding between two chips, slightly longer wires are used for tilted bonding between the two chips in the assembly process.

[0013] In advanced technologies requiring high-standard specifications, silicon bridges are used to create interconnects. In silicon bridge designs, the dielectric is typically fixed to SiO2, which means a fixed dielectric constant. This requires careful design of trace width to achieve good impedance matching. The silicon bridge bonding process requires a flip-chip bonding process, which means very strict thickness requirements between the two chips. Generally speaking, silicon bridge interconnects provide good impedance matching, but are subject to the stringent flip-chip bonding process. Trace width is limited by the spacing of the pads in the silicon bridge.

[0014] Furthermore, due to the manufacturing process, the silicon bridge is rectangular. Therefore, the flip-chip process requires very strict height requirements. If there is a step difference between the two chips, the bond may open.

[0015] Both of the above methods suffer from yield loss issues because both methods are not conducive to rework. The bonding pads are easily damaged by the wire bonding process or the flip chip process.

[0016] Therefore, there is a need for an interconnect between the two chips that provides flexibility for impedance matching requirements and avoids yield loss issues.

[0017] Purpose of the Invention

[0018] It is an object of the present invention to create an interconnection between two semiconductor chips that provides flexibility for impedance matching requirements.

[0019] It is an object of the present invention to create an interconnection between two semiconductor chips that has no restrictions on the choice of trace width.

[0020] It is an object of the present invention to create an interconnection between two semiconductor chips which facilitates a non-destructive reworking process.

[0021] Another object of the present invention is to handle different architectures during the assembly process, such as stepping and tilting issues between two chips.

[0022] Another object of the present invention is to provide similar impedance matching performance while having lower packaging requirements than silicon bridges.

[0023] It is a further object of the present invention to create an interconnection between two semiconductor chips which is low cost, has good impedance matching and is reworkable and flexible.

[0024] To further illustrate the advantages and features of the present invention, the present invention will be described in more detail with reference to the specific embodiments shown in the accompanying drawings. It will be appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. Summary of the Invention

[0025] One aspect of the present invention provides a PCB bridge for interconnecting two or more semiconductor chips for data communication between the semiconductor chips, comprising: a plurality of metal strips, wherein each metal strip is aligned one after another, each metal strip having two legs or connectors for contacting and connecting with connection pads on the semiconductor chip, and wherein the shapes and sizes of the two legs or connectors of each metal strip are cut to be the same or different from each other using a cutting technology; and a dielectric material arranged between the plurality of metal strips, wherein the PCB bridge is used in a vertical direction in a semiconductor module for interconnecting two or more semiconductor chips, wherein the vertical direction of the PCB bridge provides flexible impedance matching by adjusting the dielectric material and trace width of the PCB bridge, wherein the vertical direction of the PCB bridge avoids signal reflection by matching the impedance with the source, and wherein the trace length of the PCB bridge is limited by the spacing between the two semiconductor chips, which further limits the inductance of the trace of the PCB bridge.

[0026] One embodiment of the present invention provides that the plurality of metal strips are made of copper, the dielectric material is prepreg, and the vertical arrangement of the PCB bridge provides an infinite trace width, which further improves the flexibility of impedance matching.

[0027] One embodiment of the present invention provides that the dielectric material has a dielectric constant in the range of 2-5.

[0028] Another embodiment of the present invention provides for the manufacture of PCB bridges by cutting legs or connectors of metal strips using laser cutting technology to provide regular or irregular shapes and sizes by varying the laser cutting pattern.

[0029] One embodiment of the present invention provides a PCB bridge with flexible shapes and sizes of metal strap legs or connectors to compensate for step differences in semiconductor modules by making one leg or connector of the metal strap longer than the other legs or connectors of the metal strap.

[0030] Yet another embodiment of the present invention provides a PCB bridge having flexible shapes and sizes of legs or connectors of metal strips to compensate for the tilting problem in semiconductor modules by tilting the PCB panel while making a laser cutting pattern during a laser cutting technique.

[0031] One embodiment of the present invention provides a PCB bridge fabricated as a fully shielded stripline PCB bridge structure, wherein, in addition to including a plurality of metal strips and a dielectric material disposed between the plurality of metal strips, the fully shielded stripline PCB bridge structure further includes one or more metal deposition layers at the top and bottom of the fully shielded stripline PCB bridge structure; and wherein the fully shielded stripline PCB bridge structure forms an electromagnetic field barrier because the fully shielded stripline PCB bridge structure is shielded by the metal deposition layers at the top and bottom and the intermediate filler of the dielectric material, and the fully shielded stripline PCB bridge structure blocks noise interference from space.

[0032] One embodiment of the present invention provides a PCB bridge fabricated as a stripline PCB bridge structure with an external component on top, wherein in addition to including a plurality of metal strips and a dielectric material disposed between the plurality of metal strips, the stripline PCB bridge structure with an external component on top further includes an external component on top of the PCB bridge, and wherein the external component is at least one of an inductor, a capacitor, a resistor, or a ferrite bead.

[0033] Another embodiment of the present invention provides a PCB bridge fabricated as a stripline fan-out type PCB bridge structure, wherein in addition to including a plurality of metal strips and a dielectric material disposed between the plurality of metal strips, the stripline fan-out type PCB bridge structure further includes a conductive material between the plurality of metal strips connecting every two metal strips in the plurality of metal strips, and wherein the stripline fan-out type PCB bridge structure has two pitches, one pitch being 'P' and the other being twice the pitch 'P'.

[0034] Another embodiment of the present invention provides a PCB bridge manufactured as a stripline fan-out type PCB bridge structure with embedded single-layer capacitors, wherein in addition to including multiple metal strips and dielectric materials arranged between the multiple metal strips, the stripline fan-out type PCB bridge structure with embedded single-layer capacitors also includes conductive materials between the multiple metal strips connecting every two metal strips in the multiple metal strips, and single-layer capacitors embedded between the two metal strips.

[0035] Another embodiment of the present invention provides a PCB bridge manufactured as a stripline fan-out type PCB bridge structure with embedded multilayer capacitors and serving as a ground layer, wherein in addition to including multiple metal strips and dielectric materials arranged between the multiple metal strips, the stripline fan-out type PCB bridge structure with embedded multilayer capacitors also includes a conductive material connecting all the multiple metal strips at their ends.

[0036] Another embodiment of the present invention provides a PCB bridge manufactured as a stripline fan-out type PCB bridge structure with embedded multilayer capacitors as a signal layer, wherein in addition to including multiple metal strips and dielectric materials arranged between the multiple metal strips, the stripline fan-out type PCB bridge structure with embedded multilayer capacitors also includes a conductive material connecting the alternating metal strips among the multiple metal strips at their ends.

[0037] One embodiment of the present invention provides, in addition to a 2D arrangement, a PCB bridge in a single semiconductor module that interconnects more than two semiconductor chips in a 3D arrangement, wherein in the 3D arrangement, the plurality of metal strips in the PCB bridge include paired metal strips, wherein the paired metal strips are aligned one after another, each metal strip in the paired metal strips is stacked on top of another, and each metal strip in the paired metal strips has two legs or connectors for contacting and connecting with the semiconductor chips in the 3D arrangement; and wherein the 3D arrangement is a 3D stacked structure including a PCB bridge that interconnects at least four semiconductor chips, wherein two of the four semiconductor chips are stacked on each other and the other two are stacked on each other, and then the stacked two semiconductor chips are interconnected with the other stacked two semiconductor chips by the stacked and aligned paired metal strips in the PCB bridge in a vertical direction of the PCB bridge.

[0038] Another embodiment of the present invention provides at least two such PCB bridges stacked together and forming independent cross-connections to form a 3D cross-structure for connecting two different signals, which is suitable for use in space-constrained designs with two independent connections.

[0039] One embodiment of the present invention provides that, in addition to a 2D arrangement, at least two such PCB bridges in a single semiconductor module also interconnect more than two semiconductor chips in a 3D fan-out cross structure, wherein the 3D fan-out cross structure includes at least two PCB bridges and is used to fan out chip signals into three paths, wherein the at least two PCB bridges are stacked together to form a fan-out cross connection, and the at least two PCB bridges interconnect at least four semiconductor chips, wherein at least two of the four semiconductor chips are opposite to each other, and the other two of the four semiconductor chips are opposite to each other to form a fan-out structure, wherein the metal strips and / or legs or connectors of one of the at least two PCB bridges are connected to at least one of the four semiconductor chips via a connection node, and wherein the at least two PCB bridges are in a vertical direction to interconnect the at least four semiconductor chips.

[0040] One aspect of the present invention provides a method for manufacturing a PCB bridge, which is used for interconnecting two or more semiconductor chips to communicate data between the semiconductor chips, comprising: fixing a PCB panel to one or more panel fixtures at the corners of the PCB; drawing laser cutting lines to mark a plurality of metal strips of the PCB bridge, wherein each metal strip has two legs or connectors to contact and connect with connection pads on the semiconductor chip, and wherein the shapes and sizes of the two legs or connectors of each metal strip are drawn to be the same or different from each other to solve semiconductor assembly problems, including step problems and tilt problems; and cutting along the drawn laser lines. The present invention relates to a method for fabricating a PCB bridge by laser cutting a plurality of metal strips along a line; aligning the cut plurality of metal strips one after another; and disposing a dielectric material between the plurality of metal strips to fabricate the PCB bridge; and wherein the PCB bridge is used in a vertical direction in semiconductor assembly to interconnect two or more semiconductor chips, wherein the vertical direction of the PCB bridge provides flexible impedance matching by adjusting the dielectric material and trace width of the PCB bridge, wherein the vertical direction of the PCB bridge avoids signal reflection by matching the impedance to a source, and wherein the trace length of the PCB bridge is limited by the spacing between the two semiconductor chips, which further limits the inductance of the trace of the PCB bridge. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] To better understand the embodiments of the systems and methods described herein, and to more clearly show how they may be implemented, reference will now be made, for example, to the drawings wherein like reference numerals refer to like elements / components throughout, and

[0042] in:

[0043] Figure 1-Figure 3 A perspective view, a top view, and a side view of a PCB bridge according to an embodiment are shown.

[0044] Figure 4-Figure 6 Top, perspective, and side views are shown of an exemplary architecture for establishing interconnection between two semiconductor chips using a PCB bridge according to an embodiment of the present invention.

[0045] Figure 7 、 Figure 8A and 8B Exemplary views are shown of an assembly process that provides solutions to various problems, including step and tilt problems, using a PCB bridge structure including a PCB bridge according to an embodiment of the present invention.

[0046] Figure 9 An exemplary process of a PCB panel cutting process for a PCB bridge according to an embodiment of the present invention is shown.

[0047] Figure 10A 、 Figure 10B and Figure 10C A top view, a cross-sectional side view, and a 3D view of a fully shielded stripline structure of a PCB bridge according to an embodiment of the present invention are shown.

[0048] Figure 11A 、 Figure 11B and Figure 11C Shown are top, cross-sectional side, and 3D views of the structure of a PCB bridge with external components (eg, capacitors on the top stripline structure) according to an embodiment of the present invention.

[0049] Figure 12A 、 Figure 12B and Figure 12C A 3D view, a top view, and a cross-sectional view are respectively shown of a stripline fan-out structure of a PCB bridge according to an embodiment of the present invention.

[0050] According to an embodiment of the present invention, Figure 13D A 3D structural diagram of a PCB bridge structure is shown, which is a stripline fan-out structure with embedded single-layer capacitors; Figure 13B Shown Figure 13D 3D end view of the 3D structure view shown, Figure 13C Shown Figure 13D 3D view of the 3D structure view in ; and Figure 13A Shown Figure 13B Cross-sectional view of .

[0051] Figure 14A and Figure 14B 1 and 2 show a top view and a side view of a PCB bridge structure according to an embodiment of the present invention; the structure serves as a ground layer and has a stripline fan-out structure with embedded multilayer capacitors.

[0052] Figure 15A and Figure 15B The top view and side view of the structure of a PCB bridge according to an embodiment of the present invention are shown; the structure serves as a signal layer with multilayer capacitors and is a stripline fan-out structure with embedded multilayer capacitors.

[0053] Figures 16A-16F A 3D view of a stripline fan-out structure with embedded multilayer capacitors of a PCB bridge according to an embodiment of the present invention is shown.

[0054] Figure 17A shows a top view of the 3D stacked structure, Figure 17B A side view of the 3D stacked structure is shown.

[0055] Figure 18 A 3D fan-out crossbar structure according to an embodiment of the present invention is shown.

[0056] Figure 19、 Figure 20A and Figure 20B 3D views of PCB bridges used in a 3D cross structure are shown respectively. Figure 19 、 Figure 20A and Figure 20B The 3D view in Figure 2 shows the bridge-to-bridge connections. Figure 20A shows a top view of a PCB bridge, Figure 20B A bottom view of one PCB bridge is shown, and the bottom view shows the three leg connections L1 , L2 and L3 of the PCB bridge connection.

[0057] Figure 21 A model using an infinitesimal section of a transmission line having four elements is shown in the prior art. DETAILED DESCRIPTION

[0058] This patent describes the subject matter of the patent application in detail to meet statutory requirements. However, the description itself is not intended to limit the scope of this patent. The principles described herein can be embodied in many different forms.

[0059] Illustrative embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which some, but not all, embodiments of the invention are shown. Indeed, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will satisfy applicable legal requirements. Like reference numerals refer to like elements throughout.

[0060] The present invention provides a method and related apparatus for establishing interconnection between two semiconductor chips, so as to perform data communication between two different semiconductor chips assembled into a module and achieve maximum power transmission and ultra-high bandwidth transmission while providing flexibility for impedance matching requirements.

[0061] The present invention uses a PCB bridge to interconnect two chips. The present invention allows the use of one or more PCB bridges to interconnect more than two chips in a single architecture. The PCB bridge is used in a vertical direction rather than a horizontal direction.

[0062] Vertical alignment of PCB bridges to interconnect chips avoids signal reflections by matching the PCB trace impedance to the source.

[0063] In one embodiment, the present invention provides an unusual transmission line technology, broadside coupled stripline, that can avoid signal reflections in PCB transmission lines by matching the impedance of the PCB trace to the source.

[0064] refer to Figure 1-Figure 3 , which shows a perspective view 100A, a top view 100B, and a side view 100C of a PCB bridge according to an embodiment. Figure 1 A perspective view 100A of a PCB bridge 100 is shown. The PCB bridge 100 interconnects two or more semiconductor chips. The PCB bridge 100 is composed of a plurality of metal strips 202 and a dielectric material 204 between the metal strips 202. The metal strips 202 are embedded in the dielectric material 204. In one embodiment, the metal strips 202 are copper, and the dielectric material 204 is prepreg. It will be apparent to one skilled in the art that any suitable type of dielectric material may be used as the insulator in the PCB bridge 100 without departing from the spirit and scope of the present invention.

[0065] As mentioned above, the PCB bridge 100 is used in a vertical direction instead of a horizontal direction in the semiconductor architecture. Figure 3 As shown), the vertical arrangement of the PCB bridge 100 provides flexible impedance matching (Z, as Figure 4 In one embodiment, the trace length (L, as shown in FIG. Figure 4 As shown) is usually limited by the spacing between the two chips, which limits the inductance of the trace. Impedance matching (Z, as shown) is usually limited by the spacing between the two chips, which limits the inductance of the trace. Figure 4 As shown) by the capacitor (C, as Figure 2 The capacitance is flexible in the architecture. For different dielectric materials, a range of dielectric constants can be selected between approximately 2-5. In addition, the vertical arrangement of the PCB bridge 100 provides unlimited trace width (W, as shown). Figure 3 As shown in Figure 2, this unlimited trace width further increases the flexibility of impedance matching (Z).

[0066] refer to Figure 4-Figure 6 , which shows a top view 200A, a perspective view 200B, and a side view 200C of an exemplary architecture for establishing interconnection between two semiconductor chips using a PCB bridge according to an embodiment of the present invention. Figure 4 The top view 200A of the architecture in FIG. 1 shows a PCB bridge 100 interconnecting two chips 102 and 104. The PCB bridge 100 is used in a vertical orientation rather than a horizontal alignment. In one embodiment, prepreg 204 is used as a dielectric material in the architecture, such as Figure 2 , a cross-sectional view of the PCB bridge 100 is shown in FIG. A prepreg 204 may be used between two copper strips 202. It will be apparent to one skilled in the art that any suitable dielectric material may be used as an insulator in the framework of the PCB bridge 100 without departing from the meaning and scope of the present invention. In another embodiment, the prepreg 204 may be inserted between the copper strips 202 and the core of the framework.

[0067] According to one embodiment, the PCB bridge 100 is mounted on two chips 102 and 104 to provide interconnection therebetween through an SMT (surface mount technology) process, such as Figure 6 2 and 3. PCB bridge 100 is secured to two chips 102 and 104 using a soldering process. The soldering process melts the solder 300 between the metallized pads / contacts 302 of the PCB bridge and the semiconductor chip connections 304. The soldering process is more advantageous for non-destructive reworking processes. It will be apparent to those skilled in the art that suitable mounting techniques or solutions other than SMT may be used in mounting the components in architecture 200 without departing from the meaning and scope of the present invention. Furthermore, it will be apparent to those skilled in the art that suitable metal bonding processes other than soldering may be used when coupling or connecting the PCB bridge 100 in architecture 200 to the chips 102 and 104 without departing from the meaning and scope of the present invention.

[0068] For packaging of the PCB bridge 100 in the semiconductor architecture 200, the PCB bridge 100 can be packaged in standard tape and reel packaging suitable for existing component pick and place machines. In one embodiment, the PCB bridge 100 is placed between the two chips 102 and 104 using a standard pick and place process, which is conducive to mass production.

[0069] In addition, by adjusting the dielectric material and the trace width (W, see Figure 3 ), the vertical arrangement of the PCB bridge 100 provides flexible impedance matching (Z, see Figure 4 In one embodiment, the trace length (L, see Figure 4 ) is typically limited by the spacing between the two chips 102 and 104, which limits the inductance of the traces. Impedance matching (Z, see Figure 4 ) is composed of a capacitor (C, see Figure 2 ) dominates, the capacitance is flexible in architecture 200. Because the trace capacitance (C) is related to the dielectric constant of different materials, the capacitance (C) is made flexible by adjusting the dielectric constant, the thickness of the dielectric material, and the area of ​​the copper plate. For different dielectric materials, a range of dielectric constants can be selected between approximately 2-5. In addition, the vertical arrangement of PCB bridge 100 provides unlimited trace width (W, see Figure 3 ), the unlimited trace width further increases the flexibility of impedance matching (Z

[0070] In one embodiment, the architecture of the vertically aligned PCB bridge 100 can be used with multiple substructures, including but not limited to GSSGG, GSG, GSSG, and SGS.

[0071] refer to Figure 7 、 Figure 8A and Figure 8B , which shows an exemplary view of an assembly process using a PCB bridge structure 200 including a PCB bridge 100 to provide solutions to various problems (including step difference and tilt problems) according to an embodiment of the present invention. The manufacturing process of the PCB bridge is generally a laser cutting technology to cut the bridge legs / connectors to connect with the chip. Therefore, the irregular shape and size of the legs of the bridge 100 can be easily made by changing the laser cutting pattern. Therefore, the step difference can be compensated by the PCB bridge 100. Figure 7 As shown, a different structure 400 of the architecture 200, including a PCB bridge 100 for interconnecting two chips 102 and 104, is fabricated to address the step difference by making one leg / connector 402 of the PCB bridge 100 longer than the other leg / connector 404 of the PCB bridge 100. In contrast, in silicon bridge interconnects, the silicon bridge has a rectangular shape due to the manufacturing process. Therefore, the flip-chip process has very strict height requirements. If there is a step difference between the two chips, the bond may open. Furthermore, in wire bonding technology, the step difference between the two chips requires slightly longer wires.

[0072] Now, in order to solve the tilt problem in the assembly process, Figure 8A and Figure 8B As shown in the side view 500A and the front view 500B in FIG, by tilting the PCB panel while performing laser cutting, an irregular shape with a tilt 502 can be easily formed in the PCB bridge 100. Therefore, the tilt problem can be compensated by the PCB bridge 100.

[0073] In contrast, in silicon bridge interconnects, the silicon bridge has a rectangular shape due to the manufacturing process. Therefore, the flip-chip process requires very strict tilt requirements. If there is a tilt between the two chips, the bond will open. Furthermore, in wire bonding technology, a tilted bond between the two chips requires slightly longer wires.

[0074] refer to Figure 9 , which shows an exemplary process of a PCB panel cutting process for a PCB bridge according to an embodiment of the present invention. In one embodiment, the PCB bridge 100 is cut using laser cutting technology. The PCB panel 600 is fixed to the panel fixture 602 at the corner of the PCB 604. A laser cutting line 608 is drawn and cut along it to produce the PCB bridge 100. A plurality of copper leads or strips 606 are fixed to the PCB 604. These copper leads or strips 606 correspond to the following: Figure 1-Figure 3 Metal leads or strips 202 are shown in the PCB bridge 100 .

[0075] In one embodiment, the step 610 of the PCB bridge can be formed by changing the size of the PCB outline while laser cutting is performed to cut the PCB bridge 100. In addition, in one embodiment, an inclined PCB bridge can also be made by tilting the panel fixture 602 while laser cutting is performed.

[0076] Figures 10A-15B The architecture of the PCB bridge 100 is shown with various additional features according to different embodiments of the present invention.

[0077] Figure 10A 、 Figure 10B and Figure 10C A top view 700A, a cross-sectional view 700B, and a 3D view of a fully shielded stripline structure 700 of a PCB bridge 100 are shown. In the top view 700A and the cross-sectional view 700B, the PCB bridge 100 may include metal deposition layers 702 on the top and bottom. In one embodiment, the metal deposition layers 702 are copper. Furthermore, a plurality of copper strips 704 are disposed with a dielectric material 706 therebetween. In one embodiment, the dielectric material 706 is a prepreg.

[0078] The cross-sectional view 700B passes through the cross-sectional line 708 of the top view 700A.

[0079] In traditional PCB and silicon manufacturing, metallized vias (PTHs) are used to form connections between different layers. However, different manufacturing processes have different PTH to PTH spacing requirements. This means that it is impossible to fully shield the copper strips using traditional manufacturing processes.

[0080] Electromagnetic shielding is the practice of reducing electromagnetic fields in space by blocking them with barriers made of conductive or magnetic materials. The spacing between vias can cause electromagnetic fields to leak into the signal strip and affect signal integrity. Fully shielded stripline structure 700 creates a significant electromagnetic field barrier because it is shielded by top and bottom metallization layers 702 and the intermediate filler of dielectric material 706. Therefore, fully shielded stripline structure 700 blocks noise interference from space.

[0081] Figure 11A 、 Figure 11B and Figure 11C A top view 800A, a cross-sectional side view 800B, and a 3D view 800C of a PCB bridge 100 structure 800 with an external component 810 (e.g., a capacitor on a top stripline structure) are shown. In the top view 800A and the cross-sectional view 800B, the PCB bridge 100 may include a plurality of copper strips 802 with dielectric material 804 disposed therebetween. In one embodiment, the dielectric material 804 is prepreg. Furthermore, in the external component 810 on the top stripline structure 800, a cap 806 is disposed above the copper strips 802.

[0082] The cross-sectional side view 800B passes through the section line 808 of the top view 800A.

[0083] In one embodiment, the external component may be any one of an inductor, a capacitor, a resistor, a ferrite bead, and the like without limitation.

[0084] External components 810 (eg, inductors, capacitors, resistors, and ferrite beads) may be added on top of the PCB bridge 100 for different purposes, depending on the design.

[0085] For example, in data communication circuit design, series capacitors are used to pass all AC signals and block all DC signals. This is necessary in the signal path to account for voltage offset variations in different systems. This voltage offset variation is primarily due to variations in system design or IC operating offsets. This additional capacitor takes up space within the main PCB. Furthermore, the capacitor can only be placed on the top or bottom layer of the PCB. If an inner-layer stripline design is used, this increases the signal path length and the number of vias, thus increasing resistivity losses.

[0086] Adding external capacitors 810 on top provides additional options for capacitor placement, which can free up some space in the main PCB. At the same time, it smooths the routing signal path and reduces resistivity losses.

[0087] Figure 12A 、 Figure 12B and Figure 12C A 3D view 900A, a top view 900B, and a cross-sectional view 900C of a stripline fan-out structure 900 are shown, respectively. The structure 900 of the PCB bridge 100 may include multiple copper strips 902 with a dielectric material 904 disposed therebetween. In one embodiment, the dielectric material 904 is a prepreg. The copper strips 902 in the fan-out structure are not arranged in a straight line, but rather include vias (of any conductive material) 906 therebetween that connect two portions of the same copper strip 902, wherein the two portions of the same copper strip are spaced parallel to each other, and the vias 906 are between the two parallel copper strips 902. In one embodiment, the vias 906 are copper. In addition, the fan-out structure has two pitches, one pitch being 'P' and the other being twice the pitch 'P', i.e., '2P'. The '2P' pitch is the distance between the copper strips 902 and the center copper strip 902.

[0088] In traditional PCB manufacturing, trace spacing is limited by the manufacturing process. Therefore, more sophisticated manufacturing processes are required to meet trace spacing requirements, such as those imposed by PCB substrate or silicon manufacturing, significantly increasing manufacturing lead time and bill of materials (BOM) costs. However, according to the present invention, the stripline fan-out structure used in PCB bridge 100 increases trace spacing by more than two times. This relaxes fan-out manufacturing requirements, making PCB manufacturing a viable option.

[0089] refer to Figure 13A , which is a cross-sectional view 1000A of the structure of a PCB bridge 100, which is a stripline fan-out structure 1000 with embedded single-layer capacitors. The structure 1000 of the PCB bridge 100 may include multiple copper strips 1002 with dielectric material 1004 disposed therebetween. In one embodiment, the dielectric material 1004 is prepreg. All copper strips 1002 in the fan-out structure may not be arranged entirely in a straight line, but may include vias (of any conductive material) 1006 therebetween connecting two portions of the same copper strip, wherein the two portions of the same copper strip are spaced parallel to each other, and the via 1006 is between the two parallel copper strips. In one embodiment, the via 1006 is copper. The structure also includes a single-layer capacitor 1008 located between the two copper strips 1002. In addition, the fan-out structure has two pitches, one pitch being 'P' and the other being triple the pitch, i.e., '3P'.

[0090] The additional capacitor 1008 can be embedded in the PCB instead of Figures 11A-11C External capacitors are used as in CMOS. Two copper strips 1002 with dielectric material 1004 between them form a single-layer capacitor for data communication circuit design. Therefore, the SMT process for external capacitors can be avoided. This speeds up the overall assembly process. At the same time, the spacing can be increased, easing the chip manufacturing process. By inserting a dielectric layer and changing the design, the spacing can be adjusted to '2P' or larger.

[0091] Figure 13D A 3D diagram of a structure 1000 is shown, which is a stripline fan-out structure with embedded single layer capacitors. Figure 13B Shown Figure 13D 3D end view 1000B of the 3D structural view 1000D, and Figure 13C Shown Figure 13D 3D end view 1000C of the 3D structural view 1000D in FIG.

[0092] To calculate the capacitance, Figures 13A-13D 、 Figures 14A-14B and Figures 15A-15B , the following formula can be used.

[0093]

[0094] C: Parallel plate capacitance

[0095] ε r : Dielectric constant of the material

[0096] ε0: dielectric constant of free space

[0097] A: Board area

[0098] d: distance between the two plates

[0099] Figure 14A and Figure 14B A top view 1100A and a side view 1100B of a structure 1100 of a PCB bridge 100 are shown. Structure 1100 serves as a ground plane and has a stripline fan-out structure with embedded multilayer capacitors. The structure of PCB bridge 100 may include multiple copper strips 1102 with dielectric material 1104 disposed therebetween. In one embodiment, dielectric material 1104 is prepreg. All copper strips 1102 in the structure are connected at their ends using vias 1106 (of any suitable conductive material). The structure serves as a ground plane. In one embodiment, vias 1106 are copper.

[0100] Figure 15A and 15B A top view 1200A and a side view 1200B of a structure 1200 of a PCB bridge 100 are shown, wherein the structure 1200 is a stripline fan-out structure 1200 with embedded multilayer capacitors as a signal layer with multilayer capacitors. The structure 1200 of the PCB bridge 100 can include a plurality of copper strips 1202 with a dielectric material 1204 disposed therebetween. In one embodiment, the dielectric material 1204 is a prepreg. The alternating copper strips 1202 in the structure 1200 are connected at their ends using vias 1206 (which can be any suitable conductive material 1206). The structure 1200 is a signal layer with multilayer capacitors. In one embodiment, the vias 1206 are copper.

[0101] exist Figures 14A-14B and Figures 15A-15B In the case of multilayer capacitors for data communication circuit design, additional capacitors can be embedded in the PCB instead of using external capacitors. This makes the design of the PCB bridge 100 more compact and reduces the number of layers in the PCB.

[0102] Figures 16A-16F 3D views 1300A- 1300F of a structure 1300 are shown, which is a stripline fan-out structure 1300 of a PCB bridge 100 with embedded multilayer capacitors. Figure 16AA 3D view 1300A of copper strips with a GSSGG pattern and dielectric material disposed therebetween is shown. In one embodiment, the dielectric material is prepreg. Structure 1300 includes vias 1302 between the copper strips (of any conductive material). In one embodiment, vias 1302 are copper.

[0103] Figure 16B 1300B shows a 3D view of the G-pattern metal strips of the PCB bridge 100 in a stripline fan-out structure 1300 with embedded multilayer capacitors, and Figure 16C A 3D view 1300C of an S-pattern metal strip of a PCB bridge 100 in a stripline fan-out structure 1300 with embedded multilayer capacitors is shown.

[0104] Figure 16D A 3D top view 1300D of the PCB bridge 100 of a stripline fan-out structure 1300 with embedded multilayer capacitors is shown, where pads 1304 are shown and the trace spacing between the copper strips is visible. Figure 16E A 3D view 1300E of the PCB bridge 100 of a stripline fan-out structure 1300 with embedded multilayer capacitors is shown, wherein the dielectric 1306 is shown. In addition, Figure 16F A 3D view 1300F of a PCB bridge 100 is shown showing a stripline fan-out structure 1300 with embedded multilayer capacitors, wherein the 3D view 1300F includes Figure 16D 3D end view 1300D and 3D structure view 1300D in Figure 16E 3D end view 1300E of the 3D structural view 1300E in FIG.

[0105] The PCB bridge 100 can not only allow 2D structures, but also establish 3D interconnections between chips, such as Figures 17A-17B and Figure 18 shown. Figure 17A Shown is a top view 1400A, Figure 17B A side view 1400B of a stacked structure is shown. According to an embodiment, in 3D stacked structure 1400, PCB bridge 1402 connects four chips 1404, 1406, 1408, and 1410. Chips 1404 and 1406 are stacked on top of each other, and chips 1408 and 1410 are stacked on top of each other. The stacked combination of chips 1404 and 1406 is then interconnected to the stacked combination of chips 1408 and 1410 via PCB bridge 1402. This type of 3D stacked structure 1400 is possible in the present invention due to the vertical arrangement of PCB bridge 1402.

[0106] Additionally, vertical legs / connections 1412 and 1414 of PCB bridge 1402 vertically interconnect the four chips 1404 , 1406 , 1408 , and 1410 .

[0107] In one embodiment, a 3D crossbar structure can also be used to connect two different signals. Two PCB bridges are stacked together to form an independent crossbar connection. This structure is suitable for space-constrained designs with two independent connections.

[0108] Figure 18 Another possible structure due to the vertical arrangement of the PCB bridge in the present invention is shown. Figure 18 A 3D fan-out crossbar structure 1500 is shown. The 3D fan-out crossbar structure 1500 can be used to fan out chip signals into three paths. Two PCB bridges (e.g., 1502 and 1504) are stacked together to form a fan-out crossbar connection. This structure 1500 is suitable for space-constrained designs with fan-out connections. According to one embodiment, in the 3D fan-out crossbar structure 1500, two PCB bridges 1502 and 1504 are used, which connect four chips 1506, 1508, 1510, and 1512. Chips 1506 and 1510 are opposite each other, and chips 1508 and 1512 are opposite each other. Chips 1506, 1508, and 1512 are all interconnected to chip 1512. Thus, a 3D fan-out crossbar interconnection structure is established. According to one embodiment, in the 3D fan-out crossbar structure 1500, chip 1508 is interconnected to chip 1512 via the legs / connections 1514 of the PCB bridge 1502. To interconnect chip 1506 with chip 1512, interconnect 1516 is established using leg / connection 1514 of PCB bridge 1502 connected to a leg / connection of PCB bridge 1504 via connection node 1520. Similarly, to interconnect chip 1510 with chip 1512, interconnect 1518 is established.

[0109] This type of 3D cross structure 1500 is possible in the present invention due to the vertical arrangement of PCB bridges 1502 and 1504.

[0110] Figure 19 A 3D view 1600 of the PCB bridge 1502 is shown, Figure 20A-Figure 20B 3D views 1700 and 1800 are respectively shown of a PCB bridge 1504 used in a 3D cross structure 1500. The 3D views 1600, 1700, and 1800 illustrate bridge-to-bridge connections. Figure 20A A top view 1700 of a PCB bridge is shown. Figure 20B A bottom view 1800 of one PCB bridge is shown, and the bottom view 1800 shows the three L1 , L2 and L3 leg connections of the PCB bridge.

[0111] Advantageously, the vertical alignment of the PCB bridge provides numerous advantages. A wide variety of prepreg materials are available for the dielectric, providing flexibility for impedance matching requirements. Trace widths extend vertically rather than horizontally, eliminating limitations on trace width selection. The PCB bridge is joined using SMT soldering processes, facilitating non-destructive rework.

[0112] By adjusting the laser cutting pattern, the PCB bridge can have an irregular shape. The segmentation and tilt problems between two chips can be handled by the PCB bridge.

[0113] This provides similar impedance matching performance with lower packaging requirements than silicon bridges.

[0114] Many variations are possible, whether or not explicitly stated in the description, such as differences in structure, dimensions, and use of materials. Benefits, other advantages, and solutions to problems have been described above with respect to specific embodiments. However, a benefit, advantage, solution to a problem, or any component that may cause any benefit, advantage, or solution to occur or become more apparent, should not be construed as a critical, required, or essential feature or component of any or all of the claims.

[0115] Furthermore, it is low cost, provides good impedance matching, and is reworkable and flexible.

[0116] This disclosure and examples are intended to be considered illustrative only. Although this disclosure includes examples from semiconductor chips or assemblies, as will be appreciated by those skilled in the art, the PCB bridge architecture disclosed herein can be used in a variety of applications. References to devices and architectures used herein are intended to apply or extend to a broader range and should not be construed as limiting the scope and practice of the invention.

Claims

1. A PCB bridge for interconnecting two or more semiconductor chips to perform data communication between the semiconductor chips, comprising: a plurality of metal strips, wherein each metal strip is aligned one after another, each metal strip having two legs or connectors for contacting and connecting with connection pads on the semiconductor chip, and the two legs or connectors of each metal strip are cut into the same or different shapes and sizes with a cutting technique; as well as a dielectric material disposed between the plurality of metal strips, wherein the PCB bridge is used in a vertical direction in a semiconductor module to interconnect two or more semiconductor chips, wherein the vertical direction of the PCB bridge provides flexible impedance matching by adjusting the dielectric material and trace width of the PCB bridge, wherein the vertical direction of the PCB bridge avoids signal reflections by matching the impedance to the source, and The length of the trace of the PCB bridge is limited by the distance between the two semiconductor chips, and the distance further limits the inductance of the trace of the PCB bridge.

2. The PCB bridge according to claim 1, wherein: The plurality of metal strips are made of copper, the dielectric material is prepreg, and the vertical arrangement of the PCB bridge provides an infinite trace width, which further improves the flexibility of the impedance matching.

3. The PCB bridge according to claim 2, wherein: The dielectric material has a dielectric constant in the range of 2-5.

4. The PCB bridge according to claim 2, wherein: The PCB bridge is manufactured by cutting the legs or connectors of the metal strip using a laser cutting technique to provide regular or irregular shapes and sizes by varying the laser cutting pattern.

5. The PCB bridge according to claim 4, wherein: The PCB bridge with flexible shapes and sizes of the legs or connectors of the metal strip compensates for the step problem in semiconductor modules by making one leg or connector of the metal strip longer than the other legs or connectors of the metal strip.

6. The PCB bridge according to claim 4, wherein: The PCB bridge having flexible shapes and sizes of the legs or connectors of the metal tape compensates for tilting problems in semiconductor modules by tilting a PCB panel while making the laser cutting pattern during the laser cutting technique.

7. The PCB bridge according to claim 4, wherein: The PCB bridge is manufactured as a fully shielded stripline PCB bridge structure, wherein in addition to the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the fully shielded stripline PCB bridge structure further includes one or more metal deposition layers on the top and bottom of the fully shielded stripline PCB bridge structure; and The fully shielded stripline PCB bridge structure forms an electromagnetic field barrier because the fully shielded stripline PCB bridge structure is shielded by the metal deposition layers at the top and bottom and the intermediate filler of the dielectric material, and the fully shielded stripline PCB bridge structure blocks noise interference from space.

8. The PCB bridge according to claim 4, wherein: The PCB bridge is manufactured as a stripline PCB bridge structure with external components on top, wherein in addition to the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the stripline PCB bridge structure with external components on top further includes the external components on top of the PCB bridge, and The external component is at least one of an inductor, a capacitor, a resistor or a ferrite bead.

9. The PCB bridge according to claim 4, wherein: The PCB bridge is manufactured as a stripline fan-out type PCB bridge structure, wherein in addition to the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the stripline fan-out type PCB bridge structure further includes a conductive material between the plurality of metal strips connecting every two of the plurality of metal strips, and The stripline fan-out PCB bridge structure has two pitches, one pitch being 'P' and the other being twice the pitch 'P'.

10. The PCB bridge according to claim 4, wherein: The PCB bridge is manufactured as a stripline fan-out type PCB bridge structure with embedded single-layer capacitors, wherein in addition to the multiple metal strips and the dielectric material arranged between the multiple metal strips, the stripline fan-out type PCB bridge structure with embedded single-layer capacitors also includes conductive materials between the multiple metal strips connecting every two metal strips in the multiple metal strips, and single-layer capacitors embedded between the two metal strips.

11. The PCB bridge according to claim 4, wherein: The PCB bridge is manufactured as a stripline fan-out type PCB bridge structure with embedded multilayer capacitors and serves as a ground layer, wherein in addition to the multiple metal strips and the dielectric material arranged between the multiple metal strips, the stripline fan-out type PCB bridge structure with embedded multilayer capacitors also includes a conductive material connecting all of the multiple metal strips at their ends.

12. The PCB bridge according to claim 4, wherein: The PCB bridge is manufactured as a stripline fan-out PCB bridge structure with embedded multilayer capacitors and serves as a signal layer, wherein in addition to the multiple metal strips and the dielectric material arranged between the multiple metal strips, the stripline fan-out PCB bridge structure with embedded multilayer capacitors also includes a conductive material connecting the alternating metal strips among the multiple metal strips at their ends.

13. The PCB bridge according to claim 1, wherein: In addition to the 2D arrangement, in a single semiconductor module, the PCB bridge interconnects two or more semiconductor chips in a 3D arrangement, wherein in the 3D arrangement, the plurality of metal strips in the PCB bridge include pairs of metal strips, wherein the pairs of metal strips are aligned one after another, each metal strip in the pairs of metal strips is stacked on top of the other, and each metal strip in the pairs of metal strips has two legs or connectors to contact and connect with the semiconductor chips in the 3D arrangement; and The 3D arrangement is a 3D stacked structure including a PCB bridge interconnecting at least four semiconductor chips, two of the four semiconductor chips are stacked on each other, and the other two are stacked on each other, and the two stacked semiconductor chips are interconnected with the other two stacked semiconductor chips by pairs of stacked and aligned metal strips in the PCB bridge in the vertical direction of the PCB bridge.

14. A 3D fan-out crossbar structure constructed by interconnecting two or more semiconductor chips using at least two PCB bridges according to claim 1 in a single semiconductor module, wherein: The 3D fan-out cross structure is used to fan out chip signals into three paths. The at least two PCB bridges are stacked together to form a fan-out cross-connection, and the at least two PCB bridges interconnect at least four semiconductor chips, at least two of the four semiconductor chips are opposite to each other, and the other two of the four semiconductor chips are opposite to each other to form a fan-out structure. wherein the metal strips and / or legs or connectors of one of the at least two PCB bridges are connected to at least one of the four semiconductor chips via a connection node, and The at least two PCB bridges are vertically connected to interconnect the at least four semiconductor chips.

15. A method for manufacturing a PCB bridge for interconnecting two or more semiconductor chips to perform data communication between the semiconductor chips, comprising: securing the PCB panel to one or more panel fixtures at the corners of the PCB; Drawing laser cutting lines to mark a plurality of metal strips of the PCB bridge, wherein each metal strip has two legs or connectors to contact and connect with connection pads on a semiconductor chip, and the shapes and sizes of the two legs or connectors of each metal strip are drawn to be the same or different from each other to solve semiconductor assembly problems, including step problems and tilt problems; Performing laser cutting along the drawn laser cutting lines to produce a plurality of metal strips for the PCB bridge; Align the cut metal strips one after another; as well as Disposing a dielectric material between the plurality of metal strips to produce the PCB bridge; and wherein the PCB bridge is used in a vertical direction in semiconductor assembly to interconnect two or more semiconductor chips, wherein the vertical direction of the PCB bridge provides flexible impedance matching by adjusting the dielectric material and trace width of the PCB bridge, wherein the vertical direction of the PCB bridge avoids signal reflections by matching the impedance to the source, and The trace length of the PCB bridge is limited by the distance between the two semiconductor chips, and the trace length further limits the inductance of the trace of the PCB bridge.

16. The method according to claim 15, wherein The plurality of metal strips are made of copper, the dielectric material is prepreg, and the vertical arrangement of the PCB bridge provides an infinite trace width, which further improves the flexibility of the impedance matching.

17. The method according to claim 16, wherein The PCB bridge is manufactured as a fully shielded stripline PCB bridge structure, and in addition to including the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the fully shielded stripline PCB bridge structure further includes one or more metal deposition layers on the top and bottom of the fully shielded stripline PCB bridge structure; and The fully shielded stripline PCB bridge structure forms an electromagnetic field barrier because the fully shielded stripline PCB bridge structure is shielded by the metal deposition layers at the top and bottom and the intermediate filler of the dielectric material, and the fully shielded stripline PCB bridge structure blocks noise interference from space.

18. The method according to claim 16, wherein The PCB bridge is manufactured as a stripline PCB bridge structure with external components on top, and in addition to including the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the stripline PCB bridge structure with the external components on top further includes the external components on top of the PCB bridge, and The external component is at least one of an inductor, a capacitor, a resistor or a ferrite bead.

19. The method according to claim 16, wherein The PCB bridge is manufactured as a stripline fan-out type PCB bridge structure. In addition to the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the stripline fan-out type PCB bridge structure further includes a conductive material between the plurality of metal strips connecting every two of the plurality of metal strips. The stripline fan-out PCB bridge structure has two pitches, one pitch being 'P' and the other being twice the pitch 'P'.

20. The method according to claim 16, wherein The PCB bridge is manufactured as a stripline fan-out PCB bridge structure with embedded single-layer capacitors. In addition to the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the stripline fan-out PCB bridge structure with embedded single-layer capacitors further includes conductive material between the plurality of metal strips connecting every two of the plurality of metal strips and a single-layer capacitor embedded between the two metal strips. wherein the PCB bridge is manufactured as a stripline fan-out PCB bridge structure with embedded multilayer capacitors and serves as a ground layer, and in addition to including the plurality of metal strips and the dielectric material disposed between the plurality of metal strips, the stripline fan-out PCB bridge structure with embedded multilayer capacitors further includes a conductive material connecting all of the plurality of metal strips at their ends; or In which, the PCB bridge is manufactured as a stripline fan-out PCB bridge structure with embedded multilayer capacitors and serves as a signal layer. In addition to including the multiple metal strips and the dielectric material arranged between the multiple metal strips, the stripline fan-out PCB bridge structure with embedded multilayer capacitors also includes a conductive material that connects the alternating metal strips among the multiple metal strips at their ends.

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