Method and apparatus for extended chamber for through silicon via deposition

Abstract

An apparatus deposits tantalum films on through silicon via (TSV) structures using a physical vapor deposition (PVD) process chamber having a wafer-to-target distance of about 400 mm. The PVD process chamber includes a source configured with dual magnet source compensation. The PVD chamber also includes: an electromagnet assembly immediately above the source outside the chamber body; a magnetron assembly in the source, the magnetron assembly including dual magnets with dual radius tracks; a shield within the chamber body; and a plurality of ground loops symmetrically spaced around the perimeter of a substrate support assembly and configured to provide an RF ground return path between the substrate support assembly and the shield.

Description

Technical Field

[0001] Embodiments of the present principles relate generally to the fabrication of semiconductor devices. Background Art

[0002] Semiconductor devices are typically manufactured as integrated circuits on a substrate with various conductive layers that are interconnected to facilitate signal propagation within the device. In some cases, devices are interconnected by vias or electrical connections that provide connections through different layers of the integrated circuit. The vias formed in the silicon material are called through silicon vias or TSVs. As circuit complexity increases, the size of semiconductor structures decreases to allow more structures per given area. More and more layers are also combined to increase the density of integrated circuits. High density forces the diameter of TSVs to become smaller, while the increase in the number of layers requires a significant increase in the depth of the TSVs. The inventors have found that due to the small diameter size and increased depth of the TSVs, barrier layer materials (such as tantalum) are not evenly sputtered on the sides and bottom of the TSVs in the physical vapor deposition (PVD) chamber.

[0003] Therefore, the inventors provide an improved PVD chamber to uniformly deposit materials on high aspect ratio TSV structures. Summary of the invention

[0004] Methods and apparatus are provided herein for forming a uniform barrier layer in a through silicon via (TSV) structure.

[0005] In some embodiments, an apparatus for depositing tantalum films on TSVs may include: a PVD processing chamber having a source and a chamber body including a processing volume, the PVD processing chamber having a wafer-to-target distance of approximately 400 mm and the source configured to provide dual magnet source compensation; a first electromagnet assembly, the first electromagnet assembly being external to the chamber body and closer to the source of the processing chamber than a substrate support assembly of the processing chamber; a magnetron assembly, the magnetron assembly in the source, the magnetron assembly including a dual magnet, a first magnet of the dual magnet rotating about a central axis at a first radius and a second magnet of the dual magnet rotating about the central axis at a second radius, wherein the first radius is greater than the second radius; a shield, the shield within the chamber body; and a plurality of ground loops, the plurality of ground loops being symmetrically spaced around a perimeter of the substrate support assembly, the plurality of ground loops being configured to provide an RF ground return path between the substrate support assembly and the shield.

[0006] In some embodiments, the apparatus may further include: a DC power source configured to supply about 38 kW to about 60 kW of DC power to a target of the source, wherein the DC power source is configured to supply about 42 kW to about 60 kW of DC power to the target of the source; an RF power source configured to supply greater than 0 kW to about 3 kW of RF bias power to the substrate support assembly, wherein the RF power source is configured to supply about 1.9 kW of RF bias power to the substrate support assembly, wherein the RF power source supplies the RF bias power at a frequency of about 13.65 MHz, wherein the plurality of ground loops includes approximately 9 ground loops, wherein the first electromagnet assembly is configured to operate using 24 amps of power; the deposition ring has a cavity approximately 0.450 inches wide and approximately 0.120 inches below an uppermost surface of a substrate support assembly, wherein the PVD processing chamber is configured to deposit tantalum at a deposition rate of approximately 25 angstroms per second with a sheet resistivity non-uniformity percentage of less than approximately 5%; and / or a second electromagnet assembly located outside the chamber body below the first electromagnet assembly and closer to a substrate support assembly of the processing chamber than a source of the processing chamber.

[0007] In some embodiments, an apparatus for depositing a film on a wafer may include: a PVD process chamber configured to deposit tantalum on a structure, wherein the PVD process chamber has a source and a chamber body including a process volume, and a wafer-to-target distance of approximately 400 millimeters, and wherein the source is configured to provide dual magnet source compensation; a first electromagnet assembly, the first electromagnet assembly being external to the chamber body and closer to the source of the process chamber than a substrate support assembly of the process chamber, wherein the first electromagnet assembly is configured to operate at a current of 24 amperes; a magnetron assembly a magnetron assembly in a source, the magnetron assembly comprising a dual magnet, a first magnet of the dual magnet rotating about a central axis at a first radius and a second magnet of the dual magnet rotating about the central axis at a second radius, wherein the first radius is greater than the second radius; a shield within the chamber body; and approximately nine ground loops symmetrically spaced about a perimeter of a substrate support assembly, the approximately nine ground loops configured to provide an RF ground return path between the substrate support assembly and the shield when the substrate support assembly is in a processing position.

[0008] In some embodiments, the apparatus may further include: a DC power source configured to supply about 38 kW to about 60 kW of DC power to a target of the source; an RF power source configured to supply greater than 0 kW to about 3 kW of RF bias power at a frequency of about 13.65 MHz to a substrate support assembly; a deposition ring having a cavity about 0.450 inches wide and about 0.120 inches below an uppermost surface of the substrate support assembly; and / or a second electromagnet assembly located outside the chamber body below the first electromagnet assembly and closer to the substrate support assembly of the processing chamber than the source of the processing chamber.

[0009] In some embodiments, an apparatus for depositing a film on a wafer may include: a PVD processing chamber configured to deposit tantalum on a TSV structure, wherein the PVD processing chamber has a source and a chamber body including a processing volume, and a wafer-to-target distance of about 400 mm, and wherein the source is configured to provide dual magnet source compensation; a DC power source configured to supply about 38 kW to about 60 kW of DC power to a target of the source; a first electromagnet assembly, the first electromagnet assembly being located outside the chamber body closer to the source of the processing chamber than a substrate support assembly of the processing chamber, wherein the first electromagnet assembly is configured to operate at a current of 24 amperes; a second electromagnet assembly, the second electromagnet assembly being located outside the chamber body below the first electromagnet assembly and closer to the substrate support assembly of the processing chamber than the source of the processing chamber; a magnetron assembly, the magnetron assembly being located in the source; , the magnetron assembly comprising a dual magnet, a first magnet of the dual magnet rotating about a central axis at a first radius and a second magnet of the dual magnet rotating about the central axis at a second radius, wherein the first radius is greater than the second radius; a shield within the chamber body; about nine ground loops symmetrically spaced about a perimeter of a substrate support assembly, the about nine ground loops configured to provide an RF ground return path between the substrate support assembly and the shield when the substrate support assembly is in a processing position; a deposition ring surrounding the substrate support assembly, the deposition ring having a cavity about 0.350 inches to about 0.550 inches wide and about 0.050 inches to about 0.200 inches below an uppermost surface of the substrate support assembly; and an RF power source configured to supply an RF bias power of greater than 0 kW to about 3 kW to the substrate support assembly.

[0010] In some embodiments, the apparatus may further include: wherein the DC power source is configured to supply about 42 kW to about 60 kW of DC power to a target of the source, wherein the RF power source is configured to supply about 1.9 kW of RF bias power to the substrate support assembly, and / or wherein the RF power source supplies the RF bias power at a frequency of about 13.65 MHz.

[0011] Other and further embodiments are disclosed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Embodiments of the present principles, briefly summarized above and discussed in more detail below, can be understood by reference to the illustrative embodiments of the principles depicted in the accompanying drawings. However, the accompanying drawings illustrate only typical embodiments of the present principles and are therefore not to be considered limiting of scope, as the principles may admit to other equally effective embodiments.

[0013] Figure 1 Depicted is a schematic cross-sectional view of a PVD chamber, according to some embodiments of the present principles.

[0014] Figure 2 Depicted is a cross-sectional isometric view of a portion of an electromagnet assembly, according to some embodiments of the present principles.

[0015] Figure 3 Depicted is a top view of a ground loop according to some embodiments of the present principles.

[0016] Figure 4 Depicted is an isometric view of a ground loop according to some embodiments of the present principles.

[0017] Figure 5 is a side view of a ground loop compression according to some embodiments of the present principles.

[0018] Figure 6 is an isometric view of a deposition ring, according to some embodiments of the present principles.

[0019] Figure 7 Depicted is a cross-sectional side view of a deposition ring, according to some embodiments of the present principles.

[0020] For ease of understanding, the same reference numerals are used as much as possible to designate the same elements common to the drawings. The drawings are not drawn to scale and may be simplified for clarity. The elements and features of one embodiment may be beneficially incorporated into other embodiments without further description. DETAILED DESCRIPTION

[0021] Methods and apparatus for forming barrier layers in through silicon vias (TSVs) utilize a unique physical vapor deposition (PVD) chamber to achieve high aspect ratio structure deposition with increased step coverage. The PVD chamber of the present principles provides a longer wafer-to-target spacing architecture and has additional electromagnet control for enhanced PVD tantalum coverage on TSV structures with enhanced film uniformity. The longer target-to-wafer spacing reduces the amount of neutral atoms reaching the wafer and any overhanging, while producing a high ionization fraction, thereby achieving better step coverage performance. The longer spacing allows more control over guiding ions and energy tuning, thereby improving wafer performance. The PVD chamber may also include both lower and upper electromagnets surrounding the chamber body. The additional upper electromagnet helps to guide ions that would normally be lost on the chamber shield to the wafer to produce more ions on the wafer and better control the non-uniformity percentage (NU%).

[0022] As the scaling of classic Moore's Law slows, the semiconductor industry is seeking a new vertical scaling paradigm to drive improvements in power, performance, and cost. TSV is an integrated 3D packaging enabler, and the scaling of TSV aspect ratios from 5×50um to 3×50um challenges PVD coverage and the ability of PVD to achieve continuous barrier and seed layers on TSVs. Smaller diameters and higher aspect ratios result in the need for thicker PVD films, which increases costs and allows competition from alternative non-PVD metallization methods. The PVD chamber of this principle improves the tantalum barrier layer step coverage by more than two times without any compromise on yield and film performance. The PVD chamber of this principle enables cost-effective TSV metallization for the next generation of TSVs and enables greater market adoption of 3D packaging.

[0023] In some embodiments, the PVD chamber of the present principles includes a target-to-wafer spacing of approximately 400 mm for reduced neutral atoms on the wafer surface and better step coverage, and / or additional overhead electromagnets surrounding the chamber. In some embodiments, the PVD chamber includes enhanced grounding for RF bias current return for more uniform deposition, a deposition ring with enhanced deposition control, and / or a dual position magnetron assembly with inner and outer radius tracks for increased deposition rate and coverage. In some embodiments, the PVD chamber includes higher DC power to improve coverage and deposition rate, higher RF bias to maintain constant high ion energy, and / or a bidirectional magnet source compensation (MSC) source with central water supply to achieve a stable deposition rate as the target erodes.

[0024] Figure 11 is a cross-sectional view of a PVD chamber 100 according to some embodiments. The PVD chamber 100 can be used to deposit tantalum and other materials onto a wafer 110, which can include semiconductor structures such as TSVs, etc. In some embodiments, the PVD chamber 100 can provide a deposition rate of about 25 angstroms per second using 50 kW of DC power and about 1.9 kW of RF bias power while achieving a sheet resistivity (Rs) NU% of less than about 5%. The PVD chamber 100 includes a chamber body 102 and a source 190, which includes a magnetron assembly 104 and a target 112. The wafer 110 is supported on a substrate support assembly 192 including an electrostatic chuck (ESC) 108, which is supported by a substrate support pedestal 106. One or more gases can be supplied from a gas source 184 into a lower portion of the PVD chamber 100. The pump 182 is connected to the PVD chamber 100 for evacuating the interior of the PVD chamber 100 and facilitating maintaining a desired pressure inside the PVD chamber 100 .

[0025] At the top of the processing volume 118 is a target 112 with a backing plate 114. In some embodiments, to reduce the amount of neutral atoms reaching the wafer 110, the distance 116 between the lowermost surface 156 of the target 112 and the top surface 180 of the wafer 110 is about 400 mm. The 400 mm spacing provides improved gap filling for the TSV structure. In some embodiments, the distance 116 is about 300 mm to about 500 mm. In some embodiments, the distance 116 is about 350 mm to about 450 mm. In some embodiments, the distance 116 is about 375 mm to about 425 mm. In some embodiments, the target 112 can be titanium, tantalum, tungsten, etc. A DC power source 128 provides DC power to the target 112 via the backing plate 114 to sputter the target 112 during processing. The backing plate 114 may include a conductive material, such as copper-zinc, copper-chromium, or the same material as the target 112, so that the DC power can be coupled to the target 112 via the backing plate 114. Alternatively, the backing plate 114 can be non-conductive and can include conductive elements (not shown), such as electrical feed-throughs, etc. The backing plate 114 can be dish-shaped, rectangular, square, or any other shape that can be accommodated by the PVD chamber 100. The backing plate 114 is configured to support the target 112 so that the front surface of the target 112 is opposite the wafer 110 when the wafer 110 is present. The target 112 can be coupled to the backing plate 114 in any suitable manner. For example, in some embodiments, the target 112 can be diffusion bonded to the backing plate 114.

[0026] The magnetron assembly 104 includes a first magnet 136 that travels at a first radius above the target 112 around a central axis 154 and a second magnet that travels at a second radius above the target 112 around the central axis 154. The first radius may be referred to as an inner radius and the second radius may be referred to as an outer radius. The support device 134 supports the first magnet 136 and the second magnet 138 and enables the first magnet 136 and the second magnet 138 to rotate around the central axis 154. In some embodiments, the first magnet 136 can rotate around the first magnet axis 172 and / or the second magnet 138 can rotate around the second magnet axis 174. In some embodiments, the first magnet 136 and / or the second magnet 138 may include multiple separate magnets.

[0027] In TSV applications, the deposition rate decreases during the target life, which also reduces the throughput of the processing chamber. In order to keep the deposition rate constant throughout the target life, the target voltage is kept constant. The target voltage can be controlled by moving the magnet in the vertical direction or Z direction. The source 190 of the PVD chamber 100 has a dual-position magnetron, which can advantageously use a centrally supplied coolant to improve cooling, and the dual-position magnetron ensures a constant deposition rate by keeping the distance between the lowest surface 182A, 182B of the magnet of the magnetron assembly 104 and the lowest surface 156 of the sputtering target constant during the deposition process. The dual magnet source compensation (MSC) of the source 190 advantageously mitigates target cracking and / or bending due to overheating and reduces the deposition rate during the life of the target. The magnetron assembly 104 has two magnet positions (the outer radial position of the second magnet 138 and the inner radial position of the first magnet 136), and the magnetic field at the surface of the sputtering target is changed by reconfiguring the magnetic poles in different positions. In this way, the target utilization is further improved because both the center and the periphery of the target are sputtered.

[0028] In some embodiments, the magnetron assembly 104 is capable of vertical movement (Z direction) to control the distance from the first magnet 136 and the second magnet 138 to the lowermost surface 156 (the surface facing the wafer) of the target 112 to ensure that the distance remains substantially constant. In some embodiments, vertical movement is provided by one or more motor assemblies 178. The dual MSC source uses a central coolant supply 132 to maximize target life. Conventional supply coolant supply structures supply coolant from one side of the cavity 194 of the magnetron assembly 104. However, because the coolant flowing to the portion of the target 112 immediately below the first magnet 136 and the second magnet 138 is blocked by the first magnet 136 and the second magnet 138, the portion of the target 112 immediately below the first magnet 136 and the second magnet 138 does not receive a sufficient amount of coolant. As a result, as the magnetron assembly 104 rotates, the area through which the first magnet 136 and the second magnet 138 move becomes overheated, sometimes reaching up to 400°C. A resulting temperature gradient is formed between sufficiently cooled portions and insufficiently cooled portions of the target 112. The temperature gradient causes the target to crack and / or bend.

[0029] In order to maintain the target 112 at a temperature of less than about 200° C., a central coolant supply 132 supplies coolant to the center of the target 112 (i.e., supplies coolant along a central axis 154). The central coolant supply 132 extends through the body portion 130 along the central axis 154. The central coolant supply 132 includes a central channel 158 extending from the manifold portion 160 through the body portion 130 along the central axis 154. A coolant supply 166 is fluidly coupled to an inlet 168 of the manifold portion 160 to supply coolant through the central coolant supply 132 and into the cavity 194. The central coolant supply 132 extends through the body portion 130 along the central axis 154 to supply coolant to the cavity 194 at the center of the target 112 (as shown by flow lines 170). As a result, a more uniform coolant flow is advantageously achieved, thereby significantly reducing or eliminating temperature gradients across the target 112, reducing cracking and bending of the target. After passing through the central coolant supply 132 into the cavity 194, the coolant then flows out of the cavity 194 through an opening (not shown) formed in an outlet (not shown) disposed in the top of the cavity. A return line (not shown) is coupled to the outlet to receive the coolant after it flows through the cavity 194.

[0030] The RF bias power source 126 may be coupled to the substrate support assembly 192 so as to induce a negative DC bias on the wafer 110. In addition, in some embodiments, a negative DC self-bias may be formed on the wafer 110 during processing. For example, the frequency range of the RF energy supplied by the RF bias power source 126 may be from about 2 MHz to about 60 MHz, for example, non-limiting frequencies such as 2 MHz, 13.56 MHz, or 60 MHz may be used. In some embodiments, the RF power may be supplied in a range from about 1 kW to about 20 kW. In some embodiments, the supplied RF power may be about 3 kW. In some embodiments, the supplied RF power may be about 1.9 kW. In some embodiments, a DC power source 128 in a range from about 38 kW to about 50 kW may supply DC power to the target 112. In some embodiments, the DC power source 128 may provide a DC power in a range from about 42 kW to about 50 kW. In some embodiments, the DC power source 128 may provide a DC power in a range from about 42 kW to about 60 kW. In some embodiments, the DC power source 128 can provide DC power in a range from about 38 kW to about 60 kW. In other applications, the substrate support assembly 192 can be grounded or left electrically floating.

[0031] The PVD chamber 100 further includes a process kit shield or shield 152 to surround the processing volume 118 of the PVD chamber 100 and protect other chamber components from damage and / or contamination from the process. In some embodiments, the shield 152 may be grounded to the chamber body at an uppermost point 196 to provide an RF ground return path. The shield 152 extends downwardly and may include a generally tubular portion having a generally constant diameter to generally surround the processing volume 118. The shield 152 extends downwardly along the wall of the chamber body 102 to below the uppermost surface 198 of the ESC 108 and returns upwardly until reaching the cover ring 122 (e.g., forming a U-shaped portion at the bottom of the shield 152). The cover ring 122 is seated on top of the upwardly extending inner portion of the shield 152 when the substrate support assembly 192 is in the lower loading position, but is seated on the outer periphery of the deposition ring 120 to protect the substrate support assembly 192 from sputtering deposition when the substrate support assembly 192 is in the upper deposition position. The deposition ring 120 may be used to protect the edge of a substrate support assembly 192 including a substrate support pedestal and / or ESC 108 from deposition around the edge of the wafer 110. In some embodiments, the deposition ring 120 has a large deposition cavity 186 that allows for more deposition buildup before the deposition ring 120 needs to be replaced.

[0032] In some embodiments, the lower magnet assembly 142 may be disposed around the PVD chamber 100 for selectively providing a magnetic field between the ESC 108 and the target 112. For example, when the substrate support assembly 192 is in the processing position, the lower magnet assembly 142 may be disposed around the exterior of the chamber body 102 in an area directly above the ESC 108. In some embodiments, the upper magnet assembly 140 may be disposed (above the lower magnet assembly 142 when present) around the chamber body 102 closer to the target 112 than the ESC 108. The lower magnet assembly 142 and / or the upper magnet assembly 140 may be electromagnets and may be coupled to a power source (not shown) for controlling the strength of the magnetic field generated by the electromagnets. The electromagnets generate a magnetic B field to allow control of ion direction and energy. Adding the upper magnet assembly 140 allows control of ion direction and energy with greater precision than using the lower magnet assembly 142 alone. The greater precision allows for improved step coverage of TSV structures (deposition inside the TSV).

[0033] The lower magnet assembly 142 and / or the upper magnet assembly 140 may be coupled to a coolant source (not shown, see e.g. Figure 2 ) for controlling the temperature generated by the operation of the electromagnet. In some embodiments, the upper magnet assembly 140 is supplied with a current of about 24 amps, which flows through the top magnet 140A and the bottom magnet 140B electrically connected in series. In some embodiments, the upper magnet assembly 140 is supplied with a current of about 20 amps to about 30 amps. In some embodiments, when the PVD chamber 100 uses the inner radius of the magnetron assembly 104 for sputtering the target 112, the lower magnet assembly 142 is supplied with about 4 amps for the bottom inner magnet 142C and about -4 amps for the top inner magnet 142A and the top outer magnet 142B. In some embodiments, when the PVD chamber 100 uses the outer radius of the magnetron assembly 104 for sputtering the target 112, the lower magnet assembly 142 is supplied with about 5 amps for the bottom inner magnet 142C and about -4 amps for the top inner magnet 142A and the top outer magnet 142B. In some embodiments, bottom outer magnet 142D is not used.

[0034] Substrate processing systems using RF generated plasma require a return path for the RF current generated during processing back to a source, such as an RF power source that supplies the current. In some cases, the return path may include current traveling along a floor of the processing system, through a substrate support (e.g., an ESC), and then ultimately back to the source along a wall and / or shield of the processing system. When operating under certain processing conditions, arcing between chamber components, such as between the substrate support assembly 192 (including the ESC 108 and / or the substrate support pedestal 106) and adjacent chamber components, and / or stray plasma may occur undesirably, resulting in component damage and / or the generation of particles that may further undesirably contaminate substrates disposed in the chamber. Within the processing volume 118, the process kit and shield 152 are grounded to the chamber body 102 and provide the primary return for the plasma current.

[0035] In some embodiments, the PVD chamber 100 may include one or more ground loops 124 to electrically connect the substrate support assembly 192 (e.g., ESC 108 and / or substrate support pedestal 106) to the shield 152. The ground loop 124 is a loop that is compressed to provide contact with the shield 152 when the substrate support assembly 192 is in an elevated processing position. The inventors have found that irregular spacing and / or insufficient number of ground loops will cause uniformity problems in deposition on the wafer 110. The inventors have found that if the ground loops are evenly spaced around the outer perimeter of the substrate support assembly 192 (e.g., ESC 108 and / or substrate support pedestal 106) in sufficient number, deposition uniformity will be improved. The improvement in deposition uniformity stems from evenly distributed RF ground return points. When the RF ground return points are not uniform, irregular current flow patterns are reflected in the film deposited on the wafer 110. In some embodiments, a symmetrical distribution of approximately nine ground loops around the perimeter of the substrate support assembly 192 (eg, the ESC 108 and / or the substrate support pedestal 106 ) provides an optimal number and spacing for enhancing uniformity of deposition on the wafer 110 .

[0036] A controller 144 may be provided and coupled to various components of the PVD chamber 100 to control their operation. The controller 144 includes a central processing unit (CPU) 146, a memory 148, and support circuits 150. The controller 144 may control the PVD chamber 100 directly or via a computer (or controller) associated with a specific processing chamber and / or support system component. The controller 144 may be one of any form of general-purpose computer processor that can be used in an industrial environment to control various chambers and subprocessors. The memory or computer-readable medium 148 of the controller 144 may be one or more of readily available memories, such as random access memory (RAM), read-only memory (ROM), floppy disk, hard disk, optical storage media (e.g., compact disk or digital video disk), flash drive, or any other form of local or remote digital storage. Support circuits 150 are coupled to the CPU 146 for supporting the processor in a conventional manner. These circuits include caches, power supplies, clock circuits, input / output circuit systems and subsystems, etc. The method of controlling the PVD chamber 100 and / or the process may be stored in the memory 148 as a software routine that may be executed or called to control the operation of the PVD chamber 100 in the manner described herein. The software routine may also be stored and / or executed by a second CPU (not shown) that is remote from the hardware controlled by the CPU 146.

[0037] Figure 2A cross-sectional view of an electromagnet assembly 200 according to some embodiments is depicted. The electromagnet assembly 200 may be used as the lower magnet assembly 142 and / or the upper magnet assembly 140. In some embodiments, the electromagnet assembly 200 may have only two windings or coils to be used as the upper magnet assembly 140. The electromagnet assembly 200 is depicted in dashed lines with a sealant 202 for electrical isolation. The electromagnet coils 204, 206, 208, 210 include multiple turns of magnetic wire in both the vertical and radial directions arranged to have a generally rectangular cross-section. The magnetic wire is typically made of copper and coated with an insulating coating. In some embodiments, the magnetic wire has a square cross-section. The electromagnet coils 204, 206, 208, 210 are wound on cylindrical aluminum mandrels of different diameters to account for the different diameters of the inner electromagnet coils 204, 206 and the outer electromagnet coils 208, 210. Although the number of turns in the coils may vary, in some embodiments, the number of turns includes 7×14 turns for the upper electromagnet coils 204, 208 and 7×26 turns for the lower electromagnet coils 206, 210. The inner electromagnet coils 204, 206 may be wound together on the same mandrel, with a washer-shaped inner spacer 212 separating the inner electromagnet coils 204, 206 vertically. Similarly, the outer electromagnet coils 208, 210 may be wound together on another mandrel, with a washer-shaped outer spacer 214 separating the outer electromagnet coils 208, 210 vertically. Both spacers 212, 214 are preferably formed of a non-magnetic dielectric such as G-10, a glass-filled resin. Between the windings of the different layers of the electromagnet coils 204, 206, 208, 210, the magnetic wire is coated with a thin, fast-drying epoxy. The cured epoxy is thermally conductive and bonds the magnet wires into respective freestanding electromagnet coils 204, 206, 208, 210. Both ends of the magnet wires extend away from the wound electromagnet coils to provide subsequent electrical connections.

[0038] An aluminum tubular inner shim 216 is placed outside the assembled inner electromagnet coils 204, 206 and inner spacer 212. In some embodiments, a non-magnetic 300 series stainless steel tube with multiple turns of a cooling coil 218 extending spirally in a vertical direction is placed outside the inner shim 216. All stainless steel parts are solution annealed to remove any remaining magnetic properties. The cooling coil 218 contains a central axial passage 220 for the circulation of a cooling fluid. The cooling coil 218 is pre-wound on a mandrel to a slightly larger diameter and tightly around the circumference of the inner shim 216. An aluminum tubular outer shim 222 is placed outside the cooling coil 218. The shims 216, 222 are useful for promoting heat flow between the electromagnet coils 204, 206, 208, 210 and the cooling coil 218 and controlling the radial dimension of the electromagnet assembly 200. Two outer electromagnet coils 208, 210 and the outer spacer 214 are assembled around the circumference of the outer shim 222. The outer electromagnet coils 208 , 210 are vertically aligned with the inner electromagnet coils 204 , 206 .

[0039] Figure 3 A top view 300 of a ground loop 124 is depicted according to some embodiments. In some embodiments, Figure 1 The ground return 124 of the present principle can be mounted on the flange assembly 302 of the ESC 108. In some embodiments, the ground return 124 can be mounted on the flange assembly of the substrate support base 106 (not shown). The flange assembly 302 can be formed as a separate workpiece or as part of the ESC 108 or the substrate support base 106. The ground return 124 provides a robust RF grounding to prevent arcing and unwanted stray plasma in the PVD chamber 100. The PVD chamber 100 has an RF voltage above the DC voltage during deposition on the TSV structure. In order to provide uniform deposition, the RF return current should be returned to the cathode match and then back to the generator in a symmetrical manner. The ground return 124 of the present principle reduces the tilt associated with the asymmetric ground current return typically associated with higher RF frequencies, and eliminates shield arcing associated with poor RF grounding. The ground return 124 provides an enhanced grounding solution, especially for chambers that need to return RF current via a processing kit.

[0040] The PVD chamber 100 uses a very high density plasma for TSV deposition, which uses a lot of power (with high current) to generate the ion flux. In some cases, up to 40A of current may pass through the ESC 108. The current should be returned to the source via the grounded surface of the ESC 108. The inventors have found that using approximately 9 symmetrically spaced flexible loop strips (such as Figure 3106 to the shield 152. The inventors have also discovered that asymmetric grounding at the ESC 108 or substrate support pedestal 106 will produce asymmetric deposition on the wafer 110. By adjusting the number and spacing of the ground loops 124, film deposition uniformity can be used as a deposition uniformity tuning feature and adjusted to achieve low film non-uniformity. The ground loops 124 advantageously prevent the generation of particles from stray plasma that may undesirably contaminate the wafer and cause film non-uniformity, and reduce deposition asymmetry on the wafer, which improves film uniformity. The ground loops 124 also prevent arcing between the ESC and / or substrate support assembly and the process kit shield under processing conditions with higher current (e.g., 40 amps or more), high RF (e.g., 40 MHz or more), and / or higher power levels (e.g., 6 kW or more) and with high voltage (e.g., about 60 mTorr to 140 mTorr). The ground return path 124 also beneficially provides a low impedance return path for RF currents generated during processing, which is desirable for TSV processing.

[0041] Figure 4 An isometric view 400 of a ground loop 424 is depicted in accordance with some embodiments. The ground loop 424 represents one of the ground loops 124. The ground loop 424 is a conductive flexible loop having a lower base 402 that allows the ground loop 424 to be attached to a surface to provide a first electrical connection. When the upper surface 404 is in contact with another surface, the upper surface 404 provides a second electrical connection. Figure 5 5 is a side view 500 of ground loop compression according to some embodiments. The ground loop 424 is shown in situ in the PVD chamber 100. The ground loop 424 is mounted to the flange of the ESC 108 (or substrate support base 106 in some embodiments) and is in compressive electrical contact with the shield 152, thereby allowing RF return current to flow through the ground loop 424. A first height 502 of the ground loop 424 can be compressed by the shield 152 to a second height 504. The amount of compression (first height 502 minus second height 504) can be marked as a percentage of the first height 502. In some embodiments, the ground loop 424 can have a compression of about 10% to about 50%. The amount of force required for compression should be less than the force required to move the shield 152 from the normal position of the shield within the PVD chamber 100.

[0042] Figure 6is an isometric view 600 of a deposition ring 120 according to some embodiments. The deposition ring 120 surrounds the ESC 108 and prevents unwanted stray plasma and deposition on or near the ESC 108 and / or substrate support pedestal 106. The deposition ring 120 has a large deposition cavity 186 that permits more deposition deposits to accumulate, thereby increasing maintenance intervals and reducing wafer arcing during high voltage TSV deposition processes. Figure 7 A cross-sectional view 700 of a deposition ring 120 is depicted in accordance with some embodiments. The deposition ring 120 is inserted between the ESC 108 and the cover ring 122 that interfaces with the shield 152. In some embodiments, the width of the large deposition cavity 186, represented by a first distance 704, is about 0.350 inches to about 0.550 inches, and the height, represented by a second distance 702, measured from a lower surface 706 of the large deposition cavity 186 to an uppermost surface 198 of the ESC 108 and / or a bottom surface 708 of the wafer 110 is about 0.050 inches to about 0.200 inches. In some embodiments, the large deposition cavity 186 is about 0.450 inches wide by about 0.120 inches high. In some embodiments, the large deposition cavity 186 may be coated on the upper surface using aluminum oxide (also known as alumina) via an arc spray process.

[0043] Embodiments according to the present principles may be implemented in hardware, firmware, software, or any combination thereof. Embodiments may also be implemented as instructions stored using one or more computer-readable media, which may be read and executed by one or more processors. Computer-readable media may include any mechanism for storing or transmitting information in a machine-readable form (e.g., a computing platform or a "virtual machine" running on one or more computing platforms). For example, a computer-readable medium may include any suitable form of volatile or non-volatile memory. In some embodiments, a computer-readable medium may include a non-transient computer-readable medium.

[0044] While the foregoing is directed to embodiments of the present principles, other and further embodiments of the present principles may be devised without departing from the basic scope thereof.

Claims

1. An apparatus for depositing a tantalum film on a through silicon via (TSV), include: a physical vapor deposition (PVD) processing chamber having a source and a chamber body including a processing volume, the source having a dual magnet positioned above a top of the processing volume, the PVD processing chamber having a wafer-to-target distance of 350 mm to 450 mm, wherein the source is configured to move the dual magnet of the source in a vertical direction to constantly maintain a distance between a bottom surface of the dual magnet and a bottom surface of the target when a target is present; a first electromagnet assembly external to the chamber body and closer to the source of the processing chamber than a substrate support assembly of the processing chamber; a magnetron assembly in the source, the magnetron assembly comprising the dual magnet, a first magnet of the dual magnet rotating about a central axis at a first radius and a second magnet of the dual magnet rotating about the central axis at a second radius, wherein the first radius is greater than the second radius; a shielding member, the shielding member being within the chamber body; as well as A plurality of ground loops are symmetrically spaced about a perimeter of a substrate support assembly and configured to provide RF ground return paths between the substrate support assembly and the shield.

2. The device according to claim 1, further comprising: include: A DC power source configured to supply 38 kW to 60 kW of DC power to a target of the source.

3. The apparatus of claim 2, wherein the DC power source is configured to supply 42 kW to 60 kW of DC power to the target of the source.

4. The device according to claim 1, further comprising: include: An RF power source is configured to supply greater than 0 kW to 3 kW of RF bias power to the substrate support assembly.

5. The apparatus of claim 4, wherein the RF power source is configured to supply 1.9 kW of RF bias power to the substrate support assembly.

6. The apparatus of claim 5, wherein the RF power source supplies RF bias power at a frequency of 13.65 MHz.

7. The apparatus of claim 1, wherein the plurality of ground loops comprises nine ground loops.

8. The apparatus of claim 1, wherein the first electromagnet assembly is configured to operate using 24 amps of power.

9. The device of claim 1, further comprising: include: A deposition ring having a cavity 0.450 inches wide and 0.120 inches below an uppermost surface of the substrate support assembly.

10. The apparatus of claim 1, wherein the PVD processing chamber is configured to deposit tantalum at a deposition rate of 25 angstroms per second with a sheet resistivity non-uniformity percentage of less than 5%.

11. The device of claim 1, further comprising: include: A second electromagnet assembly is located outside of the chamber body below the first electromagnet assembly and closer to the substrate support assembly of the processing chamber than the source of the processing chamber.

12. An apparatus for depositing a film on a wafer, include: a physical vapor deposition (PVD) processing chamber configured to deposit tantalum on a through silicon via (TSV) structure, wherein the PVD processing chamber has a source and a chamber body including a processing volume, and a wafer to target distance of 350 mm to 450 mm, the source having a dual magnet positioned above a top of the processing volume, wherein the source is configured to move the dual magnet of the source in a vertical direction to constantly maintain a distance between a bottom surface of the dual magnet and a bottom surface of the target when a target is present; a first electromagnet assembly external to the chamber body and closer to the source of the processing chamber than a substrate support assembly of the processing chamber, wherein the first electromagnet assembly is configured to operate at a current of 24 amperes; a magnetron assembly in the source, the magnetron assembly comprising the dual magnet, a first magnet of the dual magnet rotating about a central axis at a first radius and a second magnet of the dual magnet rotating about the central axis at a second radius, wherein the first radius is greater than the second radius; a shield within the chamber body; and Nine ground loops are symmetrically spaced about a perimeter of a substrate support assembly and are configured to provide RF ground return paths between the substrate support assembly and the shield when the substrate support assembly is in a processing position.

13. The device of claim 12, further comprising: include: A DC power source configured to supply 38 kW to 60 kW of DC power to a target of the source.

14. The device of claim 12, further comprising: include: An RF power source is configured to supply greater than 0 kW to 3 kW of RF bias power to the substrate support assembly at a frequency of 13.65 MHz.

15. The device of claim 12, further comprising: include: A deposition ring having a cavity 0.450 inches wide and 0.120 inches below an uppermost surface of the substrate support assembly.

16. The device of claim 12, further comprising: include: A second electromagnet assembly is located outside of the chamber body below the first electromagnet assembly and closer to the substrate support assembly of the processing chamber than the source of the processing chamber.

17. An apparatus for depositing a film on a wafer, include: A physical vapor deposition (PVD) processing chamber configured to deposit tantalum on a through-silicon via (TSV) structure, wherein the PVD processing chamber has a source and a chamber body including a processing volume, and a wafer-to-target distance of 350 millimeters to 450 millimeters, and the source has a dual magnet positioned above the top of the processing volume, and the source is configured to move the dual magnet of the source in a vertical direction to constantly maintain a distance between the bottom surface of the dual magnet and the bottom surface of the target when a target is present; A DC power source configured to supply 38 kW to 60 kW of DC power to the target of the source; A first electromagnetic component located outside the chamber body closer to the source of the processing chamber than the substrate support component of the processing chamber, and the first electromagnetic component is configured to operate with a current of 24 amperes; A second electromagnetic component located outside the chamber body below the first electromagnetic component and closer to the substrate support component of the processing chamber than the source of the processing chamber; A magnetron component in the source, the magnetron component including the dual magnet, a first magnet of the dual magnet rotating around a central axis with a first radius and a second magnet of the dual magnet rotating around the central axis with a second radius, and the first radius being greater than the second radius; A shield within the chamber body; Nine ground loops symmetrically spaced around the perimeter of the substrate support component, and the nine ground loops are configured to provide an RF ground return path between the substrate support component and the shield when the substrate support component is in a processing position; A deposition ring surrounding the substrate support component, the deposition ring having a cavity 0.350 inches to 0.550 inches wide and 0.050 inches to 0.200 inches below the uppermost surface of the substrate support component; And An RF power source configured to supply more than 0 kW to 3 kW of RF bias power to the substrate support component.

18. The apparatus according to claim 17, wherein the DC power source is configured to supply 42 kW to 60 kW of DC power to the target of the source.

19. The apparatus according to claim 17, wherein the RF power source is configured to supply 1.9 kW of RF bias power to the substrate support component.

20. The apparatus according to claim 17, wherein the RF power source supplies RF bias power at a frequency of 13.65 MHz.

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