Electronic device

Abstract

The present disclosure provides an electronic device including an electronic component, a driving circuit, and a bias current circuit. The driving circuit is electrically connected between a node and a first voltage. The electronic component is electrically connected between the node and a second voltage. The bias current circuit is electrically connected between the node and a third voltage. The first voltage is different from the second voltage and the third voltage. The electronic device of the present disclosure can operate the electronic component based on a stable bias voltage and with a large operating range.

Description

Technical Field

[0001] This disclosure relates to an apparatus, and more particularly to an electronic apparatus. Background Technology

[0002] Generally, voltage-controlled devices (VCSELs) can operate within a limited voltage range because the programmable voltage source circuits used to drive them have a limited operating range. Furthermore, the typical electronics housed within a VCSEL do not support forward current testing, thus they cannot effectively determine whether the electronic components of the voltage control device are damaged. Summary of the Invention

[0003] The electronic device disclosed herein includes a drive circuit, electronic components, and a bias current circuit. The drive circuit is electrically connected between the node and a first voltage. The electronic components are electrically connected between the node and a second voltage. The bias current circuit is electrically connected between the node and a third voltage. The first voltage is different from the second and third voltages.

[0004] Based on the above, the electronic device disclosed herein can operate electronic components based on a stable bias voltage and with a wide operating range. Attached Figure Description

[0005] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and form a part of this specification. The drawings illustrate exemplary embodiments of this disclosure and, together with the implementation methods, serve to explain the principles of this disclosure.

[0006] Figure 1 A schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0007] Figure 2 A schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0008] Figure 3A This is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure;

[0009] Figure 3B This is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure;

[0010] Figure 3C This is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure;

[0011] Figure 4 A schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0012] Figure 5 In accordance with this disclosure Figure 4 Timing diagrams of relevant voltages and signals in the embodiments;

[0013] Figure 6 A schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0014] Figure 7 In accordance with this disclosure Figure 6 Timing diagrams of relevant voltages and signals in the embodiments;

[0015] Figure 8 A schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0016] Figure 9 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure.

[0017] Explanation of icon numbers

[0018] 100, 200, 400, 600, 800, 900: Electronic devices;

[0019] 110, 210, 410, 610, 810, 910: Drive circuit;

[0020] 120, 220, 420, 620, 820, 920: Electronic components;

[0021] 130, 230, 430, 630, 830, 930: Bias current circuit;

[0022] C': Capacitor;

[0023] Cst, Cst': Storage capacitors;

[0024] DL: Data cable;

[0025] dV: Voltage drop;

[0026] Ib: Bias current;

[0027] Id: Drive current;

[0028] Iv: Leakage current;

[0029] N1: Node;

[0030] Rd: Resistor;

[0031] SB: Bias signal;

[0032] SR: Reset signal;

[0033] SS: Scan signal;

[0034] t0, t1, t2, t3, t4, t5, t6, t7: time;

[0035] Ta: Second scanning transistor;

[0036] Tb, Tb': First bias transistor;

[0037] Tb": Second bias transistor;

[0038] Tc: First compensation transistor;

[0039] Tc': Compensation transistor;

[0040] Tc: Switching transistor / compensation transistor;

[0041] Td: First driving transistor;

[0042] Td': Driving transistor;

[0043] Tr: First reset transistor;

[0044] Tr': Reset transistor;

[0045] Ts: First scan transistor;

[0046] V1: First voltage;

[0047] V2: Second voltage;

[0048] V3: Third voltage;

[0049] Vbc: External voltage;

[0050] Vd, Vg, Vs: Voltage;

[0051] Vdata: Data voltage;

[0052] Vf: Reference voltage;

[0053] Vth, |Vth|, Vth', |Vth'|: Threshold voltages. Detailed Implementation

[0054] Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and description to refer to the same or similar components.

[0055] Throughout this disclosure and the appended claims, certain terms are used to refer to specific components. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same components. This document is not intended to distinguish between components that have the same function but different names. In the following description and claims, words such as “comprising” and “including” are open-ended terms and should be interpreted as “including but not limited to…”.

[0056] The term "electrical connection" as used throughout this application (including the appended claims) may refer to any direct or indirect connection element. For example, if the text describes a first device coupled (or connected) to a second device, it should be interpreted as the first device being directly connected to the second device, or the first device being indirectly connected to the second device via other devices or certain connection elements. The terms "first," "second," and similar terms used throughout this application (including the appended claims) are used only to name discrete elements or to distinguish them in different embodiments or scopes. Therefore, the terms should not be considered as an upper or lower limit on the number of elements or to limit the order of arrangement of elements. Furthermore, whenever possible, elements / components / steps using the same reference numerals in the drawings and embodiments denote the same or similar parts. The same reference numerals or the same terminology may be used in different embodiments to refer to related descriptions of elements / components / steps.

[0057] It should be noted that in the following embodiments, technical features of several different embodiments may be replaced, rearranged, and combined to complete other embodiments without departing from the spirit of this disclosure. Features of each embodiment may be arbitrarily mixed and used together as long as they do not violate the spirit of this disclosure or conflict with each other.

[0058] The electronic device disclosed herein may include, for example, antenna pixel circuitry, and the electronic component may correspond to a tunable component, such as an antenna element of a pixel of an antenna pixel. The electronic component of this disclosure may be a voltage-controlled device, and the voltage-controlled device may include, for example, a varactor diode, a resistor, an inductor, or a capacitor. In embodiments of this disclosure, circuitry coupled to the electronic component may implement a novel bias current circuitry for extending the operating range of a programmable voltage source circuitry for driving the electronic component, such as a source follower amplifier for driving a varactor diode in an antenna application, and supporting forward current testing functionality. In embodiments of this disclosure, the driving circuitry is capable of driving the electronic component and operates during, for example, a bias period, a scan period, and / or a reset period.

[0059] Figure 1 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. (See reference...) Figure 1The electronic device 100 includes a drive circuit 110, an electronic component 120, and a bias current circuit 130. The drive circuit 110 is electrically connected between node N1 and a first voltage V1. The electronic component 120 is electrically connected between node N1 and a second voltage V2. The bias current circuit 130 is electrically connected between node N1 and a third voltage V3. The first voltage V1 is different from both the second voltage V2 and the third voltage V3. In other words, the drive circuit 110 can be electrically connected to the electronic component 120 and the bias current circuit 130 via node N1. The drive circuit 110 is also electrically connected between a data line DL and the first voltage V1.

[0060] In embodiments of this disclosure, the driving circuit 110 includes a first scanning transistor Ts, a second scanning transistor Ta, a first driving transistor Td, and a storage capacitor Cst. The first scanning transistor Ts is electrically connected to a data line DL and a node N1. For example, a first terminal of the first scanning transistor Ts is electrically connected to the data line DL, and a second terminal of the first scanning transistor Ts is electrically connected to node N1. The control terminal of the first scanning transistor Ts receives a scan signal SS. The first driving transistor Td may be electrically connected to the capacitor Cst. The control terminal of the first scanning transistor Ts may be electrically connected to the scan line and receive the scan signal SS. The second scanning transistor Ta may be electrically connected between the first driving transistor Td and the data line DL. The second scanning transistor Ta may be electrically connected between the first driving transistor Td and node N1. The first terminal of the second scanning transistor Ta may be electrically connected to the storage capacitor Cst. For equivalent functionality, the second terminal of the second scanning transistor Ta may be electrically connected to either circuit node N1 or the data line DL. The control terminal of the second scanning transistor Ta may be electrically connected to the scan line and receive the scan signal SS. The first terminal (drain) of the first driving transistor Td is electrically connected to a first voltage V1. The second terminal (source) of the first driving transistor Td is electrically connected to node N1. The control terminal (gate) of the first driving transistor Td is electrically connected to the first terminal of the storage capacitor Cst and the second scan transistor Ta. The first terminal of the storage capacitor Cst can be electrically connected to the first voltage V1 or any DC voltage source. The second terminal of the storage capacitor Cst can be electrically connected to the control terminals of the first driving transistor Td and the second scan transistor Ta. The driving circuit 110 is a source follower amplifier circuit including the first driving transistor Td electrically connected between the first voltage V1 and node N1.

[0061] In embodiments of this disclosure, the driving circuit 110 may be a programmable voltage source circuit and may be configured to drive the electronic component 120 according to the data voltage Vdata provided by the data line DL. The bias current circuit 130 may be a current sinking circuit and may be configured to provide a bias current Ib transferred from circuit node N1 to the third voltage V3. In embodiments of this disclosure, the first scan transistor Ts, the second scan transistor Ta, and the first driving transistor Td may be N-type transistors, such as N-type metal oxide semiconductors (NMOS), but are not limited thereto.

[0062] When the first driving transistor Td is an N-type transistor, the first voltage V1 is higher than the second voltage V2 and the third voltage V3. The first driving transistor Td is configured to supply current as a source follower amplifier circuit. In another embodiment (not shown), when the first driving transistor Td is a P-type transistor, the first voltage V1 is lower than the second voltage V2 and the third voltage V3. The driving transistor Td is configured to sink current as a source follower amplifier circuit. During the scan cycle, the first scan transistor Ts and the second scan transistor Ta are turned on based on the scan signal SS, and the external driving circuit can provide the data voltage Vdata to the driving circuit 110 via the data line DL. The storage capacitor Cst can store the charge corresponding to the data voltage Vdata. Subsequently, during the bias cycle, the first scan transistor Ts and the second scan transistor Ta are turned off based on the scan signal SS, and the storage capacitor Cst can provide a voltage (Vdata) to turn on the first driving transistor Td, such that the second terminal of the first driving transistor Td can provide the driving current Id from the first voltage V1 to node N1. Furthermore, the drive circuit 110 can provide a leakage current Iv to drive the electronic component 120 through circuit node N1. That is, the leakage current Iv is the drive current Id minus the bias current Ib. If the leakage current Iv is greater than or equal to a minimum value of the drive current Id minus the bias current Ib, then the first drive transistor Td can adaptively generate a drive current Id to compensate for the lower leakage current Iv to maintain the data voltage Vdata, and the lower leakage current Iv can be compensated by introducing a bias current Ib. Therefore, during the bias period, node N1 can maintain the bias voltage of the electronic component 120 corresponding to the data voltage Vdata minus the threshold voltage Vth of the drive transistor Td, and the drive current Id can compensate for the leakage current Iv.

[0063] Therefore, electronic device 100 can operate electronic component 120 based on a stable bias voltage and with a wide operating range. In addition to electronic component 120, bias current circuit 130 can also be electrically connected to the output of drive circuit 110, which is equivalent to increasing the leakage current of electronic component 120 to relax the minimum current requirement of drive circuit 110. Subsequently, bias current circuit 130 can help extend the operating range to provide a stable bias voltage for electronic component 120.

[0064] Furthermore, the electronic device 100 can also perform a forward current test operation. During the forward current test operation, a data voltage Vdata, equal to a third voltage V3, can be applied to the control terminals of node N1 and the first driving transistor Td during the scan cycle, causing the first driving transistor Td to turn off.

[0065] The bias current circuit may include a drive transistor Td' electrically connected between node N1 and the third voltage V3 (at least shown in Figure 3C (In the middle). When the driving transistor Td' is an N-type transistor, it is configured to act as a bias current circuit to sink current. When the driving transistor Td' is an N-type transistor and the third voltage V3 is lower than the second voltage V2, the electronic component performs a forward current test operation. In other words, when the driving transistor Td' is an N-type transistor, the second voltage V2 is higher than the third voltage V3, and a forward test current from the second voltage V2 to the third voltage V3 can be formed through the electronic component 120 and the bias current circuit 130. The forward test current can be equal to the bias current Ib. Simultaneously, external testing equipment can sense the varactor diodes and / or diodes disposed in the electronic component 120 through thermal sensing, optical sensing, physical deformation sensing, or other means, so that it can be confirmed whether the electronic component 120 is damaged. In other embodiments of this disclosure, the first driving transistor Td can be a P-type transistor, such as a P-type metal oxide semiconductor (PMOS). The driving transistor Td can be configured to act as a source follower amplifier circuit to pull current. The bias current circuit 130 can be configured as a source current circuit. A first voltage V1 is configured to become lower than a second voltage V2, and a third voltage V3 is configured to become lower than a third voltage V3. In this respect, during the bias cycle, the drive current Id, leakage current Iv, and bias current Ib can be changed to currents in opposite directions.

[0066] Furthermore, during the forward current test operation, the third voltage V3 is configured to become higher than the second voltage V2, and the forward test current can also be changed to a current in the opposite direction. The bias current circuit may include a drive transistor Td' (at least shown in [location missing]) electrically connected between node N1 and the third voltage V3. Figure 3C(In the middle). When the driving transistor Td' is a P-type transistor, the driving transistor Td' is configured as a bias current circuit to draw current. When the driving transistor Td' is a P-type transistor, the third voltage V3 is higher than the second voltage V2. The electronic component 120 can perform a forward current test operation, and a forward test current from the third voltage V3 to the second voltage V2 can be formed through the electronic component 120 and the bias current circuit 130.

[0067] Figure 2 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. (See reference...) Figure 2 The electronic device 200 includes a drive circuit 210, an electronic component 220, and a bias current circuit 230. The drive circuit 210 is electrically connected to the electronic component 220 and the bias current circuit 230 via node N1, and the drive circuit 210 is also electrically connected to a data line DL and a first voltage V1. The electronic component 220 is electrically connected between node N1 and a second voltage V2. The bias current circuit 230 is electrically connected between node N1 and a third voltage V3. Unlike... Figure 1 In one embodiment, the driving circuit 210 may be a source follower amplifier circuit with voltage (threshold voltage (Vth)) compensation.

[0068] In embodiments of this disclosure, the driving circuit 210 includes a first scanning transistor Ts, a first driving transistor Td, a first compensation transistor Tc, a first bias transistor Tb, a first reset transistor Tr, and a storage capacitor Cst. The first reset transistor Tr is electrically connected between a first voltage V1 and the first driving transistor Td, the first bias transistor Tb is electrically connected between the first voltage V1 and the first driving transistor Td, and the first compensation transistor Tc is electrically connected to the drain terminal of the first driving transistor Td and the control terminal of the first driving transistor Td.

[0069] For example, the first terminal of the first scan transistor Ts is electrically connected to the data line DL. The second terminal of the first scan transistor Ts is electrically connected to node N1. The control terminal of the first scan transistor Ts is electrically connected to the scan line and receives the scan signal SS. The first terminal (drain) of the first drive transistor Td is electrically connected to the first compensation transistor Tc and the first bias transistor Tb. The second terminal (source) of the first drive transistor Td is electrically connected to node N1. The control terminal (gate) of the first drive transistor Td is electrically connected to the first compensation transistor Tc, the storage capacitor Cst, and the first reset transistor Tr. The first terminal of the first bias transistor Tb may be electrically connected to the first voltage V1. The second terminal of the first bias transistor Tb may be electrically connected to the first terminal of the first drive transistor Td. The control terminal of the first bias transistor Tb may be electrically connected to the bias line and receives the bias signal SB. The first terminal of the first compensation transistor Tc may be electrically connected to the first terminal of the first drive transistor Td. The second terminal of the first compensation transistor Tc may be electrically connected to the storage capacitor Cst and the control terminal of the first drive transistor Td. The control terminal of the first compensation transistor Tc may be electrically connected to the scan line and receives the scan signal SS. A first terminal of the first reset transistor Tr is electrically connected to a first voltage V1. A second terminal of the first reset transistor Tr is electrically connected to a control terminal of the first drive transistor Td. The control terminal of the first reset transistor Tr receives a reset signal SR. A first terminal of the storage capacitor Cst is electrically connected to the first voltage V1. A second terminal of the storage capacitor Cst is electrically connected to a control terminal of the first drive transistor Td. The driving circuit may be a source follower amplifier circuit including the first drive transistor Td electrically connected between the first voltage V1 and node N1.

[0070] In embodiments of this disclosure, the drive circuit 210 may be configured to drive the electronic component 220 according to the data voltage Vdata provided by the data line DL. The bias current circuit 230 may be a bias current circuit, such as a sink current circuit, and the bias current circuit 230 may be configured to provide a bias current Ib transferred from node N1 to the third voltage V3.

[0071] In embodiments of this disclosure, the first scan transistor Ts, the first drive transistor Td, the first compensation transistor Tc, the first bias transistor Tb, and the first reset transistor Tr are N-type transistors, such as NMOS. Specifically, the first voltage V1 is higher than the second voltage V2, and the first voltage V1 is higher than the third voltage V3. During the reset cycle, the first reset transistor Tr is turned on based on the reset signal SR, and the voltage at the control terminal of the first drive transistor Td is reset. During the scan cycle, the first scan transistor Ts and the first compensation transistor Tc are turned on based on the scan signal SS, and the external drive circuit can provide the data voltage Vdata to the drive circuit 210 through the data line DL. The storage capacitor Cst can store the charge corresponding to the data voltage Vdata plus the threshold voltage Vth of the first drive transistor Td. Subsequently, during the bias cycle, the first bias transistor Tb is turned on based on the bias signal SB, and the first scan transistor Ts and the first compensation transistor Tc are turned off based on the scan signal SS. The storage capacitor Cst provides a voltage (Vdata + |Vth|) to turn on the first drive transistor Td, allowing the second terminal of the first drive transistor Td to supply a drive current Id from the first voltage V1 to circuit node N1. Furthermore, the drive circuit 210 can provide a leakage current Iv to drive the electronic component 220 through node N1. That is, the leakage current Iv is the drive current Id minus the bias current Ib. If the leakage current Iv is greater than or equal to a minimum value of the drive current Id minus the bias current Ib, then the first drive transistor Td can adaptively generate a drive current Id to compensate for the leakage current Iv, thereby maintaining the data voltage Vdata. A lower leakage current Iv can be compensated by introducing a bias current Ib. Therefore, during the bias cycle, node N1 can maintain the data voltage Vdata, and the drive current Id can compensate for the leakage current Iv.

[0072] Therefore, electronic device 200 can operate electronic component 220 based on a stable bias voltage and with a wide operating range. In addition to electronic component 220, bias current circuit 230 can also be electrically connected to the output of drive circuit 210, which is equivalent to increasing the leakage current of electronic component 220 to relax the minimum current requirement of drive circuit 210. Subsequently, bias current circuit 230 can help extend the operating range to provide a stable bias voltage for electronic component 220.

[0073] Furthermore, the electronic device 200 can also perform a forward current test operation. During the forward current test operation, a data voltage Vdata equal to the third voltage V3 can be applied to node N1, causing the first driving transistor Td to disconnect. The bias current circuit 230 includes a driving transistor Td' electrically connected between node N1 and the third voltage V3. When the driving transistor Td' is an N-type transistor, the third voltage V3 is lower than the second voltage V2, and the electronic component 220 performs the forward current test operation. Therefore, a forward test current from the second voltage V2 to the third voltage V3 can be formed through the electronic component 220 and the bias current circuit 230. The forward test current can be equal to the bias current Ib. Simultaneously, an external test device can sense the varactor diode and / or diode disposed in the electronic component 220 driven by the forward test current through thermal sensing, optical sensing, physical deformation sensing, or other means, allowing confirmation of whether the electronic component 220 is damaged. The electronic component may contain a varactor diode or a diode.

[0074] In other embodiments of this disclosure, the first driving transistor Td may be a P-type transistor, such as a PMOS. A first voltage V1 may be configured to become lower than a second voltage V2, and a third voltage V3 may also be configured to become lower than a third voltage V3. In this regard, during the bias cycle, the driving current Id, leakage current Iv, and bias current Ib may change to currents in opposite directions. Furthermore, in a forward current test operation, the third voltage V3 may be configured to become higher than the second voltage V2, and the forward test current may also change to currents in opposite directions. In other words, the circuit includes a driving transistor Td' electrically connected between node N1 and the third voltage V3, and when the driving transistor Td' is a P-type transistor and the third voltage V3 is higher than the second voltage V2, the electronic components perform a forward current test operation. Therefore, a forward test current from the third voltage V3 to the second voltage V2 can be formed by the electronic components 220 and the bias current circuit 230. The forward test current may be equal to the bias current Ib. Meanwhile, external testing equipment can sense the varactor diodes and / or diodes placed in the electronic component 220 driven by the forward test current through thermal sensing, optical sensing, physical deformation sensing or other means, so as to confirm whether the electronic component 220 is damaged.

[0075] Figure 3A This is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure. (See reference...) Figure 3A , Figure 1 and Figure 2 The bias current circuit 130 and bias current circuit 230 of the embodiments may include, for example, Figure 3A The resistor Rd (shunt resistor) shown is illustrated. In embodiments of this disclosure, resistor Rd may be electrically connected between node N1 and the third voltage V3. For example, the first terminal of resistor Rd is electrically connected to, as shown in the figure... Figure 1 and Figure 2 As shown in the diagram, node N1 is connected to the third voltage V3, and the second terminal of resistor Rd can be electrically connected to it. Resistor Rd can be configured as a bias current circuit to generate bias current Ib.

[0076] Figure 3B This is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure. (See reference...) Figure 3B , Figure 1 and Figure 2 The bias current circuit 130 and bias current circuit 230 of the embodiments may include, for example, Figure 3B The driving transistor Td' shown is illustrated. In embodiments of this disclosure, the bias current circuit 130 may include a diode electrically connected between node N1 and the third voltage V3. For example, the first terminal (drain) of the driving transistor Td' may be electrically connected to, for instance, a diode electrically connected to ... Figure 1 and Figure 2 Node N1 is shown. The second terminal (source) of the driving transistor Td' can be electrically connected to the third voltage V3. The control terminal (gate) of the driving transistor Td' can be electrically connected to the second terminal (source) of the driving transistor Td'. The driving transistor Td' can be configured as a diode circuit to generate a diode reverse current as a bias current Ib.

[0077] Figure 3C This is a schematic diagram of a bias current circuit according to an embodiment of the present disclosure. (See reference...) Figure 3C , Figure 1 and Figure 2 The bias current circuit 130 and bias current circuit 230 of the embodiments may include, for example, Figure 3C The driving transistor Td' shown is illustrated. The bias current circuit 230 may include the driving transistor Td' electrically connected between node N1 and the third voltage V3. In embodiments of this disclosure, the first terminal (drain) of the driving transistor Td' may be electrically connected to, for example... Figure 1 and Figure 2 Node N1 is shown. The second terminal (source) of the driving transistor Td' can be electrically connected to a third voltage V3. The control terminal (gate) of the driving transistor Td' can be electrically connected to an external voltage line and receive an external voltage Vbc. The driving transistor Td' can be configured as a sink current circuit to generate a sink current as a bias current Ib.

[0078] Figure 4 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. (See reference...) Figure 4The electronic device 400 includes a drive circuit 410, an electronic component 420, and a bias current circuit 430. The drive circuit 410 is electrically connected to the electronic component 420 and the bias current circuit 430 via node N1, and is also electrically connected to a data line DL and a first voltage V1. The electronic component 420 is electrically connected between node N1 and a second voltage V2. The bias current circuit 430 is electrically connected between node N1 and a third voltage V3.

[0079] In embodiments of this disclosure, the driving circuit 410 includes a first scanning transistor Ts, a first driving transistor Td, a first compensation transistor Tc, a first bias transistor Tb, a first reset transistor Tr, and a storage capacitor Cst. The driving circuit 410 in the embodiments may refer to... Figure 2 The embodiments are described herein, and the details are not repeated here.

[0080] In embodiments of this disclosure, the bias current circuit 430 includes a driving transistor Td', a compensation transistor Tc', a bias transistor Tb', a reset transistor Tr', and a storage capacitor Cst'. The bias transistor Tb' is electrically connected between node N1 and the driving transistor Td', the compensation transistor Tc' is electrically connected to the drain terminal of the driving transistor Td' and the control terminal of the driving transistor Td', the reset transistor Tr' is electrically connected to the control terminal of the driving transistor Td', and the capacitor Cst' is electrically connected to the control terminal of the driving transistor Td'.

[0081] For example, the first terminal (drain) of the driving transistor Td' can be electrically connected to the compensation transistor Tc' and the bias transistor Tb'. The second terminal (source) of the driving transistor Td' can be electrically connected to the third voltage V3. The control terminal (gate) of the driving transistor Td' can be electrically connected to the compensation transistor Tc', the storage capacitor Cst', and the reset transistor Tr'. The first terminal of the bias transistor Tb' can be electrically connected to node N1. The second terminal of the bias transistor Tb' can be electrically connected to the first terminal of the driving transistor Td'. The control terminal of the bias transistor Tb' can be electrically connected to the bias line and receive the bias signal SB. The first terminal of the compensation transistor Tc' is electrically connected to the first terminal of the driving transistor Td'. The second terminal of the compensation transistor Tc' can be electrically connected to the storage capacitor Cst' and the control terminal of the driving transistor Td'. The control terminal of the compensation transistor Tc' can be electrically connected to the scan line and receive the scan signal SS. The first terminal of the reset transistor Tr' can be electrically connected to the first voltage V1. The second terminal of the reset transistor Tr' can be electrically connected to the control terminal of the driving transistor Td'. The control terminal of the reset transistor Tr' can be electrically connected to the reset line and receive the reset signal SR. The first terminal of the storage capacitor Cst' can be electrically connected to the control terminal of the drive transistor Td'. The second terminal of the storage capacitor Cst' can be electrically connected to the reference voltage Vf. The bias current circuit 430 can be configured as a current sinking circuit.

[0082] Figure 5 In accordance with this disclosure Figure 4 Timing diagrams of relevant voltages and signals in the embodiment. (Refer to...) Figure 4 and Figure 5 In embodiments of this disclosure, the drive circuit 410 is configured to drive the electronic component 420 according to the data voltage Vdata provided by the data line DL. The bias current circuit 430 may be configured to provide a bias current Ib transferred from circuit node N1 to the third voltage V3. In embodiments of this disclosure, the first scan transistor Ts, the first drive transistor Td, the first compensation transistor Tc, the first bias transistor Tb, and the first reset transistor Tr are N-type transistors, such as NMOS. In embodiments of this disclosure, when the first drive transistor Td is an N-type transistor, the first voltage V1 is higher than the second voltage V2, and the first voltage V1 is higher than the third voltage V3.

[0083] During the reset cycle from time t2 to time t3, the first reset transistor Tr and the reset transistor Tr' are turned on based on the reset signal SR with a high voltage level, and the voltages (Td:Vg and Td':Vg) at the control terminals of the first driving transistor Td and the driving transistor Td' are reset. Therefore, the voltage (Td:Vg) at the control terminal of the first driving transistor Td is equal to the first voltage V1. The voltage (Td':Vg) at the control terminal of the driving transistor Td' can be equal to the first voltage V1. The voltage (Td':Vs) at the second terminal of the driving transistor Td' can be equal to the third voltage V3.

[0084] During the scan cycle from time t4 to time t5, the first scan transistor Ts, the first compensation transistor Tc, and the compensation transistor Tc' are turned on based on the scan signal SS with a high voltage level, and the external driving circuit can provide the data voltage Vdata to the driving circuit 410 through the data line DL. Therefore, the voltage at the second terminal of the first driving transistor Td (Td:Vs) can be equal to the data voltage Vdata. The voltage at the control terminal and the first terminal of the first driving transistor Td (Td:Vg and Td:Vd) can be equal to the data voltage Vdata plus the threshold voltage |Vth| of the first driving transistor Td. The voltage at the second terminal of the driving transistor Td' (Td':Vs) can be equal to the third voltage V3. The voltage at the control terminal and the first terminal of the driving transistor Td' (Td':Vg and Td':Vd) can be equal to the third voltage V3 plus the threshold voltage |Vth'| of the driving transistor Td'. The storage capacitor Cst can store the charge corresponding to the data voltage Vdata plus the threshold voltage Vth of the first driving transistor Td. The storage capacitor Cst' can store the charge corresponding to the third voltage V3 plus the threshold voltage Vth' of the driving transistor Td'.

[0085] During the bias cycle from time t6 to time t7 (or from time t0 to time t1), the first bias transistors Tb and Tb' are turned on based on a bias signal SB with a high voltage level, while other transistors are turned off. The storage capacitor Cst provides a voltage (Vdata + |Vth|) to turn on the first drive transistor Td, allowing the second terminal of the first drive transistor Td to supply a drive current Id from the first voltage V1 to node N1. The voltage at the first terminal of the first drive transistor Td (Td:Vd) may be equal to the first voltage V1. The voltage at the control terminal of the first drive transistor Td (Td:Vg) may be equal to the voltage (Vdata + |Vth|). The voltage at the second terminal of the first drive transistor Td (Td:Vs) may be equal to the voltage (Vdata - dV). For example, a voltage drop (dV) may be caused by the leakage current Iv plus the bias current Ib to generate a drive current Id for current balancing, which the first drive transistor Td turns on and generates. After current balancing, the voltage at node N1 can be equal to the data voltage Vdata minus the voltage drop (dV). Therefore, the voltages at the second terminal of the first driving transistor Td and the first terminal of the driving transistor Td' (Td:Vs and Td':Vd) can be equal to the voltage (Vdata-dV).

[0086] Furthermore, the drive circuit 410 can provide a leakage current Iv to drive the electronic component 420 through node N1. That is, the leakage current Iv can be the drive current Id minus the bias current Ib. If the leakage current Iv is greater than or equal to a minimum value of the drive current Id minus the bias current Ib, then the first drive transistor Td can adaptively generate a drive current Id to compensate for the leakage current Iv, thereby maintaining the data voltage Vdata, and can compensate for lower leakage currents Iv by introducing a bias current Ib. Therefore, during the bias cycle, circuit node N1 can maintain the data voltage Vdata, and the drive current Id can compensate for the leakage current Iv.

[0087] Therefore, electronic device 400 can operate electronic component 420 based on a stable bias voltage and with a wide operating range. In addition to electronic component 420, bias current circuit 430 is also electrically connected to the output of drive circuit 410, which is equivalent to increasing the leakage current of electronic component 420 to relax the minimum current requirement of drive circuit 410. Subsequently, bias current circuit 430 can help extend the operating range to provide a stable bias voltage for electronic component 420.

[0088] Furthermore, the electronic device 400 can also perform a forward current test operation. During the forward current test operation, a data voltage Vdata equal to the third voltage V3 can be applied to node N1, causing the first driving transistor Td to turn off. The second voltage V2 is higher than the third voltage V3. Therefore, a forward test current from the second voltage V2 to the third voltage V3 can be formed through the electronic component 420 and the bias current circuit 430. The forward test current can be equal to the bias current Ib. Simultaneously, external testing equipment can sense the varactor diodes and / or diodes placed in the electronic component 420 driven by the forward test current through thermal sensing, optical sensing, physical deformation sensing, or other means, allowing confirmation of whether the electronic component 420 is damaged.

[0089] In other embodiments of this disclosure, the first driving transistor Td and the driving transistor Td' may be P-type transistors, such as PMOS. The bias current circuit 430 may be configured as a source current circuit. When the first driving transistor Td is a P-type transistor, the first voltage V1 may be lower than the second voltage V2, and the first voltage V1 may be lower than the third voltage V3. In this regard, during the bias cycle, the driving current Id, the leakage current Iv, and the bias current Ib may be changed to currents in opposite directions. Furthermore, in the forward current test operation, the third voltage V3 may be configured to become higher than the second voltage V2, and the forward test current may also be changed to currents in opposite directions.

[0090] Figure 6 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. (See reference...) Figure 6 The electronic device 600 includes a drive circuit 610, an electronic component 620, and a bias current circuit 630. The drive circuit 610 is electrically connected to the electronic component 620 and the bias current circuit 630 via node N1, and is also electrically connected to a data line DL and a first voltage V1. The electronic component 620 may be electrically connected between node N1 and a second voltage V2. The bias current circuit 630 may be electrically connected between node N1 and a third voltage V3.

[0091] In embodiments of this disclosure, the driving circuit 610 includes a first scanning transistor Ts, a first driving transistor Td, a first compensation transistor Tc, a first bias transistor Tb, a first reset transistor Tr, and a storage capacitor Cst. The driving circuit 610 in the embodiments may refer to... Figure 2 The embodiments are described herein, and the details are not repeated here.

[0092] In embodiments of this disclosure, the bias current circuit 630 includes a drive transistor Td', a compensation transistor Tc', a switch transistor Tc", a first bias transistor Tb', a second bias transistor Tb", a reset transistor Tr', and a storage capacitor Cst'.

[0093] For example, the first terminal (drain) of the driving transistor Td' can be electrically connected to the compensation transistor Tc' and the first bias transistor Tb'. The second terminal (source) of the driving transistor Td' can be electrically connected to the switching transistor Tc" and the second bias transistor Tb". The control terminal (gate) of the driving transistor Td' can be electrically connected to the compensation transistor Tc', the storage capacitor Cst', and the reset transistor Tr'. The first terminal of the first bias transistor Tb' can be electrically connected to node N1. The second terminal of the first bias transistor Tb' can be electrically connected to the first terminal of the driving transistor Td'. The control terminal of the first bias transistor Tb' can be electrically connected to the bias line and receive the bias signal SB. The first terminal of the compensation transistor Tc' can be electrically connected to the first terminal of the driving transistor Td'. The second terminal of the compensation transistor Tc' can be electrically connected to the storage capacitor Cst' and the control terminal of the driving transistor Td'. The control terminal of the compensation transistor Tc' can be electrically connected to the scan line and receive the scan signal SS. The first terminal of the reset transistor Tr' can be electrically connected to the first voltage V1. The second terminal of the reset transistor Tr' can be electrically connected to the control terminal of the driving transistor Td'. The control terminal of the reset transistor Tr' can be electrically connected to the reset line and receive the reset signal SR. The first terminal of the storage capacitor Cst' can be electrically connected to the control terminal of the drive transistor Td'. The second terminal of the storage capacitor Cst' can be electrically connected to the reference line and receive the reference voltage Vf. For example, the first terminal of the second bias transistor Tb" can be electrically connected to the second terminal (source) of the drive transistor Td'. The second terminal (source) of the second bias transistor Tb" can be electrically connected to a third voltage V3. The control terminal of the second bias transistor Tb" can be electrically connected to the bias line and receive the bias signal SB. The first terminal of the switching transistor Tc" can be electrically connected to the second terminal (source) of the first drive transistor Td'. The second terminal of the switching transistor Tc" can be electrically connected to an external voltage Vbc. The control terminal of the switching transistor Tc" can be electrically connected to the scan line and receive the scan signal SS. The bias current circuit 630 can be configured as a current sinking circuit.

[0094] Figure 7 In accordance with this disclosure Figure 6 Timing diagrams of relevant voltages and signals in the embodiment. (Refer to...) Figure 6 and Figure 7In embodiments of this disclosure, the drive circuit 610 is configured to drive the electronic component 620 according to the data voltage Vdata provided by the data line DL. The bias current circuit 630 may be configured to provide a bias current Ib transferred from node N1 to the third voltage V3. In embodiments of this disclosure, the first scan transistor Ts, the first drive transistor Td, the first compensation transistor Tc, the first bias transistor Tb, and the first reset transistor Tr are N-type transistors, such as NMOS. The drive transistor Td', compensation transistor Tc', compensation transistor Tc"', bias transistor Tb', bias transistor Tb"', and reset transistor Tr' may be N-type transistors, such as NMOS, but are not limited thereto. In embodiments of this disclosure, when the first drive transistor Td is an N-type transistor, the first voltage V1 is higher than the second voltage V2, and the first voltage V1 is higher than the third voltage V3.

[0095] During the reset cycle from time t2 to time t3, the first reset transistor Tr and the reset transistor Tr' are turned on based on the reset signal SR with a high voltage level, and the voltages (Td:Vg and Td':Vg) at the control terminals of the first driving transistor Td and the driving transistor Td' are reset. Therefore, the voltage (Td:Vg) at the control terminal of the first driving transistor Td can be equal to the first voltage V1. The voltage (Td':Vg) at the control terminal of the first driving transistor Td' can be equal to the first voltage V1.

[0096] During the scan cycle from time t4 to time t5, the first scan transistor Ts, the first compensation transistor Tc, the compensation transistor Tc', and the compensation transistor Tc" are turned on based on the scan signal SS with a high voltage level, and the external driving circuit can provide the data voltage Vdata to the driving circuit 610 through the data line DL. Therefore, the voltage (Td:Vs) at the second terminal of the first driving transistor Td can be equal to the data voltage Vdata. The voltage (Td:Vg and Td:Vd) at the control terminal and the first terminal of the first driving transistor Td can be equal to the data voltage Vdata plus the voltage of the first driving transistor. The threshold voltage |Vth| of Td. The voltage at the second terminal of the driving transistor Td' (Td':Vs) can be equal to the external voltage Vbc. The voltages at the control terminal and the first terminal of the first driving transistor Td' (Td':Vg and Td':Vd) can be equal to the external voltage Vbc plus the threshold voltage Vth' of the driving transistor Td'. The storage capacitor Cst can store the charge corresponding to the data voltage Vdata plus the threshold voltage Vth' of the first driving transistor Td. The storage capacitor Cst' can store the charge corresponding to the external voltage Vbc plus the threshold voltage Vth' of the first driving transistor Td'.

[0097] During the biasing cycle from time t6 to time t7 (or from time t0 to time t1), the first bias transistor Tb, bias transistor Tb', and bias transistor Tb" are turned on based on a bias signal SB with a high voltage level, while other transistors are turned off. Storage capacitor Cst can provide a voltage (Vdata + |Vth|) to turn on the first drive transistor Td, allowing a drive current Id from the first voltage V1 to node N1 to be generated at the second terminal of the first drive transistor Td. The voltage (Td:Vd) at the first terminal of the first drive transistor Td can be equal to the first voltage V1. The voltage (Td:Vg) at the control terminal of the first drive transistor Td can be equal to the voltage (Vdata + |Vth|). Storage capacitor Cst' can provide a voltage (Vb... The first driving transistor Td is switched on by the input current c+|Vth'|, allowing a bias current Ib to be generated from node N1 at its first terminal. The voltage (Td:Vs) at the second terminal of the first driving transistor Td can be equal to the voltage (Vdata-dV). For example, a voltage drop (dV) can be caused by the leakage current Iv plus the bias current Ib to generate a drive current Id for current balancing, which is then generated by the first driving transistor Td. After current balancing, the voltage at node N1 can be equal to the data voltage Vdata minus the voltage drop (dV). Therefore, the voltages (Td:Vs and Td':Vd) at the second terminal of the first driving transistor Td and the first terminal of the driving transistor Td' can be equal to the voltage (Vdata-dV).

[0098] Furthermore, the drive circuit 610 can provide a leakage current Iv to drive the electronic component 620 through node N1. That is, the leakage current Iv is the drive current Id minus the bias current Ib. If the leakage current Iv is greater than or equal to a minimum value of the drive current Id minus the bias current Ib, then the first drive transistor Td can adaptively generate a drive current Id to compensate for the leakage current Iv, thereby maintaining the data voltage Vdata, and can compensate for lower leakage currents Iv by introducing a bias current Ib. Therefore, during the bias period, node N1 can maintain the data voltage Vdata, and the drive current Id can compensate for the leakage current Iv.

[0099] Therefore, electronic device 600 can operate electronic component 620 based on a stable bias voltage and with a wide operating range. In addition to electronic component 620, bias current circuit 630 is also electrically connected to the output of drive circuit 610, which is equivalent to increasing the leakage current of electronic component 620 to relax the minimum current requirement of drive circuit 610. Subsequently, bias current circuit 630 can help extend the operating range to provide a stable bias voltage for electronic component 620.

[0100] Furthermore, the electronic device 600 can also perform a forward current test operation. During the forward current test operation, a data voltage Vdata equal to the third voltage V3 can be applied to node N1, causing the first driving transistor Td to turn off. The second voltage V2 is higher than the third voltage V3. Therefore, a forward test current from the second voltage V2 to the third voltage V3 can be formed through the electronic component 620 and the bias current circuit 630. The forward test current can be equal to the bias current Ib. Simultaneously, an external test device can sense the varactor diode and / or diode disposed in the electronic component 620 driven by the forward test current through thermal sensing, optical sensing, physical deformation sensing, or other means, allowing confirmation of whether the electronic component 620 is damaged.

[0101] In other embodiments of this disclosure, the first driving transistor Td and the driving transistor Td' may be P-type transistors, such as PMOS. The bias current circuit 630 may be configured as a source current circuit. The first voltage V1 may be configured to become lower than the second voltage V2, and the third voltage V3 may be configured to become higher than the first voltage V1. In this regard, during the bias cycle, the driving current Id, the leakage current Iv, and the bias current Ib may be changed to currents in opposite directions. Furthermore, in the forward current test operation, the third voltage V3 is configured to become higher than the second voltage V2, and the forward test current may also be changed to currents in opposite directions.

[0102] Figure 8 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. (See reference...) Figure 8 The electronic device 800 includes a drive circuit 810, an electronic component 820, and a bias current circuit 830. The drive circuit 810 is electrically connected to the electronic component 820 and the bias current circuit 830 via node N1, and is also electrically connected to a data line DL and a first voltage V1. The electronic component 820 may be electrically connected between circuit node N1 and a second voltage V2. The bias current circuit 830 may be electrically connected between circuit node N1 and a third voltage V3.

[0103] In embodiments of this disclosure, the driving circuit 810 includes a first scanning transistor Ts, a second scanning transistor Ta, a first driving transistor Td, a storage capacitor Cst, and a capacitor C'. The second scanning transistor Ta is electrically connected between the first driving transistor Td and a data line DL. A first terminal of the first scanning transistor Ts is electrically connected to the data line DL. A second terminal of the first scanning transistor Ts is electrically connected to node N1. A control terminal of the first scanning transistor Ts is electrically connected to the scan line and receives a scan signal SS. A first terminal of the second scanning transistor Ta is electrically connected to the storage capacitor Cst and the capacitor C'. A second terminal of the second scanning transistor Ta is electrically connected to node N1. A control terminal of the second scanning transistor Ta is electrically connected to the scan line and receives the scan signal SS. A first terminal (drain) of the first driving transistor Td is electrically connected to a first voltage V1. A second terminal (source) of the first driving transistor Td is electrically connected to node N1. A control terminal (gate) of the first driving transistor Td is electrically connected to the storage capacitor Cst, the capacitor C', and the first terminal of the second scanning transistor Ta. The capacitor C' is electrically connected between the first driving transistor Td and the scan line providing the scan signal SS. The first terminal of capacitor Cst can be electrically connected to a first voltage V1. The second terminal of capacitor Cst can be electrically connected to the first terminal (drain) of the second scan transistor Ta. The first terminal of capacitor C' can be electrically connected to capacitor Cst, the control terminal (gate) of the first drive transistor Td, and / or the second scan transistor Ta. The second terminal of capacitor C' can be electrically connected to a scan line. The first drive transistor Td can be configured as a source follower amplifier circuit.

[0104] In embodiments of this disclosure, the driving circuit 810 may be a programmable voltage source circuit and configured to drive electronic component 820 according to the data voltage Vdata provided by the data line DL. The bias current circuit 830 may be a current sinking circuit and configured to provide a bias current Ib transferred from circuit node N1 to the third voltage V3. In embodiments of this disclosure, the first scan transistor Ts, the second scan transistor Ta, and the first driving transistor Td are N-type transistors, such as NMOS. Specifically, the first voltage V1 is higher than the second voltage V2, and the third voltage V3 is lower than the first voltage V1. During the scan cycle, the first scan transistor Ts and the second scan transistor Ta are turned on based on the scan signal SS, and the external driving circuit can provide the data voltage Vdata to the driving circuit 810 via the data line DL. The storage capacitor Cst can store the charge corresponding to the data voltage Vdata. Subsequently, during the bias period, the first scan transistor Ts and the second scan transistor Ta are turned off based on the scan signal SS, and the storage capacitor Cst provides a voltage (Vdata|) to turn on the first drive transistor Td, allowing the second terminal of the first drive transistor Td to provide a drive current Id from the first voltage V1 to node N1. Furthermore, the drive circuit 810 can provide a leakage current Iv to drive the electronic component 820 through node N1. That is, the leakage current Iv is the drive current Id minus the bias current Ib. If the leakage current Iv is greater than or equal to a minimum value of the drive current Id minus the bias current Ib, then the first drive transistor Td can adaptively generate a drive current Id to compensate for the leakage current Iv, thereby maintaining the data voltage Vdata. A lower leakage current Iv can be compensated by introducing a bias current Ib. Therefore, during the bias period, circuit node N1 can maintain the data voltage Vdata, and the drive current Id can compensate for the leakage current Iv.

[0105] It should be noted that during the bias period, when the first drive transistor Td is operated in depletion mode, the capacitive coupling effect of capacitor C' can be effective for setting a lower voltage at the control terminal of the first drive transistor Td. Therefore, the value of the drive current Id can be reduced or even lower. Thus, the electronic device 800 can operate the electronic component 820 based on a stable bias voltage and with a wide operating range. Additionally, in some embodiments of this disclosure, the electronic device 800 may not have a bias current circuit 830.

[0106] Furthermore, the electronic device 800 can also perform a forward current test operation. During the forward current test operation, a data voltage Vdata equal to the third voltage V3 can be applied to node N1, causing the first driving transistor Td to turn off. The second voltage V2 is higher than the third voltage V3. Therefore, a forward test current from the second voltage V2 to the third voltage V3 can be formed through the electronic component 820 and the bias current circuit 830. The forward test current can be equal to the bias current Ib. Simultaneously, varactor diodes and / or diodes installed in the electronic component 820 driven by the forward test current by external testing equipment via thermal sensing, optical sensing, physical deformation sensing, or other means can confirm whether the electronic component 820 is damaged.

[0107] In other embodiments of this disclosure, the first driving transistor Td may be configured as a P-type transistor, such as a PMOS. The bias current circuit 830 may be configured as a source current circuit. The first voltage V1 may be configured to become lower than the second voltage V2, and the third voltage V3 may be configured to become higher than the first voltage V1. In this regard, during the bias cycle, the driving current Id, the leakage current Iv, and the bias current Ib may be changed to currents in opposite directions. Furthermore, in the forward current test operation, the third voltage V3 is configured to become higher than the second voltage V2, and the forward test current may also be changed to currents in opposite directions.

[0108] Figure 9 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. (See reference...) Figure 9 The electronic device 900 includes a drive circuit 910, an electronic component 920, and a bias current circuit 930. The drive circuit 910 is electrically connected to the electronic component 920 and the bias current circuit 930 via node N1, and is also electrically connected to the data line DL and a first voltage V1. Unlike... Figure 8 In one embodiment, the drive circuit 910 is a source follower amplifier circuit with voltage (threshold voltage (Vth)) compensation. Electronic component 920 is electrically connected between node N1 and the second voltage V2. Bias current circuit 930 is electrically connected between node N1 and the third voltage V3.

[0109] In embodiments of this disclosure, the driving circuit 910 includes a first scan transistor Ts, a first driving transistor Td, a first compensation transistor Tc, a first bias transistor Tb, a first reset transistor Tr, a storage capacitor Cst, and a capacitor C'. A first terminal of the first scan transistor Ts is electrically connected to a data line DL. A second terminal of the first scan transistor Ts is electrically connected to node N1. A control terminal of the first scan transistor Ts is electrically connected to the scan line and receives a scan signal SS. A first terminal (drain) of the first driving transistor Td is electrically connected to the first compensation transistor Tc and the first bias transistor Tb. A second terminal (source) of the first driving transistor Td is electrically connected to node N1. A control terminal (gate) of the first driving transistor Td is electrically connected to the first compensation transistor Tc, the storage capacitor Cst, and the first reset transistor Tr. A first terminal of the first bias transistor Tb is electrically connected to a first voltage V1. A second terminal of the first bias transistor Tb is electrically connected to the first terminal of the first driving transistor Td. A control terminal of the first bias transistor Tb is electrically connected to a bias line and receives a bias signal SB. A first terminal of the first compensation transistor Tc is electrically connected to the first terminal of the first driving transistor Td. The second terminal of the first compensation transistor Tc can be electrically connected to the control terminal of the storage capacitor Cst, capacitor C', and / or the first drive transistor Td. The control terminal of the first compensation transistor Tc can be electrically connected to capacitor C' and the scan line, and receives the scan signal SS. The first terminal of the first reset transistor Tr can be electrically connected to the first voltage V1. The second terminal of the first reset transistor Tr can be electrically connected to the control terminal of the first drive transistor Td. The control terminal of the first reset transistor Tr can be electrically connected to the reset line and receives the reset signal SR. The first terminal of the storage capacitor Cst can be electrically connected to the first voltage V1. The second terminal of the storage capacitor Cst can be electrically connected to the control terminal of the first drive transistor Td. The first terminal of the capacitor C' can be electrically connected to the control terminal of the first compensation transistor Tc. The second terminal of the capacitor C' can be electrically connected to the second terminal of the first compensation transistor Tc. The drive circuit 910 can be configured as a source follower amplifier circuit.

[0110] In embodiments of this disclosure, the drive circuit 910 may be configured to drive the electronic component 920 according to the data voltage Vdata provided by the data line DL. The bias current circuit 930 may be a current sinking circuit and is configured to provide a bias current Ib transferred from node N1 to the third voltage V3. In embodiments of this disclosure, the first scan transistor Ts, the first drive transistor Td, the first compensation transistor Tc, the first bias transistor Tb, and the first reset transistor Tr are N-type transistors, such as NMOS. Specifically, the first voltage V1 is higher than the second voltage V2, and the third voltage V3 is lower than the first voltage V1. During the reset cycle, the first reset transistor Tr is turned on based on the reset signal SR, and the voltage at the control terminal of the first drive transistor Td is reset. During the scan cycle, the first scan transistor Ts and the first compensation transistor Tc are turned on based on the scan signal SS, and the external drive circuit can provide the data voltage Vdata to the drive circuit 910 via the data line DL. The storage capacitor Cst may store the charge corresponding to the data voltage Vdata plus the threshold voltage Vth of the first drive transistor Td. Subsequently, during the bias cycle, the first bias transistor Tb is turned on based on the bias signal SB, and the first scan transistor Ts and the first compensation transistor Tc are turned off based on the scan signal SS. The storage capacitor Cst provides a voltage (Vdata + |Vth|) to turn on the first drive transistor Td, allowing the second terminal of the first drive transistor Td to supply a drive current Id from the first voltage V1 to node N1. Furthermore, the drive circuit 910 can provide a leakage current Iv to drive the electronic component 920 through node N1. That is, the leakage current Iv is the drive current Id minus the bias current Ib. If the leakage current Iv is greater than or equal to a minimum value of the drive current Id minus the bias current Ib, then the first drive transistor Td can adaptively generate a drive current Id to compensate for the leakage current Iv, thereby maintaining the data voltage Vdata. A lower leakage current Iv can be compensated by introducing a bias current Ib. Therefore, during the bias cycle, node N1 can maintain the data voltage Vdata, and the drive current Id can compensate for the leakage current Iv.

[0111] It should be noted that during the bias period, when the first drive transistor Td is operated in depletion mode, the capacitive coupling effect of capacitor C' can be effective for setting a lower voltage at the control terminal of drive transistor Td. Therefore, the value of the drive current Id can be reduced. Thus, electronic device 900 can operate electronic component 920 based on a stable bias voltage and with a wide operating range. Additionally, in some embodiments of this disclosure, electronic device 900 may not have a bias current circuit 930.

[0112] Furthermore, the electronic device 900 can also perform a forward current test operation. During the forward current test operation, a data voltage Vdata equal to the third voltage V3 can be applied to circuit node N1, causing the first driving transistor Td to turn off. The third voltage V3 is lower than the second voltage V2. Therefore, a forward test current from the second voltage V2 to the third voltage V3 can be formed through the electronic component 920 and the bias current circuit 930. The forward test current can be equal to the bias current Ib. Simultaneously, an external test device can sense the varactor diode and / or diode disposed in the electronic component 920 driven by the forward test current through thermal sensing, optical sensing, physical deformation sensing, or other means, allowing confirmation of whether the electronic component 920 is damaged.

[0113] In other embodiments of this disclosure, the first driving transistor Td may be configured as a P-type transistor, such as a PMOS. The bias current circuit 930 may be configured as a source current circuit. The first voltage V1 may be configured to become lower than the second voltage V2, and the third voltage V3 may be configured to become higher than the first voltage V1. In this regard, during the bias cycle, the driving current Id, the leakage current Iv, and the bias current Ib may be changed to currents in opposite directions. Furthermore, in the forward current test operation, the third voltage V3 is configured to become higher than the second voltage V2, and the forward test current may also be changed to currents in opposite directions.

[0114] In summary, the electronic device of this disclosure can operate electronic components based on a stable bias voltage and with a wide operating range. Furthermore, the electronic device of this disclosure can also support a forward current testing function to effectively determine whether the electronic components in the device are damaged.

[0115] It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed embodiments without departing from the scope or spirit of this disclosure. In view of the foregoing, it is intended that this disclosure cover such modifications and variations, provided that they fall within the scope of the appended claims and their equivalents.

Claims

1. An electronic device, characterized in that, include: A drive circuit is electrically connected between the node and a first voltage to provide a first current from the first voltage to the node; An electronic component is electrically connected between the node and the second voltage, and is driven by receiving a second current from the node; as well as A bias current circuit, electrically connected between the node and the third voltage, provides a third current that flows from the node to the third voltage. The first voltage is different from the second voltage and the third voltage. The driving circuit is a source follower amplifier circuit, which includes a first driving transistor and a first capacitor. The driving circuit also includes a first scanning transistor. The drain terminal of the first driving transistor is electrically connected to the first voltage, and the source terminal of the first driving transistor is electrically connected to the node. The first terminal of the first capacitor is electrically connected to the first voltage, and the second terminal of the first capacitor is electrically connected to the gate terminal of the first driving transistor. The drain terminal of the first scanning transistor is electrically connected to the data line, and the source terminal of the first scanning transistor is electrically connected to the source terminal of the first driving transistor and the node.

2. The electronic device according to claim 1, characterized in that, The bias current circuit includes a resistor electrically connected between the node and the third voltage.

3. The electronic device according to claim 1, characterized in that, The bias current circuit includes a diode electrically connected between the node and the third voltage.

4. The electronic device according to claim 1, characterized in that, The driving circuit includes a second scanning transistor, the drain terminal of which is electrically connected to the gate terminal of the first driving transistor, and the source terminal of which is electrically connected to the data line.

5. The electronic device according to claim 1, characterized in that, The driving circuit further includes a first reset transistor, a first bias transistor, and a first compensation transistor. The drain of the first reset transistor is electrically connected to the first voltage, the source of the first reset transistor is electrically connected to the gate of the first driving transistor, the drain of the first bias transistor is electrically connected to the first voltage, the source of the first bias transistor is electrically connected to the drain of the first driving transistor, the drain of the first compensation transistor is electrically connected to the drain of the first driving transistor, and the source of the first compensation transistor is electrically connected to the gate of the first driving transistor.

6. The electronic device according to claim 1, characterized in that, The bias current circuit includes a second driving transistor. When the driving transistor is an N-type transistor and the third voltage is lower than the second voltage, the electronic component performs a forward current test operation. The drain terminal of the second driving transistor is electrically connected to the node, and the source terminal of the second driving transistor is electrically connected to the third voltage.

7. The electronic device according to claim 1, characterized in that, The bias current circuit includes a second driving transistor. When the driving transistor is a P-type transistor and the third voltage is higher than the second voltage, the electronic component performs a forward current test operation. The source terminal of the second driving transistor is electrically connected to the node, and the drain terminal of the second driving transistor is electrically connected to the third voltage.

8. The electronic device according to claim 1, characterized in that, The bias current circuit includes a second driving transistor electrically connected between the node and the third voltage, a reset transistor, a first bias transistor, a compensation transistor, and a second capacitor. A first terminal of the first bias transistor is electrically connected to the node, a second terminal of the first bias transistor is electrically connected to a first terminal of the second driving transistor, a first terminal of the compensation transistor is electrically connected to the drain terminal of the second driving transistor, a second terminal of the compensation transistor is electrically connected to the gate terminal of the second driving transistor, a first terminal of the reset transistor is electrically connected to the first voltage, a second terminal of the reset transistor is electrically connected to the gate terminal of the second driving transistor, and a first terminal of the second capacitor is electrically connected to the gate terminal of the second driving transistor.

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