Control Device, Method, Apparatus, Storage Medium and Electronic Device for Chip Programming
By deploying processors and on-off modules in the server, detecting the burn interface status and disconnecting the BMC and VR chip, the problem of failure of VR chips is solved and data burn efficiency is improved.
Patent Information
- Application Number
- CN202310073046.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-29
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2043-01-29
AI Technical Summary
In the server, when the BMC and VR recording tools are connected simultaneously on the I2C bus of the VR chip, the BMC's master priority is higher than the VR recording fixture, resulting in the failure of the VR chip recording, and the VR chip information cannot be changed online, and the data recording efficiency is low.
By deploying the processor and on-off module on the server, detecting the burn interface status and sending a circuit breaker control signal to disconnect the connection between the BMC and the VR chip, the control chip burning fixture is used to burn, avoiding BMC interference.
It realizes that when the BMC and VR chip are disconnected, the data burning of the VR chip is successfully carried out, which improves the data burning efficiency and avoids the failure of burning caused by BMC reading data.
Smart Images

Figure CN116149681B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of computers, and more specifically, to a control device, method, apparatus, storage medium, and electronic device for chip programming. Background Art
[0002] With the continuous development of information technology, VR (Voltage Regulator) chips used for DC to DC (Direct Current to Direct Current) conversion have been continuously updated from the original analog technology to the current digital technology. Designers no longer need to perform cumbersome formula calculations and can complete the setting of functions such as the output voltage, loop compensation, and protection parameters of VR chips only through the I2C bus. The setting method is simple and easy to understand.
[0003] When developing and designing a server, designers often interconnect the I2C bus of the VR chip with the I2C bus of the BMC (Baseboard Management Controller) in the server. This design method can realize the monitoring function of the BMC for the VR chip. During the normal operation of the server, the BMC continuously polls and collects data through the I2C bus to obtain the voltage, current, and status information of the VR chip in real time. This function further accelerates the development of server information technology. In addition, during the normal use of the server, designers usually need to update and optimize the internal information of the VR chip, that is, the programming operation of the VR chip. The programming process of the VR chip is also realized through the I2C bus of the VR chip. That is, the I2C bus of the VR chip is connected to both the BMC and the VR programming tool at the same time. The polling status of the BMC needs to obtain the internal information of the VR chip, while at the same time, the VR programming tool needs to modify the internal information of the VR chip. Two types of data are transmitted on the I2C bus at the same time. The master priority of the BMC is higher than that of the VR programming tool and always occupies the I2C bus, which will cause the programming operation of the VR chip tool to fail and the relevant information of the VR chip cannot be changed online. Summary of the Invention
[0004] The embodiments of the present application provide a control device, method, apparatus, storage medium, and electronic device for chip programming to at least solve the problem of low data programming efficiency for chips in related technologies.
[0005] According to an embodiment of the present application, a control device for chip programming is provided, including: a processor and a switching module. Among them, the switching module is connected between the BMC deployed on the server and the server VR chip, the processor is connected to the switching module, and the processor is also connected to the programming interface deployed on the server. The programming interface is used to directly connect the chip programming fixture to the server VR chip, and the chip programming fixture is used to program the operating data into the server VR chip; the processor is used to detect the interface state of the programming interface; when the interface state indicates that the chip programming fixture has been connected to the programming interface, a break control signal is sent to the switching module, where the break control signal is used to instruct the switching module to disconnect the connection between the BMC and the server VR chip; when it is determined that the switching module has disconnected the connection between the BMC and the server VR chip, the chip programming fixture is controlled to program the server VR chip; the switching module is used to respond to the break control signal and disconnect the connection between the BMC and the server VR chip.
[0006] Optionally, the switching module includes: a control unit and a target switch. Among them, the signal input end of the control unit is connected to the processor, the signal output end of the control unit is connected to the target switch, and the target switch is connected between the BMC and the server VR chip; the control unit is used to receive the break control signal; convert the break control signal into a switch control instruction; send the switch control instruction to the target switch, where the switch control instruction is used to control the disconnection of the target switch.
[0007] Optionally, the target switch includes: a first field-effect transistor and a second field-effect transistor. Among them, the first end of the first field-effect transistor is connected to the SAD port of the BMC, the second end of the first field-effect transistor is connected to the SAD port of the server VR chip, the gate of the first field-effect transistor is connected to the signal output end of the control unit, the first end of the second field-effect transistor is connected to the SCL port of the BMC, the second end of the second field-effect transistor is connected to the SCL port of the server VR chip, and the gate of the second field-effect transistor is connected to the signal output end of the control unit.
[0008] Optionally, the control unit includes: a complex programmable logic device, where the complex programmable logic device is used to convert the break control signal into a level signal, the level signal is used to indicate the on / off state of the target switch, and the switch control instruction includes the level signal.
[0009] Optionally, the control device for chip programming further includes: an indicator light, where the indicator light is connected to the on-off module, and the on-off module is further configured to control the indicator light to turn on when receiving the open-circuit control signal.
[0010] According to an embodiment of the present application, a method for controlling chip programming is provided, including: detecting the interface state of a programming interface, where the programming interface is used to directly connect a chip programming fixture to a server VR chip, and the chip programming fixture is used to program operation data into the server VR chip; when the interface state indicates that the chip programming fixture has been connected to the programming interface, sending an open-circuit control signal to an on-off module deployed in a control device for chip programming, where the control device for chip programming includes a processor and the on-off module, the on-off module is connected between a BMC deployed on the server and the server VR chip, the processor is connected to the on-off module, the processor is further connected to the programming interface deployed on the server, the open-circuit control signal is used to indicate the on-off module to disconnect the connection between the BMC and the server VR chip, and the on-off module is configured to respond to the open-circuit control signal and disconnect the connection between the BMC and the server VR chip; when it is determined that the on-off module has disconnected the connection between the BMC and the server VR chip, controlling the chip programming fixture to program the server VR chip.
[0011] Optionally, after controlling the chip programming fixture to program the server VR chip, the method further includes: detecting the programming state of the server VR chip; when the programming state indicates that the chip programming fixture has finished programming operation data into the server VR chip, sending a closed-circuit control signal to the on-off module, where the closed-circuit control signal is used to indicate the on-off module to connect the connection between the BMC and the server VR chip.
[0012] Optionally, detecting the interface state of the programming interface includes: detecting the level value in the programming interface; determining the interface state that matches the level value.
[0013] According to another embodiment of the present application, a control device for chip programming is provided, including: a first detection module, configured to detect the interface state of a programming interface, wherein the programming interface is used to directly connect a chip programming fixture to a server VR chip, and the chip programming fixture is used to program operation data into the server VR chip; a first sending module, configured to send a disconnection control signal to a break-make module deployed in a control device for chip programming when the interface state indicates that the chip programming fixture has been connected to the programming interface, wherein the control device for chip programming includes a processor and the break-make module, the break-make module is connected between a BMC deployed on the server and the server VR chip, the processor is connected to the break-make module, the processor is further connected to the programming interface deployed on the server, the disconnection control signal is used to instruct the break-make module to disconnect the connection between the BMC and the server VR chip, and the break-make module is configured to respond to the disconnection control signal and disconnect the connection between the BMC and the server VR chip; a control module, configured to control the chip programming fixture to program the server VR chip when it is determined that the break-make module has disconnected the connection between the BMC and the server VR chip.
[0014] According to still another embodiment of the present application, a computer-readable storage medium is further provided, in which a computer program is stored, and the computer program is configured to execute the steps in any one of the above method embodiments when running.
[0015] According to still another embodiment of the present application, an electronic device is further provided, including a memory and a processor, a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0016] Through this application, by setting a processor and a switching module in the control device for chip programming, connecting the switching module between the BMC deployed on the server and the server VR chip, connecting the processor and the switching module, and connecting the processor and the programming interface deployed on the server, it is realized that when it is detected that the programming fixture has been connected to the programming interface by detecting the interface state of the programming interface, the connection between the BMC and the server VR chip is instructed to be disconnected by sending a disconnection control signal to the switching module. Furthermore, when the connection between the BMC and the server VR chip has been disconnected, the chip programming fixture is controlled to program the server VR chip, avoiding the failure of data programming of the server VR chip caused by the BMC reading the data on the server VR chip, and realizing that the data programming process of the server VR chip is not interfered by the BMC. Therefore, problems such as low efficiency of data programming of the chip can be solved, and the effect of improving the efficiency of data programming of the chip can be achieved. Description of the Drawings
[0017] Figure 1 is a schematic diagram of a control device for chip programming according to an embodiment of the present application;
[0018] Figure 2 is an architecture diagram of an optionally control device for chip programming according to an embodiment of the present application;
[0019] Figure 3 is a hardware structure block diagram of a mobile terminal for a control method of chip programming according to an embodiment of the present application;
[0020] Figure 4 is a flowchart of a control method of chip programming according to an embodiment of the present application;
[0021] Figure 5 is an optionally chip programming flowchart according to an embodiment of the present application;
[0022] Figure 6 is a structure block diagram of a control device for chip programming according to an embodiment of the present application. Detailed Embodiments
[0023] Hereinafter, embodiments of the present application will be described in detail with reference to the drawings and in conjunction with the embodiments.
[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence.
[0025] In the present application, a control device for chip programming is provided. Figure 1 is a schematic diagram of a control device for chip programming according to an embodiment of the present application, as Figure 1As shown in the figure, the control device for chip programming includes: a processor 12 and a switching module 14. Among them,
[0026] The switching module 14 is connected between the BMC deployed on the server and the server VR chip. The processor 12 is connected to the switching module 14. The processor 12 is also connected to the programming interface deployed on the server. The programming interface is used to directly connect the chip programming fixture to the server VR chip. The chip programming fixture is used to program the operation data into the server VR chip;
[0027] The processor 12 is used to detect the interface state of the programming interface; when the interface state is used to indicate that the chip programming fixture has been connected to the programming interface, a disconnection control signal is sent to the switching module 14. Among them, the disconnection control signal is used to indicate that the switching module 14 disconnects the connection between the BMC and the server VR chip; when it is determined that the switching module 14 has disconnected the connection between the BMC and the server VR chip, the chip programming fixture is controlled to program the server VR chip;
[0028] The switching module 14 is used to respond to the disconnection control signal and disconnect the connection between the BMC and the server VR chip.
[0029] Optionally, in this embodiment, the chip programming fixture is directly connected to the server VR chip through the chip programming interface, that is, the chip programming fixture does not pass through the connection link between the BMC and the VR chip when connected to the VR chip, so as to realize that the connection between the BMC and the VR chip can be controlled by the switching module without affecting the connection relationship between the chip programming fixture and the VR chip.
[0030] Optionally, in this embodiment, the BMC is used to monitor the VR chip, so as to collect the operation data in the VR chip.
[0031] Optionally, in this embodiment, the operation data is data used to indicate the operation state of the VR chip. The operation data may include, but is not limited to: the output voltage, loop compensation, protection parameters, etc. of the VR chip. This solution does not make a limitation on this.
[0032] Optionally, in this embodiment, detecting the interface state of the programming interface may be by detecting the level signal in the programming interface. That is, when the chip programming fixture is connected to the VR chip through the programming interface, the chip programming interface will generate a level change value, and then the interface state of the programming interface can be detected through the level change. Or, detecting the interface state of the programming interface may also be by detecting whether there is a programming signal for programming the VR chip in the programming interface. After detecting the programming signal, it is determined that the chip programming fixture is connected to the VR chip through the programming interface, thereby determining the interface state.
[0033] Optionally, in this embodiment, the open circuit control signal may be a control signal that directly controls the disconnection of the on-off module. Then, after receiving the open circuit control signal, the on-off module disconnects the connection between the BMC and the VR chip. Or, the open circuit control signal may also be a signal for indicating the interface state, such as a signal for indicating whether the chip programming fixture is connected to the VR chip through the programming interface. Then, after receiving the signal, the on-off module can determine whether the connection state between the BMC and the VR chip needs to be disconnected according to the interface state.
[0034] As an optional embodiment, the on-off module includes: a control unit and a target switch, where
[0035] The signal input end of the control unit is connected to the processor, the signal output end of the control unit is connected to the target switch, and the target switch is connected between the BMC and the server VR chip;
[0036] The control unit is configured to receive the open circuit control signal; convert the open circuit control signal into a switch control instruction; and send the switch control instruction to the target switch, where the switch control instruction is used to control the disconnection of the target switch.
[0037] Optionally, in this embodiment, the control unit is further configured to receive a path control signal sent by the processor. This path control signal is sent to the control unit when the processor detects that the data programming of the server VR chip is completed. After receiving the path signal, the control unit determines that the data programming of the VR chip by the current chip programming fixture is completed and the connection between the BMC and the server VR chip needs to be connected. Therefore, a path control instruction is sent to the target switch, and this path control instruction is used to control the target switch to be connected.
[0038] Optionally, in this embodiment, the switch control instruction may be a control signal sent by the control unit. After the target switch receives this control signal, it performs an on / off operation corresponding to the control signal. This control signal may be, but is not limited to, a level signal, that is, when the target switch performs a disconnection operation and a connection operation, the received level signal values are different, and the target switch performs the corresponding on / off operation according to the received level signal value.
[0039] Through the above content, by setting the control unit and the target switch, with the target switch connected between the BMC and the VR chip, the control unit is used to control the disconnection of the target switch, thereby realizing the control of the connection link between the BMC and the VR chip through the control unit. When the chip burning fixture performs data burning on the VR chip, the connection link between the BMC and the VR chip is in a disconnected state, avoiding the influence brought by the burning operation of the BMC on the VR chip.
[0040] As an optional embodiment, the target switch includes: a first field-effect transistor and a second field-effect transistor, where
[0041] The first end of the first field-effect transistor is connected to the SAD (Serial Data Line) port of the BMC, the second end of the first field-effect transistor is connected to the SAD port of the server VR chip, the gate of the first field-effect transistor is connected to the signal output end of the control unit, the first end of the second field-effect transistor is connected to the SCL (Serial Clock Line) port of the BMC, the second end of the second field-effect transistor is connected to the SCL port of the server VR chip, and the gate of the second field-effect transistor is connected to the signal output end of the control unit.
[0042] Optionally, in this embodiment, the first field-effect transistor may be a P-channel field-effect transistor, or it may also be an N-channel field-effect transistor.
[0043] Optionally, in this embodiment, the second field-effect transistor may be a P-channel field-effect transistor, or it may also be an N-channel field-effect transistor. The models of the first field-effect transistor and the second field-effect transistor deployed in the control device for chip burning may be the same or different, and this solution does not limit this.
[0044] Optionally, in this embodiment, the first end of the first field-effect transistor may be the source or the drain. Similarly, when the first end of the first field-effect transistor is the source, the second end of the first field-effect transistor is the drain, and when the first end of the first field-effect transistor is the drain, the second end of the first field-effect transistor is the source.
[0045] Optionally, in this embodiment, the first end of the second field-effect transistor may be the source electrode or the drain electrode. Similarly, when the first end of the second field-effect transistor is the source electrode, the second end of the second field-effect transistor is the drain electrode; when the first end of the second field-effect transistor is the drain electrode, the second end of the second field-effect transistor is the source electrode.
[0046] As an optional embodiment, the control unit includes: a complex programmable logic device, where the complex programmable logic device is used to convert the open-circuit control signal into a level signal, and the level signal is used to indicate the on / off state of the target switch, and the switch control instruction includes the level signal.
[0047] Optionally, in this embodiment, the control unit may further include a single-chip microcomputer. The signal input end of the single-chip microcomputer is connected to the processor, and the signal output end of the single-chip microcomputer is connected to the complex programmable logic device. The processor sends an indication signal for indicating whether the chip burning fixture is connected to the burning interface to the single-chip microcomputer. Then, after receiving the indication signal, the single-chip microcomputer determines whether to control the on / off of the connection between the BMC and the server VR chip, and then sends a path control signal (used to indicate that the connection between the BMC and the server VR chip is turned on) or an open-circuit control signal (used to indicate that the connection between the BMC and the server VR chip is turned off) to the complex programmable logic device. After receiving the path control signal or the open-circuit control signal, the complex programmable logic device generates a corresponding level signal and sends it to the target switch.
[0048] As an optional embodiment, the control device for chip burning further includes: an indicator light, where the indicator light is connected to the on / off module, where
[0049] The on / off module is further used to control the indicator light to turn on when receiving the open-circuit control signal.
[0050] Optionally, in this embodiment, the on / off state of the indicator light is used to indicate the on / off state of the connection between the BMC and the server VR chip. In this application, when the indicator light is on, the connection between the BMC and the server VR chip is in an open-circuit state. During actual use, it can also be set that when the connection between the BMC and the server VR chip is in an open-circuit state, the indicator light is controlled to turn off. This solution does not limit this.
[0051] Through the above content, by setting an indicator light connected to the on / off module, the connection state between the BMC inside the server and the server VR chip is characterized by the on / off state of the indicator light, so that the server management personnel can clearly determine the connection state between the BMC inside the server and the server VR chip according to the indicator light, which is convenient for the later maintenance of the server maintenance personnel.
[0052] Figure 2 It is an architecture diagram of a control device for chip programming according to an embodiment of the present application. As Figure 2 shown, the control device for chip programming includes a processor (host computer in the figure) and a switching module. The switching module includes a single-chip microcomputer, a CPLD (Complex Programmable Logic Device), a first field-effect transistor, a second field-effect transistor, and an indicator light. The host computer programming interface (I2C header) is connected (this programming interface can be a USB interface). The host computer is connected to the chip programming fixture through the programming interface. The chip programming fixture is directly connected to the server VR chip through this programming interface. The host computer is connected to the signal input end of the single-chip microcomputer through the USB interface. The host computer system software level includes a system for controlling the single-chip microcomputer and software for controlling the chip programming fixture, which can be implemented by python or other programs; the single-chip microcomputer is connected to the CPLD through GPIO lines; for the BMC I2C channel, a first field-effect transistor and a second field-effect transistor are added to the SDA and SCL buses. The gates of the two field-effect transistors are connected to the same signal of the CPLD. The conduction and cutoff of the field-effect transistors can be controlled through the CPLD, thereby controlling whether the BMC polls this I2C channel; at the same time, the signal output end of the GPLD is also connected to the indicator light. After the VR programming fixture is connected to the I2C header, the host computer will control the single-chip microcomputer. The single-chip microcomputer sends corresponding instructions to the CPLD through the GPIO lines. When the CPLD receives the instructions, it issues a low level to turn off the MOS transistors on the BMC SDA and SCL buses, realizing the interruption of this I2C path for the BMC to access the VR chip. At the same time, it does not affect the BMC to continue polling other I2C buses. In this way, the VR programming fixture can successfully program the VR FW. At the same time, the GPLD will also send a lighting instruction to the indicator light to control the indicator light to light up, so that the management personnel can know the on-off status of the connection between the internal BMC and the VR chip of the server according to the status of the indicator light.
[0053] The method embodiments provided in the embodiments of the present application can be executed on a mobile terminal, a computer terminal, or a similar computing device. Taking running on a mobile terminal as an example, Figure 3 It is a hardware structure block diagram of a mobile terminal for a control method of chip programming according to an embodiment of the present application. As Figure 3 shown, the mobile terminal may include one or more ( Figure 3 only one is shown in the figure) processors 302 (the processor 302 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 304 for storing data. Among them, the above mobile terminal may further include a transmission device 306 for communication functions and an input / output device 308. Those of ordinary skill in the art can understand, Figure 3The structure shown is only schematic and does not limit the structure of the above-mentioned mobile terminal. For example, the mobile terminal may further include more or fewer components than those shown in Figure 3 or have a different configuration from that shown in Figure 3 .
[0054] The memory 304 can be used to store computer programs. For example, software programs and modules of application software, such as the computer program corresponding to the control method of chip programming in the embodiments of the present application. The processor 302 executes various functional applications and data processing by running the computer program stored in the memory 304, that is, implements the above-mentioned method. The memory 304 may include a high-speed random access memory and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memories. In some instances, the memory 304 may further include a memory remotely provided with respect to the processor 302, and these remote memories can be connected to the mobile terminal through a network. Examples of the above network include but are not limited to the Internet, enterprise intranet, local area network, mobile communication network, and combinations thereof.
[0055] The transmission device 306 is used to receive or send data via a network. Specific examples of the above network may include a wireless network provided by the communication provider of the mobile terminal. In one instance, the transmission device 306 includes a network adapter (Network Interface Controller, abbreviated as NIC), which can be connected to other network devices through a base station and thus communicate with the Internet. In one instance, the transmission device 306 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.
[0056] In this embodiment, a control device for chip programming is provided. Figure 4 is a flowchart of the control method for chip programming according to the embodiments of the present application, as shown in Figure 4 . The process includes the following steps:
[0057] Step S402, detecting the interface state of the programming interface, where the programming interface is used to directly connect a chip programming jig to the server VR chip, and the chip programming jig is used to program the server VR chip with running data;
[0058] Step S404, when the interface status is used to indicate that the chip burning fixture has been connected to the burning interface, send a disconnection control signal to the on-off module deployed in the control device for chip burning. The control device for chip burning includes a processor and the on-off module. The on-off module is connected between the BMC deployed on the server and the server VR chip. The processor is connected to the on-off module, and the processor is also connected to the burning interface deployed on the server. The disconnection control signal is used to indicate the on-off module to disconnect the connection between the BMC and the server VR chip. The on-off module is used to respond to the disconnection control signal and disconnect the connection between the BMC and the server VR chip;
[0059] Step S406, when it is determined that the on-off module has disconnected the connection between the BMC and the server VR chip, control the chip burning fixture to burn the server VR chip.
[0060] Through the above steps, by setting a processor and an on-off module in the control device for chip burning, the on-off module is connected between the BMC deployed on the server and the server VR chip, the processor and the on-off module are connected, and the processor and the burning interface deployed on the server are connected. Thus, when it is detected that the burning fixture has been connected to the burning interface by detecting the interface status of the burning interface, the on-off module is instructed to disconnect the connection between the BMC and the server VR chip by sending a disconnection control signal. Furthermore, when the connection between the BMC and the server VR chip has been disconnected, the chip burning fixture is controlled to burn the server VR chip, avoiding the failure of data burning of the server VR chip caused by the BMC reading the data on the server VR chip, and realizing that the data burning process of the server VR chip is not interfered by the BMC. Therefore, problems such as low data burning efficiency of the chip can be solved, and the effect of improving the data burning efficiency of the chip can be achieved.
[0061] The above control method for chip burning is applied to the processor deployed on the control device for chip burning.
[0062] In the embodiment provided in the above step S402, detecting the interface status of the burning interface can be by detecting the level signal in the burning interface. That is, when the chip burning fixture is connected to the VR chip through the burning interface, the chip burning interface will generate a level change value, and then the interface status of the burning interface is detected through the level change. Or detecting the interface status of the burning interface can also be by detecting whether there is a burning signal for burning the VR chip in the burning interface. After detecting the burning signal, it is determined that the chip burning fixture is connected to the VR chip through the burning interface, and thus the interface status is determined.
[0063] Optionally, in this embodiment, the operation data is data used to indicate the operation state of the VR chip. The operation data may include, but is not limited to, the output voltage, loop compensation, protection parameters, etc. of the VR chip. This solution does not limit this.
[0064] Optionally, in this embodiment, when the interface state is used to indicate that the chip programming fixture is not connected to the programming interface, a path control signal is sent to the on-off module. The path control signal is used to instruct the on-off module to connect the connection between the BMC and the server VR chip. Thus, the BMC can read the data in the server VR chip.
[0065] In the embodiment provided in the above step S404, the open-circuit control signal may be a control signal directly controlling the on-off module to disconnect. Then, after receiving the open-circuit control signal, the on-off module disconnects the connection between the BMC and the VR chip. Or, the open-circuit control signal may also be a signal used to indicate the interface state, such as a signal used to indicate whether the chip programming fixture is connected to the VR chip through the programming interface. Then, after receiving the signal, the on-off module can determine whether the connection state between the BMC and the VR chip needs to be disconnected according to the interface state.
[0066] As an alternative embodiment, after controlling the chip programming fixture to program the server VR chip, the method further includes:
[0067] Detect the programming state of the server VR chip;
[0068] When the programming state is used to indicate that the chip programming fixture has finished programming the operation data to the server VR chip, a path control signal is sent to the on-off module, where the path control signal is used to instruct the on-off module to connect the connection between the BMC and the server VR chip.
[0069] Optionally, in this embodiment, the burning state of the VR chip of the server is used for the data burning progress of burning data into the VR chip of the server. Detecting the burning state of the server VR chip can be by detecting whether the running data of the server VR chip is transformed into the running data to be burned into the VR chip. When all the running data of the VR chip is transformed into the running data to be burned into the VR chip, it is determined that the burning state is that the chip burning jig ends burning the running data into the server VR chip. Or, detecting the burning state of the server VR chip can also be by detecting the interface state of the burning interface, that is, after the operation of burning data into the VR chip is completed, the chip burning jig will be pulled out of the burning interface, and then by detecting the interface state of the burning interface, it is determined whether the chip burning jig is pulled out of the burning interface, so as to determine that the burning state is that the chip burning jig ends burning the running data into the server VR chip.
[0070] Through the above steps, by detecting the burning state of the server VR chip, and then when the burning state is used to indicate that the chip jig ends burning the running data into the server VR chip, a path control signal is sent to the on-off module to realize connecting the BMC and the VR chip after burning the running data into the VR chip, so that the BMC can poll and read data from the VR chip, ensuring that the BMC can timely read the newly burned data in the VR chip.
[0071] As an alternative embodiment, detecting the interface state of the burning interface includes:
[0072] Detecting the level value in the burning interface;
[0073] Determining the interface state matching the level value.
[0074] Optionally, in this embodiment, when the chip burning jig is inserted into the burning interface, the burning interface will generate a change in the level. Then, by detecting the level value in the chip burning interface, the corresponding interface state is determined according to the level value of the burning interface.
[0075] Figure 5 It is an alternative chip burning flow chart according to an embodiment of the present application. As Figure 5 shown, it at least includes the following steps:
[0076] S501, the host computer system determines whether the chip burning jig is connected to the burning interface by detecting the interface state of the burning interface. If the chip burning jig is not connected to the burning interface, S502 is executed. If the chip burning jig is connected to the burning interface, step S504 is executed;
[0077] S502, the GPLD defaults to control the target switch to conduct, and at the same time controls the indicator light to turn on;
[0078] S503, control the BMC to poll the VR chip;
[0079] S504, after the host computer detects that the chip programming fixture is connected to the programming interface, send a VR programming fixture access signal to the single-chip microcomputer, and the single-chip microcomputer then sends a disconnection control signal to the CPLD;
[0080] S505, the GPLD sends an instruction to turn off the target switch on the I2C bus from the BMC to the VR chip, and at the same time the GPLD sends an instruction to turn off the indicator light;
[0081] S506, when the target switch on the I2C bus from the BMC to the VR chip is disconnected, control the chip programming fixture to perform relevant programming operations on the VR chip;
[0082] S507, determine whether the programming operation of the VR chip is completed. If the programming operation of the VR chip is completed, execute step S508. If the programming operation of the VR chip is not completed, continue to execute step S506;
[0083] S508, control the single-chip microcomputer to send a path signal to the GPLD;
[0084] S509, the GPLD sends an instruction to turn on the target switch on the I2C bus from the BMC to the VR chip, so as to conduct the connection between the BMC and the VR chip. At the same time, the CPLD sends an instruction to turn on the indicator light;
[0085] S510, control the BMC to normally poll the VR chip.
[0086] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, in essence, or the part that makes a contribution to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disc), and includes several instructions for causing a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present application.
[0087] In this embodiment, a control device for chip programming is further provided. This device is used to implement the above-mentioned embodiments and preferred implementation manners, and those that have been described will not be repeated. As used hereinafter, the term "module" may be a combination of software and / or hardware that can implement a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware is also possible and contemplated.
[0088] Figure 6 is a structural block diagram of a control device for chip programming according to an embodiment of the present application. As Figure 6 shown, the device includes: a first detection module 62, configured to detect the interface state of the programming interface, where the programming interface is used to directly connect a chip programming fixture to a server VR chip, and the chip programming fixture is used to program operation data into the server VR chip; a first sending module 64, configured to send an open-circuit control signal to an on-off module deployed in a control device for chip programming when the interface state indicates that the chip programming fixture has been connected to the programming interface, where the control device for chip programming includes a processor and the on-off module, the on-off module is connected between a BMC deployed on the server and the server VR chip, the processor is connected to the on-off module, the processor is also connected to the programming interface deployed on the server, the open-circuit control signal is used to instruct the on-off module to disconnect the connection between the BMC and the server VR chip, and the on-off module is configured to respond to the open-circuit control signal and disconnect the connection between the BMC and the server VR chip; a control module 66, configured to control the chip programming fixture to program the server VR chip when it is determined that the on-off module has disconnected the connection between the BMC and the server VR chip.
[0089] Through the above steps, by setting a processor and an on-off module in the control device for chip programming, the on-off module is connected between the BMC deployed on the server and the server VR chip, the processor and the on-off module are connected, and the processor and the programming interface deployed on the server are connected. Thus, when it is detected that the programming fixture has been connected to the programming interface by detecting the interface state of the programming interface, the on-off module is instructed to disconnect the connection between the BMC and the server VR chip by sending an open-circuit control signal. Furthermore, when the connection between the BMC and the server VR chip has been disconnected, the chip programming fixture is controlled to program the server VR chip, avoiding the failure of programming the data of the server VR chip caused by the BMC reading the data on the server VR chip, and realizing that the data programming process of the server VR chip is not interfered by the BMC. Therefore, problems such as low efficiency of programming data into the chip can be solved, and the effect of improving the efficiency of programming data into the chip can be achieved.
[0090] Optionally, the device further includes: a second detection module, configured to detect the programming state of the server VR chip after the chip programming jig is controlled to program the server VR chip; a second sending module, configured to send a path control signal to the on-off module when the programming state is used to indicate that the chip programming jig ends programming the operation data to the server VR chip, where the path control signal is used to indicate that the on-off module connects the connection between the BMC and the server VR chip.
[0091] Optionally, the first detection module includes: a detection unit, configured to detect the level value in the programming interface; a determination unit, configured to determine the interface state matching the level value.
[0092] It should be noted that the above-mentioned modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited thereto: the above-mentioned modules are all located in the same processor; or, the above-mentioned modules are respectively located in different processors in any combination form.
[0093] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, where the computer program is set to execute the steps in any one of the above method embodiments when running.
[0094] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disc, etc., various media that can store computer programs.
[0095] An embodiment of the present application further provides an electronic device, including a memory and a processor, where a computer program is stored in the memory, and the processor is set to run the computer program to execute the steps in any one of the above method embodiments.
[0096] In an exemplary embodiment, the above electronic device may further include a transmission device and an input / output device, where the transmission device is connected to the above processor, and the input / output device is connected to the above processor.
[0097] The specific examples in this embodiment may refer to the examples described in the above embodiments and exemplary embodiments, and will not be repeated here.
[0098] Obviously, those skilled in the art should understand that the above-mentioned modules or steps of the present application can be implemented by a general-purpose computing device. They can be concentrated on a single computing device or distributed on a network composed of multiple computing devices. They can be implemented by program codes executable by the computing device. Thus, they can be stored in a storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a sequence different from that here, or they can be separately fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module for implementation. In this way, the present application is not limited to any specific combination of hardware and software.
[0099] The above are only the preferred embodiments of the present application and are not used to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application shall be included in the protection scope of the present application.
Claims
1. A control device for chip programming, characterized in that, Comprising: A processor and a switching module, wherein, The switching module is connected between the BMC deployed on the server and the server VR chip, the processor is connected to the switching module, the processor is also connected to the programming interface deployed on the server, and the programming interface is used to directly connect the chip programming fixture to the server VR chip, and the chip programming fixture is used to program the running data into the server VR chip; The processor is configured to detect the interface state of the programming interface; when the interface state indicates that the chip programming fixture has been connected to the programming interface, send an open circuit control signal to the switching module, wherein the open circuit control signal is used to instruct the switching module to disconnect the connection between the BMC and the server VR chip; when it is determined that the switching module has disconnected the connection between the BMC and the server VR chip, control the chip programming fixture to program the server VR chip; The switching module is configured to respond to the open circuit control signal and disconnect the connection between the BMC and the server VR chip; The switching module includes: a control unit and a target switch, wherein the signal input end of the control unit is connected to the processor, the signal output end of the control unit is connected to the target switch, and the target switch is connected between the BMC and the server VR chip; the control unit is configured to receive the open circuit control signal; convert the open circuit control signal into a switch control instruction; send the switch control instruction to the target switch, wherein the switch control instruction is used to control the disconnection of the target switch.
2. The device according to claim 1, characterized in that, The target switch includes: a first field effect transistor and a second field effect transistor, wherein, The first end of the first field effect transistor is connected to the SAD port of the BMC, the second end of the first field effect transistor is connected to the SAD port of the server VR chip, the gate of the first field effect transistor is connected to the signal output end of the control unit, the first end of the second field effect transistor is connected to the SCL port of the BMC, the second end of the second field effect transistor is connected to the SCL port of the server VR chip, and the gate of the second field effect transistor is connected to the signal output end of the control unit.
3. The device according to claim 1, characterized in that, The control unit includes: a complex programmable logic device, wherein the complex programmable logic device is configured to convert the open circuit control signal into a level signal, the level signal is used to indicate the on / off state of the target switch, and the switch control instruction includes the level signal.
4. The device according to claim 1, characterized in that, The control device for chip programming further includes: an indicator light, wherein the indicator light is connected to the switching module, wherein, The switching module is further configured to control the indicator light to turn on when receiving the open circuit control signal.
5. A control method for chip programming, characterized in that, Comprising: Detecting the interface state of the programming interface, wherein the programming interface is used to directly connect the chip programming fixture to the server VR chip, and the chip programming fixture is used to program the running data into the server VR chip; When the interface state is used to indicate that the chip programming fixture has been connected to the programming interface, a disconnection control signal is sent to the on-off module deployed in the control device for chip programming. The control device for chip programming includes a processor and the on-off module. The on-off module is connected between the BMC deployed on the server and the server VR chip. The processor is connected to the on-off module, and the processor is also connected to the programming interface deployed on the server. The disconnection control signal is used to indicate that the on-off module disconnects the connection between the BMC and the server VR chip. The on-off module is used to respond to the disconnection control signal and disconnect the connection between the BMC and the server VR chip. The on-off module includes: a control unit and a target switch. The signal input end of the control unit is connected to the processor, the signal output end of the control unit is connected to the target switch, and the target switch is connected between the BMC and the server VR chip. The control unit is used to receive the disconnection control signal, convert the disconnection control signal into a switch control instruction, and send the switch control instruction to the target switch, where the switch control instruction is used to control the disconnection of the target switch. When it is determined that the on-off module has disconnected the connection between the BMC and the server VR chip, control the chip programming fixture to program the server VR chip.
6. The method according to claim 5, characterized in that, After the control of the chip programming fixture to program the server VR chip, the method further includes: Detect the programming state of the server VR chip; When the programming state is used to indicate that the chip programming fixture has ended the operation of programming the running data to the server VR chip, a connection control signal is sent to the on-off module, where the connection control signal is used to indicate that the on-off module connects the connection between the BMC and the server VR chip.
7. The method according to claim 5, characterized in that, The detection of the interface state of the programming interface includes: Detect the level value in the programming interface; Determine the interface state that matches the level value.
8. A control device for chip programming, characterized in that, It includes: A first detection module for detecting the interface state of the programming interface, where the programming interface is used to directly connect the chip programming fixture to the server VR chip, and the chip programming fixture is used to program the running data to the server VR chip. A first sending module, configured to send a disconnection control signal to a switching module deployed in a control device for chip programming when the interface state is used to indicate that the chip programming fixture has been connected to the programming interface, where the control device for chip programming includes a processor and the switching module, the switching module is connected between a BMC deployed on a server and a server VR chip, the processor is connected to the switching module, the processor is further connected to the programming interface deployed on the server, the disconnection control signal is used to instruct the switching module to disconnect the connection between the BMC and the server VR chip, the switching module is configured to respond to the disconnection control signal and disconnect the connection between the BMC and the server VR chip, and the switching module includes: a control unit and a target switch, a signal input end of the control unit is connected to the processor, a signal output end of the control unit is connected to the target switch, and the target switch is connected between the BMC and the server VR chip; the control unit is configured to receive the disconnection control signal; convert the disconnection control signal into a switch control instruction; and send the switch control instruction to the target switch, where the switch control instruction is used to control the disconnection of the target switch. A control module, configured to control the chip programming fixture to program the server VR chip when it is determined that the switching module has disconnected the connection between the BMC and the server VR chip.
9. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium, where when the computer program is executed by a processor, the steps of the method according to any one of claims 5 to 7 are implemented.
10. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, the steps of the method according to any one of claims 5 to 7 are implemented.
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