Layout constraint method and apparatus, electronic device, and storage medium

Abstract

The application provides a layout constraint method and device, electronic equipment and storage medium. The method comprises the following steps: obtaining area selection information and arrangement rules; determining a collection area according to the area selection information; obtaining instance information of a design instance in the collection area and obtaining grid information of a grid unit object in the collection area; determining an arrangement combination of the grid unit object in the collection area according to the instance information, the grid information and the arrangement rules; and determining a constraint result according to the arrangement combination and the instance information. By determining the arrangement combination of the grid unit object in the collection area and determining the constraint result according to the arrangement combination and the instance information, a plurality of different layout constraint schemes can be obtained for the user to select, and the chip design efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of chip technology, and more specifically, to layout constraint methods, apparatus, electronic devices, and storage media. Background Technology

[0002] In related technologies, the layout schemes for chip design are relatively simple, resulting in a limited number of constraint results and low efficiency for users to design chips using software. Summary of the Invention

[0003] In view of the above problems, this application proposes a layout constraint method, apparatus, electronic device and storage medium to improve the above problems.

[0004] In a first aspect, embodiments of this application provide a layout constraint method, the method comprising: obtaining region selection information and arrangement rules; determining a collection region based on the region selection information; obtaining instance information of design instances within the collection region, and obtaining grid information of grid cell objects within the collection region; determining the arrangement combination of grid cell objects within the collection region based on the instance information, grid information, and arrangement rules; and determining the constraint result based on the arrangement combination and instance information.

[0005] Secondly, embodiments of this application also provide a layout constraint device, the device comprising: a first acquisition unit, configured to acquire region selection information and arrangement rules; a first determination unit, configured to determine a collection region based on the region selection information; a second acquisition unit, configured to acquire instance information of design instances within the collection region and acquire grid information of grid cell objects within the collection region; a second determination unit, configured to determine the arrangement combination of grid cell objects within the collection region based on the instance information, grid information, and arrangement rules; and a third determination unit, configured to determine the constraint result based on the arrangement combination and instance information.

[0006] Thirdly, embodiments of this application also provide an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the layout constraint method as described in the first aspect.

[0007] Fourthly, embodiments of this application also provide a computer-readable storage medium storing computer-executable instructions for enabling an electronic device to perform the layout constraint method as described in the first aspect.

[0008] This application provides a layout constraint method, apparatus, electronic device, and storage medium. The method includes: acquiring region selection information and arrangement rules; determining a collection region based on the region selection information; acquiring instance information of design instances within the collection region and acquiring grid information of grid cell objects within the collection region; determining the arrangement combination of grid cell objects within the collection region based on the instance information, grid information, and arrangement rules; and determining the constraint result based on the arrangement combination and instance information. By determining the arrangement combination of grid cell objects within the collection region and determining the constraint result based on the arrangement combination and instance information, this application can obtain a variety of different layout constraint schemes for users to choose from, thereby improving chip design efficiency. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments and drawings obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0010] Figure 1 This is a flowchart illustrating a layout constraint method provided in an embodiment of this application.

[0011] Figure 2 yes Figure 1 A detailed flowchart of step 130 in the diagram.

[0012] Figure 3 This is a schematic diagram of the structure of a layout constraint device provided in an embodiment of this application.

[0013] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0014] Figure 5 This is a structural block diagram of a computer-readable storage medium provided in an embodiment of this application. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] In related technologies, when designing chips, such as Field Programmable Gate Array (FPGA) chips, users can input design examples to obtain layout schemes. However, the layout schemes obtained by chip design software are relatively simple, resulting in a small number of constraint results. This leads to low efficiency for users to design chips using software.

[0017] To address the aforementioned issues, the inventors have proposed a layout constraint method, apparatus, electronic device, and storage medium as described in this application. The method includes: acquiring region selection information and arrangement rules; determining a collection region based on the region selection information; acquiring instance information of design instances within the collection region and acquiring grid information of grid cell objects within the collection region; determining the arrangement combination of grid cell objects within the collection region based on the instance information, grid information, and arrangement rules; and determining the constraint result based on the arrangement combination and instance information. This application, by determining the arrangement combination of grid cell objects within the collection region and determining the constraint result based on the arrangement combination and instance information, can obtain a variety of different layout constraint schemes for users to choose from, thereby improving chip design efficiency.

[0018] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0019] Please refer to the following: Figure 1 , Figure 1 This is a flowchart illustrating a layout constraint method provided in an embodiment of this application. Figure 1 As shown, the layout constraint method 100 includes steps 110 to 150.

[0020] Step 110: Obtain region selection information and arrangement rules.

[0021] In some implementations, the region selection information is input by the user. For example, chip design software includes a region selection interface, where the user can select the region to be designed, such as the entire region, a portion of the region, or a single region of the chip.

[0022] Optionally, the region selection information can also be the region selection information preset in the chip design software. It is understood that this application does not restrict the method of obtaining the region selection information.

[0023] In some implementations, the arrangement rules are input by the user. For example, chip design software includes an arrangement rule setting interface, where users can freely set arrangement rules, such as step size, starting point, and total number.

[0024] In some implementations, the arrangement rules include at least one of step size, start size, and total number; step size controls how many arrangement units to span to determine the arrangement of grid cell objects; start size controls from which arrangement unit to output the arrangement of grid cell objects; and total number controls the number of arrangement units in the arrangement.

[0025] Optionally, the arrangement rule can also be a preset arrangement rule in the chip design software. It is understood that this application does not restrict the way the arrangement rule is obtained.

[0026] In some implementations, the region selection interface and the arrangement rule setting interface are located in the same interface.

[0027] In some implementations, prior to step 110, the layout constraint method 100 further includes:

[0028] (1) When there are positional constraints in the Floorplan View of the Physical Constraint Editor (PCE), set the export region option to active.

[0029] (2) Obtain trigger information. The trigger information is used to trigger the generation of a settings interface containing a region selection interface and an arrangement rule setting interface when the export region option is active. The settings interface is used to allow the user to configure the region selection information and arrangement rules.

[0030] Optionally, the position constraint is a constraint input by the user.

[0031] Step 120: Determine the collection area based on the area selection information.

[0032] Step 130: Obtain instance information of design instances within the collection area, and obtain grid information of grid cell objects within the collection area.

[0033] In some implementations, please refer to [further details]. Figure 2 , Figure 2 This is a detailed flowchart of step 130. For example... Figure 2 As shown, step 130 includes steps 131 to 133.

[0034] In some implementations, step 130, which involves obtaining instance information of design instances within the collection area, includes:

[0035] Step 131: Obtain the first design instance information of the arithmetic processing unit in the collection area; wherein, the first design instance information includes the number of first design instances and the usage of first design instances.

[0036] Step 132: Obtain the second design instance information of the direct rendering unit in the collection area; wherein, the second design instance information includes the usage of the second design instance.

[0037] In some implementations, the design instance information is called design instance information, which includes specific instance objects in the user's design file.

[0038] In some implementations, the design instance information is further divided into design instance information corresponding to the Arithmetic Process Module (APM), i.e., the first design instance information, and design instance information corresponding to the Direct Rendering Module (DRM), i.e., the second design instance information.

[0039] In the rest of the manual, the design instance information corresponding to the Arithmetic Process Module (APM) is abbreviated as APM design inst, and the design instance information corresponding to the Direct Rendering Module (DRM) is abbreviated as DRM design inst.

[0040] In some implementations, the first design instance information includes the number of first design instances and the usage of first design instances. The number of first design instances is abbreviated as the number of APM design instances, and the usage of first design instances is abbreviated as the usage of APM design instances.

[0041] Among them, the number of APM design instances is the total number of APM resource type design instances in the design; the number of APM design instances used is the number of APM design instances on the interface of the physical constraint editor where the user manually added position constraint information, i.e., the specific number used.

[0042] In some implementations, the second design instance information includes the usage of second design instances, abbreviated as DRM design instance usage. Optionally, the second design instance information also includes the number of second design instances, abbreviated as the number of DRM design instances.

[0043] Among them, the number of DRM design instances is the total number of DRM resource type design instances in the design; the number of DRM design instances used is the number of DRM design instances on the physical constraint editor interface where the user manually added position constraint information, i.e., the specific number used.

[0044] In some implementations, step 130, which involves obtaining raster information of raster cell objects within the collection area, includes:

[0045] Step 133: Obtain the first unit information of the arithmetic processing unit in the collection area, and obtain the second unit information of the direct rendering unit in the collection area.

[0046] In some implementations, a grid device instance is a resource type with an internal structure on the chip. The grid device instance includes a gridedevice instance corresponding to the APM and a gridedevice instance corresponding to the DRM. The first unit information includes the number of gride device instances corresponding to the APM, and the second unit information includes the number of gride device instances corresponding to the DRM. The number of gride device instances corresponding to the APM is abbreviated as the number of APM devices, and the number of gride device instances corresponding to the DRM is abbreviated as the number of DRM devices.

[0047] The user can select a collection area using the above method; the chip design software collects all gride device instance information corresponding to APM and DRM in the collection area according to the user's selection, and obtains the number of APM design instances and DRM design instances in the collection area, as well as the usage of all APM design instances and DRM design instances in the collection area.

[0048] Step 140: Determine the arrangement and combination of grid cell objects within the collection area based on instance information, grid information, and arrangement rules.

[0049] In some implementations, if the APM design inst can perfectly utilize the resources within the APM device, then step 140 includes:

[0050] (1) When the number of first design instances is equal to the number of first design instances used, the first permutation and combination corresponding to the arithmetic processing unit is determined based on the number of first design instances used and the first unit information.

[0051] (2) Furthermore, the second permutation and combination corresponding to the direct rendering unit is determined based on the usage of the second design instance and the information of the second unit.

[0052] (3) Determine the initial permutation combination of the grid cell objects based on the first permutation combination and the second permutation combination.

[0053] (4) Determine the arrangement of grid cell objects based on the initial arrangement and arrangement rules.

[0054] In some implementations, if the number of first design instances equals the usage of first design instances, it means that the APMdesign instance can perfectly occupy the resources within the APM device. In this case, the first permutation and combination corresponding to the arithmetic processing unit is determined based on the usage of the first design instances and the first unit information.

[0055] Optionally, let x be the usage of the first design instance, y be the number of the first design instances, and z be the number of APM devices in the first unit information. Then, if x = y, the number of permutation units in the first permutation combination is:

[0056] For example, if x = y = 2, z = 4, and the four APM devices are defined as APM1, APM2, APM3, and APM4, then the number of permutation units in the first permutation combination is: The permutation units are (APM1, APM2), (APM1, APM3), (APM1, APM4), (APM2, APM3), (APM2, APM4), and (APM3, APM4).

[0057] Optionally, the above 6 APM arrangement units can be arranged in any order or according to preset rules. This application does not restrict the rules for the arrangement of APM arrangement units.

[0058] For example, one possible arrangement of the above-mentioned APM devices is shown in the table below:

[0059]

[0060]

[0061] In some implementations, the usage of the second design instance is defined as 'a', and the number of DRM devices in the second unit information is defined as 'b'. In this case, the step determines the number of permutation units in the second permutation combination corresponding to the direct rendering unit based on the usage of the second design instance and the second unit information.

[0062] For example, if a = 1, b = 4, and the four DRM devices are defined as DRM1, DRM2, DRM3, and DRM4, then the number of permutation units in the first permutation combination is: The arrangement units are (DRM1), (DRM2), (DRM3), and (DRM4).

[0063] Optionally, the above four DRM arrangement units can be arranged in any order or according to preset rules. This application does not restrict the rules for the arrangement of DRM arrangement units.

[0064] For example, the permutations and combinations of the above DRM devices can be shown in the table below:

[0065] DRM device arrangement DRM1 DRM2 DRM3 DRM4

[0066] For example, the initial permutations and combinations determined based on the above DRM device permutations and combinations and APM permutations and combinations can be shown in the following table:

[0067] APM device arrangement and combination DRM device arrangement APM1, APM2 DRM1 APM1, APM3 DRM2 APM1, APM4 DRM3 APM2, APM3 DRM4 APM2, APM4 APM3, APM4

[0068] For example, when the arrangement rule is a step size of 0, a starting value of 0, and a total number of 5, the arrangement combination of grid cell objects determined according to the above initial arrangement combination and arrangement rule is shown in the following table:

[0069] Arrangement and combination of grid cell objects (APM1, APM2, DRM1) (APM1, APM2, DRM2) (APM1, APM2, DRM3) (APM1, APM2, DRM4) (APM1, APM3, DRM1)

[0070] For example, when the arrangement rule is a step size of 1, a starting value of 0, and a total number of 5, the arrangement combination of grid cell objects determined according to the above initial arrangement combination and arrangement rule is shown in the following table:

[0071] Arrangement and combination of grid cell objects (APM1, APM2, DRM1) (APM1, APM2, DRM3) (APM1, APM3, DRM1) (APM1, APM3, DRM3) (APM1, APM4, DRM1)

[0072] For example, when the arrangement rule is a step size of 0, a starting value of 1, and a total number of 5, the arrangement combination of grid cell objects determined according to the above initial arrangement combination and arrangement rule is shown in the following table:

[0073] Arrangement and combination of grid cell objects (APM1, APM2, DRM2) (APM1, APM2, DRM3) (APM1, APM2, DRM4) (APM1, APM3, DRM1) (APM1, APM3, DRM2)

[0074] In some implementations, if the APM design inst cannot perfectly utilize the resources within the APM device, then step 140 includes:

[0075] (1) When the number of first design instances is greater than the number of first design instances used, obtain the third unit information of the original unit object in the arithmetic processing unit.

[0076] (2) Determine the first permutation and combination corresponding to the arithmetic processing unit based on the usage of the first design instance, the information of the first unit, and the information of the third unit. Furthermore,

[0077] (3) Determine the second permutation and combination corresponding to the direct rendering unit based on the usage of the second design instance and the information of the second unit.

[0078] (4) Determine the initial permutation of the grid cell objects based on the first permutation, the second permutation, and the permutation rules.

[0079] (5) Determine the arrangement of grid cell objects based on the initial arrangement and arrangement rules.

[0080] In some implementations, if the number of first design instances is greater than the usage of the first design instances, it indicates that the APMdesign instance cannot perfectly occupy the resources within the APM device. In this case, it is necessary to obtain the third unit information of the primitive device instance within the arithmetic processing unit, that is, to collect the internal usage of the APM device and determine the first permutation and combination corresponding to the arithmetic processing unit based on the usage of the first design instances, the first unit information, and the third unit information.

[0081] Furthermore, since each arithmetic processing unit includes two original unit objects, the number of permutation units in the first permutation combination when the number of first design instances is greater than the number of first design instances used is twice the number of permutation units in the first permutation combination when the number of first design instances is equal to the number of first design instances used.

[0082] For example, if we define the usage of the first design instance as x, the number of first design instances as y, and the number of APM devices in the first unit information as z, then if x < y, the number of permutation units in the first permutation combination is:

[0083] In some implementations, since the direct rendering unit only includes one original unit object, it is not necessary to obtain the original unit information within the direct rendering unit, regardless of whether the number of DRM devices is greater than or equal to the number of DRM devices used.

[0084] Therefore, if the usage of the second design instance is defined as 'a', and the number of DRM devices in the second unit information is 'b', then the step of determining the number of permutation units in the second permutation combination corresponding to the direct rendering unit based on the usage of the second design instance and the second unit information remains the same.

[0085] The remaining steps can be found in the description above in the instruction manual, and will not be repeated here.

[0086] Step 150: Determine the constraint results based on permutation and combination and instance information.

[0087] In some implementations, the user-input design instance is constrained to a grid cell object based on instance information. Optionally, a linked list of grid device instances is obtained based on the permutation and combination of grid cell objects, and the design instance is constrained to the device linked list to obtain the constraint result.

[0088] In some implementations, the number of determinable constraint results is equal to the number of permutations in the grid cell objects. For example, if the permutations of grid cell objects are:

[0089] Arrangement and combination of grid cell objects (APM1, APM2, DRM2) (APM1, APM2, DRM3) (APM1, APM2, DRM4) (APM1, APM3, DRM1) (APM1, APM3, DRM2)

[0090] The arrangement units are (APM1, APM2, DRM2), (APM1, APM2, DRM3), (APM1, APM2, DRM4), (APM1, APM3, DRM1), and (APM1, APM3, DRM2). By constraining the APM design inst and DRM design inst to the APM device and DRM device respectively, a total of 5 constraint results can be obtained.

[0091] In some implementations, the collection area includes at least one sub-region, and step 150 includes:

[0092] (1) Determine the sub-constraint results within each sub-region based on the permutation and combination and instance information within each sub-region.

[0093] (2) Determine the constraint results based on all sub-constraint results.

[0094] In some implementations, the number of constraint results is the product of the sub-constraint results in each sub-region.

[0095] For example, if subregion A has 10 seed constraint results and subregion B has 5 seed constraint results, then the sub-constraint results in subregion A and the constraint results in subregion B can be combined to obtain a total of 50 constraint results.

[0096] This application provides a layout constraint method, apparatus, electronic device, and storage medium. The method includes: acquiring region selection information and arrangement rules; determining a collection region based on the region selection information; acquiring instance information of design instances within the collection region and acquiring grid information of grid cell objects within the collection region; determining the arrangement combination of grid cell objects within the collection region based on the instance information, grid information, and arrangement rules; and determining the constraint result based on the arrangement combination and instance information. By determining the arrangement combination of grid cell objects within the collection region and determining the constraint result based on the arrangement combination and instance information, this application can obtain a variety of different layout constraint schemes for users to choose from, thereby improving chip design efficiency.

[0097] Please refer to the following: Figure 3 , Figure 3 This is a schematic diagram of a layout constraint device provided in an embodiment of this application. Figure 3 As shown, the layout constraint device 200 includes: a first acquisition unit 210, a first determination unit 220, a second acquisition unit 230, a second determination unit 240, and a third determination unit 250.

[0098] The first acquisition unit 210 is used to acquire region selection information and arrangement rules.

[0099] The first determining unit 220 is used to determine the collection area based on the area selection information.

[0100] The second acquisition unit 230 is used to acquire instance information of design instances within the collection area and acquire grid information of grid cell objects within the collection area.

[0101] The second determining unit 240 is used to determine the arrangement and combination of grid cell objects within the collection area based on instance information, grid information, and arrangement rules.

[0102] The third determining unit 250 is used to determine the constraint results based on permutation and combination and instance information.

[0103] It should be noted that, for the device-type embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and relevant details can be found in the descriptions of the method embodiments. Any processing method described in the method embodiments can be implemented in the device embodiments through corresponding processing modules, and will not be elaborated upon further in the device embodiments.

[0104] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0105] Please refer to Figure 4 , Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. For example... Figure 4 As shown, the electronic device 300 includes: one or more processors 310 and a memory 320. Figure 4 Take the 310 processor as an example.

[0106] The processor 310 and the memory 320 can be connected via a bus or other means. Figure 4 Taking the example of a connection between China and Israel via a bus.

[0107] The processor 310 is used to acquire region selection information and arrangement rules; determine the collection region based on the region selection information; acquire instance information of design instances within the collection region and acquire grid information of grid cell objects within the collection region; determine the arrangement combination of grid cell objects within the collection region based on instance information, grid information, and arrangement rules; and determine the constraint results based on the arrangement combination and instance information.

[0108] The memory 320, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules of the layout constraint method in the embodiments of this application. The processor 310 executes various functional applications and data processing of the electronic device by running the non-volatile software programs, instructions, and modules stored in the memory 320, thereby implementing the layout constraint method of the above-described method embodiments.

[0109] The memory 320 may include a program storage area and a data storage area. The program storage area may store the operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device. Furthermore, the memory 320 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 320 may optionally include memory remotely located relative to the processor 310, and these remote memories may be connected to the controller via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0110] One or more modules are stored in memory 320. When executed by one or more processors 310, they perform the layout constraint methods in any of the above method embodiments, for example, the methods described above. Figure 1 Steps 110 to 150 of the method.

[0111] Please refer to Figure 5 , Figure 5This is a structural block diagram of a computer-readable storage medium provided in an embodiment of this application. The computer-readable storage medium 400 stores program code 410, which can be called by a processor to execute the layout constraint method described in the above method embodiments.

[0112] The computer-readable storage medium 400 may be an electronic memory such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM, hard disk, or ROM. Optionally, the computer-readable storage medium includes a non-transitory computer-readable storage medium. The computer-readable storage medium 400 has storage space for program code that performs any of the method steps of the above-described layout constraint method. This program code can be read from or written to one or more computer program products. The program code may, for example, be compressed in a suitable form.

[0113] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; under the concept of the present invention, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the present invention as described above. For the sake of brevity, they are not provided in detail; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention. Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a general hardware platform, and of course, it can also be implemented by hardware. Those skilled in the art can understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

Claims

1. A layout constraint method, characterized in that, The method includes: Obtain region selection information and arrangement rules; The collection area is determined based on the area selection information. Obtain instance information of design instances within the collection area, and obtain grid information of grid cell objects within the collection area; The arrangement and combination of grid cell objects within the collection area are determined based on the instance information, the grid information, and the arrangement rules; The constraint result is determined based on the permutation and combination and the instance information; The step of obtaining instance information of design instances within the collection area includes: Obtain first design instance information of arithmetic processing units within the collection area; wherein, the first design instance information includes the number of first design instances and the usage of first design instances; Obtain second design instance information of direct rendering units within the collection area; wherein, the second design instance information includes the usage of second design instances; The step of obtaining the raster information of the raster cell objects within the collection area includes: Obtain the first unit information of the arithmetic processing unit in the collection area, and obtain the second unit information of the direct rendering unit in the collection area.

2. The method according to claim 1, characterized in that, The step of determining the permutation and combination of the grid unit objects based on the instance information, the grid information, and the arrangement rules includes: when the number of the first design instances equals the usage of the first design instances, determining the first permutation and combination corresponding to the arithmetic processing unit based on the usage of the first design instances and the first unit information; and... The second permutation and combination corresponding to the direct rendering unit is determined based on the usage of the second design instance and the information of the second unit. The initial permutation of the grid cell object is determined based on the first permutation and the second permutation; the permutation of the grid cell object is then determined based on the initial permutation and the permutation rule.

3. The method according to claim 1, characterized in that, Determining the arrangement and combination of the grid cell objects based on the instance information, the grid information, and the arrangement rules includes: When the number of the first design instances is greater than the number of first design instances used, obtain the third unit information of the original unit object in the arithmetic processing unit; The first permutation and combination corresponding to the arithmetic processing unit is determined based on the usage of the first design instance, the information of the first unit, and the information of the third unit; and... The second permutation and combination corresponding to the direct rendering unit is determined based on the usage of the second design instance and the information of the second unit. The initial permutation of the grid cell object is determined based on the first permutation, the second permutation, and the permutation rule. The permutation of the grid cell objects is determined based on the initial permutation and the permutation rules.

4. The method according to claim 1, characterized in that, The collection area includes at least one sub-region, and the determination of the constraint result based on the permutation and combination and the instance information includes: The sub-constraint results within each sub-region are determined based on the permutations and combinations within each sub-region and the instance information. The constraint result is determined based on all sub-constraint results.

5. The method according to any one of claims 1-4, characterized in that, The arrangement rules include step size, starting point, and total number.

6. A layout constraint device, characterized in that, The device includes: The first acquisition unit is used to acquire region selection information and arrangement rules; The first determining unit is used to determine the collection area based on the area selection information; The second acquisition unit is configured to acquire instance information of design instances within the collection area and acquire raster information of raster unit objects within the collection area; wherein, acquiring instance information of design instances within the collection area includes: acquiring first design instance information of arithmetic processing units within the collection area; wherein the first design instance information includes the number of first design instances and the usage of first design instances; acquiring second design instance information of direct rendering units within the collection area; wherein the second design instance information includes the usage of second design instances; acquiring raster information of raster unit objects within the collection area includes: acquiring first unit information of arithmetic processing units within the collection area and acquiring second unit information of direct rendering units within the collection area; The second determining unit is used to determine the arrangement and combination of grid unit objects in the collection area based on the instance information, the grid information and the arrangement rules; The third determining unit is used to determine the constraint result based on the permutation and combination and the instance information.

7. An electronic device, characterized in that, include: At least one processor; as well as, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the layout constraint method according to any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions that enable an electronic device to perform the layout constraint method according to any one of claims 1-5.

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