An antenna signal synchronization method and an integrated antenna transceiver device

Abstract

The present invention discloses an antenna signal synchronization method and an integrated antenna transceiver device, including: an FPGA transmitting device, including a transmitting baseband processing module, a digital-to-analog conversion module, and an antenna transmitting module; an FPGA receiving device, including an antenna receiving module, an analog-to-digital conversion module, and a receiving baseband processing module; and a control device, connected to the transmitting baseband processing module and the receiving baseband processing module, for adjusting the parameters of the transmitting baseband processing module and the receiving baseband processing module. In the circuit of the present invention, the signal transmission speed is relatively fast, the transmission quality is relatively high, and the configuration and expansion are relatively flexible.

Description

Technical Field

[0001] The present invention relates to the technical field of analog integrated circuits, and particularly to an antenna signal synchronization method and an integrated antenna transceiver device. Background Art

[0002] With the development of the scientific and technological society and the advent of the mobile communication era, people have put forward more and more diversified multimedia service requirements, and the requirements for the rate and quality of wireless communication are getting higher and higher. Existing broadband wireless access technologies generally include four categories: wireless personal area network, wireless local area network, wireless metropolitan area network, and wireless wide area network, which together constitute the network architecture of broadband wireless access. Through broadband wireless access, operators can provide users with more flexible access services to meet the multi-demand services of users. Among the four broadband wireless access technologies, the wireless metropolitan area network has become a hot technology studied at home and abroad due to its advantages such as wide coverage and high transmission rate.

[0003] In a wireless transmission environment, when a signal propagates in free space, it will experience many processes such as reflection, scattering, and refraction. Therefore, the signal received by the receiver is the sum of signals of multiple paths with different attenuation amplitudes and phase delays after being transmitted through different paths. The multipath effect will cause inter-symbol interference, making the received signal either very weak or submerged by various noises. Therefore, in order to detect useful signals under low signal-to-noise ratio conditions, providing a signal synchronization method that can accurately eliminate frequency offset has become an urgent problem to be solved. Summary of the Invention

[0004] Therefore, in order to solve the above problems in the prior art, the present application provides an antenna signal synchronization method for performing two frequency offset estimation processes on the received antenna signal through accurate calculation, and an integrated antenna transceiver device corresponding to this method.

[0005] To this end, according to the first aspect, the present invention provides an antenna signal synchronization method, including the following steps:

[0006] Extract partial samples in a superframe of the received antenna signal to obtain a first sample sequence, and perform sliding correlation between the first sample sequence and a first local m-sequence to obtain a first correlation value;

[0007] Extract the first maximum value in the first correlation value, and perform normalization processing on the sample corresponding to the first maximum value to obtain a first normalized value;

[0008] When the first normalized value is greater than a preset threshold, calculate a second correlation value and a third correlation value of the sliding correlation between the first sample sequence and a second local m-sequence and a preset reference sequence respectively, and obtain a frequency offset estimation value according to the second correlation value and the third correlation value;

[0009] Eliminate the initially estimated frequency offset of the superframe according to the frequency offset estimation value;

[0010] Extract partial samples in the superframe after eliminating the initially estimated frequency offset to obtain a plurality of second sample sequences, and calculate the fourth correlation values of the plurality of second sample sequences and the second local m-sequence respectively; the second local m-sequence and the first local m-sequence are two consecutive m-sequences;

[0011] Extract the second maximum value among the plurality of fourth correlation values, and perform normalization processing on the samples corresponding to the second maximum value to obtain a second normalization value;

[0012] When the second normalization value is greater than the preset threshold, obtain the residual frequency offset value according to the plurality of fourth correlation values;

[0013] Eliminate the residual frequency offset of the superframe according to the residual frequency offset value.

[0014] In a possible implementation manner, the first sample sequence is a sample sequence formed by taking one sample every M samples starting from the Nth sample of the superframe header; both N and M are natural numbers greater than or equal to 2.

[0015] In a possible implementation manner, when the first normalization value is greater than the preset threshold, the steps of calculating the second correlation value and the third correlation value of the sliding correlation between the first sample sequence and the second local m-sequence and the preset reference sequence respectively, and obtaining the frequency offset estimation value according to the second correlation value and the third correlation value specifically include the following steps:

[0016] When the first normalization value is greater than the preset threshold, use the sample corresponding to the first normalization value as the initial starting point;

[0017] Take the initial starting point and one sample before and after it as the fine-tuning starting point, and take one sample every I samples from the samples in the next normalization window after the fine-tuning starting point to form a third sample sequence; I is a natural number greater than or equal to 2;

[0018] Perform correlation between the third sample sequence and the first local m-sequence to obtain a fifth correlation value;

[0019] Adjust the fine-tuning starting point according to the fifth correlation value to obtain the frequency offset elimination starting point;

[0020] Calculate the second correlation value and the third correlation value of the sliding correlation between the first sample sequence and the second local m-sequence and the preset reference sequence respectively, and obtain the frequency offset estimation value according to the second correlation value and the third correlation value;

[0021] The steps of eliminating the initially estimated frequency offset of the superframe according to the frequency offset estimation value specifically include the following steps:

[0022] Starting from the frequency offset elimination starting point, eliminate the initially estimated frequency offset of the superframe according to the frequency offset estimation value.

[0023] According to a second aspect, the present invention further provides an integrated antenna transceiver device, comprising:

[0024] An FPGA transmitting device, including a transmitting baseband processing module, a digital-to-analog conversion module, and an antenna transmitting module; the transmitting baseband processing module is used to modulate the data collected by the data source to form two complex baseband signals, and respectively transmit them to the corresponding two digital-to-analog conversion modules; the digital-to-analog conversion module is used to convert the complex baseband signals into analog signals, and respectively transmit them to the corresponding two antenna transmitting modules; the antenna transmitting module is used to modulate and transmit the analog signals;

[0025] An FPGA receiving device, including an antenna receiving module, an analog-to-digital conversion module, and a receiving baseband processing module; two antenna receiving modules are used to respectively receive two complex antenna signals, modulate them, and then respectively transmit them to two analog-to-digital conversion modules; the two analog-to-digital conversion modules are used to convert the complex antenna signals into complex data signals, and both transmit them to the receiving baseband processing module; the receiving baseband processing module is used to perform mixing and demodulation on the complex data signals and then output; the synchronization algorithm executed by the receiving baseband processing module is the antenna signal synchronization method in any one of the above first aspect embodiments;

[0026] A control device, connected to the transmitting baseband processing module and the receiving baseband processing module, for adjusting the parameters of the transmitting baseband processing module and the receiving baseband processing module.

[0027] In a possible implementation manner, the transmitting baseband processing module includes a channel coding module, a QPSK modulation module, an I-channel modulation module, and a Q-channel modulation module; the channel coding module is connected to the data source, and is used to perform RS coding on the data collected by the data source, and transmit the coded data to the QPSK modulation module; the QPSK modulation module is used to modulate the coded data to obtain 16QPSK symbols, and transmit the odd numbers to the I-channel modulation module and the even numbers to the Q-channel modulation module.

[0028] In a possible implementation manner, the I-channel modulation module includes a first interleaving module, a first framing module, a first upsampling module, and a first shaping filter module connected in sequence; the Q-channel modulation module includes a second interleaving module, a second framing module, a second upsampling module, and a second shaping filter module connected in sequence.

[0029] In a possible implementation manner, the receiving baseband processing module includes a mixing module, a matched filter module, a synchronization module, a channel estimation module, a frequency domain equalization module, and a decoding and demodulation module connected in sequence; the synchronization module is used to execute the antenna signal synchronization method in any one of the above first aspect embodiments.

[0030] In a possible implementation manner, the integrated antenna transceiver device further includes:

[0031] A storage device, connected to the FPGA receiving device, for storing the data output by the received baseband processing module.

[0032] In a possible implementation, the antenna transmitting module includes a first radio frequency circuit, a first band-pass filter, a first signal amplifier, and a transmitting antenna connected in sequence; the first radio frequency circuit is connected to the digital-to-analog conversion module.

[0033] In a possible implementation, the antenna receiving module includes a receiving antenna, a second band-pass filter, a second signal amplifier, and a second radio frequency circuit connected in sequence; the second radio frequency circuit is connected to the analog-to-digital conversion module.

[0034] In a possible implementation, the data collected by the information source is video data, and the data received by the transmitting baseband processing module is compressed and encoded video data.

[0035] The technical solution provided by the present invention has the following advantages:

[0036] 1. For the antenna signal synchronization method provided by the present invention, by first performing sliding correlation and normalization processing on the first sample point sequence and the first local m-sequence, and then judging whether the superframe in the antenna signal needs to perform frequency offset cancellation, the first sample point sequence corresponding to the superframe that needs frequency offset cancellation is respectively correlated with the second local m-sequence and the preset reference sequence to perform the first frequency offset cancellation; then, multiple second sample point sequences are extracted from the superframe after the first frequency offset cancellation, and then the multiple second sample point sequences are correlated and normalized to judge whether the first frequency offset cancellation is successful, and on the premise of success, the second frequency offset cancellation is performed based on the correlation values of the multiple second sample point sequences; finally, two times of accurate frequency offset cancellation based on accurate calculation of the antenna signal are realized, effective signal synchronization can be achieved, and thus the bit error rate of the wireless transmission system can be reduced, useful signals can be detected under low signal-to-noise ratio conditions, and the transmission efficiency of the system can be improved.

[0037] 2. For the integrated antenna transceiver device provided by the present invention, while comprehensively transmitting and receiving data by setting two-way transmitting antenna arrays and two-way receiving antenna arrays, by setting the transmitting device including the transmitting antenna array (specifically including the transmitting baseband processing module, the digital-to-analog conversion module, and the antenna transmitting module) and the receiving device including the receiving antenna array (specifically including the antenna receiving module, the analog-to-digital conversion module, and the receiving baseband processing module) as FPGA devices, the overall transmission speed of the device and the flexibility of configuration and expansion are improved. In addition, by setting a control device connected to the transmitting baseband processing module and the receiving baseband processing module, the channel parameters can be adjusted based on the signal situation, the channel response can be optimized, and thus the signal transmission quality of the device can be improved. Description of the Drawings

[0038] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings required for the description of the specific embodiments or the prior art. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.

[0039] Figure 1 It is a flowchart of the antenna signal synchronization method provided by the embodiment of the present invention;

[0040] Figure 2 It is a schematic structural diagram of the FPGA transmitting device in an integrated antenna transceiver device provided by the embodiment of the present invention;

[0041] Figure 3 It is a schematic structural diagram of the FPGA receiving device in an integrated antenna transceiver device provided by the embodiment of the present invention;

[0042] Figure 4 It is a schematic structural diagram of a transmitting baseband processing module provided by the embodiment of the present invention;

[0043] Figure 5 It is a schematic structural diagram of a receiving baseband processing module provided by the embodiment of the present invention;

[0044] Figure 6 It is a schematic structural diagram of an antenna transmitting module provided by the embodiment of the present invention;

[0045] Figure 7 It is a schematic structural diagram of an antenna receiving module provided by the embodiment of the present invention. Specific Embodiments

[0046] The following will clearly and completely describe the technical solutions of the present invention with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0047] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by terms such as "upper" and "lower" is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present invention. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0048] Embodiment 1

[0049] This embodiment provides an antenna signal synchronization method. As Figure 1 shown, this method includes the following steps:

[0050] S100: Extract partial samples in a superframe from the received antenna signal to obtain a first sample sequence, and perform sliding correlation between the first sample sequence and a first local m-sequence to obtain a first correlation value.

[0051] Specifically, the first sample sequence is a sample sequence formed by taking one sample every M samples starting from the Nth sample of the superframe header; both N and M are natural numbers greater than or equal to 2.

[0052] During specific implementation, taking the sample length of the superframe as 22275 as an example (the encoding method, frame formation method, etc. of the antenna transmission signal are different, and the corresponding sample length of the superframe may be different. Therefore, the specific values here and in the following are all specific examples listed for the convenience of understanding the technical solution in this embodiment and should not be construed as a limitation to the technical solution in this embodiment), the 4th sample in the superframe header can be captured (that is, at this time N is 4, and the previous 3 samples can be used for the following fine-tuning), and one sample is taken every 3 samples (that is, at this time M is 3) to obtain the first sample sequence.

[0053] Specifically, the first local m-sequence here and the second local m-sequence below are two consecutive m-sequences, and both can be 127 sequences.

[0054] After this step, a total of 21507 (here, 21507 = 21504 + 3, and 21504 refers to the number of valid samples in the superframe) correlation values are made and cached.

[0055] S200: Extract the first maximum value from the first correlation values, and perform normalization processing on the sample corresponding to the first maximum value to obtain a first normalized value.

[0056] Specifically, the method of taking 254 samples by taking one sample every 3 samples backward from the sample corresponding to the first maximum value can be adopted, and then only taking the modulus and summing these samples to obtain the first normalized value.

[0057] S300: When the first normalized value is greater than a preset threshold, calculate the second correlation value and the third correlation value of the sliding correlation between the first sample sequence and the second local m-sequence and the preset reference sequence respectively, and obtain a frequency offset estimation value according to the second correlation value and the third correlation value.

[0058] Specifically, the preset threshold can be 0.35. And when the first normalized value is less than or equal to the preset threshold, the above step S100 is re-entered to start synchronizing the next superframe.

[0059] Meanwhile, the sample point corresponding to the first maximum value can be used as the starting point for frequency offset cancellation. Moreover, to further improve the accuracy of frequency offset cancellation, the above starting point can be finely adjusted. That is, at this time, step S300 may include the following steps:

[0060] S301: When the first normalized value is greater than the preset threshold, the sample point corresponding to the first normalized value is used as the initial starting point.

[0061] S302: Take the initial starting point and one sample point before and after it as the fine-tuning starting point, and take one sample point every I from the sample points in the next normalized window after the fine-tuning starting point to form a third sample point sequence; I is a natural number greater than or equal to 2.

[0062] Specifically, 381 can be added to each of the three fine-tuning starting points (381 = 254 + 127, where 254 is the number of sample points corresponding to the calculation of the first normalized value in the above step S200, and 127 is the length of the first local m-sequence) to reach the next normalized window; and at this time, the method of taking one sample point every 3 sample points (that is, I is 3 at this time) can also be used to take 127 sample points to form a third sample point sequence.

[0063] S303: Correlate the third sample point sequence with the first local m-sequence to obtain a fifth correlation value.

[0064] S304: Adjust the fine-tuning starting point according to the fifth correlation value to obtain the frequency offset cancellation starting point.

[0065] Specifically, starting from the fine-tuning starting point, when the fifth correlation value indicates that the sample point in the corresponding third sample point sequence is different from the corresponding bit in the first local m-sequence, the starting point is adjusted to the next sample point, and finally the frequency offset cancellation starting point is obtained.

[0066] S305: Calculate the second correlation value and the third correlation value of the sliding correlation between the first sample point sequence and the second local m-sequence and the preset reference sequence respectively, and obtain the frequency offset estimation value according to the second correlation value and the third correlation value.

[0067] Specifically, the preset reference sequence refers to a sequence that is ahead of the second local m-sequence by a preset chip value. For example, a sequence that is ahead of the second local m-sequence by 80 chips.

[0068] Specifically, the phases of calculating the second correlation value and the third correlation value are as follows:

[0069]

[0070] where R1 refers to the second correlation value, α is the phase of the second correlation value, R2 refers to the third correlation value, and β is the phase of the third correlation value.

[0071] Then, taking the case where the frequency offset estimation value is a sequence that is 80 chips ahead of the second local m-sequence with respect to a preset reference sequence as an example:

[0072]

[0073] S400: Eliminate the initially estimated frequency offset of the superframe according to the frequency offset estimation value.

[0074] Specifically, first calculate the offset according to the above frequency offset estimation value, and then multiply the samples in the superframe by the offset to complete the elimination of the initially estimated frequency offset of the superframe.

[0075] Specifically, starting from the above-mentioned frequency offset elimination starting point, the initially estimated frequency offset of the superframe can be eliminated according to the frequency offset estimation value, and starting from the frequency offset elimination starting point, 1023 points can be taken every 3 samples (1023 = 896 + 127, where 896 is the length of the subframe in the superframe), and the initially estimated frequency offset of these samples can be eliminated:

[0076] Sig1023(1:1023) = Sig1_3Rs(Pmax + 381:3:Pmax + 3449);

[0077] Sig1023 = Sig1023.*exp(1i*Wbias0*(1:1023));

[0078] Wherein, Wbias0 is the above-mentioned frequency offset estimation value.

[0079] S500: Extract partial samples in the superframe after eliminating the initially estimated frequency offset to obtain a plurality of second sample sequences, and calculate the fourth correlation values of the plurality of second sample sequences and the second local m-sequence respectively; the second local m-sequence and the first local m-sequence are two consecutive m-sequences.

[0080] Here, the extraction method of the second sample sequence is similar to that of the first sample sequence, but their lengths are different. For example, one second sample sequence can only correspond to one subframe in the superframe, and the plurality of second sample sequences correspond to a plurality of consecutive subframes.

[0081] S600: Extract the second maximum value among the plurality of fourth correlation values, and perform normalization processing on the samples corresponding to the second maximum value to obtain the second normalization value.

[0082] S700: When the second normalization value is greater than the preset threshold, obtain the residual frequency offset value according to the plurality of fourth correlation values.

[0083] Specifically, when the second normalization value is less than or equal to the preset threshold, the above step S100 is also re-entered to start synchronizing the next superframe.

[0084] Specifically, first calculate the phases corresponding to each of the fourth correlation values:

[0085] Fi9(1:9) = phase(R9); Here, nine fourth correlation values are taken as an example for illustration.

[0086] Then calculate the phase difference corresponding to two adjacent fourth correlation values, and further calculate eight initial residual frequency offset values: Wresid(2:9) = (Fi9(1:8) - Fi9(2:9)) / 896; 896 is the subframe length.

[0087] Then perform smoothing filtering on the obtained eight initial residual frequency offset values to obtain the final residual frequency offset value.

[0088] S800: Eliminate the residual frequency offset of the superframe according to the residual frequency offset value.

[0089] Specifically, different from the elimination of the initially estimated frequency offset, here eliminate the residual frequency offset for all samples in the superframe:

[0090] Sig22274 = Sig22274.*exp(1i / 3*Wx*(1:22274));

[0091] Where Wx is the residual frequency offset value.

[0092] In summary, in the antenna signal synchronization method of this embodiment, first, based on the sliding correlation and normalization processing of the first sample sequence and the first local m-sequence, then judge whether the superframe in the antenna signal needs to eliminate the frequency offset. After that, perform correlation on the first sample sequence corresponding to the superframe that needs to eliminate the frequency offset with the second local m-sequence and the preset reference sequence respectively to perform the first frequency offset elimination; then extract multiple second sample sequences from the superframe after the first frequency offset elimination, and then perform correlation and normalization processing on the multiple second sample sequences to judge whether the first frequency offset elimination is successful. And on the premise of success, perform the second frequency offset elimination based on the correlation values of the multiple second sample sequences; finally, achieve two accurate frequency offset eliminations of the antenna signal based on accurate calculations, which can achieve effective signal synchronization, and then can reduce the bit error rate of the wireless transmission system, detect useful signals under low signal-to-noise ratio conditions, and improve the transmission efficiency of the system.

[0093] Embodiment 2

[0094] This embodiment provides an integrated antenna transceiver device. Specifically, the integrated antenna transceiver device includes: an FPGA transmitting device, an FPGA receiving device, and a control device.

[0095] Wherein, as Figure 2As shown in the figure, the FPGA transmitting device includes a transmitting baseband processing module, a digital-to-analog conversion module, and an antenna transmitting module. The transmitting baseband processing module is used to modulate the data collected by the data source to form two complex baseband signals, and transmit them to the corresponding two digital-to-analog conversion modules respectively. The digital-to-analog conversion module is used to convert the complex baseband signals into analog signals and transmit them to the corresponding two antenna transmitting modules respectively. The antenna transmitting module is used to modulate and transmit the analog signals.

[0096] Among them, as Figure 3 shown in the figure, the FPGA receiving device includes an antenna receiving module, an analog-to-digital conversion module, and a receiving baseband processing module. Two antenna receiving modules are used to receive two complex antenna signals respectively, modulate them, and then transmit them to two analog-to-digital conversion modules respectively. The two analog-to-digital conversion modules are used to convert the complex antenna signals into complex data signals and transmit them to the receiving baseband processing module. The receiving baseband processing module is used to perform mixing and demodulation on the complex data signals and then output. And the synchronization algorithm executed in the receiving baseband processing module here is the antenna signal synchronization method in the above-mentioned Embodiment 1.

[0097] Among them, as Figure 2 and Figure 3 shown in the figure, the control device is connected to the transmitting baseband processing module and the receiving baseband processing module, and is used to adjust the parameters of the transmitting baseband processing module and the receiving baseband processing module.

[0098] Specifically, as Figure 2 shown in the figure, the data source can be an image acquisition device such as a camera. Correspondingly, the data collected by the data source can be video data (of course, it can also be image data). In order to improve the transmission speed, the data collected by the data source received by the transmitting baseband processing module can also be data after compression and coding. That is to say, there is also an encoding module between the data source and the transmitting baseband processing module. And at this time, a data source control module can also be correspondingly set in the FPGA transmitting device. The control device is connected to the data source control device to control the operation of the data source and the encoding module (such as controlling and adjusting the corresponding parameters, etc.).

[0099] Specifically, the FPGA main control chips in the FPGA transmitting device and the FPGA receiving device can both be chips of model Zynq Ultrascale+ RFSoc XCZU43DRFFVG1517.

[0100] Specifically, the control device can be any existing host computer, and no specific limitation is made here.

[0101] For the convenience of subsequent analysis of the received data, as Figure 2As shown, the integrated antenna transceiver device in this embodiment may further include a storage device, which is connected to the FPGA receiving device and is used to store the data output by the receiving baseband processing module. Specifically, the storage device may be a high-speed disk array RAID.

[0102] In summary, in the integrated antenna transceiver device of the embodiment of the present invention, while comprehensively transmitting and receiving data by setting two transmitting antenna arrays and two receiving antenna arrays, by setting the transmitting device including the transmitting antenna array (specifically including the transmitting baseband processing module, the digital-to-analog conversion module, and the antenna transmitting module) and the receiving device including the receiving antenna array (specifically including the antenna receiving module, the analog-to-digital conversion module, and the receiving baseband processing module) as FPGA devices, the overall transmission speed of the device and the flexibility of configuration and expansion are improved. In addition, by setting a control device connected to the transmitting baseband processing module and the receiving baseband processing module, the channel parameters can be adjusted based on the signal conditions, the channel response can be optimized, and thus the signal transmission quality of the device is improved.

[0103] Figure 4 Shows the specific structure of the transmitting baseband processing module in a specific implementation manner of this embodiment, as Figure 4 As shown, the transmitting baseband processing module includes a channel coding module, a QPSK modulation module, an I-channel modulation module, and a Q-channel modulation module. Among them, the channel coding module is connected to the information source and is used to perform RS coding on the data collected by the information source and transmit the coded data to the QPSK modulation module; the QPSK modulation module is used to modulate the coded data to obtain 16QPSK symbols, and transmit the odd numbers to the I-channel modulation module and the even numbers to the Q-channel modulation module.

[0104] Further, as Figure 5 As shown, the I-channel modulation module may include a first interleaving module, a first framing module, a first upsampling module, and a first shaping filter module connected in sequence; the Q-channel modulation module may include a second interleaving module, a second framing module, a second upsampling module, and a second shaping filter module connected in sequence.

[0105] Figure 5 Shows the specific structure of the receiving baseband processing module in a specific implementation manner of this embodiment, as Figure 5 As shown, the receiving baseband processing module includes a mixing module, a matching filter module, a synchronization module, a channel estimation module, a frequency domain equalization module, and a decoding and demodulation module connected in sequence.

[0106] Specifically, the synchronization module is used to execute the antenna signal synchronization method in the above-mentioned Embodiment 1, and it may include a capture module for estimating the frequency offset value and a tracking module for eliminating the frequency offset value, corresponding to the initial estimated frequency offset elimination and the residual frequency offset elimination in the above-mentioned Embodiment 1 respectively.

[0107] Specifically, as Figure 5 shown, the mixing module specifically includes a mixer and an adder. The mixer is used to mix the Q-channel data output by the analog-to-digital conversion module.

[0108] Specifically, the matched filtering module in this embodiment and the first shaping filtering module and the second shaping filtering module in the above embodiment can both adopt FIR filters. And, corresponding to the QPSK modulation module in the above embodiment, the demodulation process performed by the decoding and demodulation module here is QPSK demodulation.

[0109] Figure 6 shows the specific structure of the antenna transmitting module in a specific implementation manner of this embodiment, as Figure 6 shown, the antenna transmitting module includes a first radio frequency circuit, a first band-pass filter, a first signal amplifier, and a transmitting antenna connected in sequence, and the first radio frequency circuit is connected to the digital-to-analog conversion module.

[0110] Figure 7 shows the specific structure of the antenna receiving module in a specific implementation manner of this embodiment, as Figure 7 shown, the antenna receiving module includes a receiving antenna, a second band-pass filter, a second signal amplifier, and a second radio frequency circuit connected in sequence; the second radio frequency circuit is connected to the analog-to-digital conversion module.

[0111] It should be noted that since both the antenna transmitting module and the antenna receiving module are two, the first band-pass filter and the second band-pass filter are also both two, and the center frequencies of the two first band-pass filters can be different, and the center frequencies of the two second band-pass filters can also be different.

[0112] Obviously, the above embodiments are merely examples given for clear illustration and are not limitations on the embodiments. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all the embodiments here. And the obvious changes or modifications derived therefrom are still within the protection scope of the present invention.

Claims

1. An antenna signal synchronization method, characterized in that, It includes the following steps: Extract partial samples in a superframe from the received antenna signal to obtain a first sample sequence, and perform sliding correlation between the first sample sequence and a first local m-sequence to obtain a first correlation value; Extract the first maximum value from the first correlation value, and perform normalization processing on the sample corresponding to the first maximum value to obtain a first normalized value; When the first normalized value is greater than a preset threshold, calculate a second correlation value and a third correlation value of sliding correlation between the first sample sequence and a second local m-sequence and a preset reference sequence respectively, and obtain a frequency offset estimation value according to the second correlation value and the third correlation value; Eliminate the initially estimated frequency offset of the superframe according to the frequency offset estimation value; Extract partial samples in the superframe after eliminating the initially estimated frequency offset to obtain a plurality of second sample sequences, and calculate fourth correlation values of sliding correlation between the plurality of second sample sequences and the second local m-sequence respectively; the second local m-sequence and the first local m-sequence are two consecutive m-sequences; Extract the second maximum value from the plurality of fourth correlation values, and perform normalization processing on the sample corresponding to the second maximum value to obtain a second normalized value; When the second normalized value is greater than the preset threshold, obtain a residual frequency offset value according to the plurality of fourth correlation values; Eliminate the residual frequency offset of the superframe according to the residual frequency offset value.

2. The antenna signal synchronization method according to claim 1, wherein The first sample sequence is a sample sequence formed by taking one sample every M samples starting from the Nth sample of the superframe header; both N and M are natural numbers greater than or equal to 2.

3. The antenna signal synchronization method according to claim 2, wherein The step of, when the first normalized value is greater than a preset threshold, calculating a second correlation value and a third correlation value of sliding correlation between the first sample sequence and a second local m-sequence and a preset reference sequence respectively, and obtaining a frequency offset estimation value according to the second correlation value and the third correlation value specifically includes the following steps: When the first normalized value is greater than a preset threshold, use the sample corresponding to the first normalized value as the initial starting point; Take the initial starting point and one sample before and after it as the fine-tuning starting point, and take one sample every I samples from the samples in the next normalization window after the fine-tuning starting point to form a third sample sequence; I is a natural number greater than or equal to 2; Perform correlation between the third sample sequence and the first local m-sequence to obtain a fifth correlation value; Adjust the fine-tuning starting point according to the fifth correlation value to obtain a frequency-offset elimination starting point; Calculate a second correlation value and a third correlation value of sliding correlation between the first sample sequence and a second local m-sequence and a preset reference sequence respectively, and obtain a frequency offset estimation value according to the second correlation value and the third correlation value; The step of eliminating the initially estimated frequency offset of the superframe according to the frequency offset estimation value specifically includes the following steps: Starting from the frequency-offset elimination starting point, eliminate the initially estimated frequency offset of the superframe according to the frequency offset estimation value.

4. An integrated antenna transceiver device, characterized in that, It includes: An FPGA transmitting device, including a transmitting baseband processing module, a digital-to-analog conversion module, and an antenna transmitting module; The transmitting baseband processing module is used to modulate the data collected by the data source to form two complex baseband signals, and transmit them to the corresponding two digital-to-analog conversion modules respectively; The digital-to-analog conversion module is used to convert the complex baseband signal into an analog signal and transmit it to the corresponding two antenna transmission modules respectively; the antenna transmission module is used to modulate and transmit the analog signal. The FPGA receiving device includes an antenna receiving module, an analog-to-digital conversion module, and a receiving baseband processing module; the two antenna receiving modules are used to receive two paths of complex antenna signals respectively, modulate them, and then transmit them to the two analog-to-digital conversion modules respectively; the two analog-to-digital conversion modules are used to convert the complex antenna signals into complex data signals and transmit them to the receiving baseband processing module; the receiving baseband processing module is used to perform mixing, synchronization, and demodulation on the complex data signals and then output. The synchronization algorithm executed by the receiving baseband processing module is the antenna signal synchronization method according to any one of claims 1-3. The control device is connected to the transmitting baseband processing module and the receiving baseband processing module, and is used to adjust the parameters of the transmitting baseband processing module and the receiving baseband processing module.

5. The integrated antenna transceiver device according to claim 4, characterized in that, The transmitting baseband processing module includes a channel coding module, a QPSK modulation module, an I-channel modulation module, and a Q-channel modulation module; the channel coding module is connected to the information source, and is used to perform RS coding on the data collected by the information source and transmit the coded data to the QPSK modulation module; the QPSK modulation module is used to modulate the coded data to obtain 16QPSK symbols, and transmit the odd numbers to the I-channel modulation module and the even numbers to the Q-channel modulation module.

6. The integrated antenna transceiver device according to claim 5, characterized in that, The I-channel modulation module includes a first interleaving module, a first framing module, a first upsampling module, and a first shaping filter module connected in sequence; the Q-channel modulation module includes a second interleaving module, a second framing module, a second upsampling module, and a second shaping filter module connected in sequence.

7. The integrated antenna transceiver device according to claim 4, wherein The receiving baseband processing module includes a mixing module, a matched filter module, a synchronization module, a channel estimation module, a frequency domain equalization module, and a decoding and demodulation module connected in sequence; the synchronization module is used to execute the antenna signal synchronization method according to any one of claims 1-3.

8. The integrated antenna transceiver device according to claim 7, characterized in that, It further includes: A storage device is connected to the FPGA receiving device and is used to store the data output by the receiving baseband processing module.

9. The integrated antenna transceiver device according to any one of claims 4-8, characterized in that, The data collected by the information source is video data, and the transmitting baseband processing module receives the compressed and coded video data.

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