Method, device and equipment for accelerating generation of PCB board drawing and storage medium

Abstract

The application relates to the field of printed circuits and discloses a PCB board drawing accelerated generation method, device, equipment and storage medium. The method comprises the following steps: receiving gerber drawing data; performing layer identification processing on the gerber drawing data based on a regular matching algorithm to obtain PCB design data corresponding to N layers; writing the PCB design data corresponding to the N layers into N Node.js scripts to obtain N drawing loading texts; performing average distribution processing on the N drawing loading texts based on the number of multithreads to obtain N drawing loading texts distributed by the multithreads; performing queue loading processing on the N drawing loading texts based on task sorting to obtain a basic PCB board drawing; performing open-circuit image detection and identification processing on the basic PCB board drawing to obtain an identification result; judging whether the identification result contains an open-circuit result; if yes, performing repair processing on the basic PCB board drawing according to an RFRNet model to obtain a PCB board drawing; and if not, determining that the basic PCB board drawing is a PCB board drawing.

Description

Technical Field

[0001] This invention relates to the field of printed circuits, and more particularly to a method, apparatus, device, and storage medium for accelerating the generation of PCB board drawings. Background Technology

[0002] In the field of hardware e-commerce procurement, since users need to make purchases based on PCB layout designs, the e-commerce interface needs to have PCB drawing images so that users can provide PCB models and preview some component installations on the PCB, making it easier to select hardware combinations and place orders.

[0003] To accommodate different PCB board configurations on the internet, an interface for reading Gerber files is provided on the page. Users upload their own Gerber files, which are then parsed to generate PCB board drawings. These drawings can be 2D or 3D data. For 3D data, a rendering process is added to convert the 2D data into 3D data, allowing users to view and modify the design.

[0004] Since this is an internet preview, users have certain requirements for the speed of PCB board drawing generation and need to output the PCB board drawings as quickly as possible. However, the current speed of generating PCB board drawings on the page is relatively slow and cannot meet the user's need for quickly switching Gerber files. A new technology is needed to solve this problem. Summary of the Invention

[0005] The main objective of this invention is to solve the technical problem that the current PCB board drawing is generated slowly on the page, which cannot meet the user's need for quick switching of Gerber files.

[0006] The first aspect of this invention provides a method for accelerating the generation of PCB board patterns, the method comprising:

[0007] Receive Gerber plotting data;

[0008] Based on the regular matching algorithm, the Gerber drawing data is processed for layer recognition to obtain PCB design data corresponding to N layers, where N is a positive integer;

[0009] Write the PCB design data corresponding to N layers into N Node.js scripts to obtain N drawing loading texts;

[0010] Based on the number of threads, the N drawing loading texts are evenly distributed to obtain N drawing loading texts allocated by the multi-threads.

[0011] Based on the task ordering in the multithreading, the N drawing loading texts are queued and loaded to obtain the basic PCB board drawing.

[0012] The basic PCB board drawing is subjected to open circuit image detection and recognition processing to obtain the recognition result;

[0013] Determine whether the identification result contains an open circuit result;

[0014] If an open circuit is found, the basic PCB board drawing is repaired according to the RFRNet model to obtain the PCB board drawing.

[0015] If no open circuit result is found, the basic PCB board drawing is determined as the PCB board drawing.

[0016] Optionally, in a first implementation of the first aspect of the present invention, the step of performing layer recognition processing on the Gerber drawing data based on a regular expression matching algorithm to obtain PCB design data corresponding to N layers includes:

[0017] Based on the regular expression matching algorithm, the file extensions of the Gerber drawing data are identified sequentially to obtain N identification name extensions, where N is a positive integer;

[0018] Based on the layers corresponding to the N identification name suffixes, the PCB design data corresponding to the N layers is extracted and processed from the Gerber drawing data.

[0019] Optionally, in a second implementation of the first aspect of the present invention, the step of sequentially identifying the file extensions of the Gerber drawing data based on a regular expression matching algorithm to obtain N identified name extensions includes:

[0020] Based on the regular expression matching algorithm, the file extension of the Gerber drawing data is identified to obtain the identified name extension, and the identified name extension is added to the deduplication verification set.

[0021] Determine whether the deduplication check set contains duplicate identification name suffixes;

[0022] If it does not exist, the file extension of the Gerber drawing data is re-identified based on the regular expression matching algorithm to obtain the identified name extension;

[0023] If duplicate name suffixes exist, duplicates are removed, and the file suffixes of the Gerber drawing data are re-identified based on the regular expression matching algorithm to obtain the name suffixes.

[0024] Optionally, in a third implementation of the first aspect of the present invention, the step of evenly distributing the N drawing loading texts based on the number of threads to obtain N drawing loading texts allocated by multiple threads includes:

[0025] Based on the multi-threaded numbering, the N drawing loading texts are repeatedly and cyclically assigned to the multi-threaded system to obtain N drawing loading texts assigned by the multi-threaded system.

[0026] Optionally, in a fourth implementation of the first aspect of the present invention, the step of performing open-circuit image detection and recognition processing on the basic PCB board drawing to obtain the recognition result includes:

[0027] The basic PCB board drawing is subjected to grayscale matrix processing to obtain an image analysis matrix;

[0028] Continuity analysis is performed on elements in the image analysis matrix that are greater than a preset line threshold to obtain the recognition result.

[0029] Optionally, in a fifth implementation of the first aspect of the present invention, after obtaining the PCB board drawing, the method further includes:

[0030] Upload the PCB board drawing to an H5 page so that the PCB board drawing can be displayed on the H5 page.

[0031] Optionally, in a sixth implementation of the first aspect of the present invention, receiving Gerber drawing data includes:

[0032] Use an H5 page to receive uploaded Gerber plotting data.

[0033] A second aspect of the present invention provides an accelerated generation apparatus for PCB board patterns, the accelerated generation apparatus for PCB board patterns comprising:

[0034] The receiving module is used to receive Gerber plotting data;

[0035] The identification module is used to perform layer identification processing on the Gerber drawing data based on a regular expression matching algorithm to obtain PCB design data corresponding to N layers, where N is a positive integer;

[0036] The loading text generation module is used to write the PCB design data corresponding to N layers into N Node.js scripts, resulting in N drawing loading texts;

[0037] The multi-threaded allocation module is used to evenly distribute the N drawing loading texts based on the number of multi-threads, so as to obtain N drawing loading texts allocated by the multi-threads.

[0038] A multi-threaded loading module is used to perform queue loading processing on the N drawing loading texts based on the task order in the multi-threaded system to obtain the basic PCB board drawing.

[0039] The circuit breaker identification module is used to perform circuit breaker image detection and identification processing on the basic PCB board drawing to obtain the identification result;

[0040] The judgment module is used to determine whether the identification result contains an open circuit result;

[0041] The repair module is used to repair the basic PCB board drawing according to the RFRNet model if an open circuit result exists, so as to obtain the PCB board drawing.

[0042] The determination module is used to determine the basic PCB board drawing as a PCB board drawing if no open circuit result exists.

[0043] A third aspect of the present invention provides an accelerated PCB layout generation device, comprising: a memory and at least one processor, wherein the memory stores instructions, and the memory and the at least one processor are interconnected via a circuit; the at least one processor invokes the instructions in the memory to cause the accelerated PCB layout generation device to execute the aforementioned accelerated PCB layout generation method.

[0044] A fourth aspect of the present invention provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the above-described accelerated generation method for PCB board drawing.

[0045] In the embodiments of the invention, by identifying multiple layers of a Gerber file, splitting the different layers of the Gerber file into multiple threads for calculation, and finally combining them to obtain the PCB board drawing, the parsing of Gerber files is accelerated. This solves the technical problem that the current PCB board drawing is generated slowly on the page and cannot meet the user's need for quick switching of Gerber files. Attached Figure Description

[0046] Figure 1 This is a schematic diagram of an embodiment of the accelerated generation method for PCB board drawings in this invention.

[0047] Figure 2 This is a schematic diagram of one embodiment of the accelerated generation device for PCB board drawing in this invention;

[0048] Figure 3 This is a schematic diagram of another embodiment of the accelerated generation device for PCB board drawing in the present invention;

[0049] Figure 4 This is a schematic diagram of an embodiment of an accelerated generation device for PCB board drawing in this invention. Detailed Implementation

[0050] This invention provides a method, apparatus, device, and storage medium for accelerating the generation of PCB board drawings.

[0051] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" or "having" and any variations thereof are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0052] For ease of understanding, the specific process of the embodiments of the present invention is described below. Please refer to [link / reference]. Figure 1 One embodiment of the accelerated generation method for PCB board drawings in this invention includes:

[0053] 101. Receive Gerber plotting data;

[0054] In this embodiment, Gerber files can be received via a USB interface, and Gerber files are generally transmitted in the form of compressed packages.

[0055] Furthermore, 101 can perform the following steps:

[0056] 1011. Use an H5 page to receive uploaded Gerber plotting data.

[0057] In step 1011, Gerber files can be uploaded using a web page (H5) to enable the uploading of Gerber plotting data in e-commerce shopping scenarios.

[0058] 102. Based on the regular expression matching algorithm, perform layer recognition processing on the Gerber drawing data to obtain PCB design data corresponding to N layers, where N is a positive integer;

[0059] In this embodiment, regular expression matching is used to match the name suffixes ".xln", ".drl", or ".ile" in the Gerber drawing data to obtain PCB design data corresponding to N layers. The specific number of layers is determined by the Gerber file exported or uploaded by the user.

[0060] Furthermore, the following steps can be performed at 102:

[0061] 1021. Based on the regular expression matching algorithm, the file extensions of the Gerber drawing data are identified sequentially to obtain N identification name extensions, where N is a positive integer;

[0062] 1022. Based on the layers corresponding to the N identification name suffixes, extract and process the Gerber drawing data to obtain the PCB design data corresponding to the N layers.

[0063] In steps 1021-1022, a regular expression algorithm is used to first identify the file extensions of Gerber plotting data, such as ".xln", ".drl", or ".ile", to obtain the identified data.

[0064] Extract the folders with corresponding identification name suffixes from the Gerber drawing data to obtain PCB design data with multiple layers. The PCB design data is the physical data, while the labels of the N layers are identification name suffixes.

[0065] Furthermore, the following steps can be performed in step 1021:

[0066] 10211. Based on the regular expression matching algorithm, the file extension of the Gerber drawing data is identified to obtain the identified name extension, and the identified name extension is added to the deduplication verification set.

[0067] 10212. Determine whether the deduplication check set contains duplicate identification name suffixes;

[0068] 10213. If it does not exist, then the file extension of the Gerber drawing data is re-identified based on the regular expression matching algorithm to obtain the identified name extension;

[0069] 10214. If they exist, duplicate name suffixes are deduplicated, and the file suffixes of the Gerber drawing data are re-identified based on the regular expression matching algorithm to obtain the name suffixes.

[0070] In steps 10211-10214, when extracting layers and suffixes from multiple Gerber plot data based on regular expression matching, a method to avoid duplication is adopted. First, the layer suffix name of a Gerber plot data is identified, and then this identified suffix name is added to the deduplication check set.

[0071] The deduplication check set is checked. If there are no duplicate suffix names, it means there is no error. Then, the layer suffix name of a Gerber plot data is extracted and added to the deduplication check set.

[0072] The process involves continuously extracting and validating Gerber drawing data suffixes. If an error occurs (e.g., duplicate suffixes appear), the duplicate suffixes are removed, and their corresponding registration information in the data table is deleted. This extraction and validation process continues until N suffixes are obtained.

[0073] 103. Write the PCB design data corresponding to N layers into N Node.js scripts to obtain N drawing loading texts;

[0074] In this embodiment, the entity content of the PCB design data is first written into a Node.js script, and the Node.js script is used as the data to load and calculate.

[0075] If there are 9 Node.js scripts and 3 threads, each thread will perform calculations on an average of 3 Node.js scripts. Then, the PCB board will be drawn according to the internal reading and organization order of the Gerber file, thus obtaining the PCB board drawing.

[0076] 104. Based on the number of threads, the N drawing loading texts are evenly distributed to obtain N drawing loading texts allocated by the multi-thread.

[0077] In this embodiment, if there are 8 threads and 27 drawing loading texts, the loaded data is stored in memory according to the queue loading order of 4, 4, 4, 3, 3, 3, 3, 3 based on the thread number allocation result. Then, the PCB board is drawn based on the internal reading and organization order of the Gerber file to obtain the PCB board drawing.

[0078] Furthermore, in step 104, the following steps can be performed:

[0079] 1041. Based on the multi-threaded numbering, the N drawing loading texts are repeatedly and cyclically assigned to the multi-threaded program to obtain N drawing loading texts assigned by the multi-threaded program.

[0080] In step 1041, the threads are numbered 1, 2, 3, 4, 5, 6, 7, and 8. There are 27 drawing loading texts, which are sequentially assigned to threads numbered 1-8, and this process is repeated. Taking thread number 1 as an example, loading files numbered 1, 9, 17, and 25 are assigned to thread 1 for loading. Other threads follow a similar pattern, resulting in N drawing loading texts assigned by the multi-threaded system. This thread allocation follows a fixed pattern, and logging allows technicians to easily trace subsequent errors in case of an error.

[0081] 105. Based on the task ordering in the multi-threaded process, perform queue loading processing on the N drawing loading texts to obtain the basic PCB board drawing;

[0082] 106. Perform open circuit image detection and recognition processing on the basic PCB board drawing to obtain the recognition result;

[0083] 107. Determine whether the identification result contains an open circuit result;

[0084] 108. If an open circuit is found, the basic PCB board drawing is repaired according to the RFRNet model to obtain the PCB board drawing.

[0085] 109. If there is no open circuit result, the basic PCB board drawing is determined as the PCB board drawing.

[0086] In steps 105-109, the processing task data of a single thread is processed based on queue sorting. After the data that has been processed and completed is stored in the content, the PCB board is drawn based on the internal reading and organization order of the Gerber file, thus obtaining the basic PCB board drawing.

[0087] Next, the basic PCB board drawing is inspected to determine if there are any open circuits. If an open circuit is found, the basic PCB board drawing is repaired using an RFRNet model to obtain a repaired PCB board drawing. If there are no open circuits, the basic PCB board drawing is directly used as the PCB board drawing, thus generating the PCB board drawing. This entire process aims to ensure that the displayed PCB board drawing does not contain incorrect routes, improve the user experience, and correct incompatibility errors in Gerber files exported by some software.

[0088] Furthermore, the following steps can be performed on 106:

[0089] 1061. Perform grayscale matrix processing on the basic PCB board drawing to obtain the image analysis matrix;

[0090] 1062. Perform continuity analysis on the elements in the image analysis matrix that are greater than the preset line threshold to obtain the recognition result.

[0091] In steps 1061-1062, the image of the basic PCB board drawing is first converted to grayscale. Based on the grayscale values, the corresponding matrix number of the basic PCB board drawing is obtained, resulting in an image analysis matrix. Then, each element value in the image analysis matrix is ​​filtered and analyzed to determine whether it is greater than a route threshold. For example, a grayscale value of 120 is determined as the route threshold, and elements with grayscale values ​​greater than 120 are extracted. The continuity of the extracted elements is then checked. The continuity analysis can be performed using a classification process or by directly using a diffusion algorithm. After all diffusion is completed, it is determined whether there are any un-diffused elements, thus obtaining the identification result.

[0092] Furthermore, after step 109, the following can also be performed:

[0093] 110. Upload the PCB board drawing to the H5 page so that the PCB board drawing can be displayed on the H5 page.

[0094] In step 110, the PCB layout is uploaded to an H5 page so that e-commerce users can view the PCB design, adjust components based on the layout, and then make bulk purchases. This process can be applied to hardware e-commerce procurement scenarios, enabling online design and preview, and bulk purchasing based on the preview.

[0095] In the embodiments of the invention, by identifying multiple layers of a Gerber file, splitting the different layers of the Gerber file into multiple threads for calculation, and finally combining them to obtain the PCB board drawing, the parsing of Gerber files is accelerated. This solves the technical problem that the current PCB board drawing is generated slowly on the page and cannot meet the user's need for quick switching of Gerber files.

[0096] The accelerated generation method for PCB board patterning in the embodiments of the present invention has been described above. The accelerated generation apparatus for PCB board patterning in the embodiments of the present invention will be described below. Please refer to [link / reference]. Figure 2 One embodiment of the accelerated generation device for PCB board drawing in this invention includes:

[0097] Receiver module 201 is used to receive Gerber drawing data;

[0098] The identification module 202 is used to perform layer identification processing on the Gerber drawing data based on a regular expression matching algorithm to obtain PCB design data corresponding to N layers, where N is a positive integer;

[0099] The text generation module 203 is used to write the PCB design data corresponding to N layers into N Node.js scripts to obtain N drawing loading texts;

[0100] The multi-threaded allocation module 204 is used to evenly distribute the N drawing loading texts based on the number of multi-threads to obtain N drawing loading texts allocated by the multi-threads.

[0101] The multi-threaded loading module 205 is used to perform queue loading processing on the N drawing loading texts based on the task order in the multi-threaded process to obtain the basic PCB board drawing.

[0102] The open circuit identification module 206 is used to perform open circuit image detection and identification processing on the basic PCB board drawing to obtain the identification result;

[0103] The judgment module 207 is used to determine whether the identification result contains an open circuit result;

[0104] Repair module 208 is used to repair the basic PCB board drawing according to the RFRNet model if there is an open circuit result, so as to obtain the PCB board drawing.

[0105] The determination module 209 is used to determine the basic PCB board drawing as a PCB board drawing if there is no open circuit result.

[0106] In the embodiments of the invention, by identifying multiple layers of a Gerber file, splitting the different layers of the Gerber file into multiple threads for calculation, and finally combining them to obtain the PCB board drawing, the parsing of Gerber files is accelerated. This solves the technical problem that the current PCB board drawing is generated slowly on the page and cannot meet the user's need for quick switching of Gerber files.

[0107] Please see Figure 3 Another embodiment of the accelerated generation device for PCB board drawing in this invention includes:

[0108] Receiver module 301 is used to receive Gerber drawing data;

[0109] The identification module 302 is used to perform layer identification processing on the Gerber drawing data based on a regular expression matching algorithm to obtain PCB design data corresponding to N layers, where N is a positive integer;

[0110] The text generation module 303 is used to write the PCB design data corresponding to N layers into N Node.js scripts to obtain N drawing loading texts;

[0111] The multi-threaded allocation module 304 is used to evenly distribute the N drawing loading texts based on the number of multi-threads, so as to obtain N drawing loading texts allocated by the multi-threads.

[0112] The multi-threaded loading module 305 is used to perform queue loading processing on the N drawing loading texts based on the task order in the multi-threaded process to obtain the basic PCB board drawing.

[0113] The circuit breaker identification module 306 is used to perform circuit breaker image detection and identification processing on the basic PCB board drawing to obtain the identification result;

[0114] The judgment module 307 is used to determine whether the identification result contains an open circuit result;

[0115] Repair module 308 is used to repair the basic PCB board drawing according to the RFRNet model if there is an open circuit result, so as to obtain the PCB board drawing.

[0116] The determination module 309 is used to determine the basic PCB board drawing as a PCB board drawing if there is no open circuit result.

[0117] Specifically, the receiving module 301 is used for:

[0118] Use an H5 page to receive uploaded Gerber plotting data.

[0119] Specifically, the identification module 302 is used for:

[0120] Based on the regular expression matching algorithm, the file extensions of the Gerber drawing data are identified sequentially to obtain N identification name extensions, where N is a positive integer;

[0121] Based on the layers corresponding to the N identification name suffixes, the PCB design data corresponding to the N layers is extracted and processed from the Gerber drawing data.

[0122] The receiving module 301 can also be specifically used for:

[0123] Based on the regular expression matching algorithm, the file extension of the Gerber drawing data is identified to obtain the identified name extension, and the identified name extension is added to the deduplication verification set.

[0124] Determine whether the deduplication check set contains duplicate identification name suffixes;

[0125] If it does not exist, the file extension of the Gerber drawing data is re-identified based on the regular expression matching algorithm to obtain the identified name extension;

[0126] If duplicate name suffixes exist, duplicates are removed, and the file suffixes of the Gerber drawing data are re-identified based on the regular expression matching algorithm to obtain the name suffixes.

[0127] Specifically, the multi-threaded allocation module 304 is used for:

[0128] Based on the multi-threaded numbering, the N drawing loading texts are repeatedly and cyclically assigned to the multi-threaded system to obtain N drawing loading texts assigned by the multi-threaded system.

[0129] Specifically, the circuit breaker identification module 306 can be used for:

[0130] The basic PCB board drawing is subjected to grayscale matrix processing to obtain an image analysis matrix;

[0131] Continuity analysis is performed on elements in the image analysis matrix that are greater than a preset line threshold to obtain the recognition result.

[0132] The PCB board drawing acceleration generation device further includes an upload module 310, which is specifically used for:

[0133] Upload the PCB board drawing to an H5 page so that the PCB board drawing can be displayed on the H5 page.

[0134] In the embodiments of the invention, by identifying multiple layers of a Gerber file, splitting the different layers of the Gerber file into multiple threads for calculation, and finally combining them to obtain the PCB board drawing, the parsing of Gerber files is accelerated. This solves the technical problem that the current PCB board drawing is generated slowly on the page and cannot meet the user's need for quick switching of Gerber files.

[0135] above Figure 2 and Figure 3 The accelerated generation device for PCB board drawing in the embodiments of the present invention will be described in detail from the perspective of modular functional entities. The accelerated generation device for PCB board drawing in the embodiments of the present invention will be described in detail from the perspective of hardware processing.

[0136] Figure 4This is a schematic diagram of a PCB layout acceleration generation device 400 provided in an embodiment of the present invention. The PCB layout acceleration generation device 400 can vary significantly due to different configurations or performance characteristics. It may include one or more central processing units (CPUs) 410 (e.g., one or more processors) and a memory 420, and one or more storage media 430 (e.g., one or more mass storage devices) storing application programs 433 or data 432. The memory 420 and storage media 430 can be temporary or persistent storage. The program stored in the storage media 430 may include one or more modules (not shown in the diagram), each module including a series of instruction operations on the PCB layout acceleration generation device 400. Furthermore, the processor 410 may be configured to communicate with the storage media 430 and execute the series of instruction operations in the storage media 430 on the PCB layout acceleration generation device 400.

[0137] The PCB layout-based accelerated generation device 400 may also include one or more power supplies 440, one or more wired or wireless network interfaces 450, one or more input / output interfaces 460, and / or one or more operating systems 431, such as Windows Server, Mac OS X, Unix, Linux, Free BSD, etc. Those skilled in the art will understand that... Figure 4 The illustrated PCB layout acceleration device structure does not constitute a limitation on PCB layout acceleration devices and may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0138] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium, wherein the computer-readable storage medium stores instructions that, when the instructions are executed on a computer, cause the computer to perform the steps of the accelerated generation method for PCB board drawing.

[0139] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system, device, or unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0140] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0141] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for accelerating the generation of PCB board drawings, characterized in that, Including the following steps: Receive Gerber plotting data; Based on the regular matching algorithm, the Gerber drawing data is processed for layer recognition to obtain PCB design data corresponding to N layers, where N is a positive integer; Write the PCB design data corresponding to N layers into N Node.js scripts to obtain N drawing loading texts; Based on the number of threads, the N drawing loading texts are evenly distributed to obtain N drawing loading texts allocated by the multi-threads. Based on the task ordering in the multithreading, the N drawing loading texts are queued and loaded to obtain the basic PCB board drawing. The basic PCB board drawing is subjected to open circuit image detection and recognition processing to obtain the recognition result; Determine whether the identification result contains an open circuit result; If an open circuit is found, the basic PCB board drawing is repaired according to the RFRNet model to obtain the PCB board drawing. If no open circuit result is found, the basic PCB board drawing is determined as the PCB board drawing.

2. The accelerated generation method for PCB board drawing according to claim 1, characterized in that, The layer recognition processing of the Gerber drawing data based on the regular expression matching algorithm to obtain PCB design data corresponding to N layers includes: Based on the regular expression matching algorithm, the file extensions of the Gerber drawing data are identified sequentially to obtain N identification name extensions, where N is a positive integer; Based on the layers corresponding to the N identification name suffixes, the PCB design data corresponding to the N layers is extracted and processed from the Gerber drawing data.

3. The accelerated generation method for PCB board drawing according to claim 2, characterized in that, The regular expression matching algorithm sequentially identifies the file extensions of the Gerber plotting data, resulting in N identified name extensions, including: Based on the regular expression matching algorithm, the file extension of the Gerber drawing data is identified to obtain the identified name extension, and the identified name extension is added to the deduplication verification set. Determine whether the deduplication check set contains duplicate identification name suffixes; If it does not exist, the file extension of the Gerber drawing data is re-identified based on the regular expression matching algorithm to obtain the identified name extension; If duplicate name suffixes exist, duplicates are removed, and the file suffixes of the Gerber drawing data are re-identified based on the regular expression matching algorithm to obtain the name suffixes.

4. The accelerated generation method for PCB board drawing according to claim 1, characterized in that, The method of evenly distributing the N drawing loading texts based on the number of threads to obtain N drawing loading texts distributed across multiple threads includes: Based on the multi-threaded numbering, the N drawing loading texts are repeatedly and cyclically assigned to the multi-threaded system to obtain N drawing loading texts assigned by the multi-threaded system.

5. The accelerated generation method for PCB board drawing according to claim 1, characterized in that, The open circuit image detection and recognition processing of the basic PCB board drawing yields the following recognition results: The basic PCB board drawing is subjected to grayscale matrix processing to obtain an image analysis matrix; Continuity analysis is performed on elements in the image analysis matrix that are greater than a preset line threshold to obtain the recognition result.

6. The accelerated generation method for PCB board drawing according to claim 1, characterized in that, After obtaining the PCB board drawing, the process also includes: Upload the PCB board drawing to an H5 page so that the PCB board drawing can be displayed on the H5 page.

7. The accelerated generation method for PCB board drawing according to claim 1, characterized in that, The received Gerber plotting data includes: Use an H5 page to receive uploaded Gerber plotting data.

8. An accelerated generation device for PCB board drawing, characterized in that, The accelerated generation device for PCB board drawings includes: The receiving module is used to receive Gerber plotting data; The identification module is used to perform layer identification processing on the Gerber drawing data based on a regular expression matching algorithm to obtain PCB design data corresponding to N layers, where N is a positive integer; The loading text generation module is used to write the PCB design data corresponding to N layers into N Node.js scripts, resulting in N drawing loading texts; The multi-threaded allocation module is used to evenly distribute the N drawing loading texts based on the number of multi-threads, so as to obtain N drawing loading texts allocated by the multi-threads. A multi-threaded loading module is used to perform queue loading processing on the N drawing loading texts based on the task order in the multi-threaded system to obtain the basic PCB board drawing. The circuit breaker identification module is used to perform circuit breaker image detection and identification processing on the basic PCB board drawing to obtain the identification result; The judgment module is used to determine whether the identification result contains an open circuit result; The repair module is used to repair the basic PCB board drawing according to the RFRNet model if an open circuit result exists, so as to obtain the PCB board drawing. The determination module is used to determine the basic PCB board drawing as a PCB board drawing if no open circuit result exists.

9. An accelerated generation device for PCB board drawing, characterized in that, The accelerated generation device for PCB board drawing includes: a memory and at least one processor, wherein the memory stores instructions and the memory and the at least one processor are interconnected via lines; The at least one processor invokes the instructions in the memory to cause the PCB layout acceleration generation device to perform the PCB layout acceleration generation method as described in any one of claims 1-7.

10. A computer-readable storage medium storing a computer program thereon, characterized in that, When the computer program is executed by the processor, it implements the accelerated generation method for PCB board drawing as described in any one of claims 1-7.

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