Radio frequency integrated device and method of manufacturing the same

Abstract

The application relates to the field of wireless communication equipment, in particular to a radio frequency integrated device and a preparation method thereof. The integrated device at least comprises a filter based on a substrate integrated waveguide on a radio frequency chip substrate, the substrate integrated waveguide is prepared by opening an SIW through hole on the radio frequency chip substrate, a back hole is also opened on the radio frequency chip substrate, metal is deposited in the SIW through hole and the back hole, and the filter is interconnected with the radio frequency chip through the SIW through hole, the back hole and the metal deposited on the back of the substrate. The SIW through hole and the back hole are opened on the substrate at the same time, metal is deposited, the SIW filter is manufactured in the substrate through the SIW through hole, the interconnection between the filter and the radio frequency chip is realized through the SIW through hole and the back hole, the parasitic effect is small, the transmission loss is low and the integration degree is high.

Description

Technical Field

[0001] This invention relates to the field of wireless communication equipment, specifically to a radio frequency integrated device and its manufacturing method. Background Technology

[0002] The microwave RF transceiver link is mainly divided into three important modules: the antenna responsible for electromagnetic wave transmission and reception, the RF front-end chip for signal amplification and processing, and the baseband module, which includes amplifiers, low-noise amplifiers, and switches, as well as the signal modulation module at the back end. After the antenna signal is received, it enters the RF front-end and needs to be filtered to select a signal with a specific frequency and bandwidth for processing. The RF front-end chip can be fabricated using gallium nitride HEMT devices to achieve high output power and low noise figure, completing signal amplification at the transmitting end and low-noise amplification at the receiving end. The baseband processing module is currently mainly composed of CMOS chips, which convert the RF signal down to a baseband signal for processing and convert the baseband signal up to an RF signal.

[0003] In particular, gallium nitride (GaN) HEMT RF chips and CMOS chips are difficult to manufacture in a compatible process, so they are manufactured independently and then connected via external leads. Similarly, passive components such as filters and antennas, due to their different functions, are also manufactured independently and then interconnected with the RF front-end chip via lead connections and packaging, incorporating a matching network. These connection methods inevitably introduce parasitic effects, including parasitic inductance and capacitance, leading to high transmission loss, low bandwidth, and low integration density. Moreover, the higher the frequency, the more pronounced the parasitic effects become.

[0004] As 5G and 6G adopt higher frequencies such as millimeter waves or terahertz, the problems caused by these connection losses will become particularly prominent. Therefore, to achieve high-performance transceiver chips, it is especially important to realize passive antennas and filters with wideband transmission, low loss, and high integration based on gallium nitride RF chips and silicon-based CMOS chips. Summary of the Invention

[0005] Based on this, the present invention provides a new radio frequency integrated device that integrates a filter based on substrate integrated waveguide in the radio frequency chip substrate, and achieves low-loss interconnection between the filter and the radio frequency chip through SIW vias and back vias, which can effectively alleviate a series of problems caused by low integration of radio frequency chips in the prior art.

[0006] The present invention achieves the above-mentioned technical objectives through the following technical solutions:

[0007] The present invention provides an integrated radio frequency (RF) device, which differs in that it includes at least a filter based on a substrate integrated waveguide located on an RF chip substrate. The substrate integrated waveguide is prepared by forming SIW vias on the RF chip substrate. A back via is also formed on the RF chip substrate. Metal is deposited in both the SIW vias and the back via. The filter is interconnected with the RF chip through the SIW vias, the back via, and the metal deposited on the back side of the substrate.

[0008] This invention proposes a back-side process for gallium nitride (GaN) HEMT substrates, in which SIW vias and back vias are etched on the back side, followed by metal deposition to form metal vias. The SIW vias enable the direct fabrication of substrate-integrated waveguide (SIW) filters on the GaN substrate. Furthermore, they facilitate the connection between the RF chip and the filter vias and the back vias, integrating the filter within the RF chip substrate. Simultaneously, the metal vias provide low-loss interconnection between the filter and the RF chip.

[0009] In a preferred embodiment, the width of the back hole is 20-50 μm and the length is 40-100 μm.

[0010] In one preferred embodiment, the SIW through holes are arranged in two rows, with the hole spacing S between each row being 5 to 10 μm and the diameter d being greater than S / 2.

[0011] In a preferred embodiment, the metal seed layer deposited on the SIW via and / or back via and / or substrate back side is Ti / Au, with the thickness of Ti being 20–100 nm, the thickness of Au being 100–500 nm, and the thickness of the gold plating being 5–10 μm.

[0012] As a preferred embodiment, the radio frequency chip is a gallium nitride HEMT radio frequency chip.

[0013] In a preferred embodiment, the radio frequency chip includes at least a substrate and a gallium nitride HEMT device thereon, wherein the source-drain ohmic contacts of the gallium nitride HEMT device are made of regenerated long, heavily doped N-type gallium nitride in contact with the gallium nitride channel layer in the substrate, and the T-type gate is formed using a photolithographic lift-off process to form the GaN HEMT source-drain electrodes.

[0014] Specifically, the source-drain ohmic contact metal is TiPtAu, with a total thickness of 0.10–0.5 μm.

[0015] In a preferred embodiment, the RF chip is connected to the CMOS chip and the antenna is fabricated on the front side by rewiring. The antenna can be integrated into a package, and the package material can be FR4 epoxy resin or LCP liquid crystal polymer.

[0016] The front side employs low-loss LCP packaging technology to integrate the patch antenna with the RF chip and SIW filter, and uses a redistribution layer to interconnect the CMOS chip and the gallium nitride RF chip. The LCP liquid crystal polymer packaging material has a high dielectric constant and a small loss tangent, which significantly reduces RF loss. The packaging layer includes an antenna ground layer, an antenna radiating layer, a feed network layer, and a redistribution layer. This approach effectively solves the transmission loss caused by traditional connection methods, reduces parasitic effects, and integrates two different functional chips on the same substrate, improving integration density and facilitating chip miniaturization.

[0017] Specifically, the front side of the RF chip is connected to the CMOS chip via a silicon adapter board using TSV.

[0018] The present invention also provides a method for fabricating the above-mentioned radio frequency integrated device, comprising the following steps:

[0019] SIW vias and back vias are etched on the substrate of the RF chip, respectively. A filter based on substrate integrated waveguide is fabricated using the SIW vias. Metal deposition is performed on the SIW vias, back vias, and the back side of the RF chip to interconnect the filter with the RF chip, thus obtaining the filter.

[0020] As a preferred embodiment, SF6 dry etching is used when the RF chip substrate is a Si-based substrate, and BCl3 or Cl2+N2 etching is used when the RF chip substrate is a GaN substrate.

[0021] Compared with the prior art, the beneficial effects of the present invention are as follows: it solves the transmission loss caused by the traditional connection method, reduces parasitic effects, and integrates two different functional chips on the same substrate, thereby improving the integration level and facilitating chip miniaturization; it uses metal vias on a gallium nitride substrate as substrate integrated waveguides, which combines the high quality factor of traditional rectangular waveguides with the advantages of easy integration of planar microstrip line structures. Attached Figure Description

[0022] Figure 1 This is the epitaxial structure of the gallium nitride HEMT device in Example 2;

[0023] Figure 2 This is a schematic diagram of the gallium nitride HEMT device in Example 2;

[0024] Figure 3 The power amplifier and low-frequency amplifier chip based on gallium nitride HEMT in Example 2;

[0025] Figure 4 This is a schematic diagram of the back hole structure of the RF chip substrate in Example 2;

[0026] Figure 5This is a schematic diagram of the SIW through-hole fabrication in Example 2;

[0027] Figure 6 This is a schematic diagram of the interconnection between the SIW filter and the RF chip in Example 2;

[0028] Figure 7 This is a schematic diagram of the redistribution layer in Example 2;

[0029] Figure 8 This is a schematic diagram of one of the integrated structures of the radio frequency chip, filter, and antenna in Example 2;

[0030] Figure 9 This is a schematic diagram of another integrated structure of the RF chip, filter, and antenna in Example 2. In the figure, 1 represents the epitaxial substrate, 2 represents the channel layer, 3 represents the barrier layer, and 4 represents the passivation layer. Detailed Implementation

[0031] The present invention will now be described in further detail with reference to specific embodiments, so that those skilled in the art can more clearly understand the present invention.

[0032] The following embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. All other embodiments obtained by those skilled in the art based on the specific embodiments of the invention without inventive effort are within the protection scope of the invention.

[0033] The abbreviations and key terms involved in this invention are defined as follows:

[0034] GaN, Gallium Nitrogen

[0035] HEMT (High Electron Mobility Transistors), CMOS (Complementary Metal Oxide Semiconductor), SIW (Substrate Integrated Waveguide)

[0036] RF IC: Radio Frequency Integrated Circuit

[0037] PA: power amplifier

[0038] LNA: Low-noise amplifier

[0039] FR4: Epoxy resin composite material

[0040] LCP: Liquid crystal polymer

[0041] Cap: Passivation layer

[0042] Example 1

[0043] This invention provides an RF integrated device, including at least a filter based on a substrate integrated waveguide located on a gallium nitride HEMT RF chip substrate. The substrate integrated waveguide is prepared by forming SIW vias on the RF chip substrate. A back via is also formed on the RF chip substrate. Metal is deposited in both the SIW vias and the back via. The filter is interconnected with the RF chip through the SIW vias, the back via, and the metal deposited on the back of the substrate.

[0044] The width of the back aperture is 20–50 μm, and the length is 40–100 μm. Two rows of SIW vias are arranged side-by-side, with a spacing S of 5–10 μm between each row and a diameter d > S / 2. The front side of the RF chip is connected to the CMOS chip and the antenna is fabricated using rewiring.

[0045] The core of this solution lies in using the substrate opening process of compound gallium nitride (GaN) HEMT devices to simultaneously create SIW vias and back vias on the substrate, and deposit metal. SIW filters are then fabricated inside the substrate using the SIW vias. The interconnection between the filters and the RF chip is achieved through the SIW vias and back vias. The antenna is in-chip packaged on the front side of the RF chip, and the antenna and filter are connected by rewiring. Finally, the RF chip, filter, and antenna are integrated into a single unit.

[0046] This RF integrated device uses SIW vias on the RF chip substrate as substrate integrated waveguides. This approach combines the high quality factor of traditional rectangular waveguides with the ease of integration of planar microstrip line structures. High-quality filters are integrated on the substrate using SIW, and the filters and RF chips are connected using SIW, resulting in low parasitic effects, low transmission loss, and high integration. The antenna is integrated on the front side of the RF chip using an on-chip packaging method, ultimately achieving integrated integration of the RF chip, filter, antenna, and CMOS chip.

[0047] Example 2

[0048] This invention provides a method for fabricating an integrated radio frequency (RF) device. The method involves creating metal vias on a gallium nitride (GaN) HEMT (High-Efficiency Metal-Integrated Telescope) substrate using a back-side aperture method. These vias are then used to fabricate substrate-integrated waveguides (SIWs). High-quality factor filters are fabricated on the GaN substrate using SIWs, which connect the filters and the GaN RF chip. An antenna is integrated on the front side using an on-chip packaging method, ultimately achieving integrated RF chip, filter, and antenna. The specific method is as follows:

[0049] S1, Fabrication of Gallium Nitride HEMT RF Chip:

[0050] (1) Fabrication of the epitaxial wafer: The epitaxial wafer consists of an epitaxial substrate 1, a channel layer 2, a barrier layer 3, and a passivation layer 4, as detailed in the following section. Figure 1 Among them, the epitaxial substrate 1 is high-resistivity silicon with a crystal orientation of [missing information]. <111> The epitaxial substrate has a resistivity greater than 3000 Ω·cm. The channel layer 2 is gallium nitride, and the barrier layer 3 can be AlxGaN (x = 0.2–0.7), InxGaN (x = 0.2–0.7), AlN, or ScAlN. The passivation layer 4 can be silicon nitride, silicon dioxide, or gallium nitride. In addition, the epitaxial substrate can also be gallium arsenide, indium phosphide, silicon-germanium, or silicon.

[0051] (2) Gallium nitride HEMT device: The source and drain ohmic contacts use regenerated long, heavily doped N-type gallium nitride and gallium nitride channel contacts. The source and drain ohmic contact metal is TiPtAu, with a total thickness of 0.10–0.5 μm. The T-type gate is formed using a photolithography lift-off process to form the GaN HEMT source and drain electrodes. The source and drain metal NiPtAu is evaporated by electron beam, with a total thickness of 0.4–0.8 μm and a gate length of 30–100 nm. For the structure of the gallium nitride HEMT device, see [link to relevant documentation]. Figure 2 .

[0052] (3) Gallium Nitride (GaN) RF Chip Fabrication: After fabricating the GaN HEMT device, other passive electrical components, including capacitors, resistors, inductors, and transmission lines, are fabricated in this process. These are ultimately used to fabricate the power amplifier (PA) and low-noise amplifier (LNA) RF chips. See details... Figure 3 The high-resistivity silicon substrate is reduced to a thickness of approximately 100 μm.

[0053] S2, SIW filter antenna fabrication and interconnection with gallium nitride RF chip

[0054] The gallium nitride (GaN) RF chip fabrication is complete. Through-hole metal structures are fabricated on the GaN substrate to achieve the SIW filter and its interconnection with the GaN RF chip. The specific method is as follows:

[0055] (1) Fabrication of GaN RF Chip Back Hole Connections: After fabricating the GaN RF chip, back holes are etched on the GaN substrate and metal is deposited for connection between the RF chip and the filter. Ni metal is used as the etching mask for the back holes. SF6 dry etching is used on the Si substrate, and BCl3, Cl2, or Cl2+N2 etching is used on the GaN substrate. Finally, HNO3 is used for post-etching cleaning and Ni metal mask removal. The hole size (W) for connecting the GaN RF chip is 20–50 μm wide and 40–100 μm long. Then, a Ti / Au seed layer is sputtered, with a Ti thickness of 20–100 nm and an Au thickness of 100–500 nm. Finally, gold is electroplated, with a gold thickness of 5–10 μm. See details [link to relevant documentation]. Figure 4 .

[0056] (2) SIW Metal Through-Hole Fabrication: During the fabrication of the back vias, through-holes for SIW fabrication are fabricated simultaneously. The etching process and metal deposition are the same as in the previous step. The structure of the SIW hole is as follows: Figure 5 As shown, the key parameters of SIW are the diameter d of the through hole and the hole spacing S, where S is 5 to 100 μm. In order to prevent electromagnetic wave lateral leakage, the hole spacing S is generally less than 2d, and the height h is 50 to 500 μm.

[0057] The filter type is generally a bandpass filter. The resonant frequency is adjusted by changing the aperture diameter, aperture spacing and number of apertures. Impedance matching and feeding are achieved on both sides through microstrip lines. Finally, the filter and gallium nitride RF chip are integrated on a silicon-based gallium nitride substrate.

[0058] (3) Metal deposition:

[0059] Backside metal deposition: First, surface oxides are removed by cleaning with O2 plasma and hydrochloric acid. Metallic Ni is used as a mask for etching the holes. Then, a seed layer of Ti / Au is sputtered, with Ti thickness ranging from 20 to 100 nm and Au thickness from 100 to 500 nm. Finally, gold is electroplated, with a gold thickness of 5 to 10 μm. (See [link to relevant documentation]). Figure 6 ;

[0060] Front-side metal deposition: First, surface oxides were removed by cleaning with O2 plasma and hydrochloric acid. The front-side metal and ohmic contact metal were prepared simultaneously. The front-side metal, TiPtAu, was evaporated using an electron beam, with a total thickness of 0.10–0.5 μm. (See also...) Figure 6 .

[0061] (4) Deposition of planar passivation layer: In order to protect and planarize the RF chip area, a passivation protective layer is deposited after the front metal deposition is completed. Passivation materials include silicon dioxide, silicon nitride, aluminum oxide, zirconium oxide, etc., with a thickness of 1 to 5 μm.

[0062] S3, Fabrication of the front antenna

[0063] After completing the gallium nitride (GaN) RF chip and SIW filter, the antenna is integrated on the front side of the GaN RF chip. The entire antenna includes a redistribution layer, a metal ground layer, and an antenna layer. Finally, the RF chip, SIW filter, antenna, and CMOS chip are integrated. The specific steps are as follows:

[0064] (1) Redundancy Layer and Connection to CMOS Chip: An antenna integrated packaging scheme is adopted, with FR4 epoxy resin or LCP liquid crystal polymer as the packaging material. The redundancy layer uses copper interconnects and its function is to connect the RF chip and the CMOS chip for baseband signal processing. A schematic diagram of the redundancy layer is shown below. Figure 7 .

[0065] (2) Antenna fabrication and connection to CMOS chip: After the redistribution layer is completed, the antenna layer and antenna are fabricated. The connection between the RF chip and the CMOS chip is carried out using the following two methods:

[0066] Option 1: The antenna fabrication and connection to the RF chip and CMOS chip are achieved using a rewiring method, with silicon dioxide or silicon nitride as the dielectric material. The antenna layer consists of two layers: a metal ground layer and the antenna layer. The metal ground layer serves as both the antenna signal reference layer and an electromagnetic signal isolation layer, isolating signals from below. After the feed point reaches the antenna layer, it transitions to a microstrip line. The two most important structural parameters of the patch antenna are the patch's length (Lant) and width (Want). The operating frequency of the antenna is adjusted by regulating the length and width. Finally, the gallium nitride RF chip, SIW filter, antenna, and CMOS chip are integrated. (See [link to relevant documentation]). Figure 8 .

[0067] Option 2: 3D through-silicon vias (TSVs) are etched on the silicon interposer board. On one hand, the antenna and RF chip are directly connected via the TSVs; on the other hand, the TSVs connect the gallium nitride RF chip to the CMOS chip. The CMOS chip is then connected via flip-chip solder balls, ultimately achieving integrated design of the RF chip, antenna, and CMOS chip. (See [link to relevant documentation]). Figure 9 .

[0068] It should be noted that the above embodiments are only for further elaboration and explanation of the technical solution of the present invention, and are not intended to further limit the technical solution of the present invention. The method of the present invention is only a preferred embodiment and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A radio frequency integrated device, characterized in that, The filter includes at least a substrate integrated waveguide-based filter located on a radio frequency (RF) chip substrate. The substrate integrated waveguide is fabricated by forming SIW vias on the RF chip substrate. A back via is also formed on the RF chip substrate. Metal is deposited in both the SIW vias and the back via. The filter is interconnected with the RF chip through the SIW vias, the back via, and the metal deposited on the back side of the substrate.

2. The radio frequency integrated device according to claim 1, characterized in that, The width of the back hole is 20~50μm and the length is 40~100μm; and / or two rows of SIW through holes are opened side by side, wherein the hole spacing S between each row is 5~10μm and the diameter d>S / 2.

3. The radio frequency integrated device according to claim 1, characterized in that, The SIW vias and / or back vias and / or the metal seed layer deposited on the back side of the substrate is Ti / Au, with a thickness of 20~100nm for Ti, a thickness of 100~500nm for Au, and a thickness of 5~10μm for the gold plating.

4. The radio frequency integrated device according to any one of claims 1 to 3, characterized in that, The radio frequency chip is a gallium nitride HEMT radio frequency chip.

5. The radio frequency integrated device according to claim 1, characterized in that, The radio frequency chip includes at least a substrate and a gallium nitride HEMT device located thereon. The source and drain ohmic contacts of the gallium nitride HEMT device are made by regenerating long, heavily doped N-type gallium nitride in contact with the gallium nitride channel layer in the substrate. The T-type gate is formed by photolithography lift-off process to form the GaN HEMT source and drain electrodes.

6. The radio frequency integrated device according to claim 5, characterized in that, The source-drain ohmic contact metal is TiPtAu, with a total thickness of 0.10~0.5μm.

7. The radio frequency integrated device according to claim 1, characterized in that, The RF chip is connected to the CMOS chip and antenna is fabricated on the front side through rewiring.

8. The radio frequency integrated device according to claim 7, characterized in that, The RF chip is connected to the CMOS chip via a silicon adapter board using TSV.

9. A method for manufacturing the radio frequency integrated device according to any one of claims 1 to 8, characterized in that, Includes the following steps: SIW vias and back vias are etched on the substrate of the RF chip, respectively. A filter based on substrate integrated waveguide is fabricated using the SIW vias. Metal deposition is performed on the SIW vias, back vias, and the back side of the RF chip to interconnect the filter with the RF chip, thus obtaining the filter.

10. The method for fabricating an integrated radio frequency chip device according to claim 9, characterized in that, When the RF chip substrate is a Si-based substrate, SF6 dry etching is used; when the RF chip substrate is a GaN substrate, BCl3 or Cl2+N2 etching is used.

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