A chip waveguide switching structure with low loss and high integration in the terahertz frequency band

Abstract

The present invention discloses a low-loss, highly integrated chip waveguide switching structure in the terahertz frequency band, including a horizontally placed SiGe transmitter chip and a stepped waveguide vertically connected to the SiGe transmitter chip; the SiGe transmitter chip includes an on-chip folded dipole antenna, a one-to-two power divider connecting the active circuit output pad of the SiGe transmitter and the on-chip folded dipole antenna, and a metal via connecting the on-chip folded dipole antenna and a strip patch; a local back-etched cavity in the Si medium below the on-chip folded dipole antenna, and a Japanese-shaped folded line ring below the one-to-two power divider; the stepped waveguide includes a rectangular waveguide and a WR4 standard waveguide interface above it. The structure of the present invention realizes the high gain and high radiation efficiency performance of the on-chip folded dipole antenna in the terahertz frequency band, and the stepped waveguide has a simple structure, good mechanical strength, and small assembly error, and can be directly integrated with the terahertz waveguide system.

Description

Technical Field

[0001] The present invention belongs to the technical field of antennas, and in particular relates to a chip waveguide switching structure with low loss and high integration in the terahertz frequency band. Background Art

[0002] Due to the rich spectrum resources of terahertz (THz) waves, the application of THz spectrum has been widely studied in an increasing number of fields, such as high-speed wireless communications, biomedical imaging, non-destructive evaluation and security. Advanced semiconductor technology has been successfully applied to the development of terahertz monolithic integrated circuits (TMICs), making these application scenarios feasible. However, one of the main challenges in realizing such THz systems is the lack of low-loss and highly integrated chip-waveguide transition structures to facilitate the transmission of signals from the chip to the waveguide to connect to external systems.

[0003] In order to reduce the chip-to-waveguide transition loss and increase the output power at the waveguide port, the design of end-fire antennas as chip-to-waveguide transition structures in the indium phosphide (InP) process has attracted widespread attention. Its characteristic is that the power level of the chip is radiated into the waveguide for transmission through the radiation field of the end-fire antenna parallel to the surface of the chip. However, the disadvantages of implementing TMICs in the InP process are high chip cost, high noise coefficient and low integration. In order to overcome the shortcomings of implementing TMICs in the InP process, silicon-based technologies, such as SiGe BiCMOS and SiGe HBT, provide a low-cost solution to realize highly integrated TMICs in the terahertz band. Due to the limitations of the SiGe process, the TMICs chip is surrounded by a metal guard ring, resulting in the electromagnetic field radiated by the end-fire antenna on the TMICs being reflected by the metal guard ring. Although the metal guard ring can be removed by post-processing processes, such as infrared lasers, this operation will destroy the physical stability of the TMICs, causing them to be easily broken and damaged. Therefore, traditional end-fire antennas, such as dipole antennas and Yagi antennas, cannot achieve waveguide switching parallel to the chip in the SiGe process. In order to avoid the metal guard ring affecting the on-chip antenna radiation performance of the SiGe process, on-chip edge-fire antennas with radiation directions perpendicular to the chip surface have been proposed, such as folded dipole antennas, patch antennas, and slot antennas. However, due to the large loss of the Si substrate in the SiGe BiCMOS process, traditional on-chip antennas of this type usually face the problems of low gain and radiation efficiency. The low resistivity of Si (50Ω-cm) causes most of the radio frequency (RF) power to be absorbed by the Si substrate and cannot be radiated from the antenna. In addition, the high dielectric constant (ε r=11.9) excites the high-order surface wave mode of the Si substrate, resulting in further deterioration of the antenna performance. The low gain and low radiation efficiency of the on-chip antenna will further increase the chip-to-waveguide transition loss. Although a large-aperture lens can be added outside the chip to increase the gain of the on-chip antenna, this method is not conducive to the integration of the terahertz system and greatly limits its scope of application. In order to overcome the above shortcomings, local back-etching technology is applied to the SiGe process. By etching an air cavity in the Si substrate directly below the antenna, the loss of the Si substrate to the transmission line is effectively suppressed, and the surface wave of the Si substrate is also suppressed, thereby enhancing the radiation performance of the on-chip antenna. However, the on-chip antenna currently reported using the local back-etching technology of the SiGe process has a relatively small bandwidth and low gain. More importantly, the loss of the chip waveguide transition currently reported is large and the integration is low. In summary, the development of a chip waveguide transition structure with low loss and high integration has become a problem that needs to be solved urgently, especially the development of a chip waveguide transition in the terahertz band with rich spectrum resources is particularly urgent. The present invention is formally proposed to address these key issues. Summary of the invention

[0004] Technical problem: The purpose of the present invention is to provide a low-loss and highly integrated chip-waveguide switching structure in the terahertz frequency band, reduce the loss of chip-to-waveguide switching, and achieve low-loss and highly integrated chip-waveguide switching performance to solve the above-mentioned technical problems.

[0005] Technical solution: To solve the above technical problems, the present invention provides a low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band as follows:

[0006] The invention comprises: a horizontally placed SiGe transmitter chip, a stepped waveguide vertically connected to the SiGe transmitter chip, a PCB feeding network dielectric substrate surrounding the SiGe transmitter chip, and a metal base horizontally placed below the PCB feeding network dielectric substrate; the stepped waveguide 2 comprises a rectangular waveguide 2.1 and a WR4 standard waveguide interface 2.2 above the rectangular waveguide, and the outer conductor of the stepped waveguide 2 is connected to the metal base 4; the PCB feeding network dielectric substrate 3 is connected to the on-chip pad 10 of the SiGe transmitter chip 1 through a gold wire bonding line 9, and the PCB feeding network dielectric substrate 3 is connected to the metal base 4.

[0007] Furthermore, the SiGe transmitter chip includes a horizontally placed SiO2 medium, a 2 The Si dielectric is placed horizontally below the dielectric and the metal guard ring wraps the SiGe transmitter chip.

[0008] Furthermore, SiO 2The medium contains seven layers of metal and metal vias placed horizontally. The first layer of metal includes an on-chip folded dipole antenna, a one-to-two power divider connecting the on-chip folded dipole antenna and an active circuit output pad, a metal via connecting the on-chip folded dipole antenna, and a first layer of open folded line ring surrounding the on-chip folded dipole antenna.

[0009] Furthermore, the second layer of metal located below the first layer of metal includes a second layer of open folded line rings and metal vias for connecting the folded dipole antenna on the sheet; the third layer of metal located below the second layer of metal includes a third layer of open folded line rings and metal vias for connecting the folded dipole antenna on the sheet; the fourth layer of metal located below the third layer of metal includes a fourth layer of open folded line rings and metal vias for connecting the folded dipole antenna on the sheet; the fifth layer of metal located below the fourth layer of metal includes a fifth layer of open folded line rings and metal vias for connecting the folded dipole antenna on the sheet; the sixth layer of metal located below the fifth layer of metal includes a sixth layer of open folded line rings and metal vias for connecting the folded dipole antenna on the sheet; the seventh layer of metal located below the sixth layer of metal includes a Japanese-shaped folded line ring and metal vias for connecting the folded dipole antenna on the sheet and the strip patch.

[0010] Furthermore, the Si medium located below the opening area of ​​the zigzag-shaped fold line ring includes a local back-etching cavity.

[0011] Furthermore, the SiO2 dielectric of the SiGe transmitter chip has a dielectric constant of 4.1 and a thickness of 15 μm, and the Si dielectric has a dielectric constant of 11.9 and a thickness of 300 μm.

[0012] Furthermore, the PCB feeding network dielectric substrate is RogersRO4350B, with a dielectric constant of 3.48 and a thickness of 0.355 mm.

[0013] Beneficial effects: The low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band of the present invention has the following advantages:

[0014] 1. The present invention discloses a low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band. The switching structure consists of an on-chip folded dipole antenna and an off-chip stepped waveguide. On the one hand, a local back-etched air cavity is introduced into the Si substrate directly below the antenna, which reduces the loss of the Si substrate to the transmission line while ensuring the stability of the chip's physical structure, and also suppresses the surface wave of the Si substrate, thereby improving the gain and radiation efficiency of the on-chip antenna, and the two folded dipole units connected by a one-to-two power divider further enhance the gain of the on-chip antenna and reduce the loss of the chip-to-waveguide switching; on the other hand, the off-chip stepped waveguide can completely cover the on-chip antenna directly above the chip, supporting TE in the stepped waveguide. 10The electromagnetic wave of the mode transmits the signal to the WR4 standard waveguide interface, thus achieving low-loss and highly integrated chip waveguide switching performance;

[0015] 2. The distance between the on-chip folded dipole antenna and the metal reflective floor is about a quarter wavelength, which enables the antenna's forward radiation electric field and the metal reflective floor's reflected electric field to be superimposed in phase in the normal radiation direction, further improving the antenna's gain;

[0016] 3. The arm length of the on-chip folded dipole antenna is slightly longer than half a wavelength, which increases the radiation impedance of the antenna and achieves 50Ω impedance matching with the active circuit output port of the SiGe transmitter, further improving the radiation efficiency of the antenna;

[0017] 4. The WR4 standard waveguide interface of the chip waveguide transfer structure can be directly connected to external devices or systems. Compared with the traditional large-aperture lens or dielectric block covering the on-chip antenna, the present invention not only avoids the high loss and environmental impact caused by air interface propagation, but also achieves high integration, high mechanical strength and low assembly difficulty, greatly broadening its application scenarios;

[0018] 5. The stepped waveguide structure is simple, which not only greatly reduces the complexity of mechanical processing, but also achieves low cost and supports industrial large-scale mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic structural diagram of a chip waveguide switching structure with low loss and high integration in the terahertz frequency band according to an embodiment of the present invention;

[0020] Figure 2 This is a layer distribution diagram of SiGe transmitter chips according to an embodiment of the present invention;

[0021] Figure 3 A top view of the first metal layer of the SiGe transmitter chip of an embodiment of the present invention;

[0022] Figure 4 A top view of the second metal layer of the SiGe transmitter chip according to an embodiment of the present invention;

[0023] Figure 5 A top view of the third metal layer of the SiGe transmitter chip of an embodiment of the present invention;

[0024] Figure 6 A top view of the fourth metal layer of the SiGe transmitter chip of an embodiment of the present invention;

[0025] Figure 7 A top view of the fifth metal layer of the SiGe transmitter chip according to an embodiment of the present invention;

[0026] Figure 8A top view of the sixth metal layer of the SiGe transmitter chip according to an embodiment of the present invention;

[0027] Fig. 9 A top view of the seventh metal layer of the SiGe transmitter chip according to an embodiment of the present invention;

[0028] Fig.10 A side view of the Si medium of the SiGe transmitter chip of an embodiment of the present invention;

[0029] Fig.11 The E-plane and H-plane radiation patterns of the on-chip folded dipole antenna at a frequency of 220 GHz according to an embodiment of the present invention;

[0030] Fig.12 The gain and radiation efficiency of the on-chip folded dipole antenna in the 190-270 GHz frequency band of the embodiment of the present invention;

[0031] Fig.13 The effect of the center distance dx between two units of the on-chip folded dipole antenna according to an embodiment of the present invention on the reflection coefficient;

[0032] Fig.14 The effect of the arm length dy of the on-chip folded dipole antenna on the reflection coefficient of the embodiment of the present invention;

[0033] Fig.15 Comparison of reflection coefficient and switching loss of chip waveguide switching structure with / without partial backside etching cavity in the embodiment of the present invention;

[0034] Fig.16 It is a chip-to-waveguide transition loss test and assembly error simulation verification of an embodiment of the present invention;

[0035] The figure includes: SiGe transmitter chip 1, stepped waveguide 2, WR4 standard waveguide interface 2.1, PCB feed network dielectric substrate 3, metal base 4, SiO2 dielectric 5, first layer of metal 5.1, on-chip folded dipole antenna 5.2, one-to-two power divider 5.3, first layer of open folded line ring 5.4, active circuit output pad 5.5, second layer of metal 5.6, second layer of metal open folded line ring 5.7, third layer of metal 5.8, third layer of metal open folded line ring 5.9, fourth layer metal 5.10, fourth layer metal open zigzag ring 5.11, fifth layer metal 5.12, fifth layer metal open zigzag ring 5.13, sixth layer metal 5.14, sixth layer metal open zigzag ring 5.15, seventh layer metal 5.16, Japanese-shaped zigzag ring 5.17, strip patch 5.18, opening area 5.19, Si dielectric 6, local back-etched cavity 6.1, metal protection ring 7, metal via 8, gold bonding wire 9, on-chip pad 10. DETAILED DESCRIPTION

[0036] In order to better understand the purpose, structure and function of the present invention, a low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band of the present invention is further described in detail below in conjunction with the accompanying drawings.

[0037] Figure 1 The figure shows a three-dimensional structural schematic diagram of a low-loss and highly integrated chip-waveguide switching structure in the terahertz frequency band, comprising: a horizontally placed SiGe transmitter chip 1, a stepped waveguide 2 vertically connected to the SiGe transmitter chip 1, a PCB feeding network dielectric substrate 3 surrounding the SiGe transmitter chip 1, and a metal base 4 horizontally placed below the PCB feeding network dielectric substrate 3; the stepped waveguide 2 comprises a rectangular waveguide 2.1 and a WR4 standard waveguide interface 2.2 above it, and the outer conductor of the stepped waveguide 2 is connected to the metal base 4; the PCB feeding network dielectric substrate 3 is connected to the on-chip pad 10 of the SiGe transmitter chip 1 through a gold wire bonding wire 9, and the PCB feeding network dielectric substrate 3 is connected to the metal base 4.

[0038] Figure 2 The figure shows the layer distribution diagram of the SiGe transmitter chip 1 of this embodiment, including SiO 2 Medium 5 and SiO 2 Si dielectric 6 below dielectric 5, SiO 2 The medium 5 includes seven layers of metal.

[0039] Figure 3 The figure shows a top view of the first metal layer 5.1 of the SiGe transmitter chip 1 of the present embodiment, including an on-chip folded dipole antenna 5.2, a one-to-two power divider 5.3 connecting the on-chip folded dipole antenna 5.2 and the active circuit output pad 5.5, a first-layer open folded line ring 5.4, a metal protection ring 7, and a metal via 8 connecting the on-chip folded dipole antenna 5.2; the spacing between two on-chip folded dipole units is represented by dx, and the arm length of the on-chip folded dipole unit is represented by dy.

[0040] Figure 4 The figure shows a top view of the second metal layer 5.6 of the SiGe transmitter chip 1 of this embodiment, including a second layer of open fold line ring 5.7, a metal protection ring 7, and a metal via 8 for connecting the folded dipole antenna 5.2 on the chip.

[0041] Figure 5 The figure shows a top view of the third metal layer 5.8 of the SiGe transmitter chip 1 of this embodiment, including a third layer open fold line ring 5.9, a metal protection ring 7, and a metal via 8 for connecting the folded dipole antenna 5.2 on the chip.

[0042] Figure 6The figure shows a top view of the fourth metal layer 5.10 of the SiGe transmitter chip 1 of this embodiment, including a fourth open fold line ring 5.11, a metal protection ring 7, and a metal via 8 for connecting the folded dipole antenna 5.2 on the chip.

[0043] Figure 7 The figure shows a top view of the fifth metal layer 5.12 of the SiGe transmitter chip 1 of this embodiment, including the fifth open fold line ring 5.13, the metal protection ring 7, and the metal via 8 of the folded dipole antenna 5.2 on the connection chip.

[0044] Figure 8 The figure shows a top view of the sixth metal layer 5.14 of the SiGe transmitter chip 1 of this embodiment, including the sixth open fold line ring 5.15, the metal protection ring 7, and the metal via 8 of the folded dipole antenna 5.2 on the connection chip.

[0045] Fig. 9 The figure shows a top view of the seventh metal layer 5.16 of the SiGe transmitter chip 1 of this embodiment, including a Japanese-shaped zigzag ring 5.17, a metal via 8 connecting the on-chip folded dipole antenna 5.2 and the strip patch 5.18, an opening area 5.19, and a metal protection ring 7.

[0046] Fig.10 The figure shows a side view of the Si medium 6 of the SiGe transmitter chip 1 of the present embodiment, including a local backside etching cavity 6.1.

[0047] The present invention is different from the traditional end-fire antenna form. Instead, it adopts a side-fire antenna form composed of a folded dipole antenna and a one-to-two power divider. The introduction of the double folded dipole unit improves the gain of the antenna. By further introducing a local back-etched cavity in the Si substrate directly below the folded dipole antenna, the loss of the Si substrate to the transmission line is reduced, and the surface wave of the Si substrate is also suppressed, thereby improving the gain and radiation efficiency of the on-chip antenna; in addition, the off-chip stepped waveguide completely covers the on-chip folded dipole antenna, supporting TE in the stepped waveguide. 10 The electromagnetic wave of the module transmits the signal emitted by the chip to the WR4 standard waveguide interface, ultimately realizing the low-loss and high-integration transfer characteristics from chip to waveguide.

[0048] The distance between the on-chip folded dipole antenna of the present invention and the metal reflective floor is approximately one-quarter wavelength, which enables the antenna's forward radiation electric field and the reflected electric field of the metal reflective floor to be superimposed in phase in the normal radiation direction, further improving the antenna's gain.

[0049] In order to improve the radiation efficiency of the antenna, the arm length of the on-chip folded dipole antenna is slightly longer than half the wavelength, increasing the radiation impedance of the antenna to achieve 50Ω impedance matching with the active circuit output port of the SiGe transmitter.

[0050] In order to improve the integration of the system, compared with the traditional large-aperture lens or dielectric block covering the on-chip antenna, the stepped waveguide of the chip waveguide switching structure has a WR4 standard waveguide interface on top, which can be directly connected to external devices or systems. It not only avoids the high loss and environmental impact caused by air interface transmission, but also achieves high integration, high mechanical strength and low assembly difficulty, greatly broadening its application scenarios.

[0051] In order to reduce the difficulty of mechanical processing, the stepped waveguide structure is simple, which achieves low cost and supports industrial large-scale mass production.

[0052] Fig.11 The figure shows the comparison of the E-plane and H-plane radiation patterns of the on-chip folded dipole antenna of this embodiment with and without the local back-etched cavity at 220 GHz. It can be seen from the figure that after the introduction of the local back-etched cavity, the gain of the antenna in the θ=0° direction on the E-plane and H-plane is increased by 27 dB, the range of the E-plane gain greater than 0 dBi is ±45°, and the range of the H-plane gain greater than 0 dBi is ±42°.

[0053] Fig.12 The figure shows the gain and radiation efficiency comparison of the on-chip folded dipole antenna of this embodiment with / without the local back-etched cavity in the 190-270 GHz frequency band. As can be seen from the figure, after the introduction of the local back-etched cavity, the folded dipole antenna of the present invention reaches a gain peak of 7.6 dBi at 229 GHz, and its 1-dB gain bandwidth range is 208-245 GHz, and the gain is improved by at least 16 dB; the radiation efficiency peak is 58% at 228 GHz, and the radiation efficiency is improved by 22% to 55%.

[0054] Fig.13 The figure shows the effect of the distance dx between the two antenna units on the reflection coefficient of the folded dipole antenna of this embodiment in the 190-270 GHz frequency band. As can be seen from the figure, the high-frequency resonance point of the reflection coefficient of the folded dipole antenna is mainly determined by the distance dx between the two antenna units. As the distance dx increases, the high-frequency resonance point tends to shift toward a lower frequency.

[0055] Fig.14 The figure shows the effect of the antenna arm length dy on the reflection coefficient of the folded dipole antenna of this embodiment in the 190-270 GHz band. As can be seen from the figure, the low-frequency resonance point of the reflection coefficient of the folded dipole antenna is mainly determined by the antenna arm length dy. As the antenna arm length dy increases, the low-frequency resonance point shows a trend of shifting toward a lower frequency.

[0056] Fig.15The figure shows the comparison of the reflection coefficient and transfer loss of the chip-waveguide transfer structure with / without the partial back-etched cavity of this embodiment. It can be seen from the figure that when the reflection coefficient is less than -10dB, the reflection coefficient band with / without the partial back-etched cavity is 190-250GHz; after the introduction of the partial back-etched cavity, the chip-to-waveguide transfer loss is increased from less than -20dB to more than -5dB in the 189-245GHz band.

[0057] Fig.16 The figure shows the chip-to-waveguide transition loss test and assembly error simulation verification of this embodiment. As can be seen from the figure, the chip-to-waveguide transition structure of the present invention is measured to obtain a transition loss of -3.6 to -4.2 dB in the 210 to 240 GHz frequency band, which is 0.8 dB lower than the simulation result, which is mainly caused by assembly error and test error.

[0058] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0059] The terms "including", "having", "introducing" and any variations thereof in the embodiments of the present application are intended to cover non-exclusive inclusions. For example, a process, method, device, product or equipment including a series of steps or modules is not limited to the listed steps or modules, but may optionally include steps or modules not listed, or may optionally include other steps or modules inherent to these processes, methods, products or equipment.

[0060] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

Claims

1. A low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band, characterized in that: The chip-waveguide switching structure comprises a horizontally placed SiGe transmitter chip (1), a stepped waveguide (2) located directly above the SiGe transmitter chip (1) and vertically connected thereto, a PCB feed network dielectric substrate (3) surrounding the SiGe transmitter chip (1), and a metal base (4) located horizontally below the PCB feed network dielectric substrate (3); the SiGe transmitter chip (1) comprises a horizontally placed SiO2 dielectric (5), a horizontally placed Si dielectric (6) located below the SiO2 dielectric (5), and a metal protection ring (7) wrapping the SiGe transmitter chip (1); The SiO2 medium (5) contains seven layers of metal and metal vias (8) arranged horizontally, wherein the first layer of metal (5.1) includes an on-chip folded dipole antenna (5.2), a one-to-two power divider (5.3), a first layer of open folded line ring (5.4) surrounding the on-chip folded dipole antenna (5.2), and an active circuit output pad (5.5); the second layer of metal (5.6) located below the first layer of metal (5.1) includes a second layer of open folded line ring (5.7); the third layer of metal (5.8) located below the second layer of metal (5.6) includes a third layer of open folded line ring (5.9); and the fourth layer of metal (5.8) located below the third layer of metal (5.8) includes a third layer of open folded line ring (5.10). The layer metal (5.10) includes a fourth layer of open fold line ring (5.11), the fifth layer metal (5.12) located below the fourth layer metal (5.10) includes a fifth layer of open fold line ring (5.13), the sixth layer metal (5.14) located below the fifth layer metal (5.12) includes a sixth layer of open fold line ring (5.15), and the seventh layer metal (5.16) located below the sixth layer metal (5.14) includes a Chinese-Japanese-shaped fold line ring (5.17) and a strip patch (5.18); the Si medium (6) located below the opening area (5.19) of the Chinese-Japanese-shaped fold line ring (5.17) includes a local back-etched cavity (6.1).

2. According to claim 1, a terahertz frequency band low-loss and highly integrated chip waveguide switching structure is characterized in that: In the first metal layer (5.1), a main circuit of the one-to-two power distributor (5.3) is connected to the active circuit output pad (5.5), two branches of the one-to-two power distributor (5.3) are connected to the starting end of the on-chip folded dipole antenna (5.2), the end of the on-chip folded dipole antenna (5.2) is connected to the strip patch (5.18) located on the seventh metal layer (5.16) through a metal via (8), and the strip patch located on the seventh metal layer (5.16) is connected to the Japanese-shaped folded line ring (5.17) located on the seventh metal layer (5.16).

3. The low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band according to claim 1, characterized in that: The stepped waveguide (2) comprises a rectangular waveguide (2.1) and a WR4 standard waveguide interface (2.2) above the rectangular waveguide; the outer conductor of the stepped waveguide (2) is connected to a metal base (4).

4. The low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band according to claim 1, characterized in that: The PCB feeding network dielectric substrate (3) is connected to the on-chip pad (10) of the SiGe transmitter chip (1) via a gold wire bonding line (9).

5. The low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band according to claim 1, characterized in that: The dielectric constant of the SiO2 medium (5) is 4.1 and the thickness is 15 μm, and the dielectric constant of the Si medium (6) is 11.9 and the thickness is 300 μm.

6. The low-loss and highly integrated chip waveguide switching structure in the terahertz frequency band according to claim 1, characterized in that: The PCB feeding network dielectric substrate (3) is Rogers RO4350B, with a dielectric constant of 3.48 and a thickness of 0.355 mm.

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