A Modulation Method for Leakage Current of Cascaded H-Bridge Inverters
By introducing intermediate modules into the cascaded H-bridge inverter of odd-number cascade modules and combining modules, the problem of leakage current suppression under odd-number cascade modules is solved, and the leakage current is effectively reduced.
Patent Information
- Application Number
- CN202310288351.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-22
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2043-03-22
AI Technical Summary
The prior art is difficult to effectively suppress the leakage current of the inverter under an odd cascade module.
By introducing the odd modules to the intermediate module of the H-bridge in the power device switch or loop, it outputs half of the DC-side voltage during the free-current stage, and combines all modules into a module in pairs with the intermediate module as symmetric points, so that the common mode voltage and constant DC-side voltage, differential mode voltage and constant 0 in the module are output to the even level.
It effectively suppresses the parasitic capacitance voltage and high-frequency components, significantly reducing leakage current.
Smart Images
Figure CN116191913B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of H-bridge modulation, and in particular to a modulation method for leakage current of a cascaded H-bridge inverter. Background Art
[0002] With the continuous advancement of my country's new power system with new energy as the main body, new energy represented by photovoltaic and wind power has ushered in a new wave of development. Photovoltaic directly connected to the grid through a non-isolated grid-connected inverter has the advantages of small weight and volume and high efficiency, but due to the common ground loop between the photovoltaic panel and the grid, there is leakage current between the ground. Leakage current will cause electromagnetic radiation and interference to the equipment, increase system harmonics and traction network losses, and seriously endanger the safety of equipment and personnel.
[0003] By establishing a leakage current model for cascaded H-bridge inverters, it is known that the parasitic capacitor voltage and is the excitation source of the system leakage current. However, when the number of excitation modules is an odd number, the differential mode voltage coefficient of the middle module is 0, so it is impossible to achieve smooth switching of the inverter output voltage and constant parasitic capacitor voltage and simply through modulation. In 2014, the IEEE Transactions on Power Electronics published a research result titled "Analysis and Suppression of Leakage Current in Cascaded-Multilevel-Inverter-Based PV Systems", which suppresses leakage current by adding common-mode inductance on the DC side and the AC side. However, this method requires adding too much hardware, which increases the size and weight of the equipment. In 2016, the IEEE Transactions on Industrial Electronics journal published a paper titled "Hardware-Based Cascaded Topology and Modulation Strategy With Leakage Current Reduction for Transformer-less PV Systems", which achieved leakage current suppression for odd-numbered modules through hardware + modulation. However, this method requires adding a switch tube, a diode, and an inductor for each additional module, and the passive parameters must be kept equal, which is very difficult in actual engineering.
[0004] In summary, it is difficult to effectively suppress leakage current under odd-number cascade modules in the existing technology. Summary of the invention
[0005] In view of the above-mentioned deficiencies in the prior art, a method for modulating leakage current of a cascaded H-bridge inverter provided by the present invention solves the problem that it is difficult to effectively suppress leakage current under odd-numbered cascaded modules in the prior art.
[0006] To achieve the above-mentioned invention objective, the technical solution adopted by the present invention is as follows:
[0007] Provide a modulation method for the leakage current of a cascaded H-bridge inverter, which includes the following steps:
[0008] S1. Introduce a power device switch or circuit into the middle module of the odd-module cascaded H-bridge to make it output a circuit with half of the DC-side voltage during the freewheeling stage;
[0009] S2. Combine all modules into a module in pairs with the middle module as the symmetry point, so that the sum of the common-mode voltages in a module is constantly the DC-side voltage, the sum of the differential-mode voltages is constantly 0, and the output of the module is an even level;
[0010] S3. Obtain the switching functions of each module by coordinating the output levels of each module and the middle module;
[0011] S4. Compare the modulation wave with the triangular carrier wave stacked in the same direction to obtain a preprocessing signal, and obtain the PWM drive signal after the preprocessing signal is operated by the switching function;
[0012] S5. Drive the module with the PWM drive signal to complete the modulation of the leakage current of the odd-module cascaded H-bridge inverter.
[0013] Further, the odd-module cascaded H-bridge is composed of n cascaded modules, n = 2k + 1, k is an integer greater than 0; each module includes an A arm and a B arm; the midpoint of the A arm of the first module is connected to one end of the inductor L 1 The other end of the inductor L 1 is connected to the power grid; the midpoint of the B arm of the nth module is connected to one end of the inductor L 2 The other end of the inductor L 2 is connected to the power grid; the midpoint of the B arm of the ith module is connected to the midpoint of the A arm of the (i + 1)th module; the DC-side voltages of each module are equal;
[0014] The switching state of the ith module satisfies:
[0015]
[0016] Where S Ai and S Bi respectively represent the switching function of the A arm and the switching function of the B arm of the ith module. When S Ai / S Bi = 1, it means that the upper transistor is turned on and the lower transistor is turned off. When S Ai / S Bi = 0, it means that the upper transistor is turned off and the lower transistor is turned on; U dc is the DC-side voltage of the module; U AiNi and U BiNirespectively represent the output voltage of the A-branch and the output voltage of the B-branch of the i-th module;
[0017] The common-mode voltage U of the i-th module cmi and the differential-mode voltage U dmi are:
[0018]
[0019] Furthermore, the specific method of step S1 is:
[0020] Introduce a power device switch or circuit between the midpoint outputs of the A-branch and the B-branch of the ((n + 1) / 2)-th module, so that the midpoint outputs of the A-branch and the B-branch of the ((n + 1) / 2)-th module are both 0.5U dc during the freewheeling stage; make the A-branch output U dc and the B-branch output 0 during the positive half-cycle charging of the ((n + 1) / 2)-th module, and make the B-branch output U dc and the A-branch output 0 during the negative half-cycle charging, that is, the output levels of the middle module are +U dc , -U dc and 0 in sequence.
[0021] Furthermore, the power device switch or circuit includes an oH5 circuit and a Heric circuit.
[0022] Furthermore, the Heric circuit includes two switch tubes S5 and S6 connected in reverse; the middle module switch function has 4 groups: ① 101000, ② 010100, ③ 000010, ④ 000001, which output voltages of +Udc, -Udc, 0, 0 respectively; where the 1st - 2nd bits of the switch function are the upper and lower switch functions of the A-branch of the middle module, the 3rd - 4th bits are the upper and lower switch functions of the B-branch of the middle module, and the 5th and 6th bits are the switch functions of switch tubes S5 and S6 respectively.
[0023] Furthermore, the specific method of step S3 is:
[0024] When the output level needs to be an even multiple of the DC-side voltage, make each module output +2U dc or -2U dc and the middle module output 0 level;
[0025] When the output level needs to be an odd multiple of the DC-side voltage, make the module output +2U dc or -2U dc and the middle module output +U dc or -U dc ;
[0026] When the output level needs to be 0 level, make both the module and the middle module output 0 level;
[0027] Among them, for the module composed of the i-th module and the (n + 1 - i)-th module, its switching function has 4 groups: ① 1010, ② 0101, ③ 0011, ④ 1100; the first two digits of each group of switching functions are the switching function of the i-th module, and the last two digits are the switching function of the (n + 1 - i)-th module; the output levels of the four groups of switching functions are +2U dc , -2U dc , 0, 0.
[0028] Furthermore, the specific method of step S4 is as follows:
[0029] Perform absolute value operation on the modulation wave and send it and the in-phase stacked triangular carrier wave into the positive and negative ports of the comparator respectively. Take the output signal of the comparator as the preprocessing signal, and obtain the PWM drive signal after performing switching function operation on the preprocessing signal.
[0030] The beneficial effects of the present invention are: compared with the traditional modulation, this method can effectively suppress the parasitic capacitance voltage and high-frequency components, and significantly reduce the leakage current. Description of the Drawings
[0031] Figure 1 is the flow schematic diagram of this method;
[0032] Figure 2 is the modulation topology schematic diagram in the embodiment;
[0033] Figure 3 is Figure 2 the simplified equivalent model of;
[0034] Figure 4 is the simplified equivalent model for common-mode and differential-mode separation;
[0035] Figure 5 is the working mode diagram of the Heric circuit;
[0036] Figure 6 is the working mode diagram of the oH5 circuit;
[0037] Figure 7 is the modulation schematic diagram of the improved intermediate module based on the Heric circuit and the driving waveforms of each bridge arm;
[0038] Figure 8 is the parasitic capacitance voltage and leakage current waveforms under traditional PD-PWM modulation;
[0039] Figure 9 are the parasitic capacitance voltage and leakage current waveforms under this method. Detailed Embodiments
[0040] The specific embodiments of the present invention will be described below to facilitate those skilled in the art to understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions made using the concept of the present invention are within the scope of protection.
[0041] As Figure 1 shown, the modulation method of the leakage current of the cascaded H-bridge inverter includes the following steps:
[0042] S1. Introduce a power device switch or circuit into the middle module of the odd-module cascaded H-bridge to make it output a circuit with half of the DC-side voltage during the freewheeling stage;
[0043] S2. Combine all modules in pairs with the middle module as the symmetry point to form a module group, so that the sum of the common-mode voltages in a module group is always the DC-side voltage, the sum of the differential-mode voltages is always 0, and the output of the module group is an even level;
[0044] S3. Obtain the switching functions of each module by coordinating the output levels of each module group and the middle module;
[0045] S4. Compare the modulation wave with the triangular carrier wave stacked in the same direction to obtain a preprocessing signal, and obtain the PWM drive signal after the preprocessing signal is operated by the switching function;
[0046] S5. Drive the module with the PWM drive signal to complete the modulation of the leakage current of the odd-module cascaded H-bridge inverter.
[0047] The odd-module cascaded H-bridge is composed of n cascaded modules, n = 2k + 1, where k is an integer greater than 0; each module includes an A arm and a B arm; the midpoint of the A arm of the first module is connected to one end of the inductor L 1 The other end of the inductor L 1 is connected to the power grid; the midpoint of the B arm of the nth module is connected to one end of the inductor L 2 The other end of the inductor L 2 is connected to the power grid; the midpoint of the B arm of the ith module is connected to the midpoint of the A arm of the (i + 1)th module; the DC-side voltages of all modules are equal;
[0048] The switching state of the ith module satisfies:
[0049]
[0050] Where S Ai and S Bi respectively represent the switching function of the A arm and the switching function of the B arm of the ith module. When S Ai / S BiWhen S = 1, it means the upper transistor is turned on and the lower transistor is turned off. When S Ai / S Bi = 0, it means the upper transistor is turned off and the lower transistor is turned on; U dc is the DC-side voltage of the module; U AiNi and U BiNi respectively represent the output voltage of the A arm and the output voltage of the B arm of the i-th module;
[0051] The common-mode voltage U cmi and the differential-mode voltage U dmi of the i-th module are:
[0052]
[0053] The specific method of step S1 is as follows: Introduce a power device switch or loop between the midpoint outputs of the A arm and the B arm of the ((n + 1) / 2)-th module, so that the midpoint outputs of the A arm and the B arm of the ((n + 1) / 2)-th module are both 0.5U dc during the freewheeling stage; make the output of the A arm of the ((n + 1) / 2)-th module be U dc and the output of the B arm be 0 during the positive half-cycle charging, and make the output of the B arm be U dc and the output of the A arm be 0 during the negative half-cycle charging, that is, the output levels of the middle module are +U dc , -U dc , 0 in sequence.
[0054] The power device switch or loop includes the oH5 circuit and the Heric circuit. The Heric circuit includes two switch transistors S5 and S6 connected in reverse. At this time, the switching function of the middle module has 4 groups: ① 101000, ② 010100, ③ 000010, ④ 000001, and the output voltages are +Udc, -Udc, 0, 0 respectively; where the 1-2 bits of the switching function are the upper and lower switching functions of the A arm of the middle module, the 3-4 bits are the upper and lower switching functions of the B arm of the middle module, and the 5th and 6th bits are the switching functions of switch transistors S5 and S6 respectively.
[0055] The specific method of step S3 is as follows:
[0056] When the output level needs to be an even multiple of the DC-side voltage, make each module output +2U dc or -2U dc , and the middle module outputs 0 level;
[0057] When the output level needs to be an odd multiple of the DC-side voltage, make the module output +2U dc or -2U dc , and the middle module outputs +U dc or -U dc ;
[0058] When the output level needs to be 0, both the module and the intermediate module output 0 level.
[0059] Among them, for the module composed of the i-th module and the (n + 1 - i)-th module, its switching function has 4 groups: ① 1010, ② 0101, ③ 0011, ④ 1100; the first two digits of each group of switching functions are the switching function of the i-th module, and the last two digits are the switching function of the (n + 1 - i)-th module; the output levels of the four groups of switching functions are +2U dc , -2U dc , 0, 0.
[0060] The specific method of step S4 is: perform absolute value operation on the modulation wave and send it to the positive and negative ports of the comparator respectively with the in-phase stacked triangular carrier wave, use the output signal of the comparator as the preprocessing signal, and obtain the PWM drive signal after operating the preprocessing signal through the switching function.
[0061] In an embodiment of the present invention, as Figure 2 and Figure 3 shown, the DC sides of the cascaded H-bridge inverters are respectively connected to the photovoltaic modules, and the DC outputs U dc1 =... = U dcn = U dc , and the photovoltaic parasitic capacitances C PV1 =... = C PVn = C PV .
[0062] The leakage current excitation source of the odd-module cascaded H-bridge inverter is the sum of the parasitic capacitance voltages:
[0063]
[0064] As can be seen from the above formula, the fundamental way to suppress the leakage current is to reduce the high-frequency components of the sum of the parasitic capacitance voltages. Attached Figure 4 is the simplified equivalent model of the cascaded H-bridge common-mode and differential-mode separation. According to the attached Figure 4 topology, the expression for calculating the sum of the parasitic capacitance voltages is:
[0065]
[0066] Ignoring the low-frequency power grid components in the above formula and keeping the differential-mode voltages at symmetric positions the same can make the differential-mode excitation 0. Therefore, only by ensuring that the common-mode excitation is constant can the high-frequency components of the sum of the parasitic capacitance voltages be eliminated.
[0067] Figure 5 is the working mode diagram of the Heric circuit, where the output of mode Ⅰ is +U dc , the output of mode Ⅱ is -U dc , the outputs of mode Ⅲ and mode Ⅳ are 0, and the common-mode voltage is always +0.5U during mode switching dc. Figure 6 The figure shows the working mode diagram of the oH5 circuit, where Figure 6 (a) Output is +U dc , Figure 6 (b) The output is 0, Figure 6 (c) The output is -U dc , Figure 6 (d) The output is 0, and the common mode voltage is always +0.5U during each mode switching process dc .
[0068] The modulation diagram of the intermediate module based on the Heric circuit and the driving waveforms of each bridge arm are as follows: Figure 7 As shown, by coordinating the modules and the intermediate modules, the smooth switching of the output voltage can be achieved while ensuring the parasitic capacitance voltage is constant. dc Each module outputs +2U dc or -2U dc , the middle module outputs 0 level; when the output level is an odd multiple of U dc Each module outputs +2U dc or -2U dc , intermediate module output +U dc or -U dc ; When the output level is 0 level, both the module and the intermediate module output 0 level. Considering that the switch combination that satisfies smooth switching in the case of multi-module cascade is not unique, there are multiple sets of switch functions, but as long as they meet this method, leakage current modulation can be achieved.
[0069] In order to verify the effectiveness of this method, a simulation model was built and the simulation parameters U dc =30V, U grid_m =80V, n=3, switching frequency f s =10kHz, grid-connected current I m =5A, single module parasitic capacitance C PV =50nF, inductance L 1 =L 2 =L=2mH. In order to verify the advancedness of the proposed topology, a carrier-stacked pulse width modulation (PD-PWM) simulation is also built for comparison.
[0070] Figure 8 The figure shows the PD-PWM simulation results. Analysis shows that the parasitic capacitor voltage and total harmonic distortion (THD) are 21.3%, and the leakage current is 18mArms. Figure 9 This is the simulation result of the modulation method proposed in the present invention. The analysis results show that the parasitic capacitance voltage and THD are 0.993%, and the leakage current is 1.6 mArms.
[0071] In summary, compared with traditional modulation, the proposed method can effectively suppress the parasitic capacitance voltage and high-frequency components, and significantly reduce the leakage current.
Claims
1. A modulation method for the leakage current of a cascaded H-bridge inverter, characterized in that, it includes the following steps: S1. Introduce a power device switch or circuit into the middle module of the odd-module cascaded H-bridge to make it output a circuit with half of the DC-side voltage during the freewheeling stage; S2. Combine all modules into a module in pairs with the middle module as the symmetry point, so that the sum of the common-mode voltages in a module is constantly the DC-side voltage, the sum of the differential-mode voltages is constantly 0, and the output of the module is an even level; S3. Obtain the switching functions of each module by coordinating the output levels of each module and the middle module; S4. Compare the modulation wave with the in-phase stacked triangular carrier wave to obtain a preprocessing signal, and obtain the PWM driving signal after the preprocessing signal is operated by the switching function; S5. Drive the module with the PWM driving signal to complete the modulation of the leakage current of the odd-module cascaded H-bridge inverter; The odd-module cascaded H-bridge consists of n cascaded modules, n = 2 k + 1, k where is an integer greater than 0; each module includes an A-arm and a B-arm; the midpoint of the A-arm of the first module is connected to one end of the inductor L 1 , and the other end of the inductor L 1 is connected to the power grid; the midpoint of the B-arm of the n th module is connected to one end of the inductor L 2 , and the other end of the inductor L 2 is connected to the power grid; the midpoint of the B-arm of the i th module is connected to the midpoint of the A-arm of the i + 1th module; the DC-side voltages of all modules are equal; The i module switch states satisfy: Among them and respectively represent the switching functions of the A-branch and B-branch of the i th module. When , it means the upper switch is on and the lower switch is off. When , it means the upper switch is off and the lower switch is on; is the DC-side voltage of the module; and respectively represent the output voltages of the A-branch and B-branch of the i th module; The i common-mode voltage of the first module and the differential-mode voltage are as follows: ； The specific method of step S1 is: Introduce a power device switch or circuit between the midpoint outputs of the A-bridge arm and the B-bridge arm of the ( n +1) / 2-th module, so that the midpoint outputs of the A-bridge arm and the B-bridge arm of the ( n +1) / 2-th module are both 0.5 during the freewheeling stage ; make the output of the A-bridge arm of the ( n +1) / 2-th module be and the output of the B-bridge arm be 0 during the positive half-cycle charging, and the output of the B-bridge arm be and the output of the A-bridge arm be 0 during the negative half-cycle charging, that is, the output levels of the intermediate modules are + U dc 、- U dc 、0 in sequence.
2. The modulation method for the leakage current of a cascaded H-bridge inverter according to claim 1, characterized in that, the power device switch or circuit includes an oH5 circuit and a Heric circuit.
3. The modulation method for the leakage current of a cascaded H-bridge inverter according to claim 2, characterized in that, the Heric circuit includes two switch tubes S5 and S6 connected in reverse; there are 4 groups of switching functions for the middle module: ① 101000, ② 010100, ③ 000010, ④ 000001, and the output voltages are +Udc, -Udc, 0, 0 respectively; where the 1st-2nd bits of the switching function are the upper and lower switching functions of the A arm of the middle module, the 3rd-4th bits are the upper and lower switching functions of the B arm of the middle module, and the 5th and 6th bits are the switching functions of switch tubes S5 and S6 respectively.
4. The modulation method for the leakage current of a cascaded H-bridge inverter according to claim 1, characterized in that, the specific method of step S3 is: When the output level needs to be an even multiple of the DC-side voltage, make each module output +2U dc or -2U dc , and the intermediate module outputs a 0 level; When the output level needs to be an odd multiple of the DC-side voltage, make the module output +2U dc or -2U dc , and the intermediate module outputs +U dc or -U dc ; when the output level needs to be 0 level, make both the module and the middle module output 0 level; Among them, for the module composed of the i th module and the n +1- i th module, its switching functions are four groups: ① 1010, ② 0101, ③ 0011, ④ 1100; the first two digits of each group of switching functions are the switching functions of the i th module, and the last two digits are the switching functions of the n +1- i th module; four groups The output levels of the switching function are +2U in sequence dc 、 -2U dc 、 0, 0.
5. The modulation method for the leakage current of a cascaded H-bridge inverter according to claim 4, characterized in that, the specific method of step S4 is: Perform an absolute value operation on the modulation wave and send it to the positive and negative ports of the comparator respectively with the in-phase stacked triangular carrier wave, use the output signal of the comparator as the preprocessing signal, and obtain the PWM driving signal after the preprocessing signal is operated by the switching function.