Laser side mode suppression ratio control

Abstract

Laser side mode suppression ratio (SMSR) control is provided via a logic controller configured to measure the SMSR of a carrier upstream of a modulator and to measure the average optical power (AOP) of the carrier downstream of the modulator; to transmit a bias voltage based on the SMSR and the AOP to a laser driver for a laser generating the carrier; and to transmit an attenuation level based on the SMSR and the AOP to a variable optical attenuator (VOA) upstream of the modulator. In various embodiments, the attenuation level and the bias voltage can be raised or lowered together, or one can be raised and one can be lowered, to ensure that the output optical signal meets specified SMSR and AOP values.

Description

TECHNICAL FIELD

[0001] Embodiments presented in this disclosure relate generally to optical devices. More specifically, embodiments disclosed herein relate to control and configuration of lasers. BACKGROUND

[0002] In an ideal single-wavelength laser, all power is contained in a main peak centered at the operating wavelength of the laser. In practice, however, a portion of the laser’s power is contained in other wavelengths. Side Mode Suppression Ratio (SMSR) is a measure of the amount of power in the main mode of a waveform versus the next highest amplitude peak (also referred to as a side mode) presented in that waveform. Keeping the side modes suppressed relative to the main mode can be important to avoid crosstalk or drift between several optical signals carried on a shared transmission medium (e.g., different carriers having different wavelengths and multiplexed together according to a wavelength division multiplexing pattern).

[0003] Generally, for lasers presenting higher SMSR values, and thus providing more idealized performance in terms of power containment, manufacturers employ tighter manufacturing tolerances during manufacturing. However, these tight tolerances can result in low production volumes for optical devices, as not all manufacturers are able to meet such manufacturing tolerances, and those that are able to meet the manufacturing tolerances often produce the desired optical devices with a substantial yield loss (e.g., due to some products not meeting the manufacturing tolerances being produced) or with a higher field failure rate. BRIEF DESCRIPTION OF DRAWINGS

[0004] In order that the above-recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, can be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate typical embodiments and are therefore not to be considered limiting of its scope, as myriad other equally effective embodiments can be made.

[0005] Figure 1 A benchtop laser subassembly is shown in accordance with embodiments of the present disclosure.

[0006] Figure 2 A benchtop laser subassembly is shown in accordance with embodiments of the present disclosure.

[0007] Figure 3 A laser micro-packaged mounting arrangement is shown in accordance with embodiments of the present disclosure.

[0008] Figure 4A And Figure 4B is a schematic layout of an optoelectronic system with controllable SMSR in accordance with embodiments of the present disclosure.

[0009] Figure 5 is a flowchart of a method for laser SMSR control according to an embodiment of the disclosure.

[0010] Figure 6 Hardware of a computing device according to an embodiment of the disclosure is shown.

[0011] For ease of understanding, the same reference numbers will be used in different drawings to designate the same elements shared by the drawings. It is contemplated that elements disclosed in one embodiment can be advantageously used in other embodiments without specific recitation. DETAILED DESCRIPTION

[0012] SUMMARY

[0013] One embodiment presented in the disclosure provides a system comprising: a laser; a photodiode; a side mode suppression ratio (SMSR) sensor optically connected to the laser; a variable optical attenuator (VOA) optically connected to the laser; an optical modulator having an input side connected to the VOA and an output side connected to the photodiode; and a logic controller electrically connected to the laser, the photodiode, the SMSR sensor, and the VOA, the logic controller configured to adjust a bias of the laser and an attenuation level of the VOA based on an SMSR target, an SMSR reading from the SMSR sensor, and an optical power reading from the photodiode.

[0014] One embodiment presented in the disclosure provides a method comprising: generating a carrier wave by a laser; measuring a side mode suppression ratio (SMSR) of the carrier wave; measuring an average optical power of the carrier wave; and adjusting at least one of a driving voltage or current of the laser and an attenuation level of the carrier wave to maintain the average optical power of the carrier wave and to increase the SMSR.

[0015] One embodiment presented in the disclosure provides a logic controller comprising: a processor; and a memory comprising instructions that, when executed by the processor, perform operations comprising: measuring a side mode suppression ratio (SMSR) of a carrier wave; measuring an average optical power (AOP) of the carrier wave; transmitting a bias voltage based on the SMSR and the AOP to a laser driver of a laser used to generate the carrier wave; and transmitting an attenuation level based on the SMSR and the AOP to a variable optical attenuator (VOA).

[0016] Example Embodiments

[0017] The present disclosure provides laser SMSR control in optoelectronic circuits through an on-chip side mode suppression ratio (SMSR) sensor and a variable optical attenuator (VOA) to monitor and control the spectral quality of a laser while it is operating, thereby increasing the useful range of lasers that can operate while presenting a high SMSR, and thus meeting the intended specifications of the transmitter. To facilitate this, the SMSR sensor provides a signal to a controller that can both change the laser bias and be used to adjust the attenuation level of the VOA and modify the SMSR of the laser while the module remains operating within a specified average optical power (AOP) set for the output, which is measured in a monitor photodiode (PD). Thus, a wider range of materials can be used to fabricate high performance lasers because greater flexibility is provided to identify and correct spectral defects in the operating optical module.

[0018] The present disclosure provides control of the SMSR in lasers coupled to photonic chips in various arrangements. Figures 1 to 3 Some non-limiting examples of various coupling arrangements for lasers to optical components are shown, to which the present disclosure can be applied with these coupling arrangements.

[0019] Figure 1 A benchtop laser subassembly 100 is shown in accordance with embodiments of the present disclosure. A laser 110 comprising an active gain medium (including quantum dots, quantum wells, quantum wires, and / or bulk material) surrounded by various claddings of III-V materials is connected to first and second mounting platforms 120a and 120b (platforms 120) by various epoxy or bonding techniques. The mounting platforms 120a, 120b include electrical contacts to provide a bias voltage on the laser 110 (e.g., from a laser driver (not shown)) to cause the laser 110 to generate an optical signal of a given intensity / amplitude. In various embodiments, the first and second platforms 120a and 120b can define a channel 121 between one another to improve optical or thermal conditioning of the attached laser 110.

[0020] The mounting platforms 120a, 120b are in turn connected to or fabricated as part of a first surface 131 of a platform 130. The platforms 120 can be fabricated from silicon, aluminum nitride (AIN), or other materials, and provide a physical structure that various other components can be incorporated into the optoelectronic system. In various embodiments, the platforms 120 can include various connection features 132 for lenses, waveguides, or other components to be attached to the platform 130 and aligned with respect to the attached laser 110.

[0021] Figure 2A cantilevered laser subassembly 200 is shown in accordance with embodiments of the present disclosure. In various embodiments, a laser 210 is mounted to a submount 220 that is bonded to a photonic chip 230 to form the cantilevered laser subassembly 200. In various embodiments, a first surface 221 of the submount 220 (e.g., a bottom surface of the submount 220) is connected to a first surface 231 of the photonic chip 230 (e.g., a top surface of the photonic chip 230) and a first surface 211 of the laser 210 by various epoxies, solders, or positive interlocks (not shown). A second surface 222 of the submount 220 (e.g., a top surface of the submount 220) remains free, or can be connected to one or more electrical integrated circuits to provide power to the laser 210, monitor characteristics of the optical signal imparted by the laser 210, and so on.

[0022] The submount 220 aligns the laser 210 with input waveguides in the photonic chip 230 so that an output surface 212 of the laser 210 is positioned relative to one or more couplers 240 (e.g., edge couplers) that extend to an input surface 232 of the photonic chip 230. In various embodiments, the couplers 240 include pin couplers that accept optical signals from abutting couplings of the laser 210 and the photonic chip 230 and convey the optical signals to one or more internal waveguides of the photonic chip 230. The abutting coupling arrangement can also be referred to as a direct coupling arrangement or a butt coupling arrangement.

[0023] Figure 3 A laser micro package (LaMP) mounting arrangement 300 is shown in accordance with embodiments of the present disclosure. In various embodiments, a laser 310 is mounted with a lens 320 and an optical isolator 330 (e.g., a Faraday rotator or a polarization rotator) within a cavity 341 defined by a cap 340 and a platform 350. In various embodiments, the laser 310, the lens 320, the optical isolator 330, and the cap 340 are secured to the platform 350 by various epoxies, solders, or positive interlocks (not shown).

[0024] The laser 310 generates a light beam 360 that travels from the laser 310 through the lens 320 and the optical isolator 330, and is reflected from a mirror 342 defined on an inner surface of the cap 340 and into the platform 350. In various embodiments, the platform 350 can be made of a light-transmissive material, or can include a waveguide (not shown) into which the light beam 360 is reflected from the mirror 342. In various embodiments, the mirror 342 is a fixed surface that has a fixed angle of reflection into the material of the platform 350 (and any waveguide defined therein), and the platform 350 includes a second adjustable mirror (not shown) to selectively allow some portions of the light beam 360 to further enter the platform 350.

[0025] Figure 4A and Figure 4B is a schematic layout of an optoelectronic system with controllable SMSR according to embodiments of the present disclosure. In Figure 4A and Figure 4B each, the laser driver 405 controls a laser output carrier wave that is monitored (and modulated to carry a data signal) in a shared photonic chip (e.g., a first layout 455a in Figure 4A and a second layout 455b in Figure 4B ). In various embodiments, the photonic chip is a silicon-based platform that includes various elements fabricated therein and waveguides between the elements. The photonic chip receives light from the laser / chip coupler 415 and outputs the light via an output path 440 (e.g., to an optical cable, to a secondary photonic element, through an air gap, etc.).

[0026] As used herein, components in a photonic chip that are closer to a laser source (e.g., the laser diode 410 of Figure 4A or the hybrid laser 470 of Figure 4B may be referred to as being “upstream” relative to components in the optical path that are further from the laser source. Similarly, components in the photonic chip that are closer to the output path 440 can be referred to as being “downstream” relative to components in the optical path that are further from the output path 440. Additionally, an arrangement in which a first element is described as being upstream or downstream relative to a second element can include one or more additional elements (and associated waveguides) between the first element and the second element, or can describe a direct connection or coupling between the first element and the second element.

[0027] Figure 4A In the first layout 455a, the laser is a laser diode 410 that is provided on a chip or platform that is separate from the first layout 455a of the photonic chip, which can be provided by, for example, the laser subassembly described with respect to Figure 1 and Figure 2 In various embodiments, the laser diode 410 is a direct feedback (DFB) laser that can include various lasers composed of III-V materials. The laser driver 405 provides a drive voltage (or current) on the laser diode 410 based on a bias selected by the logic controller 450, which is adjusted based on the SMSR and AOP measured from the carrier wave in the photonic chip to ensure that the generated carrier wave exhibits an SMSR and AOP within a predetermined range for the optoelectronic system.

[0028] Figure 4BThe laser in the photonic chip is a hybrid laser 470, which is partially disposed in the second layout 455b of the photonic chip and partially disposed outside of the photonic chip, which can be provided by a laser micro-package as described with respect to Figure 3 The laser driver 405 provides a drive voltage / current on the gain material 460, which generates a light beam that is reflected from a first mirror 465a (e.g., a reflective surface coating of the cap) and into a portion of the photonic chip that acts as a laser / chip coupler 415. The drive voltage / current is based on a bias selected by the logic controller 450, which is adjusted based on the SMSR and AOP measured from the carrier wave in the photonic chip to ensure that the generated carrier wave exhibits an SMSR and AOP within a predetermined range of the optoelectronic system. Additionally, the logic controller 450 is connected to a controllable or adjustable second mirror 465b of the hybrid laser 470 that is defined within the photonic chip to selectively allow a portion of the generated light to enter the photonic chip or to be selectively reflected back to the gain material 460.

[0029] The first tap 420a (e.g., an optical tap) in the photonic chip receives the carrier wave in an unmodulated state (e.g., that does not include a data signal thereon) and splits the carrier wave into two portions: a first portion that the first tap 420a provides to the SMSR sensor 425 and a second portion that the first tap 420a provides to the VOA 430. In various embodiments, the first tap 420a provides a lower percentage of the original signal power of the carrier wave to the first portion than to the second portion. For example, the first portion can carry between approximately 0.1% to 10% (or any value therebetween) of the carrier wave power, while the second portion carries the remainder. In various embodiments, the first portion that the first tap 420a provides to the SMSR sensor 425 can be referred to as a tapped portion of the carrier wave in the unmodulated state.

[0030] The SMSR sensor 425 receives the first portion of the carrier wave from the first tap 420a. The SMSR sensor 425 monitors the power peaks (e.g., modes) in the carrier wave and provides an electrical signal to the logic controller 450 representing the SMSR in the carrier wave. In various embodiments, the logic controller 450 processes the SMSR level as a digital signal, and the SMSR sensor 425 is associated with an analog-to-digital converter to convert analog SMSR readings to digital readings, while in other embodiments the logic controller 450 includes an analog-to-digital converter or uses analog readings of the SMSR from the SMSR sensor 425. Various types of SMSR sensors are contemplated to have different physical designs suitable for the wavelength of the optical carrier, fabrication processes for making a shared photonics chip, and tolerances specified for the opto-electronic system. For example, an opto-electronic system with a higher SMSR specification can include a more precise SMSR sensor 425 than an opto-electronic system with a lower SMSR specification, or an opto-electronic system with a wider operating temperature range can include a SMSR sensor 425 that is less sensitive to temperature variations than an opto-electronic system with a narrower operating temperature range.

[0031] The VOA 430 receives the second portion of the carrier wave from the first tap 420a and receives an electrical control signal from the logic controller 450. In various embodiments, the VOA 430 is one of a step attenuator or a continuously variable attenuator that reduces the power level of the carrier wave based on an attenuation level provided from the logic controller 450. In various embodiments, the attenuation level in the VOA 430 is set to an initial calibration invariant that is fixed to the value of the initial calibration. In other embodiments, the attenuation level is continuously adjusted (or left open to continuously adjust on a periodic basis) during operation to account for different environmental and operational stresses on the opto-electronic system and / or degradation of elements in the opto-electronic system over time.

[0032] While not shown, various delay elements can be deployed on the respective waveguides between the SMSR sensor 425 and the VOA 430 sharing the first tap 420a to synchronize or otherwise align the phase of the carrier wave measured by the SMSR sensor 425 and attenuated by the VOA 430. These delay elements can account for different routing lengths from the first tap 420a to the respective SMSR sensor 425 and VOA 430 and / or any delays caused by intermediate optical or opto-electronic elements disposed between the first tap 420a and the SMSR sensor 425 or the VOA 430.

[0033] An optical modulator 435 is downstream of the VOA 430 and receives the attenuated carrier wave from the VOA 430 on the input side. In various embodiments, the optical modulator 435 is a Mach-Zehnder modulator, but in other embodiments can be any type of modulator capable of encoding a data signal onto a carrier wave. It will be appreciated that the optical modulator 435 includes various electrical control elements to encode the data signal onto the carrier wave, which are not shown in Figure 4A and Figure 4B The optical modulator outputs the carrier wave (carrying the provided data signal modulated thereon) to the second tap 420b on the output side.

[0034] The second tap 420b in the photonic chip receives the modulated optical wave (e.g., a carrier wave with a data signal included thereon, if provided) and splits the modulated optical wave into two portions: a third portion that the second tap 420b provides to a photodiode 445 or other light detector, and a fourth portion that the second tap 420b provides to an output path 440. In various embodiments, the second tap 420b provides a lower percentage of the average modulated signal power of the modulated optical wave to the third portion than to the fourth portion. For example, the third portion can carry between approximately 0.1% to 10% (or any value therebetween) of the power of the modulated optical wave, while the fourth portion carries the remainder. In various embodiments, the third portion that the second tap 420b provides to the photodiode 445 can be referred to as a tapped portion of the carrier wave in the modulated state.

[0035] The photodiode 445 receives the third portion of the modulated optical wave (e.g., the modulated carrier wave) and converts the optical signal to an electrical signal representing the optical signal. The photodiode 445 measures the average optical power (AOP) of the modulated optical wave and reports the AOP to a logic controller 450. In various embodiments, the logic controller 450 processes the SMSR level as a digital signal, and the photodiode 445 is associated with an analog-to-digital converter to convert an analog reading of the AOP to a digital reading, while in other embodiments the logic controller 450 includes an analog-to-digital converter or uses an analog reading of the optical power from the photodiode 445 to develop an understanding of the AOP.

[0036] Although not shown, various delay elements can be deployed on individual waveguides between the second tap 420b shared by the photodiode 445 and the output path 440 to synchronize or otherwise align the phase of the modulated optical wave measured by the photodiode 445 and output by the output path 440 from the photonic chip. These delay elements can account for different routing lengths from the second tap 420b to the respective photodiode 445 and output path 440, and / or any delays caused by intermediate optical or optoelectronic elements disposed between the second tap 420b and the photodiode 445 or output path 440.

[0037] The logic controller 450 receives electrical signals representing the SMSR and AOP from the SMSR sensor 425 and photodiode 445, respectively, and outputs electrical signals to the laser driver 405 to control the bias / drive voltage or current in the laser and the attenuation level in the VOA 430. The logic controller 450 can include a microprocessor, system-on-a-chip, or another computing device (such as the computing device described in more detail below) to receive and process the input signals to generate appropriate output signals. In various embodiments, the logic controller 450 includes logic regarding how to determine appropriate constituent components of the output signals based on various specifications. These specifications can provide a range of AOP for the modulated carrier presented at the output path 440 and a range of SMSR for the unmodulated carrier. Accordingly, the logic controller 450 provides a bias level and attenuation level to maintain the optical power according to a predetermined output power range while providing a predetermined SMSR range. Figure 6 The logic controller 450 receives electrical signals representing the SMSR and AOP from the SMSR sensor 425 and photodiode 445, respectively, and outputs electrical signals to the laser driver 405 to control the bias / drive voltage or current in the laser and the attenuation level in the VOA 430. The logic controller 450 can include a microprocessor, system-on-a-chip, or another computing device (such as the computing device described in more detail below) to receive and process the input signals to generate appropriate output signals. In various embodiments, the logic controller 450 includes logic regarding how to determine appropriate constituent components of the output signals based on various specifications. These specifications can provide a range of AOP for the modulated carrier presented at the output path 440 and a range of SMSR for the unmodulated carrier. Accordingly, the logic controller 450 provides a bias level and attenuation level to maintain the optical power according to a predetermined output power range while providing a predetermined SMSR range.

[0038] Figure 5 is a flowchart of a method 500 for laser SMSR control according to embodiments of the present disclosure. The method 500 begins at block 510, where the laser driver 405 induces the laser to generate a carrier wave (e.g., a continuous wave (CW)). The carrier wave is transmitted into the shared photonic chip, where various optoelectronic elements measure characteristics of the carrier wave and modify the optical signal for use by various downstream devices.

[0039] At block 520, the SMSR sensor 425 measures the SMSR of the carrier wave. The SMSR sensor 425 is located upstream of any optical modulator 435 used to encode data signals onto the carrier wave in the shared photonic chip. Thus, the SMSR sensor 425 measures the SMSR of the carrier wave in an unmodulated state, and reports the measured SMSR of the optical carrier as an electrical signal to the logic controller 450.

[0040] At block 530, the VOA 430 attenuates the carrier based on an attenuation level specified by the logic controller 450 (adjusted according to block 580). The VOA 430 is upstream of any optical modulator 435 in the shared photonics chip used to encode a data signal onto the carrier. Thus, the VOA 430 reduces the intensity of the carrier in the unmodulated state.

[0041] In various embodiments, block 520 and block 530 are performed substantially in parallel on different waveguides (e.g., splitting or tapping one input waveguide into two waveguides, each carrying one version of the carrier), such that the portion of the carrier used for the SMSR measurement and the portion of the carrier that is attenuated are in phase with each other.

[0042] At block 540, after the SMSR of the carrier is measured (according to block 520) and attenuated (according to block 530), the optical modulator 435 modulates a data signal onto the carrier. In various embodiments, the data signal is modulated onto the carrier to produce a modulated optical wave. In various embodiments, the optical modulator 435 can use various hardware to encode the data signal onto the carrier.

[0043] At block 550, after the data signal is encoded onto the carrier (according to block 540), the photodiode 445 measures the average optical power (AOP) in the modulated optical wave. Because the values included in the data signal can change the power of the carrier when encoded onto the carrier, the photodiode 445 measures the AOP of the modulated optical wave, which can smooth out any amplitude differences caused by the encoded binary values of the data signal. Thus, the photodiode 445 measures the AOP of the modulated optical wave to report the optical power of the modulated optical wave as an electrical signal to the logic controller 450.

[0044] At block 560, the modulated optical wave is output from the shared photonics chip via the output path 440. In various embodiments, block 550 and block 560 are performed substantially in parallel on different waveguides (e.g., splitting or tapping one input waveguide into two waveguides, each carrying one version of the modulated optical wave), such that the portion of the modulated optical wave used for the AOP measurement and the portion of the modulated optical wave that is output from the photonics chip are in phase with each other.

[0045] The logic controller 450 performs block 570 and block 580 substantially in parallel to adjust at least one of the drive voltage or current of the laser that generates the carrier (according to block 510) and the VOA 430 that attenuates the carrier (according to block 530).

[0046] At block 570, the logic controller 450 adjusts the bias in the laser by setting the drive voltage or current of the laser driver 405 associated with the laser. In some embodiments, the adjustment of the bias is based on the SMSR reading and a specified SMSR range for the optoelectronic system. For example, when the SMSR sensor 425 indicates to the logic controller 450 that the SMSR in the carrier wave is below a threshold, the logic controller 450 adjusts the bias to increase the drive voltage or current provided to the laser by the laser driver 405. As a result, the laser produces an optical signal with a higher peak or fundamental mode amplitude and a higher SMSR (e.g., to overcome material issues in manufacturing that reduce the SMSR below a specified value). In further embodiments, the adjustment of the bias is based on the AOP reading and the level of attenuation, such that when the SMSR is above a threshold and one or more of the AOP reading or the level of attenuation is above a threshold, the bias voltage is decreased (e.g., to conserve power or to maintain a constant output power of the optical signal).

[0047] At block 580, the logic controller 450 adjusts the level of attenuation in the VOA 430. In some embodiments, the adjustment of the level of attenuation is based on the AOP reading and a specified AOP range for the optoelectronic system. For example, when the photodiode 445 indicates to the logic controller 450 that the AOP of the carrier wave is below a threshold, the logic controller 450 adjusts the attenuation to decrease the amount by which the VOA 430 attenuates the optical signal, thereby allowing the carrier wave downstream of the VOA 430 to have a greater optical power for a given input optical power. In another example, when the photodiode 445 indicates to the logic controller 450 that the AOP of the modulated optical wave is above a threshold, the logic controller 450 adjusts the attenuation to increase the amount by which the VOA 430 attenuates the optical signal, thereby allowing the carrier wave downstream of the VOA 430 to have a lower optical power for a given input optical power. In further embodiments, the adjustment of the level of attenuation is based on the SMSR reading and the bias, such that when the AOP is above a threshold and one or more of the SMSR reading or the bias is above a threshold, the level of attenuation is decreased (e.g., to conserve power or to maintain a constant output power of the optical signal).

[0048] The adjustments made at each of block 570 and block 580 can inform the adjustments made in the other of block 570 or block 580, such that the logic controller 450 maintains the output signal within the specified ranges of both the SMSR and the AOP. For example, in response to the logic controller 450 increasing the bias in the laser, the logic controller 450 can also increase the attenuation level in the VOA 430 (which compensates for the increase in input power) to maintain the output power of the optical signal. Similarly, in response to the logic controller 450 decreasing the bias in the laser, the logic controller 450 can also decrease the attenuation level in the VOA 430 (which compensates for the decrease in input power) to maintain the output power of the optical signal. In further examples, in response to the logic controller 450 increasing the attenuation level in the VOA 430, the logic controller 450 can also increase the bias in the laser to compensate for higher optical attenuation in the photonic chip in producing the output power within the specified range. Similarly, in response to the logic controller 450 decreasing the attenuation level in the VOA 430, the logic controller 450 can also decrease the bias in the laser to compensate for lower optical attenuation in the photonic chip in producing the output power within the specified range.

[0049] In various embodiments, the logic controller 450 can monitor and adjust the bias and the attenuation level continuously, periodically, or only initially (e.g., during initial calibration). By continuously or periodically monitoring and adjusting the bias in the laser and the attenuation in the VOA 430, the logic controller 450 can account for different environmental and operational stresses on the optoelectronic system and / or degradation of elements in the optoelectronic system over time. By only initially monitoring and adjusting the bias in the laser and the attenuation in the VOA 430, the optoelectronic system can account for initial manufacturing variances, but can save power compared to continuously or periodically monitoring / adjusting embodiments.

[0050] Figure 6 Hardware of a computing device 600 is shown, which can be used in the logic controller 450 in various embodiments. The computing device 600 includes a processor 610, a memory 620, and a communication interface 630. The processor 610 can be any processing element capable of performing the functions described herein. The processor 610 represents a single processor, multiple processors, processors with multiple cores, and combinations thereof. The communication interface 630 facilitates communication between the computing device 600 and other devices. The communication interface 630 is representative of wireless communication antennas and various wired communication ports, including output and input pins to a microcontroller. The memory 620 can be volatile or non-volatile memory and can include RAM, flash memory, cache, disk drives, and other computer-readable memory storage devices. While shown as a single entity, the memory 620 can be divided into different memory storage elements, such as RAM and one or more hard drives.

[0051] As shown, memory 620 includes various instructions that are executable by processor 610 to provide an operating system 621 for managing various functions of computing device 600, and one or more sets of logic 622 for providing various functionality to a user of computing device 600, including one or more of the functionality and features described in this disclosure. When provided as part of an opto-electronic system, memory 620 (and / or logic 622) can include various operational ranges of the SMSR and AOP within which the opto-electronic system is permitted to operate, as well as the relationship between the SMSR and AOP, such that computing device 600 can collectively manage and balance the requirements of the SMSR and AOP.

[0052] In this disclosure, reference is made to various embodiments. However, the scope of the present disclosure is not limited to the specifically described embodiments. Rather, any combination of described features and elements, whether related to different embodiments or not, is contemplated to implement and practice contemplated embodiments. Furthermore, when an embodiment is described as comprising at least one of A and B, it will be understood that the embodiment can include A alone, B alone, or both A and B. Moreover, although some embodiments disclosed herein can implement advantages over other possible solutions or prior art, whether a particular advantage is implemented by a given embodiment does not limit the scope of the present disclosure. Thus, aspects, features, embodiments, and advantages of the disclosure disclosed herein are merely illustrative and are not to be considered elements or limitations of the appended claims, unless explicitly recited in a claim(s). Likewise, reference to “the invention” should not be interpreted as a generalization of any inventive subject matter disclosed herein and should not be considered an element or limitation of the appended claims, unless explicitly recited in a claim(s).

[0053] As those skilled in the art will appreciate, the embodiments described herein can be embodied as a system, method, or computer program product. Accordingly, the embodiments can be in the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, microcode, etc.) or an embodiment combining software and hardware aspects that can all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, embodiments can take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.

[0054] Program code embodied on a computer readable medium can be transmitted using any appropriate medium, including but not limited to wireless, wired, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0055] Computer program code for carrying out operations of embodiments of the present disclosure can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0056] The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0057] These computer program instructions can also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function / act specified in the flowchart and / or block diagram block or blocks.

[0058] The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0059] The flowchart illustrations and block diagrams in the drawings are of possible implementations of systems, methods, and computer program products according to various embodiments. In this regard, each block in the flowchart illustrations and block diagrams can represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks can sometimes be executed in the reverse order, depending on the functionality involved. Such variations will depend on the functionality of the system implementing the blocks and what is functionally or chronologically desirable under the circumstances. It will also be noted that each block of the block diagrams and / or flowchart illustrations, and combinations of blocks in the block diagrams and / or flowchart illustrations, can be implemented by special purpose hardware -based systems that perform the specified functions or combinations of special purpose hardware and computer instructions.

[0060] In light of the foregoing, the scope of the present disclosure is determined by the appended claims.

Claims

1. A system comprising: a laser; a photodiode; a side mode suppression ratio, SMSR, sensor, the SMSR sensor optically connected to the laser; a variable optical attenuator, VOA, the VOA optically connected to the laser; an optical modulator having an input side connected to the VOA and an output side connected to the photodiode; a first tap disposed between the laser and both the SMSR sensor and the VOA; a second tap disposed between the optical modulator and both the photodiode and an output path, the laser optically connected to a laser / chip coupler via a first mirror, and wherein the laser is optically connected to the first tap via a second adjustable mirror; and a logic controller electrically connected to the laser, the photodiode, the SMSR sensor, and the VOA, the logic controller configured to adjust a bias of the laser and an attenuation level of the VOA based on an SMSR target, an SMSR reading from the SMSR sensor, and an optical power reading from the photodiode, wherein the logic controller is electrically connected to the second adjustable mirror and configured to adjust the second adjustable mirror to selectively reflect a portion of a light beam generated by the laser back to the laser. the logic controller is further configured to adjust the bias and the attenuation level according to a predetermined output power range to maintain the optical power.

2. The system of claim 1, wherein, the first tap provides a first portion of the light beam generated by the laser to the SMSR sensor and a second portion of the light beam to the VOA, wherein the second portion includes more optical power than the first portion; and 3. The system of claim 1 or 2, wherein, wherein the second tap provides a third portion of the light beam to the photodiode and a fourth portion of the light beam to the output path, wherein the fourth portion includes more optical power than the third portion.

4. The system of the preceding claim 1 or 2, further comprising: a shared photonic chip, wherein the SMSR sensor, the VOA, the optical modulator, and the photodiode are defined in the shared photonic chip, and the laser and the logic controller are connected to the shared photonic chip.

5. The system of the preceding claim 1 or 2, further comprising: a laser driver electrically connected between the logic controller and the laser, the laser driver configured to provide a driving voltage or current to the laser according to the bias adjusted by the logic controller.

6. A method comprising: generating a carrier wave by a laser; adjusting a position of a mirror that receives the carrier wave into a shared photonic chip; measuring a side mode suppression ratio, SMSR, of the carrier wave; measuring an average optical power of the carrier wave; and ​ ​ adjusting at least one of a drive voltage or current of the laser of the carrier wave and an attenuation level of the carrier wave to maintain an average optical power of the carrier wave and increase the SMSR.

7. The method of claim 6, further comprising: in response to increasing the drive voltage or current, increasing the attenuation level.

8. The method of claim 6 or 7, further comprising: modulating the carrier wave to carry a data signal by an optical modulator, wherein the average optical power of the carrier wave is measured downstream of the optical modulator.

9. The method of claim 8, wherein, the SMSR of the carrier wave is measured by an SMSR sensor located upstream of the optical modulator; and wherein the attenuation level of the carrier wave is adjusted by a variable optical attenuator located upstream of the optical modulator.

10. The method of claim 6 or 7, further comprising: adjusting a mirror included in the laser to selectively reflect a portion of the carrier wave back to the laser.

11. The method of claim 6 or 7, wherein, the carrier wave is generated by a laser driver biasing the laser based on the SMSR and the average optical power.

12. A logic controller, comprising: a processor; and a memory including instructions that, when executed by the processor, perform operations comprising: adjusting a position of a mirror that receives a carrier wave into a shared photonic chip; measuring a side mode suppression ratio (SMSR) of the carrier wave in the shared photonic chip; measuring an average optical power (AOP) of the carrier wave in the shared photonic chip; transmitting a bias voltage based on the SMSR and the AOP to a laser driver of a laser used to generate the carrier wave; and transmitting an attenuation level based on the SMSR and the AOP to a variable optical attenuator (VOA).

13. The logic controller of claim 12, wherein, the SMSR is measured by an SMSR sensor based on a tapped portion of the carrier wave in an unmodulated state.

14. The logic controller of claim 12 or 13, wherein, the AOP is measured by a photodiode based on a tapped portion of the carrier wave in a modulated state.

15. The logic controller of claim 12 or 13, wherein, the operations further comprise: adjusting a mirror included in the laser to selectively reflect a portion of the carrier wave back to the laser.

16. The logic controller of claim 12 or 13, wherein, the operations further comprise: in response to determining to increase the bias voltage from a current level, increasing the attenuation level based on the increased bias voltage to maintain the AOP within an output range.

17. The logic controller of claim 12 or 13, wherein, the operations further comprise: in response to determining to decrease the bias voltage from a current level, decreasing the attenuation level based on the decreased bias voltage to maintain the AOP within an output range.

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